git://bbs.cooldavid.org / net-next-2.6.git / blame
| Commit | Line | Data |
|---|---|---|
| 382266ad | 1 | /* |
| 4baa9922 | 2 | * arch/arm/include/asm/hardware/cache-l2x0.h |
| 382266ad CM |
3 | * |
| 4 | * Copyright (C) 2007 ARM Limited | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | * | |
| 10 | * This program is distributed in the hope that it will be useful, | |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 13 | * GNU General Public License for more details. | |
| 14 | * | |
| 15 | * You should have received a copy of the GNU General Public License | |
| 16 | * along with this program; if not, write to the Free Software | |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 18 | */ | |
| 19 | ||
| 20 | #ifndef __ASM_ARM_HARDWARE_L2X0_H | |
| 21 | #define __ASM_ARM_HARDWARE_L2X0_H | |
| 22 | ||
| 23 | #define L2X0_CACHE_ID 0x000 | |
| 24 | #define L2X0_CACHE_TYPE 0x004 | |
| 25 | #define L2X0_CTRL 0x100 | |
| 26 | #define L2X0_AUX_CTRL 0x104 | |
| 1b504bbe CT |
27 | #define L2X0_TAG_LATENCY_CTRL 0x108 |
| 28 | #define L2X0_DATA_LATENCY_CTRL 0x10C | |
| 382266ad CM |
29 | #define L2X0_EVENT_CNT_CTRL 0x200 |
| 30 | #define L2X0_EVENT_CNT1_CFG 0x204 | |
| 31 | #define L2X0_EVENT_CNT0_CFG 0x208 | |
| 32 | #define L2X0_EVENT_CNT1_VAL 0x20C | |
| 33 | #define L2X0_EVENT_CNT0_VAL 0x210 | |
| 34 | #define L2X0_INTR_MASK 0x214 | |
| 35 | #define L2X0_MASKED_INTR_STAT 0x218 | |
| 36 | #define L2X0_RAW_INTR_STAT 0x21C | |
| 37 | #define L2X0_INTR_CLEAR 0x220 | |
| 38 | #define L2X0_CACHE_SYNC 0x730 | |
| 39 | #define L2X0_INV_LINE_PA 0x770 | |
| 40 | #define L2X0_INV_WAY 0x77C | |
| 41 | #define L2X0_CLEAN_LINE_PA 0x7B0 | |
| 42 | #define L2X0_CLEAN_LINE_IDX 0x7B8 | |
| 43 | #define L2X0_CLEAN_WAY 0x7BC | |
| 44 | #define L2X0_CLEAN_INV_LINE_PA 0x7F0 | |
| 45 | #define L2X0_CLEAN_INV_LINE_IDX 0x7F8 | |
| 46 | #define L2X0_CLEAN_INV_WAY 0x7FC | |
| 47 | #define L2X0_LOCKDOWN_WAY_D 0x900 | |
| 48 | #define L2X0_LOCKDOWN_WAY_I 0x904 | |
| 49 | #define L2X0_TEST_OPERATION 0xF00 | |
| 50 | #define L2X0_LINE_DATA 0xF10 | |
| 51 | #define L2X0_LINE_TAG 0xF30 | |
| 52 | #define L2X0_DEBUG_CTRL 0xF40 | |
| 63612a1f KP |
53 | #define L2X0_PREFETCH_CTRL 0xF60 |
| 54 | #define L2X0_POWER_CTRL 0xF80 | |
| 55 | #define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1) | |
| 56 | #define L2X0_STNDBY_MODE_EN (1 << 0) | |
| 382266ad | 57 | |
| 7db27e86 SS |
58 | /* Registers shifts and masks */ |
| 59 | #define L2X0_CACHE_ID_PART_MASK (0xf << 6) | |
| 60 | #define L2X0_CACHE_ID_PART_L210 (1 << 6) | |
| 61 | #define L2X0_CACHE_ID_PART_L310 (3 << 6) | |
| 5ba70372 | 62 | #define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x3 << 17) |
| 7db27e86 | 63 | |
| 382266ad CM |
64 | #ifndef __ASSEMBLY__ |
| 65 | extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); | |
| 66 | #endif | |
| 67 | ||
| 68 | #endif |