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Merge branch 'kconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6
[net-next-2.6.git] / arch / arm / Kconfig
CommitLineData
1da177e4
LT
1config ARM
2 bool
3 default y
e17c6d56 4 select HAVE_AOUT
2064c946 5 select HAVE_IDE
2778f620 6 select HAVE_MEMBLOCK
12b824fb 7 select RTC_LIB
75e7153a 8 select SYS_SUPPORTS_APM_EMULATION
24b44a66 9 select GENERIC_ATOMIC64 if (!CPU_32v6K)
fe166148 10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
5cbad0eb 11 select HAVE_ARCH_KGDB
3f550096 12 select HAVE_KPROBES if (!XIP_KERNEL)
9edddaa2 13 select HAVE_KRETPROBES if (HAVE_KPROBES)
606576ce 14 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
80be7a7f
RV
15 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
16 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
1fe53268 17 select HAVE_GENERIC_DMA_COHERENT
e7db7b42
AT
18 select HAVE_KERNEL_GZIP
19 select HAVE_KERNEL_LZO
6e8699f7 20 select HAVE_KERNEL_LZMA
e360adbe 21 select HAVE_IRQ_WORK
7ada189f
JI
22 select HAVE_PERF_EVENTS
23 select PERF_USE_VMALLOC
e513f8bf 24 select HAVE_REGS_AND_STACK_ACCESS_API
19852e59 25 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
1da177e4
LT
26 help
27 The ARM series is a line of low-power-consumption RISC chip designs
f6c8965a 28 licensed by ARM Ltd and targeted at embedded applications and
1da177e4 29 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
f6c8965a 30 manufactured, but legacy ARM-based PC hardware remains popular in
1da177e4
LT
31 Europe. There is an ARM Linux project with a web page at
32 <http://www.arm.linux.org.uk/>.
33
1a189b97
RK
34config HAVE_PWM
35 bool
36
75e7153a
RB
37config SYS_SUPPORTS_APM_EMULATION
38 bool
39
0a938b97
DB
40config GENERIC_GPIO
41 bool
0a938b97 42
5cfc8ee0
JS
43config ARCH_USES_GETTIMEOFFSET
44 bool
45 default n
746140c7 46
0567a0c0
KH
47config GENERIC_CLOCKEVENTS
48 bool
0567a0c0 49
a8655e83
CM
50config GENERIC_CLOCKEVENTS_BROADCAST
51 bool
52 depends on GENERIC_CLOCKEVENTS
5388a6b2 53 default y if SMP
a8655e83 54
bc581770
LW
55config HAVE_TCM
56 bool
57 select GENERIC_ALLOCATOR
58
e119bfff
RK
59config HAVE_PROC_CPU
60 bool
61
5ea81769
AV
62config NO_IOPORT
63 bool
5ea81769 64
1da177e4
LT
65config EISA
66 bool
67 ---help---
68 The Extended Industry Standard Architecture (EISA) bus was
69 developed as an open alternative to the IBM MicroChannel bus.
70
71 The EISA bus provided some of the features of the IBM MicroChannel
72 bus while maintaining backward compatibility with cards made for
73 the older ISA bus. The EISA bus saw limited use between 1988 and
74 1995 when it was made obsolete by the PCI bus.
75
76 Say Y here if you are building a kernel for an EISA-based machine.
77
78 Otherwise, say N.
79
80config SBUS
81 bool
82
83config MCA
84 bool
85 help
86 MicroChannel Architecture is found in some IBM PS/2 machines and
87 laptops. It is a bus system similar to PCI or ISA. See
88 <file:Documentation/mca.txt> (and especially the web page given
89 there) before attempting to build an MCA bus kernel.
90
4a2581a0
TG
91config GENERIC_HARDIRQS
92 bool
93 default y
94
f16fb1ec
RK
95config STACKTRACE_SUPPORT
96 bool
97 default y
98
f76e9154
NP
99config HAVE_LATENCYTOP_SUPPORT
100 bool
101 depends on !SMP
102 default y
103
f16fb1ec
RK
104config LOCKDEP_SUPPORT
105 bool
106 default y
107
7ad1bcb2
RK
108config TRACE_IRQFLAGS_SUPPORT
109 bool
110 default y
111
4a2581a0
TG
112config HARDIRQS_SW_RESEND
113 bool
114 default y
115
116config GENERIC_IRQ_PROBE
117 bool
118 default y
119
95c354fe
NP
120config GENERIC_LOCKBREAK
121 bool
122 default y
123 depends on SMP && PREEMPT
124
1da177e4
LT
125config RWSEM_GENERIC_SPINLOCK
126 bool
127 default y
128
129config RWSEM_XCHGADD_ALGORITHM
130 bool
131
f0d1b0b3
DH
132config ARCH_HAS_ILOG2_U32
133 bool
f0d1b0b3
DH
134
135config ARCH_HAS_ILOG2_U64
136 bool
f0d1b0b3 137
89c52ed4
BD
138config ARCH_HAS_CPUFREQ
139 bool
140 help
141 Internal node to signify that the ARCH has CPUFREQ support
142 and that the relevant menu configurations are displayed for
143 it.
144
c7b0aff4
KH
145config ARCH_HAS_CPU_IDLE_WAIT
146 def_bool y
147
b89c3b16
AM
148config GENERIC_HWEIGHT
149 bool
150 default y
151
1da177e4
LT
152config GENERIC_CALIBRATE_DELAY
153 bool
154 default y
155
a08b6b79
AV
156config ARCH_MAY_HAVE_PC_FDC
157 bool
158
5ac6da66
CL
159config ZONE_DMA
160 bool
5ac6da66 161
ccd7ab7f
FT
162config NEED_DMA_MAP_STATE
163 def_bool y
164
1da177e4
LT
165config GENERIC_ISA_DMA
166 bool
167
1da177e4
LT
168config FIQ
169 bool
170
034d2f5a
AV
171config ARCH_MTD_XIP
172 bool
173
60a752ef 174config GENERIC_HARDIRQS_NO__DO_IRQ
60a752ef
PZ
175 def_bool y
176
d6d502fa
KK
177config ARM_L1_CACHE_SHIFT_6
178 bool
179 help
180 Setting ARM L1 cache line size to 64 Bytes.
181
c760fc19
HC
182config VECTORS_BASE
183 hex
6afd6fae 184 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
c760fc19
HC
185 default DRAM_BASE if REMAP_VECTORS_TO_RAM
186 default 0x00000000
187 help
188 The base address of exception vectors.
189
1da177e4
LT
190source "init/Kconfig"
191
dc52ddc0
MH
192source "kernel/Kconfig.freezer"
193
1da177e4
LT
194menu "System Type"
195
3c427975
HC
196config MMU
197 bool "MMU-based Paged Memory Management Support"
198 default y
199 help
200 Select if you want MMU-based virtualised addressing space
201 support by paged memory management. If unsure, say 'Y'.
202
ccf50e23
RK
203#
204# The "ARM system type" choice list is ordered alphabetically by option
205# text. Please add new entries in the option alphabetic order.
206#
1da177e4
LT
207choice
208 prompt "ARM system type"
6a0e2430 209 default ARCH_VERSATILE
1da177e4 210
4af6fee1
DS
211config ARCH_AAEC2000
212 bool "Agilent AAEC-2000 based"
c750815e 213 select CPU_ARM920T
4af6fee1 214 select ARM_AMBA
9483a578 215 select HAVE_CLK
5cfc8ee0 216 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
217 help
218 This enables support for systems based on the Agilent AAEC-2000
219
220config ARCH_INTEGRATOR
221 bool "ARM Ltd. Integrator family"
222 select ARM_AMBA
89c52ed4 223 select ARCH_HAS_CPUFREQ
d72fbdf0 224 select COMMON_CLKDEV
c5a0adb5 225 select ICST
13edd86d 226 select GENERIC_CLOCKEVENTS
f4b8b319 227 select PLAT_VERSATILE
4af6fee1
DS
228 help
229 Support for ARM's Integrator platform.
230
231config ARCH_REALVIEW
232 bool "ARM Ltd. RealView family"
233 select ARM_AMBA
cf30fb4a 234 select COMMON_CLKDEV
c5a0adb5 235 select ICST
ae30ceac 236 select GENERIC_CLOCKEVENTS
eb7fffa3 237 select ARCH_WANT_OPTIONAL_GPIOLIB
f4b8b319 238 select PLAT_VERSATILE
e3887714 239 select ARM_TIMER_SP804
b56ba8aa 240 select GPIO_PL061 if GPIOLIB
4af6fee1
DS
241 help
242 This enables support for ARM Ltd RealView boards.
243
244config ARCH_VERSATILE
245 bool "ARM Ltd. Versatile family"
246 select ARM_AMBA
247 select ARM_VIC
71a06da0 248 select COMMON_CLKDEV
c5a0adb5 249 select ICST
89df1272 250 select GENERIC_CLOCKEVENTS
bbeddc43 251 select ARCH_WANT_OPTIONAL_GPIOLIB
f4b8b319 252 select PLAT_VERSATILE
e3887714 253 select ARM_TIMER_SP804
4af6fee1
DS
254 help
255 This enables support for ARM Ltd Versatile board.
256
ceade897
RK
257config ARCH_VEXPRESS
258 bool "ARM Ltd. Versatile Express family"
259 select ARCH_WANT_OPTIONAL_GPIOLIB
260 select ARM_AMBA
261 select ARM_TIMER_SP804
262 select COMMON_CLKDEV
263 select GENERIC_CLOCKEVENTS
ceade897
RK
264 select HAVE_CLK
265 select ICST
266 select PLAT_VERSATILE
267 help
268 This enables support for the ARM Ltd Versatile Express boards.
269
8fc5ffa0
AV
270config ARCH_AT91
271 bool "Atmel AT91"
f373e8c0 272 select ARCH_REQUIRE_GPIOLIB
93686ae8 273 select HAVE_CLK
4af6fee1 274 help
2b3b3516
AV
275 This enables support for systems based on the Atmel AT91RM9200,
276 AT91SAM9 and AT91CAP9 processors.
4af6fee1 277
ccf50e23
RK
278config ARCH_BCMRING
279 bool "Broadcom BCMRING"
280 depends on MMU
281 select CPU_V6
282 select ARM_AMBA
283 select COMMON_CLKDEV
ccf50e23
RK
284 select GENERIC_CLOCKEVENTS
285 select ARCH_WANT_OPTIONAL_GPIOLIB
286 help
287 Support for Broadcom's BCMRing platform.
288
1da177e4 289config ARCH_CLPS711X
4af6fee1 290 bool "Cirrus Logic CLPS711x/EP721x-based"
c750815e 291 select CPU_ARM720T
5cfc8ee0 292 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
293 help
294 Support for Cirrus Logic 711x/721x based boards.
1da177e4 295
d94f944e
AV
296config ARCH_CNS3XXX
297 bool "Cavium Networks CNS3XXX family"
298 select CPU_V6
d94f944e
AV
299 select GENERIC_CLOCKEVENTS
300 select ARM_GIC
5f32f7a0 301 select PCI_DOMAINS if PCI
d94f944e
AV
302 help
303 Support for Cavium Networks CNS3XXX platform.
304
788c9700
RK
305config ARCH_GEMINI
306 bool "Cortina Systems Gemini"
307 select CPU_FA526
788c9700 308 select ARCH_REQUIRE_GPIOLIB
5cfc8ee0 309 select ARCH_USES_GETTIMEOFFSET
788c9700
RK
310 help
311 Support for the Cortina Systems Gemini family SoCs
312
1da177e4
LT
313config ARCH_EBSA110
314 bool "EBSA-110"
c750815e 315 select CPU_SA110
f7e68bbf 316 select ISA
c5eb2a2b 317 select NO_IOPORT
5cfc8ee0 318 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
319 help
320 This is an evaluation board for the StrongARM processor available
f6c8965a 321 from Digital. It has limited hardware on-board, including an
1da177e4
LT
322 Ethernet interface, two PCMCIA sockets, two serial ports and a
323 parallel port.
324
e7736d47
LB
325config ARCH_EP93XX
326 bool "EP93xx-based"
c750815e 327 select CPU_ARM920T
e7736d47
LB
328 select ARM_AMBA
329 select ARM_VIC
ae696fd5 330 select COMMON_CLKDEV
7444a72e 331 select ARCH_REQUIRE_GPIOLIB
eb33575c 332 select ARCH_HAS_HOLES_MEMORYMODEL
5cfc8ee0 333 select ARCH_USES_GETTIMEOFFSET
e7736d47
LB
334 help
335 This enables support for the Cirrus EP93xx series of CPUs.
336
1da177e4
LT
337config ARCH_FOOTBRIDGE
338 bool "FootBridge"
c750815e 339 select CPU_SA110
1da177e4 340 select FOOTBRIDGE
5cfc8ee0 341 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
342 help
343 Support for systems based on the DC21285 companion chip
344 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
1da177e4 345
788c9700
RK
346config ARCH_MXC
347 bool "Freescale MXC/iMX-based"
788c9700 348 select GENERIC_CLOCKEVENTS
788c9700 349 select ARCH_REQUIRE_GPIOLIB
03e09cd8 350 select COMMON_CLKDEV
788c9700
RK
351 help
352 Support for Freescale MXC/iMX-based family of processors
353
7bd0f2f5 354config ARCH_STMP3XXX
355 bool "Freescale STMP3xxx"
356 select CPU_ARM926T
7bd0f2f5 357 select COMMON_CLKDEV
358 select ARCH_REQUIRE_GPIOLIB
7bd0f2f5 359 select GENERIC_CLOCKEVENTS
7bd0f2f5 360 select USB_ARCH_HAS_EHCI
361 help
362 Support for systems based on the Freescale 3xxx CPUs.
363
4af6fee1
DS
364config ARCH_NETX
365 bool "Hilscher NetX based"
c750815e 366 select CPU_ARM926T
4af6fee1 367 select ARM_VIC
2fcfe6b8 368 select GENERIC_CLOCKEVENTS
f999b8bd 369 help
4af6fee1
DS
370 This enables support for systems based on the Hilscher NetX Soc
371
372config ARCH_H720X
373 bool "Hynix HMS720x-based"
c750815e 374 select CPU_ARM720T
4af6fee1 375 select ISA_DMA_API
5cfc8ee0 376 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
377 help
378 This enables support for systems based on the Hynix HMS720x
379
3b938be6
RK
380config ARCH_IOP13XX
381 bool "IOP13xx-based"
382 depends on MMU
c750815e 383 select CPU_XSC3
3b938be6
RK
384 select PLAT_IOP
385 select PCI
386 select ARCH_SUPPORTS_MSI
8d5796d2 387 select VMSPLIT_1G
3b938be6
RK
388 help
389 Support for Intel's IOP13XX (XScale) family of processors.
390
3f7e5815
LB
391config ARCH_IOP32X
392 bool "IOP32x-based"
a4f7e763 393 depends on MMU
c750815e 394 select CPU_XSCALE
7ae1f7ec 395 select PLAT_IOP
f7e68bbf 396 select PCI
bb2b180c 397 select ARCH_REQUIRE_GPIOLIB
f999b8bd 398 help
3f7e5815
LB
399 Support for Intel's 80219 and IOP32X (XScale) family of
400 processors.
401
402config ARCH_IOP33X
403 bool "IOP33x-based"
404 depends on MMU
c750815e 405 select CPU_XSCALE
7ae1f7ec 406 select PLAT_IOP
3f7e5815 407 select PCI
bb2b180c 408 select ARCH_REQUIRE_GPIOLIB
3f7e5815
LB
409 help
410 Support for Intel's IOP33X (XScale) family of processors.
1da177e4 411
3b938be6
RK
412config ARCH_IXP23XX
413 bool "IXP23XX-based"
a4f7e763 414 depends on MMU
c750815e 415 select CPU_XSC3
3b938be6 416 select PCI
5cfc8ee0 417 select ARCH_USES_GETTIMEOFFSET
f999b8bd 418 help
3b938be6 419 Support for Intel's IXP23xx (XScale) family of processors.
1da177e4
LT
420
421config ARCH_IXP2000
422 bool "IXP2400/2800-based"
a4f7e763 423 depends on MMU
c750815e 424 select CPU_XSCALE
f7e68bbf 425 select PCI
5cfc8ee0 426 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
427 help
428 Support for Intel's IXP2400/2800 (XScale) family of processors.
1da177e4 429
3b938be6
RK
430config ARCH_IXP4XX
431 bool "IXP4xx-based"
a4f7e763 432 depends on MMU
c750815e 433 select CPU_XSCALE
8858e9af 434 select GENERIC_GPIO
3b938be6 435 select GENERIC_CLOCKEVENTS
485bdde7 436 select DMABOUNCE if PCI
c4713074 437 help
3b938be6 438 Support for Intel's IXP4XX (XScale) family of processors.
c4713074 439
edabd38e
SB
440config ARCH_DOVE
441 bool "Marvell Dove"
442 select PCI
edabd38e 443 select ARCH_REQUIRE_GPIOLIB
edabd38e
SB
444 select GENERIC_CLOCKEVENTS
445 select PLAT_ORION
446 help
447 Support for the Marvell Dove SoC 88AP510
448
651c74c7
SB
449config ARCH_KIRKWOOD
450 bool "Marvell Kirkwood"
c750815e 451 select CPU_FEROCEON
651c74c7 452 select PCI
a8865655 453 select ARCH_REQUIRE_GPIOLIB
651c74c7
SB
454 select GENERIC_CLOCKEVENTS
455 select PLAT_ORION
456 help
457 Support for the following Marvell Kirkwood series SoCs:
458 88F6180, 88F6192 and 88F6281.
459
777f9beb
LB
460config ARCH_LOKI
461 bool "Marvell Loki (88RC8480)"
c750815e 462 select CPU_FEROCEON
777f9beb
LB
463 select GENERIC_CLOCKEVENTS
464 select PLAT_ORION
465 help
466 Support for the Marvell Loki (88RC8480) SoC.
467
40805949
KW
468config ARCH_LPC32XX
469 bool "NXP LPC32XX"
470 select CPU_ARM926T
471 select ARCH_REQUIRE_GPIOLIB
472 select HAVE_IDE
473 select ARM_AMBA
474 select USB_ARCH_HAS_OHCI
475 select COMMON_CLKDEV
476 select GENERIC_TIME
477 select GENERIC_CLOCKEVENTS
478 help
479 Support for the NXP LPC32XX family of processors
480
794d15b2
SS
481config ARCH_MV78XX0
482 bool "Marvell MV78xx0"
c750815e 483 select CPU_FEROCEON
794d15b2 484 select PCI
a8865655 485 select ARCH_REQUIRE_GPIOLIB
794d15b2
SS
486 select GENERIC_CLOCKEVENTS
487 select PLAT_ORION
488 help
489 Support for the following Marvell MV78xx0 series SoCs:
490 MV781x0, MV782x0.
491
9dd0b194 492config ARCH_ORION5X
585cf175
TP
493 bool "Marvell Orion"
494 depends on MMU
c750815e 495 select CPU_FEROCEON
038ee083 496 select PCI
a8865655 497 select ARCH_REQUIRE_GPIOLIB
51cbff1d 498 select GENERIC_CLOCKEVENTS
69b02f6a 499 select PLAT_ORION
585cf175 500 help
9dd0b194 501 Support for the following Marvell Orion 5x series SoCs:
d2b2a6bb 502 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
d323ade1 503 Orion-2 (5281), Orion-1-90 (6183).
585cf175 504
788c9700 505config ARCH_MMP
2f7e8fae 506 bool "Marvell PXA168/910/MMP2"
788c9700 507 depends on MMU
788c9700 508 select ARCH_REQUIRE_GPIOLIB
788c9700 509 select COMMON_CLKDEV
788c9700
RK
510 select GENERIC_CLOCKEVENTS
511 select TICK_ONESHOT
512 select PLAT_PXA
0bd86961 513 select SPARSE_IRQ
788c9700 514 help
2f7e8fae 515 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
788c9700
RK
516
517config ARCH_KS8695
518 bool "Micrel/Kendin KS8695"
519 select CPU_ARM922T
98830bc9 520 select ARCH_REQUIRE_GPIOLIB
5cfc8ee0 521 select ARCH_USES_GETTIMEOFFSET
788c9700
RK
522 help
523 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
524 System-on-Chip devices.
525
526config ARCH_NS9XXX
527 bool "NetSilicon NS9xxx"
528 select CPU_ARM926T
529 select GENERIC_GPIO
788c9700
RK
530 select GENERIC_CLOCKEVENTS
531 select HAVE_CLK
532 help
533 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
534 System.
535
536 <http://www.digi.com/products/microprocessors/index.jsp>
537
538config ARCH_W90X900
539 bool "Nuvoton W90X900 CPU"
540 select CPU_ARM926T
c52d3d68 541 select ARCH_REQUIRE_GPIOLIB
0e4a34bb 542 select COMMON_CLKDEV
58b5369e 543 select GENERIC_CLOCKEVENTS
788c9700 544 help
a8bc4ead 545 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
546 At present, the w90x900 has been renamed nuc900, regarding
547 the ARM series product line, you can login the following
548 link address to know more.
549
550 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
551 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
788c9700 552
a62e9030 553config ARCH_NUC93X
554 bool "Nuvoton NUC93X CPU"
555 select CPU_ARM926T
a62e9030 556 select COMMON_CLKDEV
557 help
558 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
559 low-power and high performance MPEG-4/JPEG multimedia controller chip.
560
c5f80065
EG
561config ARCH_TEGRA
562 bool "NVIDIA Tegra"
563 select GENERIC_TIME
564 select GENERIC_CLOCKEVENTS
565 select GENERIC_GPIO
566 select HAVE_CLK
d8611961 567 select COMMON_CLKDEV
c5f80065 568 select ARCH_HAS_BARRIERS if CACHE_L2X0
7056d423 569 select ARCH_HAS_CPUFREQ
c5f80065
EG
570 help
571 This enables support for NVIDIA Tegra based systems (Tegra APX,
572 Tegra 6xx and Tegra 2 series).
573
4af6fee1
DS
574config ARCH_PNX4008
575 bool "Philips Nexperia PNX4008 Mobile"
c750815e 576 select CPU_ARM926T
6985a5ad 577 select COMMON_CLKDEV
5cfc8ee0 578 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
579 help
580 This enables support for Philips PNX4008 mobile platform.
581
1da177e4 582config ARCH_PXA
2c8086a5 583 bool "PXA2xx/PXA3xx-based"
a4f7e763 584 depends on MMU
034d2f5a 585 select ARCH_MTD_XIP
89c52ed4 586 select ARCH_HAS_CPUFREQ
8c3abc7d 587 select COMMON_CLKDEV
7444a72e 588 select ARCH_REQUIRE_GPIOLIB
981d0f39 589 select GENERIC_CLOCKEVENTS
a88264c2 590 select TICK_ONESHOT
bd5ce433 591 select PLAT_PXA
6ac6b817 592 select SPARSE_IRQ
f999b8bd 593 help
2c8086a5 594 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
1da177e4 595
788c9700
RK
596config ARCH_MSM
597 bool "Qualcomm MSM"
4b536b8d 598 select HAVE_CLK
49cbe786 599 select GENERIC_CLOCKEVENTS
923a081c 600 select ARCH_REQUIRE_GPIOLIB
49cbe786 601 help
4b53eb4f
DW
602 Support for Qualcomm MSM/QSD based systems. This runs on the
603 apps processor of the MSM/QSD and depends on a shared memory
604 interface to the modem processor which runs the baseband
605 stack and controls some vital subsystems
606 (clock and power control, etc).
49cbe786 607
c793c1b0
MD
608config ARCH_SHMOBILE
609 bool "Renesas SH-Mobile"
610 help
611 Support for Renesas's SH-Mobile ARM platforms
612
1da177e4
LT
613config ARCH_RPC
614 bool "RiscPC"
615 select ARCH_ACORN
616 select FIQ
617 select TIMER_ACORN
a08b6b79 618 select ARCH_MAY_HAVE_PC_FDC
341eb781 619 select HAVE_PATA_PLATFORM
065909b9 620 select ISA_DMA_API
5ea81769 621 select NO_IOPORT
07f841b7 622 select ARCH_SPARSEMEM_ENABLE
5cfc8ee0 623 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
624 help
625 On the Acorn Risc-PC, Linux can support the internal IDE disk and
626 CD-ROM interface, serial and parallel port, and the floppy drive.
627
628config ARCH_SA1100
629 bool "SA1100-based"
c750815e 630 select CPU_SA1100
f7e68bbf 631 select ISA
05944d74 632 select ARCH_SPARSEMEM_ENABLE
034d2f5a 633 select ARCH_MTD_XIP
89c52ed4 634 select ARCH_HAS_CPUFREQ
1937f5b9 635 select CPU_FREQ
3e238be2 636 select GENERIC_CLOCKEVENTS
9483a578 637 select HAVE_CLK
3e238be2 638 select TICK_ONESHOT
7444a72e 639 select ARCH_REQUIRE_GPIOLIB
f999b8bd
MM
640 help
641 Support for StrongARM 11x0 based boards.
1da177e4
LT
642
643config ARCH_S3C2410
63b1f51b 644 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
0a938b97 645 select GENERIC_GPIO
9d56c02a 646 select ARCH_HAS_CPUFREQ
9483a578 647 select HAVE_CLK
5cfc8ee0 648 select ARCH_USES_GETTIMEOFFSET
4b623926 649 select HAVE_S3C2410_I2C
1da177e4
LT
650 help
651 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
652 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
f6c8965a 653 the Samsung SMDK2410 development board (and derivatives).
1da177e4 654
63b1f51b
BD
655 Note, the S3C2416 and the S3C2450 are so close that they even share
656 the same SoC ID code. This means that there is no seperate machine
657 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
658
a08ab637
BD
659config ARCH_S3C64XX
660 bool "Samsung S3C64XX"
89f1fa08 661 select PLAT_SAMSUNG
89f0ce72 662 select CPU_V6
89f0ce72 663 select ARM_VIC
a08ab637 664 select HAVE_CLK
89f0ce72 665 select NO_IOPORT
5cfc8ee0 666 select ARCH_USES_GETTIMEOFFSET
89c52ed4 667 select ARCH_HAS_CPUFREQ
89f0ce72
BD
668 select ARCH_REQUIRE_GPIOLIB
669 select SAMSUNG_CLKSRC
670 select SAMSUNG_IRQ_VIC_TIMER
671 select SAMSUNG_IRQ_UART
672 select S3C_GPIO_TRACK
673 select S3C_GPIO_PULL_UPDOWN
674 select S3C_GPIO_CFG_S3C24XX
675 select S3C_GPIO_CFG_S3C64XX
676 select S3C_DEV_NAND
677 select USB_ARCH_HAS_OHCI
678 select SAMSUNG_GPIOLIB_4BIT
4b623926 679 select HAVE_S3C2410_I2C
d8653d9f 680 select HAVE_S3C2410_WATCHDOG
a08ab637
BD
681 help
682 Samsung S3C64XX series based systems
683
49b7a491
KK
684config ARCH_S5P64X0
685 bool "Samsung S5P6440 S5P6450"
c4ffccdd
KK
686 select CPU_V6
687 select GENERIC_GPIO
688 select HAVE_CLK
d8653d9f 689 select HAVE_S3C2410_WATCHDOG
925c68cd 690 select ARCH_USES_GETTIMEOFFSET
4b623926 691 select HAVE_S3C2410_I2C
03eb2749 692 select HAVE_S3C_RTC
c4ffccdd 693 help
49b7a491
KK
694 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
695 SMDK6450.
c4ffccdd 696
550db7f1
KK
697config ARCH_S5P6442
698 bool "Samsung S5P6442"
699 select CPU_V6
700 select GENERIC_GPIO
701 select HAVE_CLK
925c68cd 702 select ARCH_USES_GETTIMEOFFSET
d8653d9f 703 select HAVE_S3C2410_WATCHDOG
550db7f1
KK
704 help
705 Samsung S5P6442 CPU based systems
706
acc84707
MS
707config ARCH_S5PC100
708 bool "Samsung S5PC100"
5a7652f2
BM
709 select GENERIC_GPIO
710 select HAVE_CLK
711 select CPU_V7
d6d502fa 712 select ARM_L1_CACHE_SHIFT_6
925c68cd 713 select ARCH_USES_GETTIMEOFFSET
4b623926 714 select HAVE_S3C2410_I2C
03eb2749 715 select HAVE_S3C_RTC
d8653d9f 716 select HAVE_S3C2410_WATCHDOG
5a7652f2 717 help
acc84707 718 Samsung S5PC100 series based systems
5a7652f2 719
170f4e42
KK
720config ARCH_S5PV210
721 bool "Samsung S5PV210/S5PC110"
722 select CPU_V7
723 select GENERIC_GPIO
724 select HAVE_CLK
725 select ARM_L1_CACHE_SHIFT_6
925c68cd 726 select ARCH_USES_GETTIMEOFFSET
4b623926 727 select HAVE_S3C2410_I2C
03eb2749 728 select HAVE_S3C_RTC
d8653d9f 729 select HAVE_S3C2410_WATCHDOG
170f4e42
KK
730 help
731 Samsung S5PV210/S5PC110 series based systems
732
cc0e72b8
CY
733config ARCH_S5PV310
734 bool "Samsung S5PV310/S5PC210"
735 select CPU_V7
736 select GENERIC_GPIO
737 select HAVE_CLK
738 select GENERIC_CLOCKEVENTS
739 help
740 Samsung S5PV310 series based systems
741
1da177e4
LT
742config ARCH_SHARK
743 bool "Shark"
c750815e 744 select CPU_SA110
f7e68bbf
RK
745 select ISA
746 select ISA_DMA
3bca103a 747 select ZONE_DMA
f7e68bbf 748 select PCI
5cfc8ee0 749 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
750 help
751 Support for the StrongARM based Digital DNARD machine, also known
752 as "Shark" (<http://www.shark-linux.de/shark.html>).
1da177e4 753
83ef3338
HK
754config ARCH_TCC_926
755 bool "Telechips TCC ARM926-based systems"
756 select CPU_ARM926T
757 select HAVE_CLK
758 select COMMON_CLKDEV
759 select GENERIC_CLOCKEVENTS
760 help
761 Support for Telechips TCC ARM926-based systems.
762
1da177e4
LT
763config ARCH_LH7A40X
764 bool "Sharp LH7A40X"
c750815e 765 select CPU_ARM922T
4ba3f7c5 766 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
5cfc8ee0 767 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
768 help
769 Say Y here for systems based on one of the Sharp LH7A40X
770 System on a Chip processors. These CPUs include an ARM922T
771 core with a wide array of integrated devices for
772 hand-held and low-power applications.
773
d98aac75
LW
774config ARCH_U300
775 bool "ST-Ericsson U300 Series"
776 depends on MMU
777 select CPU_ARM926T
bc581770 778 select HAVE_TCM
d98aac75
LW
779 select ARM_AMBA
780 select ARM_VIC
d98aac75 781 select GENERIC_CLOCKEVENTS
d98aac75
LW
782 select COMMON_CLKDEV
783 select GENERIC_GPIO
784 help
785 Support for ST-Ericsson U300 series mobile platforms.
786
ccf50e23
RK
787config ARCH_U8500
788 bool "ST-Ericsson U8500 Series"
789 select CPU_V7
790 select ARM_AMBA
ccf50e23
RK
791 select GENERIC_CLOCKEVENTS
792 select COMMON_CLKDEV
94bdc0e2 793 select ARCH_REQUIRE_GPIOLIB
ccf50e23
RK
794 help
795 Support for ST-Ericsson's Ux500 architecture
796
797config ARCH_NOMADIK
798 bool "STMicroelectronics Nomadik"
799 select ARM_AMBA
800 select ARM_VIC
801 select CPU_ARM926T
ccf50e23 802 select COMMON_CLKDEV
ccf50e23 803 select GENERIC_CLOCKEVENTS
ccf50e23
RK
804 select ARCH_REQUIRE_GPIOLIB
805 help
806 Support for the Nomadik platform by ST-Ericsson
807
7c6337e2
KH
808config ARCH_DAVINCI
809 bool "TI DaVinci"
7c6337e2 810 select GENERIC_CLOCKEVENTS
dce1115b 811 select ARCH_REQUIRE_GPIOLIB
3bca103a 812 select ZONE_DMA
9232fcc9 813 select HAVE_IDE
c5b736d0 814 select COMMON_CLKDEV
20e9969b 815 select GENERIC_ALLOCATOR
ae88e05a 816 select ARCH_HAS_HOLES_MEMORYMODEL
7c6337e2
KH
817 help
818 Support for TI's DaVinci platform.
819
3b938be6
RK
820config ARCH_OMAP
821 bool "TI OMAP"
9483a578 822 select HAVE_CLK
7444a72e 823 select ARCH_REQUIRE_GPIOLIB
89c52ed4 824 select ARCH_HAS_CPUFREQ
06cad098 825 select GENERIC_CLOCKEVENTS
9af915da 826 select ARCH_HAS_HOLES_MEMORYMODEL
3b938be6 827 help
6e457bb0 828 Support for TI's OMAP platform (OMAP1/2/3/4).
3b938be6 829
cee37e50 830config PLAT_SPEAR
831 bool "ST SPEAr"
832 select ARM_AMBA
833 select ARCH_REQUIRE_GPIOLIB
834 select COMMON_CLKDEV
835 select GENERIC_CLOCKEVENTS
cee37e50 836 select HAVE_CLK
837 help
838 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
839
1da177e4
LT
840endchoice
841
ccf50e23
RK
842#
843# This is sorted alphabetically by mach-* pathname. However, plat-*
844# Kconfigs may be included either alphabetically (according to the
845# plat- suffix) or along side the corresponding mach-* source.
846#
95b8f20f
RK
847source "arch/arm/mach-aaec2000/Kconfig"
848
849source "arch/arm/mach-at91/Kconfig"
850
851source "arch/arm/mach-bcmring/Kconfig"
852
1da177e4
LT
853source "arch/arm/mach-clps711x/Kconfig"
854
d94f944e
AV
855source "arch/arm/mach-cns3xxx/Kconfig"
856
95b8f20f
RK
857source "arch/arm/mach-davinci/Kconfig"
858
859source "arch/arm/mach-dove/Kconfig"
860
e7736d47
LB
861source "arch/arm/mach-ep93xx/Kconfig"
862
1da177e4
LT
863source "arch/arm/mach-footbridge/Kconfig"
864
59d3a193
PZ
865source "arch/arm/mach-gemini/Kconfig"
866
95b8f20f
RK
867source "arch/arm/mach-h720x/Kconfig"
868
1da177e4
LT
869source "arch/arm/mach-integrator/Kconfig"
870
3f7e5815
LB
871source "arch/arm/mach-iop32x/Kconfig"
872
873source "arch/arm/mach-iop33x/Kconfig"
1da177e4 874
285f5fa7
DW
875source "arch/arm/mach-iop13xx/Kconfig"
876
1da177e4
LT
877source "arch/arm/mach-ixp4xx/Kconfig"
878
879source "arch/arm/mach-ixp2000/Kconfig"
880
c4713074
LB
881source "arch/arm/mach-ixp23xx/Kconfig"
882
95b8f20f
RK
883source "arch/arm/mach-kirkwood/Kconfig"
884
885source "arch/arm/mach-ks8695/Kconfig"
886
887source "arch/arm/mach-lh7a40x/Kconfig"
888
777f9beb
LB
889source "arch/arm/mach-loki/Kconfig"
890
40805949
KW
891source "arch/arm/mach-lpc32xx/Kconfig"
892
95b8f20f
RK
893source "arch/arm/mach-msm/Kconfig"
894
794d15b2
SS
895source "arch/arm/mach-mv78xx0/Kconfig"
896
95b8f20f 897source "arch/arm/plat-mxc/Kconfig"
1da177e4 898
95b8f20f 899source "arch/arm/mach-netx/Kconfig"
49cbe786 900
95b8f20f
RK
901source "arch/arm/mach-nomadik/Kconfig"
902source "arch/arm/plat-nomadik/Kconfig"
903
904source "arch/arm/mach-ns9xxx/Kconfig"
1da177e4 905
186f93ea 906source "arch/arm/mach-nuc93x/Kconfig"
1da177e4 907
d48af15e
TL
908source "arch/arm/plat-omap/Kconfig"
909
910source "arch/arm/mach-omap1/Kconfig"
1da177e4 911
1dbae815
TL
912source "arch/arm/mach-omap2/Kconfig"
913
9dd0b194 914source "arch/arm/mach-orion5x/Kconfig"
585cf175 915
95b8f20f
RK
916source "arch/arm/mach-pxa/Kconfig"
917source "arch/arm/plat-pxa/Kconfig"
585cf175 918
95b8f20f
RK
919source "arch/arm/mach-mmp/Kconfig"
920
921source "arch/arm/mach-realview/Kconfig"
922
923source "arch/arm/mach-sa1100/Kconfig"
edabd38e 924
cf383678 925source "arch/arm/plat-samsung/Kconfig"
a21765a7 926source "arch/arm/plat-s3c24xx/Kconfig"
c4ffccdd 927source "arch/arm/plat-s5p/Kconfig"
a21765a7 928
cee37e50 929source "arch/arm/plat-spear/Kconfig"
a21765a7 930
83ef3338
HK
931source "arch/arm/plat-tcc/Kconfig"
932
a21765a7
BD
933if ARCH_S3C2410
934source "arch/arm/mach-s3c2400/Kconfig"
1da177e4 935source "arch/arm/mach-s3c2410/Kconfig"
a21765a7 936source "arch/arm/mach-s3c2412/Kconfig"
f1290a49 937source "arch/arm/mach-s3c2416/Kconfig"
a21765a7 938source "arch/arm/mach-s3c2440/Kconfig"
e4d06e39 939source "arch/arm/mach-s3c2443/Kconfig"
a21765a7 940endif
1da177e4 941
a08ab637 942if ARCH_S3C64XX
431107ea 943source "arch/arm/mach-s3c64xx/Kconfig"
a08ab637
BD
944endif
945
49b7a491 946source "arch/arm/mach-s5p64x0/Kconfig"
c4ffccdd 947
550db7f1 948source "arch/arm/mach-s5p6442/Kconfig"
7bd0f2f5 949
5a7652f2 950source "arch/arm/mach-s5pc100/Kconfig"
5a7652f2 951
170f4e42
KK
952source "arch/arm/mach-s5pv210/Kconfig"
953
cc0e72b8
CY
954source "arch/arm/mach-s5pv310/Kconfig"
955
882d01f9 956source "arch/arm/mach-shmobile/Kconfig"
52c543f9 957
882d01f9 958source "arch/arm/plat-stmp3xxx/Kconfig"
9e73c84c 959
c5f80065
EG
960source "arch/arm/mach-tegra/Kconfig"
961
95b8f20f 962source "arch/arm/mach-u300/Kconfig"
1da177e4 963
95b8f20f 964source "arch/arm/mach-ux500/Kconfig"
1da177e4
LT
965
966source "arch/arm/mach-versatile/Kconfig"
967
ceade897
RK
968source "arch/arm/mach-vexpress/Kconfig"
969
7ec80ddf 970source "arch/arm/mach-w90x900/Kconfig"
971
1da177e4
LT
972# Definitions to make life easier
973config ARCH_ACORN
974 bool
975
7ae1f7ec
LB
976config PLAT_IOP
977 bool
469d3044 978 select GENERIC_CLOCKEVENTS
7ae1f7ec 979
69b02f6a
LB
980config PLAT_ORION
981 bool
982
bd5ce433
EM
983config PLAT_PXA
984 bool
985
f4b8b319
RK
986config PLAT_VERSATILE
987 bool
988
e3887714
RK
989config ARM_TIMER_SP804
990 bool
991
1da177e4
LT
992source arch/arm/mm/Kconfig
993
afe4b25e
LB
994config IWMMXT
995 bool "Enable iWMMXt support"
40305a58
EM
996 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
997 default y if PXA27x || PXA3xx || ARCH_MMP
afe4b25e
LB
998 help
999 Enable support for iWMMXt context switching at run time if
1000 running on a CPU that supports it.
1001
1da177e4
LT
1002# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1003config XSCALE_PMU
1004 bool
1005 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1006 default y
1007
0f4f0672 1008config CPU_HAS_PMU
8954bb0d
WD
1009 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1010 (!ARCH_OMAP3 || OMAP3_EMU)
0f4f0672
JI
1011 default y
1012 bool
1013
3b93e7b0
HC
1014if !MMU
1015source "arch/arm/Kconfig-nommu"
1016endif
1017
9cba3ccc
CM
1018config ARM_ERRATA_411920
1019 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
81d11955 1020 depends on CPU_V6
9cba3ccc
CM
1021 help
1022 Invalidation of the Instruction Cache operation can
1023 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1024 It does not affect the MPCore. This option enables the ARM Ltd.
1025 recommended workaround.
1026
7ce236fc
CM
1027config ARM_ERRATA_430973
1028 bool "ARM errata: Stale prediction on replaced interworking branch"
1029 depends on CPU_V7
1030 help
1031 This option enables the workaround for the 430973 Cortex-A8
1032 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1033 interworking branch is replaced with another code sequence at the
1034 same virtual address, whether due to self-modifying code or virtual
1035 to physical address re-mapping, Cortex-A8 does not recover from the
1036 stale interworking branch prediction. This results in Cortex-A8
1037 executing the new code sequence in the incorrect ARM or Thumb state.
1038 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1039 and also flushes the branch target cache at every context switch.
1040 Note that setting specific bits in the ACTLR register may not be
1041 available in non-secure mode.
1042
855c551f
CM
1043config ARM_ERRATA_458693
1044 bool "ARM errata: Processor deadlock when a false hazard is created"
1045 depends on CPU_V7
1046 help
1047 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1048 erratum. For very specific sequences of memory operations, it is
1049 possible for a hazard condition intended for a cache line to instead
1050 be incorrectly associated with a different cache line. This false
1051 hazard might then cause a processor deadlock. The workaround enables
1052 the L1 caching of the NEON accesses and disables the PLD instruction
1053 in the ACTLR register. Note that setting specific bits in the ACTLR
1054 register may not be available in non-secure mode.
1055
0516e464
CM
1056config ARM_ERRATA_460075
1057 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1058 depends on CPU_V7
1059 help
1060 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1061 erratum. Any asynchronous access to the L2 cache may encounter a
1062 situation in which recent store transactions to the L2 cache are lost
1063 and overwritten with stale memory contents from external memory. The
1064 workaround disables the write-allocate mode for the L2 cache via the
1065 ACTLR register. Note that setting specific bits in the ACTLR register
1066 may not be available in non-secure mode.
1067
9f05027c
WD
1068config ARM_ERRATA_742230
1069 bool "ARM errata: DMB operation may be faulty"
1070 depends on CPU_V7 && SMP
1071 help
1072 This option enables the workaround for the 742230 Cortex-A9
1073 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1074 between two write operations may not ensure the correct visibility
1075 ordering of the two writes. This workaround sets a specific bit in
1076 the diagnostic register of the Cortex-A9 which causes the DMB
1077 instruction to behave as a DSB, ensuring the correct behaviour of
1078 the two writes.
1079
a672e99b
WD
1080config ARM_ERRATA_742231
1081 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1082 depends on CPU_V7 && SMP
1083 help
1084 This option enables the workaround for the 742231 Cortex-A9
1085 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1086 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1087 accessing some data located in the same cache line, may get corrupted
1088 data due to bad handling of the address hazard when the line gets
1089 replaced from one of the CPUs at the same time as another CPU is
1090 accessing it. This workaround sets specific bits in the diagnostic
1091 register of the Cortex-A9 which reduces the linefill issuing
1092 capabilities of the processor.
1093
9e65582a
SS
1094config PL310_ERRATA_588369
1095 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1096 depends on CACHE_L2X0 && ARCH_OMAP4
1097 help
1098 The PL310 L2 cache controller implements three types of Clean &
1099 Invalidate maintenance operations: by Physical Address
1100 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1101 They are architecturally defined to behave as the execution of a
1102 clean operation followed immediately by an invalidate operation,
1103 both performing to the same memory location. This functionality
1104 is not correctly implemented in PL310 as clean lines are not
1105 invalidated as a result of these operations. Note that this errata
1106 uses Texas Instrument's secure monitor api.
cdf357f1
WD
1107
1108config ARM_ERRATA_720789
1109 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1110 depends on CPU_V7 && SMP
1111 help
1112 This option enables the workaround for the 720789 Cortex-A9 (prior to
1113 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1114 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1115 As a consequence of this erratum, some TLB entries which should be
1116 invalidated are not, resulting in an incoherency in the system page
1117 tables. The workaround changes the TLB flushing routines to invalidate
1118 entries regardless of the ASID.
475d92fc
WD
1119
1120config ARM_ERRATA_743622
1121 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1122 depends on CPU_V7
1123 help
1124 This option enables the workaround for the 743622 Cortex-A9
1125 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1126 optimisation in the Cortex-A9 Store Buffer may lead to data
1127 corruption. This workaround sets a specific bit in the diagnostic
1128 register of the Cortex-A9 which disables the Store Buffer
1129 optimisation, preventing the defect from occurring. This has no
1130 visible impact on the overall performance or power consumption of the
1131 processor.
1132
1da177e4
LT
1133endmenu
1134
1135source "arch/arm/common/Kconfig"
1136
1da177e4
LT
1137menu "Bus support"
1138
1139config ARM_AMBA
1140 bool
1141
1142config ISA
1143 bool
1da177e4
LT
1144 help
1145 Find out whether you have ISA slots on your motherboard. ISA is the
1146 name of a bus system, i.e. the way the CPU talks to the other stuff
1147 inside your box. Other bus systems are PCI, EISA, MicroChannel
1148 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1149 newer boards don't support it. If you have ISA, say Y, otherwise N.
1150
065909b9 1151# Select ISA DMA controller support
1da177e4
LT
1152config ISA_DMA
1153 bool
065909b9 1154 select ISA_DMA_API
1da177e4 1155
065909b9 1156# Select ISA DMA interface
5cae841b
AV
1157config ISA_DMA_API
1158 bool
5cae841b 1159
1da177e4 1160config PCI
5f32f7a0 1161 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1da177e4
LT
1162 help
1163 Find out whether you have a PCI motherboard. PCI is the name of a
1164 bus system, i.e. the way the CPU talks to the other stuff inside
1165 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1166 VESA. If you have PCI, say Y, otherwise N.
1167
52882173
AV
1168config PCI_DOMAINS
1169 bool
1170 depends on PCI
1171
36e23590
MW
1172config PCI_SYSCALL
1173 def_bool PCI
1174
1da177e4
LT
1175# Select the host bridge type
1176config PCI_HOST_VIA82C505
1177 bool
1178 depends on PCI && ARCH_SHARK
1179 default y
1180
a0113a99
MR
1181config PCI_HOST_ITE8152
1182 bool
1183 depends on PCI && MACH_ARMCORE
1184 default y
1185 select DMABOUNCE
1186
1da177e4
LT
1187source "drivers/pci/Kconfig"
1188
1189source "drivers/pcmcia/Kconfig"
1190
1191endmenu
1192
1193menu "Kernel Features"
1194
0567a0c0
KH
1195source "kernel/time/Kconfig"
1196
1da177e4
LT
1197config SMP
1198 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
971acb9b 1199 depends on EXPERIMENTAL
bc28248e 1200 depends on GENERIC_CLOCKEVENTS
971acb9b
RK
1201 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1202 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1203 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
f6dd9fa5 1204 select USE_GENERIC_SMP_HELPERS
971acb9b 1205 select HAVE_ARM_SCU
1da177e4
LT
1206 help
1207 This enables support for systems with more than one CPU. If you have
1208 a system with only one CPU, like most personal computers, say N. If
1209 you have a system with more than one CPU, say Y.
1210
1211 If you say N here, the kernel will run on single and multiprocessor
1212 machines, but will use only one CPU of a multiprocessor machine. If
1213 you say Y here, the kernel will run on many, but not all, single
1214 processor machines. On a single processor machine, the kernel will
1215 run faster if you say N here.
1216
03502faa 1217 See also <file:Documentation/i386/IO-APIC.txt>,
1da177e4 1218 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
50a23e6e 1219 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1da177e4
LT
1220
1221 If you don't know what to do here, say N.
1222
f00ec48f
RK
1223config SMP_ON_UP
1224 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1225 depends on EXPERIMENTAL
1226 depends on SMP && !XIP && !THUMB2_KERNEL
1227 default y
1228 help
1229 SMP kernels contain instructions which fail on non-SMP processors.
1230 Enabling this option allows the kernel to modify itself to make
1231 these instructions safe. Disabling it allows about 1K of space
1232 savings.
1233
1234 If you don't know what to do here, say Y.
1235
a8cbcd92
RK
1236config HAVE_ARM_SCU
1237 bool
1238 depends on SMP
1239 help
1240 This option enables support for the ARM system coherency unit
1241
f32f4ce2
RK
1242config HAVE_ARM_TWD
1243 bool
1244 depends on SMP
1245 help
1246 This options enables support for the ARM timer and watchdog unit
1247
8d5796d2
LB
1248choice
1249 prompt "Memory split"
1250 default VMSPLIT_3G
1251 help
1252 Select the desired split between kernel and user memory.
1253
1254 If you are not absolutely sure what you are doing, leave this
1255 option alone!
1256
1257 config VMSPLIT_3G
1258 bool "3G/1G user/kernel split"
1259 config VMSPLIT_2G
1260 bool "2G/2G user/kernel split"
1261 config VMSPLIT_1G
1262 bool "1G/3G user/kernel split"
1263endchoice
1264
1265config PAGE_OFFSET
1266 hex
1267 default 0x40000000 if VMSPLIT_1G
1268 default 0x80000000 if VMSPLIT_2G
1269 default 0xC0000000
1270
1da177e4
LT
1271config NR_CPUS
1272 int "Maximum number of CPUs (2-32)"
1273 range 2 32
1274 depends on SMP
1275 default "4"
1276
a054a811
RK
1277config HOTPLUG_CPU
1278 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1279 depends on SMP && HOTPLUG && EXPERIMENTAL
1280 help
1281 Say Y here to experiment with turning CPUs off and on. CPUs
1282 can be controlled through /sys/devices/system/cpu.
1283
37ee16ae
RK
1284config LOCAL_TIMERS
1285 bool "Use local timer interrupts"
971acb9b 1286 depends on SMP
37ee16ae 1287 default y
971acb9b 1288 select HAVE_ARM_TWD
37ee16ae
RK
1289 help
1290 Enable support for local timers on SMP platforms, rather then the
1291 legacy IPI broadcast method. Local timers allows the system
1292 accounting to be spread across the timer interval, preventing a
1293 "thundering herd" at every timer tick.
1294
d45a398f 1295source kernel/Kconfig.preempt
1da177e4 1296
f8065813
RK
1297config HZ
1298 int
49b7a491 1299 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
2192482e 1300 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
bfe65704 1301 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
5248c657 1302 default AT91_TIMER_HZ if ARCH_AT91
5da3e714 1303 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
f8065813
RK
1304 default 100
1305
16c79651
CM
1306config THUMB2_KERNEL
1307 bool "Compile the kernel in Thumb-2 mode"
1308 depends on CPU_V7 && EXPERIMENTAL
1309 select AEABI
1310 select ARM_ASM_UNIFIED
1311 help
1312 By enabling this option, the kernel will be compiled in
1313 Thumb-2 mode. A compiler/assembler that understand the unified
1314 ARM-Thumb syntax is needed.
1315
1316 If unsure, say N.
1317
0becb088
CM
1318config ARM_ASM_UNIFIED
1319 bool
1320
704bdda0
NP
1321config AEABI
1322 bool "Use the ARM EABI to compile the kernel"
1323 help
1324 This option allows for the kernel to be compiled using the latest
1325 ARM ABI (aka EABI). This is only useful if you are using a user
1326 space environment that is also compiled with EABI.
1327
1328 Since there are major incompatibilities between the legacy ABI and
1329 EABI, especially with regard to structure member alignment, this
1330 option also changes the kernel syscall calling convention to
1331 disambiguate both ABIs and allow for backward compatibility support
1332 (selected with CONFIG_OABI_COMPAT).
1333
1334 To use this you need GCC version 4.0.0 or later.
1335
6c90c872 1336config OABI_COMPAT
a73a3ff1 1337 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
61c484d4 1338 depends on AEABI && EXPERIMENTAL
6c90c872
NP
1339 default y
1340 help
1341 This option preserves the old syscall interface along with the
1342 new (ARM EABI) one. It also provides a compatibility layer to
1343 intercept syscalls that have structure arguments which layout
1344 in memory differs between the legacy ABI and the new ARM EABI
1345 (only for non "thumb" binaries). This option adds a tiny
1346 overhead to all syscalls and produces a slightly larger kernel.
1347 If you know you'll be using only pure EABI user space then you
1348 can say N here. If this option is not selected and you attempt
1349 to execute a legacy ABI binary then the result will be
1350 UNPREDICTABLE (in fact it can be predicted that it won't work
1351 at all). If in doubt say Y.
1352
eb33575c 1353config ARCH_HAS_HOLES_MEMORYMODEL
e80d6a24 1354 bool
e80d6a24 1355
05944d74
RK
1356config ARCH_SPARSEMEM_ENABLE
1357 bool
1358
07a2f737
RK
1359config ARCH_SPARSEMEM_DEFAULT
1360 def_bool ARCH_SPARSEMEM_ENABLE
1361
05944d74 1362config ARCH_SELECT_MEMORY_MODEL
be370302 1363 def_bool ARCH_SPARSEMEM_ENABLE
c80d79d7 1364
053a96ca
NP
1365config HIGHMEM
1366 bool "High Memory Support (EXPERIMENTAL)"
1367 depends on MMU && EXPERIMENTAL
1368 help
1369 The address space of ARM processors is only 4 Gigabytes large
1370 and it has to accommodate user address space, kernel address
1371 space as well as some memory mapped IO. That means that, if you
1372 have a large amount of physical memory and/or IO, not all of the
1373 memory can be "permanently mapped" by the kernel. The physical
1374 memory that is not permanently mapped is called "high memory".
1375
1376 Depending on the selected kernel/user memory split, minimum
1377 vmalloc space and actual amount of RAM, you may not need this
1378 option which should result in a slightly faster kernel.
1379
1380 If unsure, say n.
1381
65cec8e3
RK
1382config HIGHPTE
1383 bool "Allocate 2nd-level pagetables from highmem"
1384 depends on HIGHMEM
1385 depends on !OUTER_CACHE
1386
1b8873a0
JI
1387config HW_PERF_EVENTS
1388 bool "Enable hardware performance counter support for perf events"
fe166148 1389 depends on PERF_EVENTS && CPU_HAS_PMU
1b8873a0
JI
1390 default y
1391 help
1392 Enable hardware performance counter support for perf events. If
1393 disabled, perf events will use software events only.
1394
354e6f72 1395config SPARSE_IRQ
c1ba6ba3 1396 def_bool n
354e6f72 1397 help
1398 This enables support for sparse irqs. This is useful in general
1399 as most CPUs have a fairly sparse array of IRQ vectors, which
1400 the irq_desc then maps directly on to. Systems with a high
1401 number of off-chip IRQs will want to treat this as
1402 experimental until they have been independently verified.
1403
3f22ab27
DH
1404source "mm/Kconfig"
1405
c1b2d970
MD
1406config FORCE_MAX_ZONEORDER
1407 int "Maximum zone order" if ARCH_SHMOBILE
1408 range 11 64 if ARCH_SHMOBILE
1409 default "9" if SA1111
1410 default "11"
1411 help
1412 The kernel memory allocator divides physically contiguous memory
1413 blocks into "zones", where each zone is a power of two number of
1414 pages. This option selects the largest power of two that the kernel
1415 keeps in the memory allocator. If you need to allocate very large
1416 blocks of physically contiguous memory, then you may need to
1417 increase this value.
1418
1419 This config option is actually maximum order plus one. For example,
1420 a value of 11 means that the largest free memory block is 2^10 pages.
1421
1da177e4
LT
1422config LEDS
1423 bool "Timer and CPU usage LEDs"
e055d5bf 1424 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
8c8fdbc9 1425 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1da177e4
LT
1426 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1427 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
73a59c1c 1428 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
25329671 1429 ARCH_AT91 || ARCH_DAVINCI || \
ff3042fb 1430 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1da177e4
LT
1431 help
1432 If you say Y here, the LEDs on your machine will be used
1433 to provide useful information about your current system status.
1434
1435 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1436 be able to select which LEDs are active using the options below. If
1437 you are compiling a kernel for the EBSA-110 or the LART however, the
1438 red LED will simply flash regularly to indicate that the system is
1439 still functional. It is safe to say Y here if you have a CATS
1440 system, but the driver will do nothing.
1441
1442config LEDS_TIMER
1443 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
eebdf7d7
DB
1444 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1445 || MACH_OMAP_PERSEUS2
1da177e4 1446 depends on LEDS
0567a0c0 1447 depends on !GENERIC_CLOCKEVENTS
1da177e4
LT
1448 default y if ARCH_EBSA110
1449 help
1450 If you say Y here, one of the system LEDs (the green one on the
1451 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1452 will flash regularly to indicate that the system is still
1453 operational. This is mainly useful to kernel hackers who are
1454 debugging unstable kernels.
1455
1456 The LART uses the same LED for both Timer LED and CPU usage LED
1457 functions. You may choose to use both, but the Timer LED function
1458 will overrule the CPU usage LED.
1459
1460config LEDS_CPU
1461 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
eebdf7d7
DB
1462 !ARCH_OMAP) \
1463 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1464 || MACH_OMAP_PERSEUS2
1da177e4
LT
1465 depends on LEDS
1466 help
1467 If you say Y here, the red LED will be used to give a good real
1468 time indication of CPU usage, by lighting whenever the idle task
1469 is not currently executing.
1470
1471 The LART uses the same LED for both Timer LED and CPU usage LED
1472 functions. You may choose to use both, but the Timer LED function
1473 will overrule the CPU usage LED.
1474
1475config ALIGNMENT_TRAP
1476 bool
f12d0d7c 1477 depends on CPU_CP15_MMU
1da177e4 1478 default y if !ARCH_EBSA110
e119bfff 1479 select HAVE_PROC_CPU if PROC_FS
1da177e4 1480 help
84eb8d06 1481 ARM processors cannot fetch/store information which is not
1da177e4
LT
1482 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1483 address divisible by 4. On 32-bit ARM processors, these non-aligned
1484 fetch/store instructions will be emulated in software if you say
1485 here, which has a severe performance impact. This is necessary for
1486 correct operation of some network protocols. With an IP-only
1487 configuration it is safe to say N, otherwise say Y.
1488
39ec58f3
LB
1489config UACCESS_WITH_MEMCPY
1490 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1491 depends on MMU && EXPERIMENTAL
1492 default y if CPU_FEROCEON
1493 help
1494 Implement faster copy_to_user and clear_user methods for CPU
1495 cores where a 8-word STM instruction give significantly higher
1496 memory write throughput than a sequence of individual 32bit stores.
1497
1498 A possible side effect is a slight increase in scheduling latency
1499 between threads sharing the same address space if they invoke
1500 such copy operations with large buffers.
1501
1502 However, if the CPU data cache is using a write-allocate mode,
1503 this option is unlikely to provide any performance gain.
1504
70c70d97
NP
1505config SECCOMP
1506 bool
1507 prompt "Enable seccomp to safely compute untrusted bytecode"
1508 ---help---
1509 This kernel feature is useful for number crunching applications
1510 that may need to compute untrusted bytecode during their
1511 execution. By using pipes or other transports made available to
1512 the process as file descriptors supporting the read/write
1513 syscalls, it's possible to isolate those applications in
1514 their own address space using seccomp. Once seccomp is
1515 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1516 and the task is only allowed to execute a few safe syscalls
1517 defined by each seccomp mode.
1518
c743f380
NP
1519config CC_STACKPROTECTOR
1520 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1521 help
1522 This option turns on the -fstack-protector GCC feature. This
1523 feature puts, at the beginning of functions, a canary value on
1524 the stack just before the return address, and validates
1525 the value just before actually returning. Stack based buffer
1526 overflows (that need to overwrite this return address) now also
1527 overwrite the canary, which gets detected and the attack is then
1528 neutralized via a kernel panic.
1529 This feature requires gcc version 4.2 or above.
1530
73a65b3f
UKK
1531config DEPRECATED_PARAM_STRUCT
1532 bool "Provide old way to pass kernel parameters"
1533 help
1534 This was deprecated in 2001 and announced to live on for 5 years.
1535 Some old boot loaders still use this way.
1536
1da177e4
LT
1537endmenu
1538
1539menu "Boot options"
1540
1541# Compressed boot loader in ROM. Yes, we really want to ask about
1542# TEXT and BSS so we preserve their values in the config files.
1543config ZBOOT_ROM_TEXT
1544 hex "Compressed ROM boot loader base address"
1545 default "0"
1546 help
1547 The physical address at which the ROM-able zImage is to be
1548 placed in the target. Platforms which normally make use of
1549 ROM-able zImage formats normally set this to a suitable
1550 value in their defconfig file.
1551
1552 If ZBOOT_ROM is not enabled, this has no effect.
1553
1554config ZBOOT_ROM_BSS
1555 hex "Compressed ROM boot loader BSS address"
1556 default "0"
1557 help
f8c440b2
DF
1558 The base address of an area of read/write memory in the target
1559 for the ROM-able zImage which must be available while the
1560 decompressor is running. It must be large enough to hold the
1561 entire decompressed kernel plus an additional 128 KiB.
1562 Platforms which normally make use of ROM-able zImage formats
1563 normally set this to a suitable value in their defconfig file.
1da177e4
LT
1564
1565 If ZBOOT_ROM is not enabled, this has no effect.
1566
1567config ZBOOT_ROM
1568 bool "Compressed boot loader in ROM/flash"
1569 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1570 help
1571 Say Y here if you intend to execute your compressed kernel image
1572 (zImage) directly from ROM or flash. If unsure, say N.
1573
1574config CMDLINE
1575 string "Default kernel command string"
1576 default ""
1577 help
1578 On some architectures (EBSA110 and CATS), there is currently no way
1579 for the boot loader to pass arguments to the kernel. For these
1580 architectures, you should supply some command-line options at build
1581 time by entering them here. As a minimum, you should specify the
1582 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1583
92d2040d
AH
1584config CMDLINE_FORCE
1585 bool "Always use the default kernel command string"
1586 depends on CMDLINE != ""
1587 help
1588 Always use the default kernel command string, even if the boot
1589 loader passes other arguments to the kernel.
1590 This is useful if you cannot or don't want to change the
1591 command-line options your boot loader passes to the kernel.
1592
1593 If unsure, say N.
1594
1da177e4
LT
1595config XIP_KERNEL
1596 bool "Kernel Execute-In-Place from ROM"
1597 depends on !ZBOOT_ROM
1598 help
1599 Execute-In-Place allows the kernel to run from non-volatile storage
1600 directly addressable by the CPU, such as NOR flash. This saves RAM
1601 space since the text section of the kernel is not loaded from flash
1602 to RAM. Read-write sections, such as the data section and stack,
1603 are still copied to RAM. The XIP kernel is not compressed since
1604 it has to run directly from flash, so it will take more space to
1605 store it. The flash address used to link the kernel object files,
1606 and for storing it, is configuration dependent. Therefore, if you
1607 say Y here, you must know the proper physical address where to
1608 store the kernel image depending on your own flash memory usage.
1609
1610 Also note that the make target becomes "make xipImage" rather than
1611 "make zImage" or "make Image". The final kernel binary to put in
1612 ROM memory will be arch/arm/boot/xipImage.
1613
1614 If unsure, say N.
1615
1616config XIP_PHYS_ADDR
1617 hex "XIP Kernel Physical Location"
1618 depends on XIP_KERNEL
1619 default "0x00080000"
1620 help
1621 This is the physical address in your flash memory the kernel will
1622 be linked for and stored to. This address is dependent on your
1623 own flash usage.
1624
c587e4a6
RP
1625config KEXEC
1626 bool "Kexec system call (EXPERIMENTAL)"
1627 depends on EXPERIMENTAL
1628 help
1629 kexec is a system call that implements the ability to shutdown your
1630 current kernel, and to start another kernel. It is like a reboot
01dd2fbf 1631 but it is independent of the system firmware. And like a reboot
c587e4a6
RP
1632 you can start any kernel with it, not just Linux.
1633
1634 It is an ongoing process to be certain the hardware in a machine
1635 is properly shutdown, so do not be surprised if this code does not
1636 initially work for you. It may help to enable device hotplugging
1637 support.
1638
4cd9d6f7
RP
1639config ATAGS_PROC
1640 bool "Export atags in procfs"
b98d7291
UL
1641 depends on KEXEC
1642 default y
4cd9d6f7
RP
1643 help
1644 Should the atags used to boot the kernel be exported in an "atags"
1645 file in procfs. Useful with kexec.
1646
e69edc79
EM
1647config AUTO_ZRELADDR
1648 bool "Auto calculation of the decompressed kernel image address"
1649 depends on !ZBOOT_ROM && !ARCH_U300
1650 help
1651 ZRELADDR is the physical address where the decompressed kernel
1652 image will be placed. If AUTO_ZRELADDR is selected, the address
1653 will be determined at run-time by masking the current IP with
1654 0xf8000000. This assumes the zImage being placed in the first 128MB
1655 from start of memory.
1656
1da177e4
LT
1657endmenu
1658
ac9d7efc 1659menu "CPU Power Management"
1da177e4 1660
89c52ed4 1661if ARCH_HAS_CPUFREQ
1da177e4
LT
1662
1663source "drivers/cpufreq/Kconfig"
1664
1665config CPU_FREQ_SA1100
1666 bool
1da177e4
LT
1667
1668config CPU_FREQ_SA1110
1669 bool
1da177e4
LT
1670
1671config CPU_FREQ_INTEGRATOR
1672 tristate "CPUfreq driver for ARM Integrator CPUs"
1673 depends on ARCH_INTEGRATOR && CPU_FREQ
1674 default y
1675 help
1676 This enables the CPUfreq driver for ARM Integrator CPUs.
1677
1678 For details, take a look at <file:Documentation/cpu-freq>.
1679
1680 If in doubt, say Y.
1681
9e2697ff
RK
1682config CPU_FREQ_PXA
1683 bool
1684 depends on CPU_FREQ && ARCH_PXA && PXA25x
1685 default y
1686 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1687
b3748ddd
MB
1688config CPU_FREQ_S3C64XX
1689 bool "CPUfreq support for Samsung S3C64XX CPUs"
1690 depends on CPU_FREQ && CPU_S3C6410
1691
9d56c02a
BD
1692config CPU_FREQ_S3C
1693 bool
1694 help
1695 Internal configuration node for common cpufreq on Samsung SoC
1696
1697config CPU_FREQ_S3C24XX
1698 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1699 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1700 select CPU_FREQ_S3C
1701 help
1702 This enables the CPUfreq driver for the Samsung S3C24XX family
1703 of CPUs.
1704
1705 For details, take a look at <file:Documentation/cpu-freq>.
1706
1707 If in doubt, say N.
1708
1709config CPU_FREQ_S3C24XX_PLL
1710 bool "Support CPUfreq changing of PLL frequency"
1711 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1712 help
1713 Compile in support for changing the PLL frequency from the
1714 S3C24XX series CPUfreq driver. The PLL takes time to settle
1715 after a frequency change, so by default it is not enabled.
1716
1717 This also means that the PLL tables for the selected CPU(s) will
1718 be built which may increase the size of the kernel image.
1719
1720config CPU_FREQ_S3C24XX_DEBUG
1721 bool "Debug CPUfreq Samsung driver core"
1722 depends on CPU_FREQ_S3C24XX
1723 help
1724 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1725
1726config CPU_FREQ_S3C24XX_IODEBUG
1727 bool "Debug CPUfreq Samsung driver IO timing"
1728 depends on CPU_FREQ_S3C24XX
1729 help
1730 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1731
e6d197a6
BD
1732config CPU_FREQ_S3C24XX_DEBUGFS
1733 bool "Export debugfs for CPUFreq"
1734 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1735 help
1736 Export status information via debugfs.
1737
1da177e4
LT
1738endif
1739
ac9d7efc
RK
1740source "drivers/cpuidle/Kconfig"
1741
1742endmenu
1743
1da177e4
LT
1744menu "Floating point emulation"
1745
1746comment "At least one emulation must be selected"
1747
1748config FPE_NWFPE
1749 bool "NWFPE math emulation"
8993a44c 1750 depends on !AEABI || OABI_COMPAT
1da177e4
LT
1751 ---help---
1752 Say Y to include the NWFPE floating point emulator in the kernel.
1753 This is necessary to run most binaries. Linux does not currently
1754 support floating point hardware so you need to say Y here even if
1755 your machine has an FPA or floating point co-processor podule.
1756
1757 You may say N here if you are going to load the Acorn FPEmulator
1758 early in the bootup.
1759
1760config FPE_NWFPE_XP
1761 bool "Support extended precision"
bedf142b 1762 depends on FPE_NWFPE
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1763 help
1764 Say Y to include 80-bit support in the kernel floating-point
1765 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1766 Note that gcc does not generate 80-bit operations by default,
1767 so in most cases this option only enlarges the size of the
1768 floating point emulator without any good reason.
1769
1770 You almost surely want to say N here.
1771
1772config FPE_FASTFPE
1773 bool "FastFPE math emulation (EXPERIMENTAL)"
8993a44c 1774 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
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1775 ---help---
1776 Say Y here to include the FAST floating point emulator in the kernel.
1777 This is an experimental much faster emulator which now also has full
1778 precision for the mantissa. It does not support any exceptions.
1779 It is very simple, and approximately 3-6 times faster than NWFPE.
1780
1781 It should be sufficient for most programs. It may be not suitable
1782 for scientific calculations, but you have to check this for yourself.
1783 If you do not feel you need a faster FP emulation you should better
1784 choose NWFPE.
1785
1786config VFP
1787 bool "VFP-format floating point maths"
c00d4ffd 1788 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
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1789 help
1790 Say Y to include VFP support code in the kernel. This is needed
1791 if your hardware includes a VFP unit.
1792
1793 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1794 release notes and additional status information.
1795
1796 Say N if your target does not have VFP hardware.
1797
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1798config VFPv3
1799 bool
1800 depends on VFP
1801 default y if CPU_V7
1802
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1803config NEON
1804 bool "Advanced SIMD (NEON) Extension support"
1805 depends on VFPv3 && CPU_V7
1806 help
1807 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1808 Extension.
1809
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1810endmenu
1811
1812menu "Userspace binary formats"
1813
1814source "fs/Kconfig.binfmt"
1815
1816config ARTHUR
1817 tristate "RISC OS personality"
704bdda0 1818 depends on !AEABI
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1819 help
1820 Say Y here to include the kernel code necessary if you want to run
1821 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1822 experimental; if this sounds frightening, say N and sleep in peace.
1823 You can also say M here to compile this support as a module (which
1824 will be called arthur).
1825
1826endmenu
1827
1828menu "Power management options"
1829
eceab4ac 1830source "kernel/power/Kconfig"
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JB
1832config ARCH_SUSPEND_POSSIBLE
1833 def_bool y
1834
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1835endmenu
1836
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SR
1837source "net/Kconfig"
1838
ac25150f 1839source "drivers/Kconfig"
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1840
1841source "fs/Kconfig"
1842
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LT
1843source "arch/arm/Kconfig.debug"
1844
1845source "security/Kconfig"
1846
1847source "crypto/Kconfig"
1848
1849source "lib/Kconfig"