[net-next-2.6.git] / Documentation / scsi / hptiop.txt

HIGHPOINT ROCKETRAID 3xxx/4xxx ADAPTER DRIVER (hptiop)

Controller Register Map
-------------------------

For RR44xx Intel IOP based adapters, the controller IOP is accessed via PCI BAR0 and BAR2:

     BAR0 offset    Register
            0x11C5C Link Interface IRQ Set
            0x11C60 Link Interface IRQ Clear

     BAR2 offset    Register
            0x10    Inbound Message Register 0
            0x14    Inbound Message Register 1
            0x18    Outbound Message Register 0
            0x1C    Outbound Message Register 1
            0x20    Inbound Doorbell Register
            0x24    Inbound Interrupt Status Register
            0x28    Inbound Interrupt Mask Register
            0x30    Outbound Interrupt Status Register
            0x34    Outbound Interrupt Mask Register
            0x40    Inbound Queue Port
            0x44    Outbound Queue Port

For Intel IOP based adapters, the controller IOP is accessed via PCI BAR0:

     BAR0 offset    Register
            0x10    Inbound Message Register 0
            0x14    Inbound Message Register 1
            0x18    Outbound Message Register 0
            0x1C    Outbound Message Register 1
            0x20    Inbound Doorbell Register
            0x24    Inbound Interrupt Status Register
            0x28    Inbound Interrupt Mask Register
            0x30    Outbound Interrupt Status Register
            0x34    Outbound Interrupt Mask Register
            0x40    Inbound Queue Port
            0x44    Outbound Queue Port

For Marvell IOP based adapters, the IOP is accessed via PCI BAR0 and BAR1:

     BAR0 offset    Register
         0x20400    Inbound Doorbell Register
         0x20404    Inbound Interrupt Mask Register
         0x20408    Outbound Doorbell Register
         0x2040C    Outbound Interrupt Mask Register

     BAR1 offset    Register
             0x0    Inbound Queue Head Pointer
             0x4    Inbound Queue Tail Pointer
             0x8    Outbound Queue Head Pointer
             0xC    Outbound Queue Tail Pointer
            0x10    Inbound Message Register
            0x14    Outbound Message Register
     0x40-0x1040    Inbound Queue
   0x1040-0x2040    Outbound Queue


I/O Request Workflow
----------------------

All queued requests are handled via inbound/outbound queue port.
A request packet can be allocated in either IOP or host memory.

To send a request to the controller:

    - Get a free request packet by reading the inbound queue port or
      allocate a free request in host DMA coherent memory.

      The value returned from the inbound queue port is an offset
      relative to the IOP BAR0.

      Requests allocated in host memory must be aligned on 32-bytes boundary.

    - Fill the packet.

    - Post the packet to IOP by writing it to inbound queue. For requests
      allocated in IOP memory, write the offset to inbound queue port. For
      requests allocated in host memory, write (0x80000000|(bus_addr>>5))
      to the inbound queue port.

    - The IOP process the request. When the request is completed, it
      will be put into outbound queue. An outbound interrupt will be
      generated.

      For requests allocated in IOP memory, the request offset is posted to
      outbound queue.

      For requests allocated in host memory, (0x80000000|(bus_addr>>5))
      is posted to the outbound queue. If IOP_REQUEST_FLAG_OUTPUT_CONTEXT
      flag is set in the request, the low 32-bit context value will be
      posted instead.

    - The host read the outbound queue and complete the request.

      For requests allocated in IOP memory, the host driver free the request
      by writing it to the outbound queue.

Non-queued requests (reset/flush etc) can be sent via inbound message
register 0. An outbound message with the same value indicates the completion
of an inbound message.


User-level Interface
---------------------

The driver exposes following sysfs attributes:

     NAME                 R/W    Description
     driver-version        R     driver version string
     firmware-version      R     firmware version string


-----------------------------------------------------------------------------
Copyright (C) 2006-2009 HighPoint Technologies, Inc. All Rights Reserved.

  This file is distributed in the hope that it will be useful,
  but WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  GNU General Public License for more details.

  linux@highpoint-tech.com
  http://www.highpoint-tech.com
Commit	Line	Data
00f59701	1	HIGHPOINT ROCKETRAID 3xxx/4xxx ADAPTER DRIVER (hptiop)
ede1e6f8 HLT	2
	3	Controller Register Map
	4	-------------------------
	5
3bfc13c2 HLT	6	For RR44xx Intel IOP based adapters, the controller IOP is accessed via PCI BAR0 and BAR2:
	7
	8	BAR0 offset Register
	9	0x11C5C Link Interface IRQ Set
	10	0x11C60 Link Interface IRQ Clear
	11
	12	BAR2 offset Register
	13	0x10 Inbound Message Register 0
	14	0x14 Inbound Message Register 1
	15	0x18 Outbound Message Register 0
	16	0x1C Outbound Message Register 1
	17	0x20 Inbound Doorbell Register
	18	0x24 Inbound Interrupt Status Register
	19	0x28 Inbound Interrupt Mask Register
	20	0x30 Outbound Interrupt Status Register
	21	0x34 Outbound Interrupt Mask Register
	22	0x40 Inbound Queue Port
	23	0x44 Outbound Queue Port
	24
00f59701	25	For Intel IOP based adapters, the controller IOP is accessed via PCI BAR0:
ede1e6f8 HLT	26
	27	BAR0 offset Register
	28	0x10 Inbound Message Register 0
	29	0x14 Inbound Message Register 1
	30	0x18 Outbound Message Register 0
	31	0x1C Outbound Message Register 1
	32	0x20 Inbound Doorbell Register
	33	0x24 Inbound Interrupt Status Register
	34	0x28 Inbound Interrupt Mask Register
	35	0x30 Outbound Interrupt Status Register
	36	0x34 Outbound Interrupt Mask Register
	37	0x40 Inbound Queue Port
	38	0x44 Outbound Queue Port
	39
00f59701 HLT	40	For Marvell IOP based adapters, the IOP is accessed via PCI BAR0 and BAR1:
	41
	42	BAR0 offset Register
	43	0x20400 Inbound Doorbell Register
	44	0x20404 Inbound Interrupt Mask Register
	45	0x20408 Outbound Doorbell Register
	46	0x2040C Outbound Interrupt Mask Register
	47
	48	BAR1 offset Register
	49	0x0 Inbound Queue Head Pointer
	50	0x4 Inbound Queue Tail Pointer
	51	0x8 Outbound Queue Head Pointer
	52	0xC Outbound Queue Tail Pointer
	53	0x10 Inbound Message Register
	54	0x14 Outbound Message Register
	55	0x40-0x1040 Inbound Queue
	56	0x1040-0x2040 Outbound Queue
	57
ede1e6f8 HLT	58
	59	I/O Request Workflow
	60	----------------------
	61
	62	All queued requests are handled via inbound/outbound queue port.
	63	A request packet can be allocated in either IOP or host memory.
	64
	65	To send a request to the controller:
	66
	67	- Get a free request packet by reading the inbound queue port or
	68	allocate a free request in host DMA coherent memory.
	69
	70	The value returned from the inbound queue port is an offset
	71	relative to the IOP BAR0.
	72
	73	Requests allocated in host memory must be aligned on 32-bytes boundary.
	74
	75	- Fill the packet.
	76
	77	- Post the packet to IOP by writing it to inbound queue. For requests
	78	allocated in IOP memory, write the offset to inbound queue port. For
	79	requests allocated in host memory, write (0x80000000\|(bus_addr>>5))
	80	to the inbound queue port.
	81
	82	- The IOP process the request. When the request is completed, it
	83	will be put into outbound queue. An outbound interrupt will be
	84	generated.
	85
	86	For requests allocated in IOP memory, the request offset is posted to
	87	outbound queue.
	88
	89	For requests allocated in host memory, (0x80000000\|(bus_addr>>5))
	90	is posted to the outbound queue. If IOP_REQUEST_FLAG_OUTPUT_CONTEXT
	91	flag is set in the request, the low 32-bit context value will be
	92	posted instead.
	93
	94	- The host read the outbound queue and complete the request.
	95
	96	For requests allocated in IOP memory, the host driver free the request
	97	by writing it to the outbound queue.
	98
	99	Non-queued requests (reset/flush etc) can be sent via inbound message
	100	register 0. An outbound message with the same value indicates the completion
	101	of an inbound message.
	102
	103
	104	User-level Interface
	105	---------------------
	106
	107	The driver exposes following sysfs attributes:
	108
	109	NAME R/W Description
	110	driver-version R driver version string
	111	firmware-version R firmware version string
	112
ede1e6f8 HLT	113
ede1e6f8 HLT	114	-----------------------------------------------------------------------------
3bfc13c2	115	Copyright (C) 2006-2009 HighPoint Technologies, Inc. All Rights Reserved.
ede1e6f8 HLT	116
	117	This file is distributed in the hope that it will be useful,
	118	but WITHOUT ANY WARRANTY; without even the implied warranty of
	119	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	120	GNU General Public License for more details.
	121
	122	linux@highpoint-tech.com
	123	http://www.highpoint-tech.com