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(parent: 6dad2a2) | patch
x86, cacheinfo: Unify AMD L3 cache index disable checking
authorBorislav Petkov <borislav.petkov@amd.com>
Thu, 22 Apr 2010 14:06:58 +0000 (16:06 +0200)
committerH. Peter Anvin <hpa@zytor.com>
Fri, 23 Apr 2010 00:17:20 +0000 (17:17 -0700)
commitb1ab1b4d9ab9812c77843abec79030292ef0a544
treee0405fa695565e9cc6b3510a70168bd10bbd8f3ctree | snapshot (tar.bz2 tar.gz zip)
parent6dad2a29646ce3792c40cfc52d77e9b65a7bb143commit | diff
x86, cacheinfo: Unify AMD L3 cache index disable checking

All F10h CPUs starting with model 8 resp. 9, stepping 1, support L3
cache index disable. Concentrate the family, model, stepping checking at
one place and enable the feature implicitly on upcoming Fam10h models.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <1271945222-5283-2-git-send-email-bp@amd64.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
arch/x86/kernel/cpu/intel_cacheinfo.c diff | blob | blame | history
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