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AM35xx: Add AM35xx intr_clr & sw_rst cntrl reg bit definition
authorVaibhav Hiremath <hvaibhav@ti.com>
Mon, 15 Feb 2010 18:03:35 +0000 (10:03 -0800)
committerTony Lindgren <tony@atomide.com>
Mon, 15 Feb 2010 18:03:35 +0000 (10:03 -0800)
commit07dcbd07866691c33a3ff6f2d845292f23760669
treefd8360a7d717ca08e0a6b8badaeed7dc2a804842tree | snapshot (tar.bz2 tar.gz zip)
parente3d4d0a2385593e7873e7d7688eeffea949facffcommit | diff
AM35xx: Add AM35xx intr_clr & sw_rst cntrl reg bit definition

AM3517/05 has few additional control module registers to control
the new IP's, like VPFE, USBOTG, CPGMAC.

This patch adds the bit defination for INTR_CLR and SW_RST control
register.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/plat-omap/include/plat/control.h diff | blob | blame | history
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