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2f2f4251
M
1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M
8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
2f2f4251 32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
45a6ac16 34#include <sound/jack.h>
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35#include "hda_codec.h"
36#include "hda_local.h"
1cd2224c 37#include "hda_beep.h"
2f2f4251 38
c6e4c666
TI
39enum {
40 STAC_VREF_EVENT = 1,
41 STAC_INSERT_EVENT,
42 STAC_PWR_EVENT,
43 STAC_HP_EVENT,
fefd67f3 44 STAC_LO_EVENT,
3d21d3f7 45 STAC_MIC_EVENT,
c6e4c666 46};
4e55096e 47
f5fcc13c 48enum {
1607b8ea 49 STAC_AUTO,
f5fcc13c 50 STAC_REF,
bf277785 51 STAC_9200_OQO,
dfe495d0
TI
52 STAC_9200_DELL_D21,
53 STAC_9200_DELL_D22,
54 STAC_9200_DELL_D23,
55 STAC_9200_DELL_M21,
56 STAC_9200_DELL_M22,
57 STAC_9200_DELL_M23,
58 STAC_9200_DELL_M24,
59 STAC_9200_DELL_M25,
60 STAC_9200_DELL_M26,
61 STAC_9200_DELL_M27,
58eec423
MCC
62 STAC_9200_M4,
63 STAC_9200_M4_2,
117f257d 64 STAC_9200_PANASONIC,
f5fcc13c
TI
65 STAC_9200_MODELS
66};
67
68enum {
1607b8ea 69 STAC_9205_AUTO,
f5fcc13c 70 STAC_9205_REF,
dfe495d0 71 STAC_9205_DELL_M42,
ae0a8ed8
TD
72 STAC_9205_DELL_M43,
73 STAC_9205_DELL_M44,
d9a4268e 74 STAC_9205_EAPD,
f5fcc13c
TI
75 STAC_9205_MODELS
76};
77
e1f0d669 78enum {
1607b8ea 79 STAC_92HD73XX_AUTO,
9e43f0de 80 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 81 STAC_92HD73XX_REF,
ae709440 82 STAC_92HD73XX_INTEL,
661cd8fb
TI
83 STAC_DELL_M6_AMIC,
84 STAC_DELL_M6_DMIC,
85 STAC_DELL_M6_BOTH,
6b3ab21e 86 STAC_DELL_EQ,
842ae638 87 STAC_ALIENWARE_M17X,
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88 STAC_92HD73XX_MODELS
89};
90
d0513fc6 91enum {
1607b8ea 92 STAC_92HD83XXX_AUTO,
d0513fc6 93 STAC_92HD83XXX_REF,
32ed3f46 94 STAC_92HD83XXX_PWR_REF,
8bb0ac55 95 STAC_DELL_S14,
b4e81876 96 STAC_92HD83XXX_HP,
48315590 97 STAC_HP_DV7_4000,
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98 STAC_92HD83XXX_MODELS
99};
100
e035b841 101enum {
1607b8ea 102 STAC_92HD71BXX_AUTO,
e035b841 103 STAC_92HD71BXX_REF,
a7662640
MR
104 STAC_DELL_M4_1,
105 STAC_DELL_M4_2,
3a7abfd2 106 STAC_DELL_M4_3,
6a14f585 107 STAC_HP_M4,
2a6ce6e5 108 STAC_HP_DV4,
1b0652eb 109 STAC_HP_DV5,
ae6241fb 110 STAC_HP_HDX,
514bf54c 111 STAC_HP_DV4_1222NR,
e035b841
MR
112 STAC_92HD71BXX_MODELS
113};
114
8e21c34c 115enum {
1607b8ea 116 STAC_925x_AUTO,
8e21c34c 117 STAC_925x_REF,
9cb36c2a
MCC
118 STAC_M1,
119 STAC_M1_2,
120 STAC_M2,
8e21c34c 121 STAC_M2_2,
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MCC
122 STAC_M3,
123 STAC_M5,
124 STAC_M6,
8e21c34c
TD
125 STAC_925x_MODELS
126};
127
f5fcc13c 128enum {
1607b8ea 129 STAC_922X_AUTO,
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TI
130 STAC_D945_REF,
131 STAC_D945GTP3,
132 STAC_D945GTP5,
5d5d3bc3
IZ
133 STAC_INTEL_MAC_V1,
134 STAC_INTEL_MAC_V2,
135 STAC_INTEL_MAC_V3,
136 STAC_INTEL_MAC_V4,
137 STAC_INTEL_MAC_V5,
536319af
NB
138 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
139 * is given, one of the above models will be
140 * chosen according to the subsystem id. */
dfe495d0 141 /* for backward compatibility */
f5fcc13c 142 STAC_MACMINI,
3fc24d85 143 STAC_MACBOOK,
6f0778d8
NB
144 STAC_MACBOOK_PRO_V1,
145 STAC_MACBOOK_PRO_V2,
f16928fb 146 STAC_IMAC_INTEL,
0dae0f83 147 STAC_IMAC_INTEL_20,
8c650087 148 STAC_ECS_202,
dfe495d0
TI
149 STAC_922X_DELL_D81,
150 STAC_922X_DELL_D82,
151 STAC_922X_DELL_M81,
152 STAC_922X_DELL_M82,
f5fcc13c
TI
153 STAC_922X_MODELS
154};
155
156enum {
1607b8ea 157 STAC_927X_AUTO,
e28d8322 158 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI
159 STAC_D965_REF,
160 STAC_D965_3ST,
161 STAC_D965_5ST,
679d92ed 162 STAC_D965_5ST_NO_FP,
4ff076e5 163 STAC_DELL_3ST,
8e9068b1 164 STAC_DELL_BIOS,
54930531 165 STAC_927X_VOLKNOB,
f5fcc13c
TI
166 STAC_927X_MODELS
167};
403d1944 168
307282c8
TI
169enum {
170 STAC_9872_AUTO,
171 STAC_9872_VAIO,
172 STAC_9872_MODELS
173};
174
74aeaabc
MR
175struct sigmatel_event {
176 hda_nid_t nid;
c6e4c666
TI
177 unsigned char type;
178 unsigned char tag;
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MR
179 int data;
180};
181
182struct sigmatel_jack {
183 hda_nid_t nid;
184 int type;
185 struct snd_jack *jack;
186};
187
3d21d3f7
TI
188struct sigmatel_mic_route {
189 hda_nid_t pin;
02d33322
TI
190 signed char mux_idx;
191 signed char dmux_idx;
3d21d3f7
TI
192};
193
2f2f4251 194struct sigmatel_spec {
c8b6bf9b 195 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
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196 unsigned int num_mixers;
197
403d1944 198 int board_config;
c0cea0d0 199 unsigned int eapd_switch: 1;
c7d4b2fa 200 unsigned int surr_switch: 1;
3cc08dc6 201 unsigned int alt_switch: 1;
82bc955f 202 unsigned int hp_detect: 1;
00ef50c2 203 unsigned int spdif_mute: 1;
7c7767eb 204 unsigned int check_volume_offset:1;
3d21d3f7 205 unsigned int auto_mic:1;
1b0e372d 206 unsigned int linear_tone_beep:1;
c7d4b2fa 207
4fe5195c 208 /* gpio lines */
0fc9dec4 209 unsigned int eapd_mask;
4fe5195c
MR
210 unsigned int gpio_mask;
211 unsigned int gpio_dir;
212 unsigned int gpio_data;
213 unsigned int gpio_mute;
86d190e7 214 unsigned int gpio_led;
c357aab0 215 unsigned int gpio_led_polarity;
4fe5195c 216
8daaaa97
MR
217 /* stream */
218 unsigned int stream_delay;
219
4fe5195c 220 /* analog loopback */
d78d7a90 221 struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR
222 unsigned char aloopback_mask;
223 unsigned char aloopback_shift;
8259980e 224
a64135a2
MR
225 /* power management */
226 unsigned int num_pwrs;
d0513fc6 227 unsigned int *pwr_mapping;
a64135a2 228 hda_nid_t *pwr_nids;
b76c850f 229 hda_nid_t *dac_list;
a64135a2 230
74aeaabc
MR
231 /* jack detection */
232 struct snd_array jacks;
233
234 /* events */
235 struct snd_array events;
236
2f2f4251 237 /* playback */
b22b4821
MR
238 struct hda_input_mux *mono_mux;
239 unsigned int cur_mmux;
2f2f4251 240 struct hda_multi_out multiout;
3cc08dc6 241 hda_nid_t dac_nids[5];
c21ca4a8
TI
242 hda_nid_t hp_dacs[5];
243 hda_nid_t speaker_dacs[5];
2f2f4251 244
7c7767eb
TI
245 int volume_offset;
246
2f2f4251
M
247 /* capture */
248 hda_nid_t *adc_nids;
2f2f4251 249 unsigned int num_adcs;
dabbed6f
M
250 hda_nid_t *mux_nids;
251 unsigned int num_muxes;
8b65727b
MP
252 hda_nid_t *dmic_nids;
253 unsigned int num_dmics;
e1f0d669 254 hda_nid_t *dmux_nids;
1697055e 255 unsigned int num_dmuxes;
d9737751
MR
256 hda_nid_t *smux_nids;
257 unsigned int num_smuxes;
5207e10e 258 unsigned int num_analog_muxes;
6479c631
TI
259
260 unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
261 unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
262 unsigned int num_caps; /* number of capture volume/switch elements */
263
3d21d3f7
TI
264 struct sigmatel_mic_route ext_mic;
265 struct sigmatel_mic_route int_mic;
266
65973632 267 const char **spdif_labels;
d9737751 268
dabbed6f 269 hda_nid_t dig_in_nid;
b22b4821 270 hda_nid_t mono_nid;
1cd2224c
MR
271 hda_nid_t anabeep_nid;
272 hda_nid_t digbeep_nid;
2f2f4251 273
2f2f4251
M
274 /* pin widgets */
275 hda_nid_t *pin_nids;
276 unsigned int num_pins;
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M
277
278 /* codec specific stuff */
279 struct hda_verb *init;
c8b6bf9b 280 struct snd_kcontrol_new *mixer;
2f2f4251
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281
282 /* capture source */
8b65727b 283 struct hda_input_mux *dinput_mux;
e1f0d669 284 unsigned int cur_dmux[2];
c7d4b2fa 285 struct hda_input_mux *input_mux;
3cc08dc6 286 unsigned int cur_mux[3];
d9737751
MR
287 struct hda_input_mux *sinput_mux;
288 unsigned int cur_smux[2];
2a9c7816
MR
289 unsigned int cur_amux;
290 hda_nid_t *amp_nids;
8daaaa97 291 unsigned int powerdown_adcs;
2f2f4251 292
403d1944
MP
293 /* i/o switches */
294 unsigned int io_switch[2];
0fb87bb4 295 unsigned int clfe_swap;
c21ca4a8
TI
296 hda_nid_t line_switch; /* shared line-in for input and output */
297 hda_nid_t mic_switch; /* shared mic-in for input and output */
298 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 299 unsigned int aloopback;
2f2f4251 300
c7d4b2fa
M
301 struct hda_pcm pcm_rec[2]; /* PCM information */
302
303 /* dynamic controls and input_mux */
304 struct auto_pin_cfg autocfg;
603c4019 305 struct snd_array kctls;
8b65727b 306 struct hda_input_mux private_dimux;
c7d4b2fa 307 struct hda_input_mux private_imux;
d9737751 308 struct hda_input_mux private_smux;
b22b4821 309 struct hda_input_mux private_mono_mux;
2f2f4251
M
310};
311
312static hda_nid_t stac9200_adc_nids[1] = {
313 0x03,
314};
315
316static hda_nid_t stac9200_mux_nids[1] = {
317 0x0c,
318};
319
320static hda_nid_t stac9200_dac_nids[1] = {
321 0x02,
322};
323
a64135a2
MR
324static hda_nid_t stac92hd73xx_pwr_nids[8] = {
325 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
326 0x0f, 0x10, 0x11
327};
328
0ffa9807
MR
329static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
330 0x26, 0,
331};
332
e1f0d669
MR
333static hda_nid_t stac92hd73xx_adc_nids[2] = {
334 0x1a, 0x1b
335};
336
337#define STAC92HD73XX_NUM_DMICS 2
338static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
339 0x13, 0x14, 0
340};
341
342#define STAC92HD73_DAC_COUNT 5
e1f0d669 343
e2aec171
TI
344static hda_nid_t stac92hd73xx_mux_nids[2] = {
345 0x20, 0x21,
e1f0d669
MR
346};
347
348static hda_nid_t stac92hd73xx_dmux_nids[2] = {
349 0x20, 0x21,
350};
351
d9737751
MR
352static hda_nid_t stac92hd73xx_smux_nids[2] = {
353 0x22, 0x23,
354};
355
6479c631
TI
356#define STAC92HD73XX_NUM_CAPS 2
357static unsigned long stac92hd73xx_capvols[] = {
358 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
359 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
360};
361#define stac92hd73xx_capsws stac92hd73xx_capvols
362
d0513fc6 363#define STAC92HD83_DAC_COUNT 3
d0513fc6 364
667067d8 365static hda_nid_t stac92hd83xxx_mux_nids[2] = {
d0513fc6
MR
366 0x17, 0x18,
367};
368
369static hda_nid_t stac92hd83xxx_adc_nids[2] = {
370 0x15, 0x16,
371};
372
373static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
374 0xa, 0xb, 0xd, 0xe,
375};
376
0ffa9807
MR
377static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
378 0x1e, 0,
379};
380
d0513fc6 381static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 382 0x03, 0x0c, 0x20, 0x40,
d0513fc6
MR
383};
384
6479c631
TI
385#define STAC92HD83XXX_NUM_CAPS 2
386static unsigned long stac92hd83xxx_capvols[] = {
387 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_OUTPUT),
388 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_OUTPUT),
389};
390#define stac92hd83xxx_capsws stac92hd83xxx_capvols
391
a64135a2
MR
392static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
393 0x0a, 0x0d, 0x0f
394};
395
e035b841
MR
396static hda_nid_t stac92hd71bxx_adc_nids[2] = {
397 0x12, 0x13,
398};
399
400static hda_nid_t stac92hd71bxx_mux_nids[2] = {
401 0x1a, 0x1b
402};
403
4b33c767
MR
404static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
405 0x1c, 0x1d,
e1f0d669
MR
406};
407
d9737751
MR
408static hda_nid_t stac92hd71bxx_smux_nids[2] = {
409 0x24, 0x25,
410};
411
e035b841
MR
412#define STAC92HD71BXX_NUM_DMICS 2
413static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
414 0x18, 0x19, 0
415};
416
0ffa9807
MR
417static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
418 0x22, 0
419};
420
6479c631
TI
421#define STAC92HD71BXX_NUM_CAPS 2
422static unsigned long stac92hd71bxx_capvols[] = {
423 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
424 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
425};
426#define stac92hd71bxx_capsws stac92hd71bxx_capvols
427
8e21c34c
TD
428static hda_nid_t stac925x_adc_nids[1] = {
429 0x03,
430};
431
432static hda_nid_t stac925x_mux_nids[1] = {
433 0x0f,
434};
435
436static hda_nid_t stac925x_dac_nids[1] = {
437 0x02,
438};
439
f6e9852a
TI
440#define STAC925X_NUM_DMICS 1
441static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
442 0x15, 0
2c11f955
TD
443};
444
1697055e
TI
445static hda_nid_t stac925x_dmux_nids[1] = {
446 0x14,
447};
448
6479c631
TI
449static unsigned long stac925x_capvols[] = {
450 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
451};
452static unsigned long stac925x_capsws[] = {
453 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
454};
455
2f2f4251
M
456static hda_nid_t stac922x_adc_nids[2] = {
457 0x06, 0x07,
458};
459
460static hda_nid_t stac922x_mux_nids[2] = {
461 0x12, 0x13,
462};
463
6479c631
TI
464#define STAC922X_NUM_CAPS 2
465static unsigned long stac922x_capvols[] = {
466 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
467 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
468};
469#define stac922x_capsws stac922x_capvols
470
45c1d85b
MR
471static hda_nid_t stac927x_slave_dig_outs[2] = {
472 0x1f, 0,
473};
474
3cc08dc6
MP
475static hda_nid_t stac927x_adc_nids[3] = {
476 0x07, 0x08, 0x09
477};
478
479static hda_nid_t stac927x_mux_nids[3] = {
480 0x15, 0x16, 0x17
481};
482
d9737751
MR
483static hda_nid_t stac927x_smux_nids[1] = {
484 0x21,
485};
486
b76c850f
MR
487static hda_nid_t stac927x_dac_nids[6] = {
488 0x02, 0x03, 0x04, 0x05, 0x06, 0
489};
490
e1f0d669
MR
491static hda_nid_t stac927x_dmux_nids[1] = {
492 0x1b,
493};
494
7f16859a
MR
495#define STAC927X_NUM_DMICS 2
496static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
497 0x13, 0x14, 0
498};
499
6479c631
TI
500#define STAC927X_NUM_CAPS 3
501static unsigned long stac927x_capvols[] = {
502 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
503 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
504 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
505};
506static unsigned long stac927x_capsws[] = {
507 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
508 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
509 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
510};
511
65973632
MR
512static const char *stac927x_spdif_labels[5] = {
513 "Digital Playback", "ADAT", "Analog Mux 1",
514 "Analog Mux 2", "Analog Mux 3"
515};
516
f3302a59
MP
517static hda_nid_t stac9205_adc_nids[2] = {
518 0x12, 0x13
519};
520
521static hda_nid_t stac9205_mux_nids[2] = {
522 0x19, 0x1a
523};
524
e1f0d669 525static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 526 0x1d,
e1f0d669
MR
527};
528
d9737751
MR
529static hda_nid_t stac9205_smux_nids[1] = {
530 0x21,
531};
532
f6e9852a
TI
533#define STAC9205_NUM_DMICS 2
534static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
535 0x17, 0x18, 0
8b65727b
MP
536};
537
6479c631
TI
538#define STAC9205_NUM_CAPS 2
539static unsigned long stac9205_capvols[] = {
540 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
541 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
542};
543static unsigned long stac9205_capsws[] = {
544 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
545 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
546};
547
c7d4b2fa 548static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD
549 0x08, 0x09, 0x0d, 0x0e,
550 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M
551};
552
8e21c34c
TD
553static hda_nid_t stac925x_pin_nids[8] = {
554 0x07, 0x08, 0x0a, 0x0b,
555 0x0c, 0x0d, 0x10, 0x11,
556};
557
2f2f4251
M
558static hda_nid_t stac922x_pin_nids[10] = {
559 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
560 0x0f, 0x10, 0x11, 0x15, 0x1b,
561};
562
a7662640 563static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR
564 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
565 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 566 0x14, 0x22, 0x23
e1f0d669
MR
567};
568
8bb0ac55 569static hda_nid_t stac92hd83xxx_pin_nids[10] = {
d0513fc6 570 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
8bb0ac55 571 0x0f, 0x10, 0x11, 0x1f, 0x20,
d0513fc6 572};
616f89e7 573
36706005
CC
574static hda_nid_t stac92hd88xxx_pin_nids[10] = {
575 0x0a, 0x0b, 0x0c, 0x0d,
576 0x0f, 0x11, 0x1f, 0x20,
577};
578
616f89e7
HRK
579#define STAC92HD71BXX_NUM_PINS 13
580static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
581 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
582 0x00, 0x14, 0x18, 0x19, 0x1e,
583 0x1f, 0x20, 0x27
584};
585static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR
586 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
587 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 588 0x1f, 0x20, 0x27
e035b841
MR
589};
590
3cc08dc6
MP
591static hda_nid_t stac927x_pin_nids[14] = {
592 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
593 0x0f, 0x10, 0x11, 0x12, 0x13,
594 0x14, 0x21, 0x22, 0x23,
595};
596
f3302a59
MP
597static hda_nid_t stac9205_pin_nids[12] = {
598 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
599 0x0f, 0x14, 0x16, 0x17, 0x18,
600 0x21, 0x22,
f3302a59
MP
601};
602
8b65727b
MP
603static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
604 struct snd_ctl_elem_info *uinfo)
605{
606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
607 struct sigmatel_spec *spec = codec->spec;
608 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
609}
610
611static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
612 struct snd_ctl_elem_value *ucontrol)
613{
614 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
615 struct sigmatel_spec *spec = codec->spec;
e1f0d669 616 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 617
e1f0d669 618 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP
619 return 0;
620}
621
622static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_value *ucontrol)
624{
625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
626 struct sigmatel_spec *spec = codec->spec;
e1f0d669 627 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP
628
629 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 630 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP
631}
632
d9737751
MR
633static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
634 struct snd_ctl_elem_info *uinfo)
635{
636 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
637 struct sigmatel_spec *spec = codec->spec;
638 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
639}
640
641static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
642 struct snd_ctl_elem_value *ucontrol)
643{
644 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
645 struct sigmatel_spec *spec = codec->spec;
646 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
647
648 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
649 return 0;
650}
651
652static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
653 struct snd_ctl_elem_value *ucontrol)
654{
655 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
656 struct sigmatel_spec *spec = codec->spec;
00ef50c2 657 struct hda_input_mux *smux = &spec->private_smux;
d9737751 658 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR
659 int err, val;
660 hda_nid_t nid;
d9737751 661
00ef50c2 662 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 663 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR
664 if (err < 0)
665 return err;
666
667 if (spec->spdif_mute) {
668 if (smux_idx == 0)
669 nid = spec->multiout.dig_out_nid;
670 else
671 nid = codec->slave_dig_outs[smux_idx - 1];
672 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 673 val = HDA_AMP_MUTE;
00ef50c2 674 else
c9b46f91 675 val = 0;
00ef50c2 676 /* un/mute SPDIF out */
c9b46f91
TI
677 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
678 HDA_AMP_MUTE, val);
00ef50c2
MR
679 }
680 return 0;
d9737751
MR
681}
682
2fc99890
NL
683static unsigned int stac92xx_vref_set(struct hda_codec *codec,
684 hda_nid_t nid, unsigned int new_vref)
685{
b8621516 686 int error;
2fc99890
NL
687 unsigned int pincfg;
688 pincfg = snd_hda_codec_read(codec, nid, 0,
689 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
690
691 pincfg &= 0xff;
692 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
693 pincfg |= new_vref;
694
695 if (new_vref == AC_PINCTL_VREF_HIZ)
696 pincfg |= AC_PINCTL_OUT_EN;
697 else
698 pincfg |= AC_PINCTL_IN_EN;
699
700 error = snd_hda_codec_write_cache(codec, nid, 0,
701 AC_VERB_SET_PIN_WIDGET_CONTROL, pincfg);
702 if (error < 0)
703 return error;
704 else
705 return 1;
706}
707
708static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
709{
710 unsigned int vref;
711 vref = snd_hda_codec_read(codec, nid, 0,
712 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
713 vref &= AC_PINCTL_VREFEN;
714 return vref;
715}
716
c8b6bf9b 717static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M
718{
719 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
720 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 721 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M
722}
723
c8b6bf9b 724static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
725{
726 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
727 struct sigmatel_spec *spec = codec->spec;
728 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
729
730 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
731 return 0;
732}
733
c8b6bf9b 734static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
735{
736 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
737 struct sigmatel_spec *spec = codec->spec;
738 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e
TI
739 const struct hda_input_mux *imux = spec->input_mux;
740 unsigned int idx, prev_idx;
741
742 idx = ucontrol->value.enumerated.item[0];
743 if (idx >= imux->num_items)
744 idx = imux->num_items - 1;
745 prev_idx = spec->cur_mux[adc_idx];
746 if (prev_idx == idx)
747 return 0;
748 if (idx < spec->num_analog_muxes) {
749 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
750 AC_VERB_SET_CONNECT_SEL,
751 imux->items[idx].index);
752 if (prev_idx >= spec->num_analog_muxes) {
753 imux = spec->dinput_mux;
754 /* 0 = analog */
755 snd_hda_codec_write_cache(codec,
756 spec->dmux_nids[adc_idx], 0,
757 AC_VERB_SET_CONNECT_SEL,
758 imux->items[0].index);
759 }
760 } else {
761 imux = spec->dinput_mux;
762 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
763 AC_VERB_SET_CONNECT_SEL,
764 imux->items[idx - 1].index);
765 }
766 spec->cur_mux[adc_idx] = idx;
767 return 1;
2f2f4251
M
768}
769
b22b4821
MR
770static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
771 struct snd_ctl_elem_info *uinfo)
772{
773 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
774 struct sigmatel_spec *spec = codec->spec;
775 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
776}
777
778static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
779 struct snd_ctl_elem_value *ucontrol)
780{
781 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
782 struct sigmatel_spec *spec = codec->spec;
783
784 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
785 return 0;
786}
787
788static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
789 struct snd_ctl_elem_value *ucontrol)
790{
791 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
792 struct sigmatel_spec *spec = codec->spec;
793
794 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
795 spec->mono_nid, &spec->cur_mmux);
796}
797
5f10c4a9
ML
798#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
799
800static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
801 struct snd_ctl_elem_value *ucontrol)
802{
803 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 804 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML
805 struct sigmatel_spec *spec = codec->spec;
806
e1f0d669
MR
807 ucontrol->value.integer.value[0] = !!(spec->aloopback &
808 (spec->aloopback_mask << idx));
5f10c4a9
ML
809 return 0;
810}
811
812static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
813 struct snd_ctl_elem_value *ucontrol)
814{
815 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
816 struct sigmatel_spec *spec = codec->spec;
e1f0d669 817 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 818 unsigned int dac_mode;
e1f0d669 819 unsigned int val, idx_val;
5f10c4a9 820
e1f0d669
MR
821 idx_val = spec->aloopback_mask << idx;
822 if (ucontrol->value.integer.value[0])
823 val = spec->aloopback | idx_val;
824 else
825 val = spec->aloopback & ~idx_val;
68ea7b2f 826 if (spec->aloopback == val)
5f10c4a9
ML
827 return 0;
828
68ea7b2f 829 spec->aloopback = val;
5f10c4a9 830
e1f0d669
MR
831 /* Only return the bits defined by the shift value of the
832 * first two bytes of the mask
833 */
5f10c4a9 834 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR
835 kcontrol->private_value & 0xFFFF, 0x0);
836 dac_mode >>= spec->aloopback_shift;
5f10c4a9 837
e1f0d669 838 if (spec->aloopback & idx_val) {
5f10c4a9 839 snd_hda_power_up(codec);
e1f0d669 840 dac_mode |= idx_val;
5f10c4a9
ML
841 } else {
842 snd_hda_power_down(codec);
e1f0d669 843 dac_mode &= ~idx_val;
5f10c4a9
ML
844 }
845
846 snd_hda_codec_write_cache(codec, codec->afg, 0,
847 kcontrol->private_value >> 16, dac_mode);
848
849 return 1;
850}
851
c7d4b2fa 852static struct hda_verb stac9200_core_init[] = {
2f2f4251 853 /* set dac0mux for dac converter */
c7d4b2fa 854 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M
855 {}
856};
857
1194b5b7
TI
858static struct hda_verb stac9200_eapd_init[] = {
859 /* set dac0mux for dac converter */
860 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
861 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
862 {}
863};
864
d654a660
MR
865static struct hda_verb dell_eq_core_init[] = {
866 /* set master volume to max value without distortion
867 * and direct control */
868 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR
869 {}
870};
871
e2aec171 872static struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR
873 /* set master volume and direct control */
874 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
875 {}
876};
877
d0513fc6 878static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR
879 /* power state controls amps */
880 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 881 {}
d0513fc6
MR
882};
883
e035b841 884static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR
885 /* set master volume and direct control */
886 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 887 {}
541eee87
MR
888};
889
ca8d33fc
MR
890static struct hda_verb stac92hd71bxx_unmute_core_init[] = {
891 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
892 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
893 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
894 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
895 {}
896};
897
8e21c34c
TD
898static struct hda_verb stac925x_core_init[] = {
899 /* set dac0mux for dac converter */
900 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI
901 /* mute the master volume */
902 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD
903 {}
904};
905
c7d4b2fa 906static struct hda_verb stac922x_core_init[] = {
2f2f4251 907 /* set master volume and direct control */
c7d4b2fa 908 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M
909 {}
910};
911
93ed1503 912static struct hda_verb d965_core_init[] = {
19039bd0 913 /* set master volume and direct control */
93ed1503 914 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI
915 /* unmute node 0x1b */
916 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
917 /* select node 0x03 as DAC */
918 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
919 {}
920};
921
ccca7cdc
TI
922static struct hda_verb dell_3st_core_init[] = {
923 /* don't set delta bit */
924 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
925 /* unmute node 0x1b */
926 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
927 /* select node 0x03 as DAC */
928 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
929 {}
930};
931
3cc08dc6
MP
932static struct hda_verb stac927x_core_init[] = {
933 /* set master volume and direct control */
934 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR
935 /* enable analog pc beep path */
936 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP
937 {}
938};
939
54930531
TI
940static struct hda_verb stac927x_volknob_core_init[] = {
941 /* don't set delta bit */
942 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
943 /* enable analog pc beep path */
944 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
945 {}
946};
947
f3302a59
MP
948static struct hda_verb stac9205_core_init[] = {
949 /* set master volume and direct control */
950 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR
951 /* enable analog pc beep path */
952 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP
953 {}
954};
955
b22b4821
MR
956#define STAC_MONO_MUX \
957 { \
958 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
959 .name = "Mono Mux", \
960 .count = 1, \
961 .info = stac92xx_mono_mux_enum_info, \
962 .get = stac92xx_mono_mux_enum_get, \
963 .put = stac92xx_mono_mux_enum_put, \
964 }
965
e1f0d669 966#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML
967 { \
968 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
969 .name = "Analog Loopback", \
e1f0d669 970 .count = cnt, \
5f10c4a9
ML
971 .info = stac92xx_aloopback_info, \
972 .get = stac92xx_aloopback_get, \
973 .put = stac92xx_aloopback_put, \
974 .private_value = verb_read | (verb_write << 16), \
975 }
976
2fc99890
NL
977#define DC_BIAS(xname, idx, nid) \
978 { \
979 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
980 .name = xname, \
981 .index = idx, \
982 .info = stac92xx_dc_bias_info, \
983 .get = stac92xx_dc_bias_get, \
984 .put = stac92xx_dc_bias_put, \
985 .private_value = nid, \
986 }
987
c8b6bf9b 988static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M
989 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
990 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M
991 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
992 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M
993 { } /* end */
994};
995
d78d7a90
TI
996static struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
997 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
998 {}
999};
1000
1001static struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1002 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI
1003 {}
1004};
e1f0d669 1005
d78d7a90
TI
1006static struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
1007 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1008 {}
1009};
1010
d0513fc6 1011
d78d7a90
TI
1012static struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
1013 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1014};
541eee87 1015
8e21c34c 1016static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI
1017 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1018 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M
1019 { } /* end */
1020};
1021
d78d7a90
TI
1022static struct snd_kcontrol_new stac9205_loopback[] = {
1023 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1024 {}
1025};
1026
d78d7a90
TI
1027static struct snd_kcontrol_new stac927x_loopback[] = {
1028 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1029 {}
1030};
1031
1697055e
TI
1032static struct snd_kcontrol_new stac_dmux_mixer = {
1033 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1034 .name = "Digital Input Source",
1035 /* count set later */
1036 .info = stac92xx_dmux_enum_info,
1037 .get = stac92xx_dmux_enum_get,
1038 .put = stac92xx_dmux_enum_put,
1039};
1040
d9737751
MR
1041static struct snd_kcontrol_new stac_smux_mixer = {
1042 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1043 .name = "IEC958 Playback Source",
d9737751
MR
1044 /* count set later */
1045 .info = stac92xx_smux_enum_info,
1046 .get = stac92xx_smux_enum_get,
1047 .put = stac92xx_smux_enum_put,
1048};
1049
2134ea4f
TI
1050static const char *slave_vols[] = {
1051 "Front Playback Volume",
1052 "Surround Playback Volume",
1053 "Center Playback Volume",
1054 "LFE Playback Volume",
1055 "Side Playback Volume",
1056 "Headphone Playback Volume",
2134ea4f 1057 "Speaker Playback Volume",
2134ea4f
TI
1058 NULL
1059};
1060
1061static const char *slave_sws[] = {
1062 "Front Playback Switch",
1063 "Surround Playback Switch",
1064 "Center Playback Switch",
1065 "LFE Playback Switch",
1066 "Side Playback Switch",
1067 "Headphone Playback Switch",
2134ea4f 1068 "Speaker Playback Switch",
edb54a55 1069 "IEC958 Playback Switch",
2134ea4f
TI
1070 NULL
1071};
1072
603c4019 1073static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1074static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1075
2f2f4251
M
1076static int stac92xx_build_controls(struct hda_codec *codec)
1077{
1078 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI
1079 struct auto_pin_cfg *cfg = &spec->autocfg;
1080 hda_nid_t nid;
2f2f4251 1081 int err;
c7d4b2fa 1082 int i;
2f2f4251 1083
6479c631
TI
1084 if (spec->mixer) {
1085 err = snd_hda_add_new_ctls(codec, spec->mixer);
1086 if (err < 0)
1087 return err;
1088 }
c7d4b2fa
M
1089
1090 for (i = 0; i < spec->num_mixers; i++) {
1091 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1092 if (err < 0)
1093 return err;
1094 }
5207e10e
TI
1095 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1096 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1097 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1098 err = snd_hda_ctl_add(codec, 0,
1697055e
TI
1099 snd_ctl_new1(&stac_dmux_mixer, codec));
1100 if (err < 0)
1101 return err;
1102 }
d9737751 1103 if (spec->num_smuxes > 0) {
00ef50c2
MR
1104 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1105 struct hda_input_mux *smux = &spec->private_smux;
1106 /* check for mute support on SPDIF out */
1107 if (wcaps & AC_WCAP_OUT_AMP) {
1108 smux->items[smux->num_items].label = "Off";
1109 smux->items[smux->num_items].index = 0;
1110 smux->num_items++;
1111 spec->spdif_mute = 1;
1112 }
d9737751 1113 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1114 err = snd_hda_ctl_add(codec, 0,
d9737751
MR
1115 snd_ctl_new1(&stac_smux_mixer, codec));
1116 if (err < 0)
1117 return err;
1118 }
c7d4b2fa 1119
dabbed6f
M
1120 if (spec->multiout.dig_out_nid) {
1121 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1122 if (err < 0)
1123 return err;
9a08160b
TI
1124 err = snd_hda_create_spdif_share_sw(codec,
1125 &spec->multiout);
1126 if (err < 0)
1127 return err;
1128 spec->multiout.share_spdif = 1;
dabbed6f 1129 }
da74ae3e 1130 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M
1131 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1132 if (err < 0)
1133 return err;
1134 }
2134ea4f
TI
1135
1136 /* if we have no master control, let's create it */
1137 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1138 unsigned int vmaster_tlv[4];
2134ea4f 1139 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1140 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI
1141 /* correct volume offset */
1142 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
2134ea4f 1143 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1144 vmaster_tlv, slave_vols);
2134ea4f
TI
1145 if (err < 0)
1146 return err;
1147 }
1148 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1149 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1150 NULL, slave_sws);
1151 if (err < 0)
1152 return err;
1153 }
1154
d78d7a90
TI
1155 if (spec->aloopback_ctl &&
1156 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1157 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1158 if (err < 0)
1159 return err;
1160 }
1161
603c4019 1162 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI
1163
1164 /* create jack input elements */
1165 if (spec->hp_detect) {
1166 for (i = 0; i < cfg->hp_outs; i++) {
1167 int type = SND_JACK_HEADPHONE;
1168 nid = cfg->hp_pins[i];
1169 /* jack detection */
1170 if (cfg->hp_outs == i)
1171 type |= SND_JACK_LINEOUT;
1172 err = stac92xx_add_jack(codec, nid, type);
1173 if (err < 0)
1174 return err;
1175 }
1176 }
1177 for (i = 0; i < cfg->line_outs; i++) {
1178 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1179 SND_JACK_LINEOUT);
1180 if (err < 0)
1181 return err;
1182 }
1183 for (i = 0; i < AUTO_PIN_LAST; i++) {
1184 nid = cfg->input_pins[i];
1185 if (nid) {
1186 err = stac92xx_add_jack(codec, nid,
1187 SND_JACK_MICROPHONE);
1188 if (err < 0)
1189 return err;
1190 }
1191 }
1192
dabbed6f 1193 return 0;
2f2f4251
M
1194}
1195
403d1944 1196static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1197 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M
1198 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1199};
1200
58eec423
MCC
1201static unsigned int gateway9200_m4_pin_configs[8] = {
1202 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1203 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1204};
1205static unsigned int gateway9200_m4_2_pin_configs[8] = {
1206 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1207 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1208};
1209
1210/*
dfe495d0
TI
1211 STAC 9200 pin configs for
1212 102801A8
1213 102801DE
1214 102801E8
1215*/
1216static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI
1217 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1218 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI
1219};
1220
1221/*
1222 STAC 9200 pin configs for
1223 102801C0
1224 102801C1
1225*/
1226static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI
1227 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1228 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1229};
1230
1231/*
1232 STAC 9200 pin configs for
1233 102801C4 (Dell Dimension E310)
1234 102801C5
1235 102801C7
1236 102801D9
1237 102801DA
1238 102801E3
1239*/
1240static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI
1241 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1242 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1243};
1244
1245
1246/*
1247 STAC 9200-32 pin configs for
1248 102801B5 (Dell Inspiron 630m)
1249 102801D8 (Dell Inspiron 640m)
1250*/
1251static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI
1252 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1253 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1254};
1255
1256/*
1257 STAC 9200-32 pin configs for
1258 102801C2 (Dell Latitude D620)
1259 102801C8
1260 102801CC (Dell Latitude D820)
1261 102801D4
1262 102801D6
1263*/
1264static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI
1265 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1266 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI
1267};
1268
1269/*
1270 STAC 9200-32 pin configs for
1271 102801CE (Dell XPS M1710)
1272 102801CF (Dell Precision M90)
1273*/
1274static unsigned int dell9200_m23_pin_configs[8] = {
1275 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1276 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1277};
1278
1279/*
1280 STAC 9200-32 pin configs for
1281 102801C9
1282 102801CA
1283 102801CB (Dell Latitude 120L)
1284 102801D3
1285*/
1286static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI
1287 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1288 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1289};
1290
1291/*
1292 STAC 9200-32 pin configs for
1293 102801BD (Dell Inspiron E1505n)
1294 102801EE
1295 102801EF
1296*/
1297static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI
1298 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1299 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1300};
1301
1302/*
1303 STAC 9200-32 pin configs for
1304 102801F5 (Dell Inspiron 1501)
1305 102801F6
1306*/
1307static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI
1308 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1309 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1310};
1311
1312/*
1313 STAC 9200-32
1314 102801CD (Dell Inspiron E1705/9400)
1315*/
1316static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI
1317 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1318 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI
1319};
1320
bf277785
TD
1321static unsigned int oqo9200_pin_configs[8] = {
1322 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1323 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1324};
1325
dfe495d0 1326
f5fcc13c
TI
1327static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1328 [STAC_REF] = ref9200_pin_configs,
bf277785 1329 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI
1330 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1331 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1332 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1333 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1334 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1335 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1336 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1337 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1338 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1339 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC
1340 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1341 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1342 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP
1343};
1344
f5fcc13c 1345static const char *stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1346 [STAC_AUTO] = "auto",
f5fcc13c 1347 [STAC_REF] = "ref",
bf277785 1348 [STAC_9200_OQO] = "oqo",
dfe495d0
TI
1349 [STAC_9200_DELL_D21] = "dell-d21",
1350 [STAC_9200_DELL_D22] = "dell-d22",
1351 [STAC_9200_DELL_D23] = "dell-d23",
1352 [STAC_9200_DELL_M21] = "dell-m21",
1353 [STAC_9200_DELL_M22] = "dell-m22",
1354 [STAC_9200_DELL_M23] = "dell-m23",
1355 [STAC_9200_DELL_M24] = "dell-m24",
1356 [STAC_9200_DELL_M25] = "dell-m25",
1357 [STAC_9200_DELL_M26] = "dell-m26",
1358 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC
1359 [STAC_9200_M4] = "gateway-m4",
1360 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1361 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI
1362};
1363
1364static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1365 /* SigmaTel reference board */
1366 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1367 "DFI LanParty", STAC_REF),
577aa2c1
MR
1368 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1369 "DFI LanParty", STAC_REF),
e7377071 1370 /* Dell laptops have BIOS problem */
dfe495d0
TI
1371 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1372 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1373 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI
1374 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1375 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1376 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1377 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1378 "unknown Dell", STAC_9200_DELL_D22),
1379 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1380 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1381 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI
1382 "Dell Latitude D620", STAC_9200_DELL_M22),
1383 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1384 "unknown Dell", STAC_9200_DELL_D23),
1385 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1386 "unknown Dell", STAC_9200_DELL_D23),
1387 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1388 "unknown Dell", STAC_9200_DELL_M22),
1389 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1390 "unknown Dell", STAC_9200_DELL_M24),
1391 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1392 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1393 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1394 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1395 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1396 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1397 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1398 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1399 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1400 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1401 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI
1402 "Dell Precision M90", STAC_9200_DELL_M23),
1403 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1404 "unknown Dell", STAC_9200_DELL_M22),
1405 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1406 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1407 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1408 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1409 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI
1410 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1411 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1412 "unknown Dell", STAC_9200_DELL_D23),
1413 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1414 "unknown Dell", STAC_9200_DELL_D23),
1415 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1416 "unknown Dell", STAC_9200_DELL_D21),
1417 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1418 "unknown Dell", STAC_9200_DELL_D23),
1419 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1420 "unknown Dell", STAC_9200_DELL_D21),
1421 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1422 "unknown Dell", STAC_9200_DELL_M25),
1423 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1424 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1425 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI
1426 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1427 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1428 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1429 /* Panasonic */
117f257d 1430 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1431 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC
1432 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1433 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1434 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD
1435 /* OQO Mobile */
1436 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP
1437 {} /* terminator */
1438};
1439
8e21c34c
TD
1440static unsigned int ref925x_pin_configs[8] = {
1441 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1442 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD
1443};
1444
9cb36c2a
MCC
1445static unsigned int stac925xM1_pin_configs[8] = {
1446 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1447 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD
1448};
1449
9cb36c2a
MCC
1450static unsigned int stac925xM1_2_pin_configs[8] = {
1451 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1452 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1453};
58eec423 1454
9cb36c2a
MCC
1455static unsigned int stac925xM2_pin_configs[8] = {
1456 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1457 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD
1458};
1459
8e21c34c 1460static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC
1461 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1462 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1463};
1464
9cb36c2a
MCC
1465static unsigned int stac925xM3_pin_configs[8] = {
1466 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1467 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1468};
58eec423 1469
9cb36c2a
MCC
1470static unsigned int stac925xM5_pin_configs[8] = {
1471 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1472 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1473};
1474
9cb36c2a
MCC
1475static unsigned int stac925xM6_pin_configs[8] = {
1476 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1477 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD
1478};
1479
1480static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1481 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC
1482 [STAC_M1] = stac925xM1_pin_configs,
1483 [STAC_M1_2] = stac925xM1_2_pin_configs,
1484 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1485 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC
1486 [STAC_M3] = stac925xM3_pin_configs,
1487 [STAC_M5] = stac925xM5_pin_configs,
1488 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD
1489};
1490
1491static const char *stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1492 [STAC_925x_AUTO] = "auto",
8e21c34c 1493 [STAC_REF] = "ref",
9cb36c2a
MCC
1494 [STAC_M1] = "m1",
1495 [STAC_M1_2] = "m1-2",
1496 [STAC_M2] = "m2",
8e21c34c 1497 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC
1498 [STAC_M3] = "m3",
1499 [STAC_M5] = "m5",
1500 [STAC_M6] = "m6",
8e21c34c
TD
1501};
1502
9cb36c2a 1503static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC
1504 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1505 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1506 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1507 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1508 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC
1509 /* Not sure about the brand name for those */
1510 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1511 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1512 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1513 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1514 {} /* terminator */
8e21c34c
TD
1515};
1516
1517static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1518 /* SigmaTel reference board */
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1521 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC
1522
1523 /* Default table for unknown ID */
1524 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1525
8e21c34c
TD
1526 {} /* terminator */
1527};
1528
a7662640 1529static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR
1530 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1531 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1532 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR
1533 0x01452050,
1534};
1535
1536static unsigned int dell_m6_pin_configs[13] = {
1537 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1538 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1539 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1540 0x4f0000f0,
e1f0d669
MR
1541};
1542
842ae638
TI
1543static unsigned int alienware_m17x_pin_configs[13] = {
1544 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1545 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1546 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1547 0x904601b0,
1548};
1549
4d26f446 1550static unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1551 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1552 0x01A19250, 0x01011212, 0x01016211
52dc4386
AF
1553};
1554
e1f0d669 1555static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1556 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI
1557 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1558 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1559 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1560 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1561 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1562 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR
1563};
1564
1565static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1566 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1567 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1568 [STAC_92HD73XX_REF] = "ref",
ae709440 1569 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI
1570 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1571 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1572 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1573 [STAC_DELL_EQ] = "dell-eq",
842ae638 1574 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR
1575};
1576
1577static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1578 /* SigmaTel reference board */
1579 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1580 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR
1581 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1582 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF
1583 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1584 "Intel DG45ID", STAC_92HD73XX_INTEL),
1585 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1586 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1587 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1588 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1589 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1590 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1591 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1592 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1593 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1594 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1595 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1596 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1597 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1598 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1599 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI
1600 "unknown Dell", STAC_DELL_M6_DMIC),
1601 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1602 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1603 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1604 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS
1605 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1606 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI
1607 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1608 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB
1609 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1610 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf
DC
1611 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1612 "Dell Studio XPS 1645", STAC_DELL_M6_BOTH),
5c1bccf6
DC
1613 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1614 "Dell Studio 1558", STAC_DELL_M6_BOTH),
e1f0d669
MR
1615 {} /* terminator */
1616};
1617
842ae638
TI
1618static struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
1619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1620 "Alienware M17x", STAC_ALIENWARE_M17X),
1621 {} /* terminator */
1622};
1623
8bb0ac55 1624static unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR
1625 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1626 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR
1627 0x01451160, 0x98560170,
1628};
1629
8bb0ac55 1630static unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI
1631 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1632 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR
1633 0x40f000f0, 0x40f000f0,
1634};
1635
48315590
SE
1636static unsigned int hp_dv7_4000_pin_configs[10] = {
1637 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1638 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1639 0x40f000f0, 0x40f000f0,
1640};
1641
d0513fc6
MR
1642static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1643 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1644 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1645 [STAC_DELL_S14] = dell_s14_pin_configs,
48315590 1646 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
d0513fc6
MR
1647};
1648
1649static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1650 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1651 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1652 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1653 [STAC_DELL_S14] = "dell-s14",
b4e81876 1654 [STAC_92HD83XXX_HP] = "hp",
48315590 1655 [STAC_HP_DV7_4000] = "hp-dv7-4000",
d0513fc6
MR
1656};
1657
1658static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1659 /* SigmaTel reference board */
1660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1661 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR
1662 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1663 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR
1664 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1665 "unknown Dell", STAC_DELL_S14),
b4e81876
TI
1666 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x3600,
1667 "HP", STAC_92HD83XXX_HP),
574f3c4f 1668 {} /* terminator */
d0513fc6
MR
1669};
1670
616f89e7 1671static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1672 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1673 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK
1674 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1675 0x00000000
e035b841
MR
1676};
1677
616f89e7 1678static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1679 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1680 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK
1681 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1682 0x00000000
a7662640
MR
1683};
1684
616f89e7 1685static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR
1686 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1687 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK
1688 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1689 0x00000000
a7662640
MR
1690};
1691
616f89e7 1692static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR
1693 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1694 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK
1695 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1696 0x00000000
3a7abfd2
MR
1697};
1698
e035b841
MR
1699static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1700 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR
1701 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1702 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1703 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1704 [STAC_HP_M4] = NULL,
2a6ce6e5 1705 [STAC_HP_DV4] = NULL,
1b0652eb 1706 [STAC_HP_DV5] = NULL,
ae6241fb 1707 [STAC_HP_HDX] = NULL,
514bf54c 1708 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR
1709};
1710
1711static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1712 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1713 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR
1714 [STAC_DELL_M4_1] = "dell-m4-1",
1715 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1716 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1717 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 1718 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 1719 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1720 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1721 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR
1722};
1723
1724static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1725 /* SigmaTel reference board */
1726 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1727 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR
1728 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1729 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG
1730 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1731 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK
1732 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
1733 "HP", STAC_HP_DV5),
58d8395b
TI
1734 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1735 "HP", STAC_HP_DV5),
2ae466f8 1736 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 1737 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI
1738 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1739 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI
1740 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1741 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1742 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1743 "HP mini 1000", STAC_HP_M4),
ae6241fb 1744 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1745 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI
1746 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1747 "HP dv6", STAC_HP_DV5),
e3d2530a
KG
1748 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
1749 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY
1750 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
1751 "HP DV6", STAC_HP_DV5),
1972d025
TI
1752 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1753 "HP", STAC_HP_DV5),
a7662640
MR
1754 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1755 "unknown Dell", STAC_DELL_M4_1),
1756 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1757 "unknown Dell", STAC_DELL_M4_1),
1758 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1759 "unknown Dell", STAC_DELL_M4_1),
1760 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1761 "unknown Dell", STAC_DELL_M4_1),
1762 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1763 "unknown Dell", STAC_DELL_M4_1),
1764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1765 "unknown Dell", STAC_DELL_M4_1),
1766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1767 "unknown Dell", STAC_DELL_M4_1),
1768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1769 "unknown Dell", STAC_DELL_M4_2),
1770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1771 "unknown Dell", STAC_DELL_M4_2),
1772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1773 "unknown Dell", STAC_DELL_M4_2),
1774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1775 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR
1776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1777 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR
1778 {} /* terminator */
1779};
1780
403d1944
MP
1781static unsigned int ref922x_pin_configs[10] = {
1782 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1783 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M
1784 0x40000100, 0x40000100,
1785};
1786
dfe495d0
TI
1787/*
1788 STAC 922X pin configs for
1789 102801A7
1790 102801AB
1791 102801A9
1792 102801D1
1793 102801D2
1794*/
1795static unsigned int dell_922x_d81_pin_configs[10] = {
1796 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1797 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1798 0x01813122, 0x400001f2,
1799};
1800
1801/*
1802 STAC 922X pin configs for
1803 102801AC
1804 102801D0
1805*/
1806static unsigned int dell_922x_d82_pin_configs[10] = {
1807 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1808 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1809 0x01813122, 0x400001f1,
1810};
1811
1812/*
1813 STAC 922X pin configs for
1814 102801BF
1815*/
1816static unsigned int dell_922x_m81_pin_configs[10] = {
1817 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1818 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1819 0x40C003f1, 0x405003f0,
1820};
1821
1822/*
1823 STAC 9221 A1 pin configs for
1824 102801D7 (Dell XPS M1210)
1825*/
1826static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ
1827 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1828 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI
1829 0x508003f3, 0x405003f4,
1830};
1831
403d1944 1832static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1833 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP
1834 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1835 0x02a19120, 0x40000100,
1836};
1837
1838static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP
1839 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1840 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP
1841 0x02a19320, 0x40000100,
1842};
1843
5d5d3bc3
IZ
1844static unsigned int intel_mac_v1_pin_configs[10] = {
1845 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1846 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1847 0x400000fc, 0x400000fb,
1848};
1849
1850static unsigned int intel_mac_v2_pin_configs[10] = {
1851 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1852 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1853 0x400000fc, 0x400000fb,
6f0778d8
NB
1854};
1855
5d5d3bc3
IZ
1856static unsigned int intel_mac_v3_pin_configs[10] = {
1857 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1858 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI
1859 0x400000fc, 0x400000fb,
1860};
1861
5d5d3bc3
IZ
1862static unsigned int intel_mac_v4_pin_configs[10] = {
1863 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1864 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF
1865 0x400000fc, 0x400000fb,
1866};
1867
5d5d3bc3
IZ
1868static unsigned int intel_mac_v5_pin_configs[10] = {
1869 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1870 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1871 0x400000fc, 0x400000fb,
0dae0f83
TI
1872};
1873
8c650087
MCC
1874static unsigned int ecs202_pin_configs[10] = {
1875 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1876 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1877 0x9037012e, 0x40e000f2,
1878};
76c08828 1879
19039bd0 1880static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1881 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI
1882 [STAC_D945GTP3] = d945gtp3_pin_configs,
1883 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ
1884 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1885 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1886 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1887 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1888 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1889 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1890 /* for backward compatibility */
5d5d3bc3
IZ
1891 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1892 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1893 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1894 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1895 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1896 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1897 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI
1898 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1899 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1900 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1901 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP
1902};
1903
f5fcc13c 1904static const char *stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1905 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI
1906 [STAC_D945_REF] = "ref",
1907 [STAC_D945GTP5] = "5stack",
1908 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ
1909 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1910 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1911 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1912 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1913 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1914 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1915 /* for backward compatibility */
f5fcc13c 1916 [STAC_MACMINI] = "macmini",
3fc24d85 1917 [STAC_MACBOOK] = "macbook",
6f0778d8
NB
1918 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1919 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1920 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1921 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1922 [STAC_ECS_202] = "ecs202",
dfe495d0
TI
1923 [STAC_922X_DELL_D81] = "dell-d81",
1924 [STAC_922X_DELL_D82] = "dell-d82",
1925 [STAC_922X_DELL_M81] = "dell-m81",
1926 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI
1927};
1928
1929static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1930 /* SigmaTel reference board */
1931 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1932 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR
1933 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1934 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI
1935 /* Intel 945G based systems */
1936 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1937 "Intel D945G", STAC_D945GTP3),
1938 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1939 "Intel D945G", STAC_D945GTP3),
1940 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1941 "Intel D945G", STAC_D945GTP3),
1942 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1943 "Intel D945G", STAC_D945GTP3),
1944 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1945 "Intel D945G", STAC_D945GTP3),
1946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1947 "Intel D945G", STAC_D945GTP3),
1948 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1949 "Intel D945G", STAC_D945GTP3),
1950 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1951 "Intel D945G", STAC_D945GTP3),
1952 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1953 "Intel D945G", STAC_D945GTP3),
1954 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1955 "Intel D945G", STAC_D945GTP3),
1956 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1957 "Intel D945G", STAC_D945GTP3),
1958 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1959 "Intel D945G", STAC_D945GTP3),
1960 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1961 "Intel D945G", STAC_D945GTP3),
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1963 "Intel D945G", STAC_D945GTP3),
1964 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1965 "Intel D945G", STAC_D945GTP3),
1966 /* Intel D945G 5-stack systems */
1967 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1968 "Intel D945G", STAC_D945GTP5),
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1970 "Intel D945G", STAC_D945GTP5),
1971 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1972 "Intel D945G", STAC_D945GTP5),
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1974 "Intel D945G", STAC_D945GTP5),
1975 /* Intel 945P based systems */
1976 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1977 "Intel D945P", STAC_D945GTP3),
1978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1979 "Intel D945P", STAC_D945GTP3),
1980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1981 "Intel D945P", STAC_D945GTP3),
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1983 "Intel D945P", STAC_D945GTP3),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1985 "Intel D945P", STAC_D945GTP3),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1987 "Intel D945P", STAC_D945GTP5),
8056d47e
TI
1988 /* other intel */
1989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
1990 "Intel D945", STAC_D945_REF),
f5fcc13c 1991 /* other systems */
536319af 1992 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1993 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1994 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI
1995 /* Dell systems */
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1997 "unknown Dell", STAC_922X_DELL_D81),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1999 "unknown Dell", STAC_922X_DELL_D81),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2001 "unknown Dell", STAC_922X_DELL_D81),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2003 "unknown Dell", STAC_922X_DELL_D82),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2005 "unknown Dell", STAC_922X_DELL_M81),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2007 "unknown Dell", STAC_922X_DELL_D82),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2009 "unknown Dell", STAC_922X_DELL_D81),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2011 "unknown Dell", STAC_922X_DELL_D81),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2013 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2014 /* ECS/PC Chips boards */
dea0a509 2015 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2016 "ECS/PC chips", STAC_ECS_202),
403d1944
MP
2017 {} /* terminator */
2018};
2019
3cc08dc6 2020static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD
2021 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2022 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2023 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2024 0x01c42190, 0x40000100,
3cc08dc6
MP
2025};
2026
93ed1503 2027static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD
2028 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2029 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2030 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2031 0x40000100, 0x40000100
2032};
2033
93ed1503
TD
2034static unsigned int d965_5st_pin_configs[14] = {
2035 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2036 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2037 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2038 0x40000100, 0x40000100
2039};
2040
679d92ed
TI
2041static unsigned int d965_5st_no_fp_pin_configs[14] = {
2042 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2043 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2044 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2045 0x40000100, 0x40000100
2046};
2047
4ff076e5
TD
2048static unsigned int dell_3st_pin_configs[14] = {
2049 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2050 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2051 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD
2052 0x40c003fc, 0x40000100
2053};
2054
93ed1503 2055static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2056 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR
2057 [STAC_D965_REF] = ref927x_pin_configs,
2058 [STAC_D965_3ST] = d965_3st_pin_configs,
2059 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2060 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR
2061 [STAC_DELL_3ST] = dell_3st_pin_configs,
2062 [STAC_DELL_BIOS] = NULL,
54930531 2063 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP
2064};
2065
f5fcc13c 2066static const char *stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2067 [STAC_927X_AUTO] = "auto",
e28d8322 2068 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR
2069 [STAC_D965_REF] = "ref",
2070 [STAC_D965_3ST] = "3stack",
2071 [STAC_D965_5ST] = "5stack",
679d92ed 2072 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR
2073 [STAC_DELL_3ST] = "dell-3stack",
2074 [STAC_DELL_BIOS] = "dell-bios",
54930531 2075 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI
2076};
2077
2078static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2079 /* SigmaTel reference board */
2080 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2081 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR
2082 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2083 "DFI LanParty", STAC_D965_REF),
81d3dbde 2084 /* Intel 946 based systems */
f5fcc13c
TI
2085 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2086 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2087 /* 965 based 3 stack systems */
dea0a509
TI
2088 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2089 "Intel D965", STAC_D965_3ST),
2090 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2091 "Intel D965", STAC_D965_3ST),
4ff076e5 2092 /* Dell 3 stack systems */
dfe495d0 2093 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD
2094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2095 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2096 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2097 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2099 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2101 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR
2102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2105 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2106 /* 965 based 5 stack systems */
dea0a509
TI
2107 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2108 "Intel D965", STAC_D965_5ST),
2109 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2110 "Intel D965", STAC_D965_5ST),
54930531
TI
2111 /* volume-knob fixes */
2112 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP
2113 {} /* terminator */
2114};
2115
f3302a59
MP
2116static unsigned int ref9205_pin_configs[12] = {
2117 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2118 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2119 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP
2120};
2121
dfe495d0
TI
2122/*
2123 STAC 9205 pin configs for
2124 102801F1
2125 102801F2
2126 102801FC
2127 102801FD
2128 10280204
2129 1028021F
3fa2ef74 2130 10280228 (Dell Vostro 1500)
95e70e87 2131 10280229 (Dell Vostro 1700)
dfe495d0
TI
2132*/
2133static unsigned int dell_9205_m42_pin_configs[12] = {
2134 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2135 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2136 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2137};
2138
2139/*
2140 STAC 9205 pin configs for
2141 102801F9
2142 102801FA
2143 102801FE
2144 102801FF (Dell Precision M4300)
2145 10280206
2146 10280200
2147 10280201
2148*/
2149static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD
2150 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2151 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2152 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2153};
2154
dfe495d0 2155static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD
2156 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2157 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2158 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2159};
2160
f5fcc13c 2161static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2162 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI
2163 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2164 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2165 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2166 [STAC_9205_EAPD] = NULL,
f3302a59
MP
2167};
2168
f5fcc13c 2169static const char *stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2170 [STAC_9205_AUTO] = "auto",
f5fcc13c 2171 [STAC_9205_REF] = "ref",
dfe495d0 2172 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD
2173 [STAC_9205_DELL_M43] = "dell-m43",
2174 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2175 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI
2176};
2177
2178static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2179 /* SigmaTel reference board */
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2181 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2183 "SigmaTel", STAC_9205_REF),
577aa2c1
MR
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2185 "DFI LanParty", STAC_9205_REF),
d9a4268e 2186 /* Dell */
dfe495d0
TI
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2188 "unknown Dell", STAC_9205_DELL_M42),
2189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2190 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2192 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2194 "Dell Precision", STAC_9205_DELL_M43),
2195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2196 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI
2197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2198 "unknown Dell", STAC_9205_DELL_M42),
2199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2200 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD
2201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2202 "Dell Precision", STAC_9205_DELL_M43),
2203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2204 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI
2205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2206 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI
2207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2208 "Dell Precision", STAC_9205_DELL_M43),
2209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2210 "Dell Precision", STAC_9205_DELL_M43),
2211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2212 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2214 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR
2215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2216 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA
2217 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2218 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2219 /* Gateway */
42b95f0c 2220 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2221 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP
2222 {} /* terminator */
2223};
2224
330ee995
TI
2225static void stac92xx_set_config_regs(struct hda_codec *codec,
2226 unsigned int *pincfgs)
11b44bbd
RF
2227{
2228 int i;
2229 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2230
330ee995
TI
2231 if (!pincfgs)
2232 return;
11b44bbd 2233
87d48363 2234 for (i = 0; i < spec->num_pins; i++)
330ee995
TI
2235 if (spec->pin_nids[i] && pincfgs[i])
2236 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2237 pincfgs[i]);
af9f341a
TI
2238}
2239
dabbed6f 2240/*
c7d4b2fa 2241 * Analog playback callbacks
dabbed6f 2242 */
c7d4b2fa
M
2243static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2244 struct hda_codec *codec,
c8b6bf9b 2245 struct snd_pcm_substream *substream)
2f2f4251 2246{
dabbed6f 2247 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR
2248 if (spec->stream_delay)
2249 msleep(spec->stream_delay);
9a08160b
TI
2250 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2251 hinfo);
2f2f4251
M
2252}
2253
2f2f4251
M
2254static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2255 struct hda_codec *codec,
2256 unsigned int stream_tag,
2257 unsigned int format,
c8b6bf9b 2258 struct snd_pcm_substream *substream)
2f2f4251
M
2259{
2260 struct sigmatel_spec *spec = codec->spec;
403d1944 2261 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M
2262}
2263
2264static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2265 struct hda_codec *codec,
c8b6bf9b 2266 struct snd_pcm_substream *substream)
2f2f4251
M
2267{
2268 struct sigmatel_spec *spec = codec->spec;
2269 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2270}
2271
dabbed6f
M
2272/*
2273 * Digital playback callbacks
2274 */
2275static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2276 struct hda_codec *codec,
c8b6bf9b 2277 struct snd_pcm_substream *substream)
dabbed6f
M
2278{
2279 struct sigmatel_spec *spec = codec->spec;
2280 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2281}
2282
2283static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2284 struct hda_codec *codec,
c8b6bf9b 2285 struct snd_pcm_substream *substream)
dabbed6f
M
2286{
2287 struct sigmatel_spec *spec = codec->spec;
2288 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2289}
2290
6b97eb45
TI
2291static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2292 struct hda_codec *codec,
2293 unsigned int stream_tag,
2294 unsigned int format,
2295 struct snd_pcm_substream *substream)
2296{
2297 struct sigmatel_spec *spec = codec->spec;
2298 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2299 stream_tag, format, substream);
2300}
2301
9411e21c
TI
2302static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2303 struct hda_codec *codec,
2304 struct snd_pcm_substream *substream)
2305{
2306 struct sigmatel_spec *spec = codec->spec;
2307 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2308}
2309
dabbed6f 2310
2f2f4251
M
2311/*
2312 * Analog capture callbacks
2313 */
2314static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2315 struct hda_codec *codec,
2316 unsigned int stream_tag,
2317 unsigned int format,
c8b6bf9b 2318 struct snd_pcm_substream *substream)
2f2f4251
M
2319{
2320 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2321 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2322
8daaaa97
MR
2323 if (spec->powerdown_adcs) {
2324 msleep(40);
8c2f767b 2325 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR
2326 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2327 }
2328 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M
2329 return 0;
2330}
2331
2332static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2333 struct hda_codec *codec,
c8b6bf9b 2334 struct snd_pcm_substream *substream)
2f2f4251
M
2335{
2336 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2337 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2338
8daaaa97
MR
2339 snd_hda_codec_cleanup_stream(codec, nid);
2340 if (spec->powerdown_adcs)
8c2f767b 2341 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2342 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M
2343 return 0;
2344}
2345
dabbed6f
M
2346static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2347 .substreams = 1,
2348 .channels_min = 2,
2349 .channels_max = 2,
2350 /* NID is set in stac92xx_build_pcms */
2351 .ops = {
2352 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2353 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI
2354 .prepare = stac92xx_dig_playback_pcm_prepare,
2355 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M
2356 },
2357};
2358
2359static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2360 .substreams = 1,
2361 .channels_min = 2,
2362 .channels_max = 2,
2363 /* NID is set in stac92xx_build_pcms */
2364};
2365
2f2f4251
M
2366static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2367 .substreams = 1,
2368 .channels_min = 2,
c7d4b2fa 2369 .channels_max = 8,
2f2f4251
M
2370 .nid = 0x02, /* NID to query formats and rates */
2371 .ops = {
2372 .open = stac92xx_playback_pcm_open,
2373 .prepare = stac92xx_playback_pcm_prepare,
2374 .cleanup = stac92xx_playback_pcm_cleanup
2375 },
2376};
2377
3cc08dc6
MP
2378static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2379 .substreams = 1,
2380 .channels_min = 2,
2381 .channels_max = 2,
2382 .nid = 0x06, /* NID to query formats and rates */
2383 .ops = {
2384 .open = stac92xx_playback_pcm_open,
2385 .prepare = stac92xx_playback_pcm_prepare,
2386 .cleanup = stac92xx_playback_pcm_cleanup
2387 },
2388};
2389
2f2f4251 2390static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M
2391 .channels_min = 2,
2392 .channels_max = 2,
9e05b7a3 2393 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M
2394 .ops = {
2395 .prepare = stac92xx_capture_pcm_prepare,
2396 .cleanup = stac92xx_capture_pcm_cleanup
2397 },
2398};
2399
2400static int stac92xx_build_pcms(struct hda_codec *codec)
2401{
2402 struct sigmatel_spec *spec = codec->spec;
2403 struct hda_pcm *info = spec->pcm_rec;
2404
2405 codec->num_pcms = 1;
2406 codec->pcm_info = info;
2407
c7d4b2fa 2408 info->name = "STAC92xx Analog";
2f2f4251 2409 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI
2410 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2411 spec->multiout.dac_nids[0];
2f2f4251 2412 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2413 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2414 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP
2415
2416 if (spec->alt_switch) {
2417 codec->num_pcms++;
2418 info++;
2419 info->name = "STAC92xx Analog Alt";
2420 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2421 }
2f2f4251 2422
dabbed6f
M
2423 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2424 codec->num_pcms++;
2425 info++;
2426 info->name = "STAC92xx Digital";
0852d7a6 2427 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M
2428 if (spec->multiout.dig_out_nid) {
2429 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2430 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2431 }
2432 if (spec->dig_in_nid) {
2433 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2434 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2435 }
2436 }
2437
2f2f4251
M
2438 return 0;
2439}
2440
7c922de7
NL
2441static unsigned int stac92xx_get_default_vref(struct hda_codec *codec,
2442 hda_nid_t nid)
c960a03b 2443{
1327a32b 2444 unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
c960a03b
TI
2445 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2446 if (pincap & AC_PINCAP_VREF_100)
2447 return AC_PINCTL_VREF_100;
2448 if (pincap & AC_PINCAP_VREF_80)
2449 return AC_PINCTL_VREF_80;
2450 if (pincap & AC_PINCAP_VREF_50)
2451 return AC_PINCTL_VREF_50;
2452 if (pincap & AC_PINCAP_VREF_GRD)
2453 return AC_PINCTL_VREF_GRD;
2454 return 0;
2455}
2456
403d1944
MP
2457static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2458
2459{
82beb8fd
TI
2460 snd_hda_codec_write_cache(codec, nid, 0,
2461 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP
2462}
2463
7c2ba97b
MR
2464#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2465
2466static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2467 struct snd_ctl_elem_value *ucontrol)
2468{
2469 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2470 struct sigmatel_spec *spec = codec->spec;
2471
d7a89436 2472 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR
2473 return 0;
2474}
2475
62558ce1 2476static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2477
7c2ba97b
MR
2478static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2479 struct snd_ctl_elem_value *ucontrol)
2480{
2481 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2482 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI
2483 int nid = kcontrol->private_value;
2484
2485 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR
2486
2487 /* check to be sure that the ports are upto date with
2488 * switch changes
2489 */
62558ce1 2490 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR
2491
2492 return 1;
2493}
2494
7c922de7
NL
2495static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2496 struct snd_ctl_elem_info *uinfo)
2497{
2498 int i;
2499 static char *texts[] = {
2500 "Mic In", "Line In", "Line Out"
2501 };
2502
2503 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2504 struct sigmatel_spec *spec = codec->spec;
2505 hda_nid_t nid = kcontrol->private_value;
2506
2507 if (nid == spec->mic_switch || nid == spec->line_switch)
2508 i = 3;
2509 else
2510 i = 2;
2511
2512 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2513 uinfo->value.enumerated.items = i;
2514 uinfo->count = 1;
2515 if (uinfo->value.enumerated.item >= i)
2516 uinfo->value.enumerated.item = i-1;
2517 strcpy(uinfo->value.enumerated.name,
2518 texts[uinfo->value.enumerated.item]);
2519
2520 return 0;
2521}
2522
2523static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2524 struct snd_ctl_elem_value *ucontrol)
2525{
2526 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2527 hda_nid_t nid = kcontrol->private_value;
2528 unsigned int vref = stac92xx_vref_get(codec, nid);
2529
2530 if (vref == stac92xx_get_default_vref(codec, nid))
2531 ucontrol->value.enumerated.item[0] = 0;
2532 else if (vref == AC_PINCTL_VREF_GRD)
2533 ucontrol->value.enumerated.item[0] = 1;
2534 else if (vref == AC_PINCTL_VREF_HIZ)
2535 ucontrol->value.enumerated.item[0] = 2;
2536
2537 return 0;
2538}
2539
2540static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2541 struct snd_ctl_elem_value *ucontrol)
2542{
2543 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2544 unsigned int new_vref = 0;
b8621516 2545 int error;
7c922de7
NL
2546 hda_nid_t nid = kcontrol->private_value;
2547
2548 if (ucontrol->value.enumerated.item[0] == 0)
2549 new_vref = stac92xx_get_default_vref(codec, nid);
2550 else if (ucontrol->value.enumerated.item[0] == 1)
2551 new_vref = AC_PINCTL_VREF_GRD;
2552 else if (ucontrol->value.enumerated.item[0] == 2)
2553 new_vref = AC_PINCTL_VREF_HIZ;
2554 else
2555 return 0;
2556
2557 if (new_vref != stac92xx_vref_get(codec, nid)) {
2558 error = stac92xx_vref_set(codec, nid, new_vref);
2559 return error;
2560 }
2561
2562 return 0;
2563}
2564
2565static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2566 struct snd_ctl_elem_info *uinfo)
2567{
2568 static char *texts[2];
2569 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2570 struct sigmatel_spec *spec = codec->spec;
2571
2572 if (kcontrol->private_value == spec->line_switch)
2573 texts[0] = "Line In";
2574 else
2575 texts[0] = "Mic In";
2576 texts[1] = "Line Out";
2577 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2578 uinfo->value.enumerated.items = 2;
2579 uinfo->count = 1;
2580
2581 if (uinfo->value.enumerated.item >= 2)
2582 uinfo->value.enumerated.item = 1;
2583 strcpy(uinfo->value.enumerated.name,
2584 texts[uinfo->value.enumerated.item]);
2585
2586 return 0;
2587}
403d1944
MP
2588
2589static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2590{
2591 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2592 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL
2593 hda_nid_t nid = kcontrol->private_value;
2594 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2595
7c922de7 2596 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP
2597 return 0;
2598}
2599
2600static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2601{
2602 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2603 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL
2604 hda_nid_t nid = kcontrol->private_value;
2605 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2606 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP
2607
2608 spec->io_switch[io_idx] = val;
2609
2610 if (val)
2611 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI
2612 else {
2613 unsigned int pinctl = AC_PINCTL_IN_EN;
2614 if (io_idx) /* set VREF for mic */
7c922de7 2615 pinctl |= stac92xx_get_default_vref(codec, nid);
c960a03b
TI
2616 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2617 }
40c1d308
JZ
2618
2619 /* check the auto-mute again: we need to mute/unmute the speaker
2620 * appropriately according to the pin direction
2621 */
2622 if (spec->hp_detect)
62558ce1 2623 stac_issue_unsol_event(codec, nid);
40c1d308 2624
403d1944
MP
2625 return 1;
2626}
2627
0fb87bb4
ML
2628#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2629
2630static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2631 struct snd_ctl_elem_value *ucontrol)
2632{
2633 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2634 struct sigmatel_spec *spec = codec->spec;
2635
2636 ucontrol->value.integer.value[0] = spec->clfe_swap;
2637 return 0;
2638}
2639
2640static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2641 struct snd_ctl_elem_value *ucontrol)
2642{
2643 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2644 struct sigmatel_spec *spec = codec->spec;
2645 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2646 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2647
68ea7b2f 2648 if (spec->clfe_swap == val)
0fb87bb4
ML
2649 return 0;
2650
68ea7b2f 2651 spec->clfe_swap = val;
0fb87bb4
ML
2652
2653 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2654 spec->clfe_swap ? 0x4 : 0x0);
2655
2656 return 1;
2657}
2658
7c2ba97b
MR
2659#define STAC_CODEC_HP_SWITCH(xname) \
2660 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2661 .name = xname, \
2662 .index = 0, \
2663 .info = stac92xx_hp_switch_info, \
2664 .get = stac92xx_hp_switch_get, \
2665 .put = stac92xx_hp_switch_put, \
2666 }
2667
403d1944
MP
2668#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2669 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2670 .name = xname, \
2671 .index = 0, \
2672 .info = stac92xx_io_switch_info, \
2673 .get = stac92xx_io_switch_get, \
2674 .put = stac92xx_io_switch_put, \
2675 .private_value = xpval, \
2676 }
2677
0fb87bb4
ML
2678#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2679 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2680 .name = xname, \
2681 .index = 0, \
2682 .info = stac92xx_clfe_switch_info, \
2683 .get = stac92xx_clfe_switch_get, \
2684 .put = stac92xx_clfe_switch_put, \
2685 .private_value = xpval, \
2686 }
403d1944 2687
c7d4b2fa
M
2688enum {
2689 STAC_CTL_WIDGET_VOL,
2690 STAC_CTL_WIDGET_MUTE,
123c07ae 2691 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2692 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2693 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2694 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL
2695 STAC_CTL_WIDGET_CLFE_SWITCH,
2696 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M
2697};
2698
c8b6bf9b 2699static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M
2700 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2701 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2702 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2703 STAC_MONO_MUX,
7c2ba97b 2704 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2705 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2706 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2707 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M
2708};
2709
2710/* add dynamic controls */
e3c75964
TI
2711static struct snd_kcontrol_new *
2712stac_control_new(struct sigmatel_spec *spec,
2713 struct snd_kcontrol_new *ktemp,
4d02d1b6 2714 const char *name,
5e26dfd0 2715 unsigned int subdev)
c7d4b2fa 2716{
c8b6bf9b 2717 struct snd_kcontrol_new *knew;
c7d4b2fa 2718
603c4019
TI
2719 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2720 knew = snd_array_new(&spec->kctls);
2721 if (!knew)
e3c75964 2722 return NULL;
4d4e9bb3 2723 *knew = *ktemp;
82fe0c58 2724 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI
2725 if (!knew->name) {
2726 /* roolback */
2727 memset(knew, 0, sizeof(*knew));
2728 spec->kctls.alloced--;
2729 return NULL;
2730 }
5e26dfd0 2731 knew->subdevice = subdev;
e3c75964
TI
2732 return knew;
2733}
2734
2735static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2736 struct snd_kcontrol_new *ktemp,
2737 int idx, const char *name,
2738 unsigned long val)
2739{
4d02d1b6 2740 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 2741 HDA_SUBDEV_AMP_FLAG);
e3c75964 2742 if (!knew)
c7d4b2fa 2743 return -ENOMEM;
e3c75964 2744 knew->index = idx;
c7d4b2fa 2745 knew->private_value = val;
c7d4b2fa
M
2746 return 0;
2747}
2748
4d4e9bb3
TI
2749static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2750 int type, int idx, const char *name,
2751 unsigned long val)
2752{
2753 return stac92xx_add_control_temp(spec,
2754 &stac92xx_control_templates[type],
2755 idx, name, val);
2756}
2757
4682eee0
MR
2758
2759/* add dynamic controls */
4d4e9bb3
TI
2760static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2761 const char *name, unsigned long val)
4682eee0
MR
2762{
2763 return stac92xx_add_control_idx(spec, type, 0, name, val);
2764}
2765
e3c75964
TI
2766static struct snd_kcontrol_new stac_input_src_temp = {
2767 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2768 .name = "Input Source",
2769 .info = stac92xx_mux_enum_info,
2770 .get = stac92xx_mux_enum_get,
2771 .put = stac92xx_mux_enum_put,
2772};
2773
7c922de7
NL
2774static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2775 hda_nid_t nid, int idx)
2776{
2777 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2778 int control = 0;
2779 struct sigmatel_spec *spec = codec->spec;
2780 char name[22];
2781
2782 if (!((get_defcfg_connect(def_conf)) & AC_JACK_PORT_FIXED)) {
2783 if (stac92xx_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
2784 && nid == spec->line_switch)
2785 control = STAC_CTL_WIDGET_IO_SWITCH;
2786 else if (snd_hda_query_pin_caps(codec, nid)
2787 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2788 control = STAC_CTL_WIDGET_DC_BIAS;
2789 else if (nid == spec->mic_switch)
2790 control = STAC_CTL_WIDGET_IO_SWITCH;
2791 }
2792
2793 if (control) {
2794 strcpy(name, auto_pin_cfg_labels[idx]);
2795 return stac92xx_add_control(codec->spec, control,
2796 strcat(name, " Jack Mode"), nid);
2797 }
2798
2799 return 0;
2800}
2801
e3c75964
TI
2802static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2803{
2804 struct snd_kcontrol_new *knew;
2805 struct hda_input_mux *imux = &spec->private_imux;
2806
3d21d3f7
TI
2807 if (spec->auto_mic)
2808 return 0; /* no need for input source */
e3c75964
TI
2809 if (!spec->num_adcs || imux->num_items <= 1)
2810 return 0; /* no need for input source control */
2811 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 2812 stac_input_src_temp.name, 0);
e3c75964
TI
2813 if (!knew)
2814 return -ENOMEM;
2815 knew->count = spec->num_adcs;
2816 return 0;
2817}
2818
c21ca4a8
TI
2819/* check whether the line-input can be used as line-out */
2820static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP
2821{
2822 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2823 struct auto_pin_cfg *cfg = &spec->autocfg;
2824 hda_nid_t nid;
2825 unsigned int pincap;
8e9068b1 2826
c21ca4a8
TI
2827 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2828 return 0;
2829 nid = cfg->input_pins[AUTO_PIN_LINE];
1327a32b 2830 pincap = snd_hda_query_pin_caps(codec, nid);
c21ca4a8
TI
2831 if (pincap & AC_PINCAP_OUT)
2832 return nid;
2833 return 0;
2834}
403d1944 2835
c21ca4a8
TI
2836/* check whether the mic-input can be used as line-out */
2837static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2838{
2839 struct sigmatel_spec *spec = codec->spec;
2840 struct auto_pin_cfg *cfg = &spec->autocfg;
2841 unsigned int def_conf, pincap;
2842 unsigned int mic_pin;
2843
2844 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2845 return 0;
2846 mic_pin = AUTO_PIN_MIC;
2847 for (;;) {
2848 hda_nid_t nid = cfg->input_pins[mic_pin];
330ee995 2849 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI
2850 /* some laptops have an internal analog microphone
2851 * which can't be used as a output */
2852 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
1327a32b 2853 pincap = snd_hda_query_pin_caps(codec, nid);
c21ca4a8
TI
2854 if (pincap & AC_PINCAP_OUT)
2855 return nid;
403d1944 2856 }
c21ca4a8
TI
2857 if (mic_pin == AUTO_PIN_MIC)
2858 mic_pin = AUTO_PIN_FRONT_MIC;
2859 else
2860 break;
403d1944 2861 }
403d1944
MP
2862 return 0;
2863}
2864
7b043899
SL
2865static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2866{
2867 int i;
2868
2869 for (i = 0; i < spec->multiout.num_dacs; i++) {
2870 if (spec->multiout.dac_nids[i] == nid)
2871 return 1;
2872 }
2873
2874 return 0;
2875}
2876
c21ca4a8
TI
2877static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2878{
2879 int i;
2880 if (is_in_dac_nids(spec, nid))
2881 return 1;
2882 for (i = 0; i < spec->autocfg.hp_outs; i++)
2883 if (spec->hp_dacs[i] == nid)
2884 return 1;
2885 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2886 if (spec->speaker_dacs[i] == nid)
2887 return 1;
2888 return 0;
2889}
2890
2891static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2892{
2893 struct sigmatel_spec *spec = codec->spec;
2894 int j, conn_len;
2895 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2896 unsigned int wcaps, wtype;
2897
2898 conn_len = snd_hda_get_connections(codec, nid, conn,
2899 HDA_MAX_CONNECTIONS);
36706005
CC
2900 /* 92HD88: trace back up the link of nids to find the DAC */
2901 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
2902 != AC_WID_AUD_OUT)) {
2903 nid = conn[0];
2904 conn_len = snd_hda_get_connections(codec, nid, conn,
2905 HDA_MAX_CONNECTIONS);
2906 }
c21ca4a8 2907 for (j = 0; j < conn_len; j++) {
14bafe32 2908 wcaps = get_wcaps(codec, conn[j]);
a22d543a 2909 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI
2910 /* we check only analog outputs */
2911 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2912 continue;
2913 /* if this route has a free DAC, assign it */
2914 if (!check_all_dac_nids(spec, conn[j])) {
2915 if (conn_len > 1) {
2916 /* select this DAC in the pin's input mux */
2917 snd_hda_codec_write_cache(codec, nid, 0,
2918 AC_VERB_SET_CONNECT_SEL, j);
2919 }
2920 return conn[j];
2921 }
2922 }
ee58a7ca
TI
2923 /* if all DACs are already assigned, connect to the primary DAC */
2924 if (conn_len > 1) {
2925 for (j = 0; j < conn_len; j++) {
2926 if (conn[j] == spec->multiout.dac_nids[0]) {
2927 snd_hda_codec_write_cache(codec, nid, 0,
2928 AC_VERB_SET_CONNECT_SEL, j);
2929 break;
2930 }
2931 }
2932 }
c21ca4a8
TI
2933 return 0;
2934}
2935
2936static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2937static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2938
3cc08dc6 2939/*
7b043899
SL
2940 * Fill in the dac_nids table from the parsed pin configuration
2941 * This function only works when every pin in line_out_pins[]
2942 * contains atleast one DAC in its connection list. Some 92xx
2943 * codecs are not connected directly to a DAC, such as the 9200
2944 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2945 */
c21ca4a8 2946static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M
2947{
2948 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2949 struct auto_pin_cfg *cfg = &spec->autocfg;
2950 int i;
2951 hda_nid_t nid, dac;
7b043899 2952
c7d4b2fa
M
2953 for (i = 0; i < cfg->line_outs; i++) {
2954 nid = cfg->line_out_pins[i];
c21ca4a8
TI
2955 dac = get_unassigned_dac(codec, nid);
2956 if (!dac) {
df802952
TI
2957 if (spec->multiout.num_dacs > 0) {
2958 /* we have already working output pins,
2959 * so let's drop the broken ones again
2960 */
2961 cfg->line_outs = spec->multiout.num_dacs;
2962 break;
2963 }
7b043899
SL
2964 /* error out, no available DAC found */
2965 snd_printk(KERN_ERR
2966 "%s: No available DAC for pin 0x%x\n",
2967 __func__, nid);
2968 return -ENODEV;
2969 }
c21ca4a8
TI
2970 add_spec_dacs(spec, dac);
2971 }
7b043899 2972
139e071b
TI
2973 for (i = 0; i < cfg->hp_outs; i++) {
2974 nid = cfg->hp_pins[i];
2975 dac = get_unassigned_dac(codec, nid);
2976 if (dac) {
2977 if (!spec->multiout.hp_nid)
2978 spec->multiout.hp_nid = dac;
2979 else
2980 add_spec_extra_dacs(spec, dac);
2981 }
2982 spec->hp_dacs[i] = dac;
2983 }
2984
2985 for (i = 0; i < cfg->speaker_outs; i++) {
2986 nid = cfg->speaker_pins[i];
2987 dac = get_unassigned_dac(codec, nid);
2988 if (dac)
2989 add_spec_extra_dacs(spec, dac);
2990 spec->speaker_dacs[i] = dac;
2991 }
2992
c21ca4a8
TI
2993 /* add line-in as output */
2994 nid = check_line_out_switch(codec);
2995 if (nid) {
2996 dac = get_unassigned_dac(codec, nid);
2997 if (dac) {
2998 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2999 nid, cfg->line_outs);
3000 cfg->line_out_pins[cfg->line_outs] = nid;
3001 cfg->line_outs++;
3002 spec->line_switch = nid;
3003 add_spec_dacs(spec, dac);
3004 }
3005 }
3006 /* add mic as output */
3007 nid = check_mic_out_switch(codec);
3008 if (nid) {
3009 dac = get_unassigned_dac(codec, nid);
3010 if (dac) {
3011 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3012 nid, cfg->line_outs);
3013 cfg->line_out_pins[cfg->line_outs] = nid;
3014 cfg->line_outs++;
3015 spec->mic_switch = nid;
3016 add_spec_dacs(spec, dac);
3017 }
3018 }
c7d4b2fa 3019
c21ca4a8 3020 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL
3021 spec->multiout.num_dacs,
3022 spec->multiout.dac_nids[0],
3023 spec->multiout.dac_nids[1],
3024 spec->multiout.dac_nids[2],
3025 spec->multiout.dac_nids[3],
3026 spec->multiout.dac_nids[4]);
c21ca4a8 3027
c7d4b2fa
M
3028 return 0;
3029}
3030
eb06ed8f 3031/* create volume control/switch for the given prefx type */
668b9652
TI
3032static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3033 int idx, hda_nid_t nid, int chs)
eb06ed8f 3034{
7c7767eb 3035 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI
3036 char name[32];
3037 int err;
3038
7c7767eb
TI
3039 if (!spec->check_volume_offset) {
3040 unsigned int caps, step, nums, db_scale;
3041 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3042 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3043 AC_AMPCAP_STEP_SIZE_SHIFT;
3044 step = (step + 1) * 25; /* in .01dB unit */
3045 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3046 AC_AMPCAP_NUM_STEPS_SHIFT;
3047 db_scale = nums * step;
3048 /* if dB scale is over -64dB, and finer enough,
3049 * let's reduce it to half
3050 */
3051 if (db_scale > 6400 && nums >= 0x1f)
3052 spec->volume_offset = nums / 2;
3053 spec->check_volume_offset = 1;
3054 }
3055
eb06ed8f 3056 sprintf(name, "%s Playback Volume", pfx);
668b9652 3057 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI
3058 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3059 spec->volume_offset));
eb06ed8f
TI
3060 if (err < 0)
3061 return err;
3062 sprintf(name, "%s Playback Switch", pfx);
668b9652 3063 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI
3064 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3065 if (err < 0)
3066 return err;
3067 return 0;
3068}
3069
668b9652
TI
3070#define create_controls(codec, pfx, nid, chs) \
3071 create_controls_idx(codec, pfx, 0, nid, chs)
3072
ae0afd81
MR
3073static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3074{
c21ca4a8 3075 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR
3076 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3077 return 1;
3078 } else {
3079 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3080 spec->multiout.num_dacs++;
3081 }
3082 return 0;
3083}
3084
c21ca4a8 3085static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3086{
c21ca4a8
TI
3087 int i;
3088 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3089 if (!spec->multiout.extra_out_nid[i]) {
3090 spec->multiout.extra_out_nid[i] = nid;
3091 return 0;
3092 }
3093 }
3094 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3095 return 1;
ae0afd81
MR
3096}
3097
dc04d1b4
TI
3098/* Create output controls
3099 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3100 */
3101static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3102 const hda_nid_t *pins,
3103 const hda_nid_t *dac_nids,
3104 int type)
c7d4b2fa 3105{
76624534 3106 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI
3107 static const char *chname[4] = {
3108 "Front", "Surround", NULL /*CLFE*/, "Side"
3109 };
dc04d1b4 3110 hda_nid_t nid;
91589232
TI
3111 int i, err;
3112 unsigned int wid_caps;
0fb87bb4 3113
dc04d1b4 3114 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c
TI
3115 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
3116 wid_caps = get_wcaps(codec, pins[i]);
3117 if (wid_caps & AC_WCAP_UNSOL_CAP)
3118 spec->hp_detect = 1;
3119 }
dc04d1b4
TI
3120 nid = dac_nids[i];
3121 if (!nid)
3122 continue;
3123 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3124 /* Center/LFE */
7c7767eb 3125 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3126 if (err < 0)
c7d4b2fa 3127 return err;
7c7767eb 3128 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3129 if (err < 0)
c7d4b2fa 3130 return err;
0fb87bb4
ML
3131
3132 wid_caps = get_wcaps(codec, nid);
3133
3134 if (wid_caps & AC_WCAP_LR_SWAP) {
3135 err = stac92xx_add_control(spec,
3136 STAC_CTL_WIDGET_CLFE_SWITCH,
3137 "Swap Center/LFE Playback Switch", nid);
3138
3139 if (err < 0)
3140 return err;
3141 }
3142
c7d4b2fa 3143 } else {
dc04d1b4 3144 const char *name;
668b9652 3145 int idx;
dc04d1b4
TI
3146 switch (type) {
3147 case AUTO_PIN_HP_OUT:
668b9652
TI
3148 name = "Headphone";
3149 idx = i;
dc04d1b4
TI
3150 break;
3151 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI
3152 name = "Speaker";
3153 idx = i;
dc04d1b4
TI
3154 break;
3155 default:
3156 name = chname[i];
668b9652 3157 idx = 0;
dc04d1b4 3158 break;
76624534 3159 }
668b9652 3160 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3161 if (err < 0)
c7d4b2fa
M
3162 return err;
3163 }
3164 }
dc04d1b4
TI
3165 return 0;
3166}
3167
6479c631
TI
3168static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3169 unsigned long sw, int idx)
3170{
3171 int err;
3172 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3173 "Capture Volume", vol);
6479c631
TI
3174 if (err < 0)
3175 return err;
3176 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3177 "Capture Switch", sw);
6479c631
TI
3178 if (err < 0)
3179 return err;
3180 return 0;
3181}
3182
dc04d1b4
TI
3183/* add playback controls from the parsed DAC table */
3184static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3185 const struct auto_pin_cfg *cfg)
3186{
3187 struct sigmatel_spec *spec = codec->spec;
7c922de7 3188 hda_nid_t nid;
dc04d1b4 3189 int err;
7c922de7 3190 int idx;
dc04d1b4
TI
3191
3192 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3193 spec->multiout.dac_nids,
3194 cfg->line_out_type);
3195 if (err < 0)
3196 return err;
c7d4b2fa 3197
a9cb5c90 3198 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR
3199 err = stac92xx_add_control(spec,
3200 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI
3201 "Headphone as Line Out Switch",
3202 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR
3203 if (err < 0)
3204 return err;
3205 }
3206
7c922de7
NL
3207 for (idx = AUTO_PIN_MIC; idx <= AUTO_PIN_FRONT_LINE; idx++) {
3208 nid = cfg->input_pins[idx];
3209 if (nid) {
3210 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3211 if (err < 0)
3212 return err;
3213 }
b5895dc8 3214 }
403d1944 3215
c7d4b2fa
M
3216 return 0;
3217}
3218
eb06ed8f
TI
3219/* add playback controls for Speaker and HP outputs */
3220static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3221 struct auto_pin_cfg *cfg)
3222{
3223 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI
3224 int err;
3225
3226 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3227 spec->hp_dacs, AUTO_PIN_HP_OUT);
3228 if (err < 0)
3229 return err;
3230
3231 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3232 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3233 if (err < 0)
3234 return err;
eb06ed8f 3235
c7d4b2fa
M
3236 return 0;
3237}
3238
b22b4821 3239/* labels for mono mux outputs */
d0513fc6
MR
3240static const char *stac92xx_mono_labels[4] = {
3241 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR
3242};
3243
3244/* create mono mux for mono out on capable codecs */
3245static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3246{
3247 struct sigmatel_spec *spec = codec->spec;
3248 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3249 int i, num_cons;
3250 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3251
3252 num_cons = snd_hda_get_connections(codec,
3253 spec->mono_nid,
3254 con_lst,
3255 HDA_MAX_NUM_INPUTS);
16a433d8 3256 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR
3257 return -EINVAL;
3258
3259 for (i = 0; i < num_cons; i++) {
3260 mono_mux->items[mono_mux->num_items].label =
3261 stac92xx_mono_labels[i];
3262 mono_mux->items[mono_mux->num_items].index = i;
3263 mono_mux->num_items++;
3264 }
09a99959
MR
3265
3266 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3267 "Mono Mux", spec->mono_nid);
b22b4821
MR
3268}
3269
1cd2224c
MR
3270/* create PC beep volume controls */
3271static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3272 hda_nid_t nid)
3273{
3274 struct sigmatel_spec *spec = codec->spec;
3275 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK
3276 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3277
3278 if (spec->anabeep_nid == nid)
3279 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR
3280
3281 /* check for mute support for the the amp */
3282 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3283 err = stac92xx_add_control(spec, type,
d355c82a 3284 "Beep Playback Switch",
1cd2224c
MR
3285 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3286 if (err < 0)
3287 return err;
3288 }
3289
3290 /* check to see if there is volume support for the amp */
3291 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3292 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3293 "Beep Playback Volume",
1cd2224c
MR
3294 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3295 if (err < 0)
3296 return err;
3297 }
3298 return 0;
3299}
3300
4d4e9bb3
TI
3301#ifdef CONFIG_SND_HDA_INPUT_BEEP
3302#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3303
3304static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3305 struct snd_ctl_elem_value *ucontrol)
3306{
3307 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3308 ucontrol->value.integer.value[0] = codec->beep->enabled;
3309 return 0;
3310}
3311
3312static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3313 struct snd_ctl_elem_value *ucontrol)
3314{
3315 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3316 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI
3317}
3318
3319static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3320 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3321 .info = stac92xx_dig_beep_switch_info,
3322 .get = stac92xx_dig_beep_switch_get,
3323 .put = stac92xx_dig_beep_switch_put,
3324};
3325
3326static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3327{
3328 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3329 0, "Beep Playback Switch", 0);
4d4e9bb3
TI
3330}
3331#endif
3332
4682eee0
MR
3333static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3334{
3335 struct sigmatel_spec *spec = codec->spec;
667067d8 3336 int i, j, err = 0;
4682eee0
MR
3337
3338 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI
3339 hda_nid_t nid;
3340 unsigned int wcaps;
3341 unsigned long val;
3342
4682eee0
MR
3343 nid = spec->mux_nids[i];
3344 wcaps = get_wcaps(codec, nid);
667067d8
TI
3345 if (!(wcaps & AC_WCAP_OUT_AMP))
3346 continue;
4682eee0 3347
667067d8
TI
3348 /* check whether already the same control was created as
3349 * normal Capture Volume.
3350 */
3351 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3352 for (j = 0; j < spec->num_caps; j++) {
3353 if (spec->capvols[j] == val)
3354 break;
4682eee0 3355 }
667067d8
TI
3356 if (j < spec->num_caps)
3357 continue;
3358
3359 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3360 "Mux Capture Volume", val);
3361 if (err < 0)
3362 return err;
4682eee0
MR
3363 }
3364 return 0;
3365};
3366
d9737751 3367static const char *stac92xx_spdif_labels[3] = {
65973632 3368 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR
3369};
3370
3371static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3372{
3373 struct sigmatel_spec *spec = codec->spec;
3374 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3375 const char **labels = spec->spdif_labels;
d9737751 3376 int i, num_cons;
65973632 3377 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR
3378
3379 num_cons = snd_hda_get_connections(codec,
3380 spec->smux_nids[0],
3381 con_lst,
3382 HDA_MAX_NUM_INPUTS);
16a433d8 3383 if (num_cons <= 0)
d9737751
MR
3384 return -EINVAL;
3385
65973632
MR
3386 if (!labels)
3387 labels = stac92xx_spdif_labels;
3388
d9737751 3389 for (i = 0; i < num_cons; i++) {
65973632 3390 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR
3391 spdif_mux->items[spdif_mux->num_items].index = i;
3392 spdif_mux->num_items++;
3393 }
3394
3395 return 0;
3396}
3397
8b65727b 3398/* labels for dmic mux inputs */
ddc2cec4 3399static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP
3400 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3401 "Digital Mic 3", "Digital Mic 4"
3402};
3403
3d21d3f7
TI
3404static int get_connection_index(struct hda_codec *codec, hda_nid_t mux,
3405 hda_nid_t nid)
3406{
3407 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3408 int i, nums;
3409
3410 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3411 for (i = 0; i < nums; i++)
3412 if (conn[i] == nid)
3413 return i;
3414 return -1;
3415}
3416
667067d8 3417/* create a volume assigned to the given pin (only if supported) */
96f845de 3418/* return 1 if the volume control is created */
667067d8 3419static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
96f845de 3420 const char *label, int direction)
667067d8
TI
3421{
3422 unsigned int caps, nums;
3423 char name[32];
96f845de 3424 int err;
667067d8 3425
96f845de
TI
3426 if (direction == HDA_OUTPUT)
3427 caps = AC_WCAP_OUT_AMP;
3428 else
3429 caps = AC_WCAP_IN_AMP;
3430 if (!(get_wcaps(codec, nid) & caps))
667067d8 3431 return 0;
96f845de 3432 caps = query_amp_caps(codec, nid, direction);
667067d8
TI
3433 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3434 if (!nums)
3435 return 0;
3436 snprintf(name, sizeof(name), "%s Capture Volume", label);
96f845de
TI
3437 err = stac92xx_add_control(codec->spec, STAC_CTL_WIDGET_VOL, name,
3438 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
3439 if (err < 0)
3440 return err;
3441 return 1;
667067d8
TI
3442}
3443
8b65727b
MP
3444/* create playback/capture controls for input pins on dmic capable codecs */
3445static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3446 const struct auto_pin_cfg *cfg)
3447{
3448 struct sigmatel_spec *spec = codec->spec;
5207e10e 3449 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3450 struct hda_input_mux *dimux = &spec->private_dimux;
5207e10e
TI
3451 int err, i, active_mics;
3452 unsigned int def_conf;
8b65727b
MP
3453
3454 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3455 dimux->items[dimux->num_items].index = 0;
3456 dimux->num_items++;
3457
5207e10e
TI
3458 active_mics = 0;
3459 for (i = 0; i < spec->num_dmics; i++) {
667067d8
TI
3460 /* check the validity: sometimes it's a dead vendor-spec node */
3461 if (get_wcaps_type(get_wcaps(codec, spec->dmic_nids[i]))
3462 != AC_WID_PIN)
3463 continue;
5207e10e
TI
3464 def_conf = snd_hda_codec_get_pincfg(codec, spec->dmic_nids[i]);
3465 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE)
3466 active_mics++;
3467 }
3468
8b65727b 3469 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3470 hda_nid_t nid;
8b65727b 3471 int index;
5207e10e 3472 const char *label;
8b65727b 3473
667067d8
TI
3474 nid = spec->dmic_nids[i];
3475 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3476 continue;
3477 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP
3478 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3479 continue;
3480
3d21d3f7
TI
3481 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3482 if (index < 0)
3483 continue;
3484
5207e10e
TI
3485 if (active_mics == 1)
3486 label = "Digital Mic";
3487 else
3488 label = stac92xx_dmic_labels[dimux->num_items];
3489
96f845de 3490 err = create_elem_capture_vol(codec, nid, label, HDA_INPUT);
667067d8
TI
3491 if (err < 0)
3492 return err;
96f845de
TI
3493 if (!err) {
3494 err = create_elem_capture_vol(codec, nid, label,
3495 HDA_OUTPUT);
3496 if (err < 0)
3497 return err;
3498 }
0678accd 3499
5207e10e 3500 dimux->items[dimux->num_items].label = label;
8b65727b
MP
3501 dimux->items[dimux->num_items].index = index;
3502 dimux->num_items++;
5207e10e
TI
3503 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1) {
3504 imux->items[imux->num_items].label = label;
3505 imux->items[imux->num_items].index = index;
3506 imux->num_items++;
3507 }
8b65727b
MP
3508 }
3509
3510 return 0;
3511}
3512
3d21d3f7
TI
3513static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
3514 hda_nid_t *fixed, hda_nid_t *ext)
3515{
3516 unsigned int cfg;
3517
3518 if (!nid)
3519 return 0;
3520 cfg = snd_hda_codec_get_pincfg(codec, nid);
3521 switch (get_defcfg_connect(cfg)) {
3522 case AC_JACK_PORT_FIXED:
3523 if (*fixed)
3524 return 1; /* already occupied */
3525 *fixed = nid;
3526 break;
3527 case AC_JACK_PORT_COMPLEX:
3528 if (*ext)
3529 return 1; /* already occupied */
3530 *ext = nid;
3531 break;
3532 }
3533 return 0;
3534}
3535
3536static int set_mic_route(struct hda_codec *codec,
3537 struct sigmatel_mic_route *mic,
3538 hda_nid_t pin)
3539{
3540 struct sigmatel_spec *spec = codec->spec;
3541 struct auto_pin_cfg *cfg = &spec->autocfg;
3542 int i;
3543
3544 mic->pin = pin;
3545 for (i = AUTO_PIN_MIC; i <= AUTO_PIN_FRONT_MIC; i++)
3546 if (pin == cfg->input_pins[i])
3547 break;
3548 if (i <= AUTO_PIN_FRONT_MIC) {
3549 /* analog pin */
3d21d3f7
TI
3550 i = get_connection_index(codec, spec->mux_nids[0], pin);
3551 if (i < 0)
3552 return -1;
3553 mic->mux_idx = i;
02d33322
TI
3554 mic->dmux_idx = -1;
3555 if (spec->dmux_nids)
3556 mic->dmux_idx = get_connection_index(codec,
3557 spec->dmux_nids[0],
3558 spec->mux_nids[0]);
da2a2aaa 3559 } else if (spec->dmux_nids) {
3d21d3f7 3560 /* digital pin */
3d21d3f7
TI
3561 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3562 if (i < 0)
3563 return -1;
3564 mic->dmux_idx = i;
02d33322
TI
3565 mic->mux_idx = -1;
3566 if (spec->mux_nids)
3567 mic->mux_idx = get_connection_index(codec,
3568 spec->mux_nids[0],
3569 spec->dmux_nids[0]);
3d21d3f7
TI
3570 }
3571 return 0;
3572}
3573
3574/* return non-zero if the device is for automatic mic switch */
3575static int stac_check_auto_mic(struct hda_codec *codec)
3576{
3577 struct sigmatel_spec *spec = codec->spec;
3578 struct auto_pin_cfg *cfg = &spec->autocfg;
3579 hda_nid_t fixed, ext;
3580 int i;
3581
3582 for (i = AUTO_PIN_LINE; i < AUTO_PIN_LAST; i++) {
3583 if (cfg->input_pins[i])
3584 return 0; /* must be exclusively mics */
3585 }
3586 fixed = ext = 0;
3587 for (i = AUTO_PIN_MIC; i <= AUTO_PIN_FRONT_MIC; i++)
3588 if (check_mic_pin(codec, cfg->input_pins[i], &fixed, &ext))
3589 return 0;
3590 for (i = 0; i < spec->num_dmics; i++)
3591 if (check_mic_pin(codec, spec->dmic_nids[i], &fixed, &ext))
3592 return 0;
3593 if (!fixed || !ext)
3594 return 0;
3595 if (!(get_wcaps(codec, ext) & AC_WCAP_UNSOL_CAP))
3596 return 0; /* no unsol support */
3597 if (set_mic_route(codec, &spec->ext_mic, ext) ||
3598 set_mic_route(codec, &spec->int_mic, fixed))
3599 return 0; /* something is wrong */
3600 return 1;
3601}
3602
c7d4b2fa
M
3603/* create playback/capture controls for input pins */
3604static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3605{
3606 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3607 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3608 int i, j;
c7d4b2fa
M
3609
3610 for (i = 0; i < AUTO_PIN_LAST; i++) {
667067d8
TI
3611 hda_nid_t nid = cfg->input_pins[i];
3612 int index, err;
314634bc 3613
667067d8 3614 if (!nid)
314634bc
TI
3615 continue;
3616 index = -1;
3617 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI
3618 index = get_connection_index(codec, spec->mux_nids[j],
3619 nid);
3620 if (index >= 0)
3621 break;
c7d4b2fa 3622 }
667067d8
TI
3623 if (index < 0)
3624 continue;
3625
3626 err = create_elem_capture_vol(codec, nid,
96f845de
TI
3627 auto_pin_cfg_labels[i],
3628 HDA_INPUT);
667067d8
TI
3629 if (err < 0)
3630 return err;
3631
314634bc
TI
3632 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3633 imux->items[imux->num_items].index = index;
3634 imux->num_items++;
c7d4b2fa 3635 }
5207e10e 3636 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3637
7b043899 3638 if (imux->num_items) {
62fe78e9
SR
3639 /*
3640 * Set the current input for the muxes.
3641 * The STAC9221 has two input muxes with identical source
3642 * NID lists. Hopefully this won't get confused.
3643 */
3644 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI
3645 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3646 AC_VERB_SET_CONNECT_SEL,
3647 imux->items[0].index);
62fe78e9
SR
3648 }
3649 }
3650
c7d4b2fa
M
3651 return 0;
3652}
3653
c7d4b2fa
M
3654static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3655{
3656 struct sigmatel_spec *spec = codec->spec;
3657 int i;
3658
3659 for (i = 0; i < spec->autocfg.line_outs; i++) {
3660 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3661 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3662 }
3663}
3664
3665static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3666{
3667 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3668 int i;
c7d4b2fa 3669
eb06ed8f
TI
3670 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3671 hda_nid_t pin;
3672 pin = spec->autocfg.hp_pins[i];
3673 if (pin) /* connect to front */
3674 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3675 }
3676 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3677 hda_nid_t pin;
3678 pin = spec->autocfg.speaker_pins[i];
3679 if (pin) /* connect to front */
3680 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3681 }
c7d4b2fa
M
3682}
3683
8af3aeb4
TI
3684static int is_dual_headphones(struct hda_codec *codec)
3685{
3686 struct sigmatel_spec *spec = codec->spec;
3687 int i, valid_hps;
3688
3689 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
3690 spec->autocfg.hp_outs <= 1)
3691 return 0;
3692 valid_hps = 0;
3693 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3694 hda_nid_t nid = spec->autocfg.hp_pins[i];
3695 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
3696 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
3697 continue;
3698 valid_hps++;
3699 }
3700 return (valid_hps > 1);
3701}
3702
3703
3cc08dc6 3704static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M
3705{
3706 struct sigmatel_spec *spec = codec->spec;
dc04d1b4 3707 int hp_swap = 0;
6479c631 3708 int i, err;
c7d4b2fa 3709
8b65727b
MP
3710 if ((err = snd_hda_parse_pin_def_config(codec,
3711 &spec->autocfg,
3712 spec->dmic_nids)) < 0)
c7d4b2fa 3713 return err;
82bc955f 3714 if (! spec->autocfg.line_outs)
869264c4 3715 return 0; /* can't find valid pin config */
19039bd0 3716
bcecd9bd
JZ
3717 /* If we have no real line-out pin and multiple hp-outs, HPs should
3718 * be set up as multi-channel outputs.
3719 */
8af3aeb4 3720 if (is_dual_headphones(codec)) {
bcecd9bd
JZ
3721 /* Copy hp_outs to line_outs, backup line_outs in
3722 * speaker_outs so that the following routines can handle
3723 * HP pins as primary outputs.
3724 */
c21ca4a8 3725 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ
3726 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3727 sizeof(spec->autocfg.line_out_pins));
3728 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3729 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3730 sizeof(spec->autocfg.hp_pins));
3731 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI
3732 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3733 spec->autocfg.hp_outs = 0;
dc04d1b4 3734 hp_swap = 1;
bcecd9bd 3735 }
09a99959 3736 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR
3737 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3738 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR
3739 u32 caps = query_amp_caps(codec,
3740 spec->autocfg.mono_out_pin, dir);
3741 hda_nid_t conn_list[1];
3742
3743 /* get the mixer node and then the mono mux if it exists */
3744 if (snd_hda_get_connections(codec,
3745 spec->autocfg.mono_out_pin, conn_list, 1) &&
3746 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3747 conn_list, 1) > 0) {
09a99959
MR
3748
3749 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3750 int wid_type = get_wcaps_type(wcaps);
09a99959
MR
3751 /* LR swap check, some stac925x have a mux that
3752 * changes the DACs output path instead of the
3753 * mono-mux path.
3754 */
3755 if (wid_type == AC_WID_AUD_SEL &&
3756 !(wcaps & AC_WCAP_LR_SWAP))
3757 spec->mono_nid = conn_list[0];
3758 }
d0513fc6
MR
3759 if (dir) {
3760 hda_nid_t nid = spec->autocfg.mono_out_pin;
3761
3762 /* most mono outs have a least a mute/unmute switch */
3763 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3764 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3765 "Mono Playback Switch",
3766 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR
3767 if (err < 0)
3768 return err;
d0513fc6
MR
3769 /* check for volume support for the amp */
3770 if ((caps & AC_AMPCAP_NUM_STEPS)
3771 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3772 err = stac92xx_add_control(spec,
3773 STAC_CTL_WIDGET_VOL,
3774 "Mono Playback Volume",
3775 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3776 if (err < 0)
3777 return err;
3778 }
09a99959
MR
3779 }
3780
3781 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3782 AC_PINCTL_OUT_EN);
3783 }
bcecd9bd 3784
c21ca4a8
TI
3785 if (!spec->multiout.num_dacs) {
3786 err = stac92xx_auto_fill_dac_nids(codec);
3787 if (err < 0)
19039bd0 3788 return err;
c9280d68
TI
3789 err = stac92xx_auto_create_multi_out_ctls(codec,
3790 &spec->autocfg);
3791 if (err < 0)
3792 return err;
c21ca4a8 3793 }
c7d4b2fa 3794
1cd2224c
MR
3795 /* setup analog beep controls */
3796 if (spec->anabeep_nid > 0) {
3797 err = stac92xx_auto_create_beep_ctls(codec,
3798 spec->anabeep_nid);
3799 if (err < 0)
3800 return err;
3801 }
3802
3803 /* setup digital beep controls and input device */
3804#ifdef CONFIG_SND_HDA_INPUT_BEEP
3805 if (spec->digbeep_nid > 0) {
3806 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3807 unsigned int caps;
1cd2224c
MR
3808
3809 err = stac92xx_auto_create_beep_ctls(codec, nid);
3810 if (err < 0)
3811 return err;
3812 err = snd_hda_attach_beep_device(codec, nid);
3813 if (err < 0)
3814 return err;
d8d881dd
TI
3815 if (codec->beep) {
3816 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 3817 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI
3818 /* if no beep switch is available, make its own one */
3819 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3820 if (!(caps & AC_AMPCAP_MUTE)) {
3821 err = stac92xx_beep_switch_ctl(codec);
3822 if (err < 0)
3823 return err;
3824 }
4d4e9bb3 3825 }
1cd2224c
MR
3826 }
3827#endif
3828
0fb87bb4 3829 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML
3830 if (err < 0)
3831 return err;
3832
dc04d1b4
TI
3833 /* All output parsing done, now restore the swapped hp pins */
3834 if (hp_swap) {
3835 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3836 sizeof(spec->autocfg.hp_pins));
3837 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3838 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3839 spec->autocfg.line_outs = 0;
3840 }
0fb87bb4 3841
3d21d3f7
TI
3842 if (stac_check_auto_mic(codec)) {
3843 spec->auto_mic = 1;
3844 /* only one capture for auto-mic */
3845 spec->num_adcs = 1;
3846 spec->num_caps = 1;
3847 spec->num_muxes = 1;
3848 }
3849
6479c631
TI
3850 for (i = 0; i < spec->num_caps; i++) {
3851 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3852 spec->capsws[i], i);
3853 if (err < 0)
3854 return err;
3855 }
3856
dc04d1b4 3857 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3858 if (err < 0)
c7d4b2fa
M
3859 return err;
3860
b22b4821
MR
3861 if (spec->mono_nid > 0) {
3862 err = stac92xx_auto_create_mono_output_ctls(codec);
3863 if (err < 0)
3864 return err;
3865 }
2a9c7816 3866 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP
3867 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3868 &spec->autocfg)) < 0)
3869 return err;
4682eee0
MR
3870 if (spec->num_muxes > 0) {
3871 err = stac92xx_auto_create_mux_input_ctls(codec);
3872 if (err < 0)
3873 return err;
3874 }
d9737751
MR
3875 if (spec->num_smuxes > 0) {
3876 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3877 if (err < 0)
3878 return err;
3879 }
8b65727b 3880
e3c75964
TI
3881 err = stac92xx_add_input_source(spec);
3882 if (err < 0)
3883 return err;
3884
c7d4b2fa 3885 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3886 if (spec->multiout.max_channels > 2)
c7d4b2fa 3887 spec->surr_switch = 1;
c7d4b2fa 3888
0852d7a6 3889 if (spec->autocfg.dig_outs)
3cc08dc6 3890 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3891 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3892 spec->dig_in_nid = dig_in;
c7d4b2fa 3893
603c4019
TI
3894 if (spec->kctls.list)
3895 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3896
3897 spec->input_mux = &spec->private_imux;
f8ccbf65
MR
3898 if (!spec->dinput_mux)
3899 spec->dinput_mux = &spec->private_dimux;
d9737751 3900 spec->sinput_mux = &spec->private_smux;
b22b4821 3901 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M
3902 return 1;
3903}
3904
82bc955f
TI
3905/* add playback controls for HP output */
3906static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3907 struct auto_pin_cfg *cfg)
3908{
3909 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3910 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI
3911 unsigned int wid_caps;
3912
3913 if (! pin)
3914 return 0;
3915
3916 wid_caps = get_wcaps(codec, pin);
505cb341 3917 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3918 spec->hp_detect = 1;
82bc955f
TI
3919
3920 return 0;
3921}
3922
160ea0dc
RF
3923/* add playback controls for LFE output */
3924static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3925 struct auto_pin_cfg *cfg)
3926{
3927 struct sigmatel_spec *spec = codec->spec;
3928 int err;
3929 hda_nid_t lfe_pin = 0x0;
3930 int i;
3931
3932 /*
3933 * search speaker outs and line outs for a mono speaker pin
3934 * with an amp. If one is found, add LFE controls
3935 * for it.
3936 */
3937 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3938 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3939 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3940 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3941 if (wcaps == AC_WCAP_OUT_AMP)
3942 /* found a mono speaker with an amp, must be lfe */
3943 lfe_pin = pin;
3944 }
3945
3946 /* if speaker_outs is 0, then speakers may be in line_outs */
3947 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3948 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3949 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3950 unsigned int defcfg;
330ee995 3951 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 3952 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3953 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3954 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3955 if (wcaps == AC_WCAP_OUT_AMP)
3956 /* found a mono speaker with an amp,
3957 must be lfe */
3958 lfe_pin = pin;
3959 }
3960 }
3961 }
3962
3963 if (lfe_pin) {
7c7767eb 3964 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF
3965 if (err < 0)
3966 return err;
3967 }
3968
3969 return 0;
3970}
3971
c7d4b2fa
M
3972static int stac9200_parse_auto_config(struct hda_codec *codec)
3973{
3974 struct sigmatel_spec *spec = codec->spec;
3975 int err;
3976
df694daa 3977 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M
3978 return err;
3979
3980 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3981 return err;
3982
82bc955f
TI
3983 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3984 return err;
3985
160ea0dc
RF
3986 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3987 return err;
3988
355a0ec4
TI
3989 if (spec->num_muxes > 0) {
3990 err = stac92xx_auto_create_mux_input_ctls(codec);
3991 if (err < 0)
3992 return err;
3993 }
3994
e3c75964
TI
3995 err = stac92xx_add_input_source(spec);
3996 if (err < 0)
3997 return err;
3998
0852d7a6 3999 if (spec->autocfg.dig_outs)
c7d4b2fa 4000 spec->multiout.dig_out_nid = 0x05;
82bc955f 4001 if (spec->autocfg.dig_in_pin)
c7d4b2fa 4002 spec->dig_in_nid = 0x04;
c7d4b2fa 4003
603c4019
TI
4004 if (spec->kctls.list)
4005 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
4006
4007 spec->input_mux = &spec->private_imux;
8b65727b 4008 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M
4009
4010 return 1;
4011}
4012
62fe78e9
SR
4013/*
4014 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4015 * funky external mute control using GPIO pins.
4016 */
4017
76e1ddfb 4018static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4019 unsigned int dir_mask, unsigned int data)
62fe78e9
SR
4020{
4021 unsigned int gpiostate, gpiomask, gpiodir;
4022
4023 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4024 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4025 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR
4026
4027 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4028 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4029 gpiomask |= mask;
62fe78e9
SR
4030
4031 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4032 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4033 gpiodir |= dir_mask;
62fe78e9 4034
76e1ddfb 4035 /* Configure GPIOx as CMOS */
62fe78e9
SR
4036 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4037
4038 snd_hda_codec_write(codec, codec->afg, 0,
4039 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI
4040 snd_hda_codec_read(codec, codec->afg, 0,
4041 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR
4042
4043 msleep(1);
4044
76e1ddfb
TI
4045 snd_hda_codec_read(codec, codec->afg, 0,
4046 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR
4047}
4048
8c8145b8 4049#ifdef CONFIG_SND_HDA_INPUT_JACK
95c09099
TI
4050static void stac92xx_free_jack_priv(struct snd_jack *jack)
4051{
4052 struct sigmatel_jack *jacks = jack->private_data;
4053 jacks->nid = 0;
4054 jacks->jack = NULL;
4055}
4056#endif
4057
74aeaabc
MR
4058static int stac92xx_add_jack(struct hda_codec *codec,
4059 hda_nid_t nid, int type)
4060{
8c8145b8 4061#ifdef CONFIG_SND_HDA_INPUT_JACK
74aeaabc
MR
4062 struct sigmatel_spec *spec = codec->spec;
4063 struct sigmatel_jack *jack;
330ee995 4064 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
74aeaabc
MR
4065 int connectivity = get_defcfg_connect(def_conf);
4066 char name[32];
95c09099 4067 int err;
74aeaabc
MR
4068
4069 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
4070 return 0;
4071
4072 snd_array_init(&spec->jacks, sizeof(*jack), 32);
4073 jack = snd_array_new(&spec->jacks);
4074 if (!jack)
4075 return -ENOMEM;
4076 jack->nid = nid;
4077 jack->type = type;
4078
86de7416 4079 snprintf(name, sizeof(name), "%s at %s %s Jack",
74aeaabc
MR
4080 snd_hda_get_jack_type(def_conf),
4081 snd_hda_get_jack_connectivity(def_conf),
4082 snd_hda_get_jack_location(def_conf));
4083
95c09099
TI
4084 err = snd_jack_new(codec->bus->card, name, type, &jack->jack);
4085 if (err < 0) {
4086 jack->nid = 0;
4087 return err;
4088 }
4089 jack->jack->private_data = jack;
4090 jack->jack->private_free = stac92xx_free_jack_priv;
e4973e1e 4091#endif
95c09099 4092 return 0;
74aeaabc
MR
4093}
4094
c6e4c666
TI
4095static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
4096 unsigned char type, int data)
74aeaabc
MR
4097{
4098 struct sigmatel_event *event;
4099
4100 snd_array_init(&spec->events, sizeof(*event), 32);
4101 event = snd_array_new(&spec->events);
4102 if (!event)
4103 return -ENOMEM;
4104 event->nid = nid;
c6e4c666
TI
4105 event->type = type;
4106 event->tag = spec->events.used;
74aeaabc
MR
4107 event->data = data;
4108
c6e4c666 4109 return event->tag;
74aeaabc
MR
4110}
4111
c6e4c666 4112static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
62558ce1 4113 hda_nid_t nid)
74aeaabc
MR
4114{
4115 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4116 struct sigmatel_event *event = spec->events.list;
4117 int i;
4118
4119 for (i = 0; i < spec->events.used; i++, event++) {
62558ce1 4120 if (event->nid == nid)
c6e4c666 4121 return event;
74aeaabc 4122 }
c6e4c666 4123 return NULL;
74aeaabc
MR
4124}
4125
c6e4c666
TI
4126static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
4127 unsigned char tag)
314634bc 4128{
c6e4c666
TI
4129 struct sigmatel_spec *spec = codec->spec;
4130 struct sigmatel_event *event = spec->events.list;
4131 int i;
4132
4133 for (i = 0; i < spec->events.used; i++, event++) {
4134 if (event->tag == tag)
4135 return event;
74aeaabc 4136 }
c6e4c666
TI
4137 return NULL;
4138}
4139
62558ce1
TI
4140/* check if given nid is a valid pin and no other events are assigned
4141 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4142 * Otherwise, returns zero.
4143 */
4144static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4145 unsigned int type)
c6e4c666
TI
4146{
4147 struct sigmatel_event *event;
4148 int tag;
4149
4150 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
62558ce1
TI
4151 return 0;
4152 event = stac_get_event(codec, nid);
4153 if (event) {
4154 if (event->type != type)
4155 return 0;
c6e4c666 4156 tag = event->tag;
62558ce1 4157 } else {
c6e4c666 4158 tag = stac_add_event(codec->spec, nid, type, 0);
62558ce1
TI
4159 if (tag < 0)
4160 return 0;
4161 }
c6e4c666
TI
4162 snd_hda_codec_write_cache(codec, nid, 0,
4163 AC_VERB_SET_UNSOLICITED_ENABLE,
4164 AC_USRSP_EN | tag);
62558ce1 4165 return 1;
314634bc
TI
4166}
4167
a64135a2
MR
4168static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
4169{
4170 int i;
4171 for (i = 0; i < cfg->hp_outs; i++)
4172 if (cfg->hp_pins[i] == nid)
4173 return 1; /* nid is a HP-Out */
4174
4175 return 0; /* nid is not a HP-Out */
4176};
4177
b76c850f
MR
4178static void stac92xx_power_down(struct hda_codec *codec)
4179{
4180 struct sigmatel_spec *spec = codec->spec;
4181
4182 /* power down inactive DACs */
4183 hda_nid_t *dac;
4184 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4185 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4186 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR
4187 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4188}
4189
f73d3585
TI
4190static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4191 int enable);
4192
014c41fc
TI
4193static inline int get_int_hint(struct hda_codec *codec, const char *key,
4194 int *valp)
4195{
4196 const char *p;
4197 p = snd_hda_get_hint(codec, key);
4198 if (p) {
4199 unsigned long val;
4200 if (!strict_strtoul(p, 0, &val)) {
4201 *valp = val;
4202 return 1;
4203 }
4204 }
4205 return 0;
4206}
4207
6565e4fa
TI
4208/* override some hints from the hwdep entry */
4209static void stac_store_hints(struct hda_codec *codec)
4210{
4211 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI
4212 int val;
4213
4214 val = snd_hda_get_bool_hint(codec, "hp_detect");
4215 if (val >= 0)
4216 spec->hp_detect = val;
014c41fc 4217 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI
4218 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4219 spec->gpio_mask;
4220 }
014c41fc
TI
4221 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4222 spec->gpio_mask &= spec->gpio_mask;
4223 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4224 spec->gpio_dir &= spec->gpio_mask;
4225 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4226 spec->eapd_mask &= spec->gpio_mask;
4227 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4228 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI
4229 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4230 if (val >= 0)
4231 spec->eapd_switch = val;
014c41fc
TI
4232 get_int_hint(codec, "gpio_led_polarity", &spec->gpio_led_polarity);
4233 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
043958e6
TI
4234 spec->gpio_mask |= spec->gpio_led;
4235 spec->gpio_dir |= spec->gpio_led;
4236 if (spec->gpio_led_polarity)
4237 spec->gpio_data |= spec->gpio_led;
4238 }
6565e4fa
TI
4239}
4240
c7d4b2fa
M
4241static int stac92xx_init(struct hda_codec *codec)
4242{
4243 struct sigmatel_spec *spec = codec->spec;
82bc955f 4244 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4245 unsigned int gpio;
e4973e1e 4246 int i;
c7d4b2fa 4247
c7d4b2fa
M
4248 snd_hda_sequence_write(codec, spec->init);
4249
8daaaa97
MR
4250 /* power down adcs initially */
4251 if (spec->powerdown_adcs)
4252 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4253 snd_hda_codec_write(codec,
8daaaa97
MR
4254 spec->adc_nids[i], 0,
4255 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4256
6565e4fa
TI
4257 /* override some hints */
4258 stac_store_hints(codec);
4259
f73d3585
TI
4260 /* set up GPIO */
4261 gpio = spec->gpio_data;
4262 /* turn on EAPD statically when spec->eapd_switch isn't set.
4263 * otherwise, unsol event will turn it on/off dynamically
4264 */
4265 if (!spec->eapd_switch)
4266 gpio |= spec->eapd_mask;
4267 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4268
82bc955f
TI
4269 /* set up pins */
4270 if (spec->hp_detect) {
505cb341 4271 /* Enable unsolicited responses on the HP widget */
74aeaabc 4272 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4273 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4274 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4275 }
1c4bdf9b
TI
4276 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4277 cfg->speaker_outs > 0) {
fefd67f3 4278 /* enable pin-detect for line-outs as well */
15cfa2b3
TI
4279 for (i = 0; i < cfg->line_outs; i++) {
4280 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI
4281 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4282 }
4283 }
4284
0a07acaf
TI
4285 /* force to enable the first line-out; the others are set up
4286 * in unsol_event
4287 */
4288 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4289 AC_PINCTL_OUT_EN);
82bc955f 4290 /* fake event to set up pins */
5f380eb1
TI
4291 if (cfg->hp_pins[0])
4292 stac_issue_unsol_event(codec, cfg->hp_pins[0]);
4293 else if (cfg->line_out_pins[0])
4294 stac_issue_unsol_event(codec, cfg->line_out_pins[0]);
82bc955f
TI
4295 } else {
4296 stac92xx_auto_init_multi_out(codec);
4297 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI
4298 for (i = 0; i < cfg->hp_outs; i++)
4299 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4300 }
3d21d3f7 4301 if (spec->auto_mic) {
15b4f296 4302 /* initialize connection to analog input */
da2a2aaa
TI
4303 if (spec->dmux_nids)
4304 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4305 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI
4306 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4307 stac_issue_unsol_event(codec, spec->ext_mic.pin);
4308 }
82bc955f 4309 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI
4310 hda_nid_t nid = cfg->input_pins[i];
4311 if (nid) {
12dde4c6 4312 unsigned int pinctl, conf;
4f1e6bc3
TI
4313 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
4314 /* for mic pins, force to initialize */
7c922de7 4315 pinctl = stac92xx_get_default_vref(codec, nid);
12dde4c6
TI
4316 pinctl |= AC_PINCTL_IN_EN;
4317 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI
4318 } else {
4319 pinctl = snd_hda_codec_read(codec, nid, 0,
4320 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4321 /* if PINCTL already set then skip */
5dd17cb9
TI
4322 /* Also, if both INPUT and OUTPUT are set,
4323 * it must be a BIOS bug; need to override, too
4324 */
4325 if (!(pinctl & AC_PINCTL_IN_EN) ||
4326 (pinctl & AC_PINCTL_OUT_EN)) {
4327 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI
4328 pinctl |= AC_PINCTL_IN_EN;
4329 stac92xx_auto_set_pinctl(codec, nid,
4330 pinctl);
4331 }
4332 }
330ee995 4333 conf = snd_hda_codec_get_pincfg(codec, nid);
12dde4c6 4334 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
62558ce1
TI
4335 if (enable_pin_detect(codec, nid,
4336 STAC_INSERT_EVENT))
4337 stac_issue_unsol_event(codec, nid);
4f1e6bc3 4338 }
c960a03b 4339 }
82bc955f 4340 }
a64135a2
MR
4341 for (i = 0; i < spec->num_dmics; i++)
4342 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4343 AC_PINCTL_IN_EN);
0852d7a6
TI
4344 if (cfg->dig_out_pins[0])
4345 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI
4346 AC_PINCTL_OUT_EN);
4347 if (cfg->dig_in_pin)
4348 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4349 AC_PINCTL_IN_EN);
a64135a2 4350 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI
4351 hda_nid_t nid = spec->pwr_nids[i];
4352 int pinctl, def_conf;
f73d3585 4353
eb632128
TI
4354 /* power on when no jack detection is available */
4355 if (!spec->hp_detect) {
4356 stac_toggle_power_map(codec, nid, 1);
4357 continue;
4358 }
4359
4360 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI
4361 continue; /* already has an unsol event */
4362
4363 pinctl = snd_hda_codec_read(codec, nid, 0,
4364 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR
4365 /* outputs are only ports capable of power management
4366 * any attempts on powering down a input port cause the
4367 * referenced VREF to act quirky.
4368 */
eb632128
TI
4369 if (pinctl & AC_PINCTL_IN_EN) {
4370 stac_toggle_power_map(codec, nid, 1);
a64135a2 4371 continue;
eb632128 4372 }
330ee995 4373 def_conf = snd_hda_codec_get_pincfg(codec, nid);
f73d3585 4374 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR
4375 /* skip any ports that don't have jacks since presence
4376 * detection is useless */
f73d3585
TI
4377 if (def_conf != AC_JACK_PORT_COMPLEX) {
4378 if (def_conf != AC_JACK_PORT_NONE)
4379 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4380 continue;
f73d3585 4381 }
62558ce1
TI
4382 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT))
4383 stac_issue_unsol_event(codec, nid);
a64135a2 4384 }
c21bd025
TI
4385
4386#ifdef CONFIG_SND_HDA_POWER_SAVE
4387 /* sync mute LED */
4388 if (spec->gpio_led && codec->patch_ops.check_power_status)
4389 codec->patch_ops.check_power_status(codec, 0x01);
4390#endif
b76c850f
MR
4391 if (spec->dac_list)
4392 stac92xx_power_down(codec);
c7d4b2fa
M
4393 return 0;
4394}
4395
74aeaabc
MR
4396static void stac92xx_free_jacks(struct hda_codec *codec)
4397{
8c8145b8 4398#ifdef CONFIG_SND_HDA_INPUT_JACK
b94d3539 4399 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4400 struct sigmatel_spec *spec = codec->spec;
b94d3539 4401 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR
4402 struct sigmatel_jack *jacks = spec->jacks.list;
4403 int i;
95c09099
TI
4404 for (i = 0; i < spec->jacks.used; i++, jacks++) {
4405 if (jacks->jack)
4406 snd_device_free(codec->bus->card, jacks->jack);
4407 }
74aeaabc
MR
4408 }
4409 snd_array_free(&spec->jacks);
e4973e1e 4410#endif
74aeaabc
MR
4411}
4412
603c4019
TI
4413static void stac92xx_free_kctls(struct hda_codec *codec)
4414{
4415 struct sigmatel_spec *spec = codec->spec;
4416
4417 if (spec->kctls.list) {
4418 struct snd_kcontrol_new *kctl = spec->kctls.list;
4419 int i;
4420 for (i = 0; i < spec->kctls.used; i++)
4421 kfree(kctl[i].name);
4422 }
4423 snd_array_free(&spec->kctls);
4424}
4425
167eae5a
TI
4426static void stac92xx_shutup(struct hda_codec *codec)
4427{
4428 struct sigmatel_spec *spec = codec->spec;
167eae5a 4429
92ee6162 4430 snd_hda_shutup_pins(codec);
167eae5a
TI
4431
4432 if (spec->eapd_mask)
4433 stac_gpio_set(codec, spec->gpio_mask,
4434 spec->gpio_dir, spec->gpio_data &
4435 ~spec->eapd_mask);
4436}
4437
2f2f4251
M
4438static void stac92xx_free(struct hda_codec *codec)
4439{
c7d4b2fa 4440 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
4441
4442 if (! spec)
4443 return;
4444
167eae5a 4445 stac92xx_shutup(codec);
74aeaabc
MR
4446 stac92xx_free_jacks(codec);
4447 snd_array_free(&spec->events);
11b44bbd 4448
c7d4b2fa 4449 kfree(spec);
1cd2224c 4450 snd_hda_detach_beep_device(codec);
2f2f4251
M
4451}
4452
4e55096e
M
4453static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4454 unsigned int flag)
4455{
8ce84198
TI
4456 unsigned int old_ctl, pin_ctl;
4457
4458 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4459 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4460
f9acba43
TI
4461 if (pin_ctl & AC_PINCTL_IN_EN) {
4462 /*
4463 * we need to check the current set-up direction of
4464 * shared input pins since they can be switched via
4465 * "xxx as Output" mixer switch
4466 */
4467 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4468 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI
4469 return;
4470 }
4471
8ce84198 4472 old_ctl = pin_ctl;
7b043899
SL
4473 /* if setting pin direction bits, clear the current
4474 direction bits first */
4475 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4476 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4477
8ce84198
TI
4478 pin_ctl |= flag;
4479 if (old_ctl != pin_ctl)
4480 snd_hda_codec_write_cache(codec, nid, 0,
4481 AC_VERB_SET_PIN_WIDGET_CONTROL,
4482 pin_ctl);
4e55096e
M
4483}
4484
4485static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4486 unsigned int flag)
4487{
4488 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4489 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI
4490 if (pin_ctl & flag)
4491 snd_hda_codec_write_cache(codec, nid, 0,
4492 AC_VERB_SET_PIN_WIDGET_CONTROL,
4493 pin_ctl & ~flag);
4e55096e
M
4494}
4495
d56757ab 4496static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI
4497{
4498 if (!nid)
4499 return 0;
a252c81a 4500 return snd_hda_jack_detect(codec, nid);
314634bc
TI
4501}
4502
fefd67f3
TI
4503static void stac92xx_line_out_detect(struct hda_codec *codec,
4504 int presence)
4505{
4506 struct sigmatel_spec *spec = codec->spec;
4507 struct auto_pin_cfg *cfg = &spec->autocfg;
4508 int i;
4509
4510 for (i = 0; i < cfg->line_outs; i++) {
4511 if (presence)
4512 break;
4513 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4514 if (presence) {
4515 unsigned int pinctl;
4516 pinctl = snd_hda_codec_read(codec,
4517 cfg->line_out_pins[i], 0,
4518 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4519 if (pinctl & AC_PINCTL_IN_EN)
4520 presence = 0; /* mic- or line-input */
4521 }
4522 }
4523
4524 if (presence) {
4525 /* disable speakers */
4526 for (i = 0; i < cfg->speaker_outs; i++)
4527 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4528 AC_PINCTL_OUT_EN);
4529 if (spec->eapd_mask && spec->eapd_switch)
4530 stac_gpio_set(codec, spec->gpio_mask,
4531 spec->gpio_dir, spec->gpio_data &
4532 ~spec->eapd_mask);
4533 } else {
4534 /* enable speakers */
4535 for (i = 0; i < cfg->speaker_outs; i++)
4536 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4537 AC_PINCTL_OUT_EN);
4538 if (spec->eapd_mask && spec->eapd_switch)
4539 stac_gpio_set(codec, spec->gpio_mask,
4540 spec->gpio_dir, spec->gpio_data |
4541 spec->eapd_mask);
4542 }
4543}
4544
d7a89436
TI
4545/* return non-zero if the hp-pin of the given array index isn't
4546 * a jack-detection target
4547 */
4548static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4549{
4550 struct auto_pin_cfg *cfg = &spec->autocfg;
4551
4552 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4553 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4554 return 1;
c21ca4a8 4555 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI
4556 return 1;
4557 /* ignore if the pin is set as line-out */
4558 if (cfg->hp_pins[i] == spec->hp_switch)
4559 return 1;
4560 return 0;
4561}
4562
c6e4c666 4563static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M
4564{
4565 struct sigmatel_spec *spec = codec->spec;
4566 struct auto_pin_cfg *cfg = &spec->autocfg;
4567 int i, presence;
4568
eb06ed8f 4569 presence = 0;
4fe5195c
MR
4570 if (spec->gpio_mute)
4571 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4572 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4573
eb06ed8f 4574 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI
4575 if (presence)
4576 break;
d7a89436
TI
4577 if (no_hp_sensing(spec, i))
4578 continue;
e6e3ea25
TI
4579 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4580 if (presence) {
4581 unsigned int pinctl;
4582 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4583 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4584 if (pinctl & AC_PINCTL_IN_EN)
4585 presence = 0; /* mic- or line-input */
4586 }
eb06ed8f 4587 }
4e55096e
M
4588
4589 if (presence) {
d7a89436 4590 /* disable lineouts */
7c2ba97b 4591 if (spec->hp_switch)
d7a89436
TI
4592 stac92xx_reset_pinctl(codec, spec->hp_switch,
4593 AC_PINCTL_OUT_EN);
4e55096e
M
4594 for (i = 0; i < cfg->line_outs; i++)
4595 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4596 AC_PINCTL_OUT_EN);
4e55096e 4597 } else {
d7a89436 4598 /* enable lineouts */
7c2ba97b 4599 if (spec->hp_switch)
d7a89436
TI
4600 stac92xx_set_pinctl(codec, spec->hp_switch,
4601 AC_PINCTL_OUT_EN);
4e55096e
M
4602 for (i = 0; i < cfg->line_outs; i++)
4603 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4604 AC_PINCTL_OUT_EN);
4e55096e 4605 }
fefd67f3 4606 stac92xx_line_out_detect(codec, presence);
d7a89436
TI
4607 /* toggle hp outs */
4608 for (i = 0; i < cfg->hp_outs; i++) {
4609 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4610 if (no_hp_sensing(spec, i))
4611 continue;
4612 if (presence)
4613 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI
4614#if 0 /* FIXME */
4615/* Resetting the pinctl like below may lead to (a sort of) regressions
4616 * on some devices since they use the HP pin actually for line/speaker
4617 * outs although the default pin config shows a different pin (that is
4618 * wrong and useless).
4619 *
4620 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4621 * But, disabling the code below just works around it, and I'm too tired of
4622 * bug reports with such devices...
4623 */
d7a89436
TI
4624 else
4625 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4626#endif /* FIXME */
d7a89436 4627 }
4e55096e
M
4628}
4629
f73d3585
TI
4630static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4631 int enable)
a64135a2
MR
4632{
4633 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI
4634 unsigned int idx, val;
4635
4636 for (idx = 0; idx < spec->num_pwrs; idx++) {
4637 if (spec->pwr_nids[idx] == nid)
4638 break;
4639 }
4640 if (idx >= spec->num_pwrs)
4641 return;
d0513fc6
MR
4642
4643 /* several codecs have two power down bits */
4644 if (spec->pwr_mapping)
4645 idx = spec->pwr_mapping[idx];
4646 else
4647 idx = 1 << idx;
a64135a2 4648
f73d3585
TI
4649 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4650 if (enable)
a64135a2
MR
4651 val &= ~idx;
4652 else
4653 val |= idx;
4654
4655 /* power down unused output ports */
4656 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR
4657}
4658
f73d3585
TI
4659static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4660{
e6e3ea25 4661 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4662}
a64135a2 4663
74aeaabc
MR
4664static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4665{
4666 struct sigmatel_spec *spec = codec->spec;
4667 struct sigmatel_jack *jacks = spec->jacks.list;
4668
4669 if (jacks) {
4670 int i;
4671 for (i = 0; i < spec->jacks.used; i++) {
4672 if (jacks->nid == nid) {
4673 unsigned int pin_ctl =
4674 snd_hda_codec_read(codec, nid,
4675 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4676 0x00);
4677 int type = jacks->type;
4678 if (type == (SND_JACK_LINEOUT
4679 | SND_JACK_HEADPHONE))
4680 type = (pin_ctl & AC_PINCTL_HP_EN)
4681 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4682 snd_jack_report(jacks->jack,
e6e3ea25 4683 get_pin_presence(codec, nid)
74aeaabc
MR
4684 ? type : 0);
4685 }
4686 jacks++;
4687 }
4688 }
4689}
a64135a2 4690
3d21d3f7
TI
4691static void stac92xx_mic_detect(struct hda_codec *codec)
4692{
4693 struct sigmatel_spec *spec = codec->spec;
4694 struct sigmatel_mic_route *mic;
4695
4696 if (get_pin_presence(codec, spec->ext_mic.pin))
4697 mic = &spec->ext_mic;
4698 else
4699 mic = &spec->int_mic;
02d33322 4700 if (mic->dmux_idx >= 0)
3d21d3f7
TI
4701 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4702 AC_VERB_SET_CONNECT_SEL,
4703 mic->dmux_idx);
02d33322 4704 if (mic->mux_idx >= 0)
3d21d3f7
TI
4705 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4706 AC_VERB_SET_CONNECT_SEL,
4707 mic->mux_idx);
4708}
4709
62558ce1 4710static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
c6e4c666 4711{
62558ce1 4712 struct sigmatel_event *event = stac_get_event(codec, nid);
c6e4c666
TI
4713 if (!event)
4714 return;
4715 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4716}
4717
314634bc
TI
4718static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4719{
a64135a2 4720 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4721 struct sigmatel_event *event;
4722 int tag, data;
a64135a2 4723
c6e4c666
TI
4724 tag = (res >> 26) & 0x7f;
4725 event = stac_get_event_from_tag(codec, tag);
4726 if (!event)
4727 return;
4728
4729 switch (event->type) {
314634bc 4730 case STAC_HP_EVENT:
fefd67f3 4731 case STAC_LO_EVENT:
16ffe32c 4732 stac92xx_hp_detect(codec);
fefd67f3 4733 break;
3d21d3f7
TI
4734 case STAC_MIC_EVENT:
4735 stac92xx_mic_detect(codec);
4736 break;
4737 }
4738
4739 switch (event->type) {
4740 case STAC_HP_EVENT:
fefd67f3 4741 case STAC_LO_EVENT:
3d21d3f7 4742 case STAC_MIC_EVENT:
74aeaabc 4743 case STAC_INSERT_EVENT:
a64135a2 4744 case STAC_PWR_EVENT:
c6e4c666
TI
4745 if (spec->num_pwrs > 0)
4746 stac92xx_pin_sense(codec, event->nid);
4747 stac92xx_report_jack(codec, event->nid);
fd60cc89
MR
4748
4749 switch (codec->subsystem_id) {
4750 case 0x103c308f:
4751 if (event->nid == 0xb) {
4752 int pin = AC_PINCTL_IN_EN;
4753
4754 if (get_pin_presence(codec, 0xa)
4755 && get_pin_presence(codec, 0xb))
4756 pin |= AC_PINCTL_VREF_80;
4757 if (!get_pin_presence(codec, 0xb))
4758 pin |= AC_PINCTL_VREF_80;
4759
4760 /* toggle VREF state based on mic + hp pin
4761 * status
4762 */
4763 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4764 }
4765 }
72474be6 4766 break;
c6e4c666
TI
4767 case STAC_VREF_EVENT:
4768 data = snd_hda_codec_read(codec, codec->afg, 0,
4769 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR
4770 /* toggle VREF state based on GPIOx status */
4771 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4772 !!(data & (1 << event->data)));
72474be6 4773 break;
314634bc
TI
4774 }
4775}
4776
d38cce70
KG
4777static int hp_blike_system(u32 subsystem_id);
4778
4779static void set_hp_led_gpio(struct hda_codec *codec)
4780{
4781 struct sigmatel_spec *spec = codec->spec;
07f80449
TI
4782 unsigned int gpio;
4783
26ebe0a2
TI
4784 if (spec->gpio_led)
4785 return;
4786
07f80449
TI
4787 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
4788 gpio &= AC_GPIO_IO_COUNT;
4789 if (gpio > 3)
4790 spec->gpio_led = 0x08; /* GPIO 3 */
4791 else
4792 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG
4793}
4794
c357aab0
VK
4795/*
4796 * This method searches for the mute LED GPIO configuration
4797 * provided as OEM string in SMBIOS. The format of that string
4798 * is HP_Mute_LED_P_G or HP_Mute_LED_P
4799 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
4800 * that corresponds to the NOT muted state of the master volume
4801 * and G is the index of the GPIO to use as the mute LED control (0..9)
4802 * If _G portion is missing it is assigned based on the codec ID
4803 *
4804 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
4805 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG
4806 *
4807 *
4808 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
4809 * SMBIOS - at least the ones I have seen do not have them - which include
4810 * my own system (HP Pavilion dv6-1110ax) and my cousin's
4811 * HP Pavilion dv9500t CTO.
4812 * Need more information on whether it is true across the entire series.
4813 * -- kunal
c357aab0 4814 */
dce17d4f 4815static int find_mute_led_gpio(struct hda_codec *codec, int default_polarity)
c357aab0
VK
4816{
4817 struct sigmatel_spec *spec = codec->spec;
4818 const struct dmi_device *dev = NULL;
4819
4820 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
4821 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
4822 NULL, dev))) {
4823 if (sscanf(dev->name, "HP_Mute_LED_%d_%d",
d38cce70
KG
4824 &spec->gpio_led_polarity,
4825 &spec->gpio_led) == 2) {
c357aab0
VK
4826 spec->gpio_led = 1 << spec->gpio_led;
4827 return 1;
4828 }
4829 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG
4830 &spec->gpio_led_polarity) == 1) {
4831 set_hp_led_gpio(codec);
4832 return 1;
c357aab0
VK
4833 }
4834 }
d38cce70
KG
4835
4836 /*
4837 * Fallback case - if we don't find the DMI strings,
4838 * we statically set the GPIO - if not a B-series system.
4839 */
4840 if (!hp_blike_system(codec->subsystem_id)) {
4841 set_hp_led_gpio(codec);
dce17d4f 4842 spec->gpio_led_polarity = default_polarity;
d38cce70
KG
4843 return 1;
4844 }
c357aab0
VK
4845 }
4846 return 0;
4847}
4848
4849static int hp_blike_system(u32 subsystem_id)
78987bdc
RD
4850{
4851 switch (subsystem_id) {
c357aab0
VK
4852 case 0x103c1520:
4853 case 0x103c1521:
4854 case 0x103c1523:
4855 case 0x103c1524:
4856 case 0x103c1525:
78987bdc
RD
4857 case 0x103c1722:
4858 case 0x103c1723:
4859 case 0x103c1724:
4860 case 0x103c1725:
4861 case 0x103c1726:
4862 case 0x103c1727:
4863 case 0x103c1728:
4864 case 0x103c1729:
c357aab0
VK
4865 case 0x103c172a:
4866 case 0x103c172b:
4867 case 0x103c307e:
4868 case 0x103c307f:
4869 case 0x103c3080:
4870 case 0x103c3081:
4871 case 0x103c7007:
4872 case 0x103c7008:
78987bdc
RD
4873 return 1;
4874 }
4875 return 0;
4876}
4877
2d34e1b3
TI
4878#ifdef CONFIG_PROC_FS
4879static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4880 struct hda_codec *codec, hda_nid_t nid)
4881{
4882 if (nid == codec->afg)
4883 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4884 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4885}
4886
4887static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4888 struct hda_codec *codec,
4889 unsigned int verb)
4890{
4891 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4892 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4893}
4894
4895/* stac92hd71bxx, stac92hd73xx */
4896static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4897 struct hda_codec *codec, hda_nid_t nid)
4898{
4899 stac92hd_proc_hook(buffer, codec, nid);
4900 if (nid == codec->afg)
4901 analog_loop_proc_hook(buffer, codec, 0xfa0);
4902}
4903
4904static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4905 struct hda_codec *codec, hda_nid_t nid)
4906{
4907 if (nid == codec->afg)
4908 analog_loop_proc_hook(buffer, codec, 0xfe0);
4909}
4910
4911static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4912 struct hda_codec *codec, hda_nid_t nid)
4913{
4914 if (nid == codec->afg)
4915 analog_loop_proc_hook(buffer, codec, 0xfeb);
4916}
4917#else
4918#define stac92hd_proc_hook NULL
4919#define stac92hd7x_proc_hook NULL
4920#define stac9205_proc_hook NULL
4921#define stac927x_proc_hook NULL
4922#endif
4923
cb53c626 4924#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M
4925static int stac92xx_resume(struct hda_codec *codec)
4926{
dc81bed1
TI
4927 struct sigmatel_spec *spec = codec->spec;
4928
2c885878 4929 stac92xx_init(codec);
82beb8fd
TI
4930 snd_hda_codec_resume_amp(codec);
4931 snd_hda_codec_resume_cache(codec);
2c885878 4932 /* fake event to set up pins again to override cached values */
5f380eb1
TI
4933 if (spec->hp_detect) {
4934 if (spec->autocfg.hp_pins[0])
4935 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0]);
4936 else if (spec->autocfg.line_out_pins[0])
4937 stac_issue_unsol_event(codec,
4938 spec->autocfg.line_out_pins[0]);
4939 }
c21bd025
TI
4940#ifdef CONFIG_SND_HDA_POWER_SAVE
4941 /* sync mute LED */
4942 if (spec->gpio_led && codec->patch_ops.check_power_status)
4943 codec->patch_ops.check_power_status(codec, 0x01);
4944#endif
ff6fdc37
M
4945 return 0;
4946}
c6798d2b 4947
ae6241fb 4948/*
514bf54c 4949 * using power check for controlling mute led of HP notebooks
ae6241fb
CP
4950 * check for mute state only on Speakers (nid = 0x10)
4951 *
4952 * For this feature CONFIG_SND_HDA_POWER_SAVE is needed, otherwise
4953 * the LED is NOT working properly !
514bf54c
JG
4954 *
4955 * Changed name to reflect that it now works for any designated
4956 * model, not just HP HDX.
ae6241fb
CP
4957 */
4958
4959#ifdef CONFIG_SND_HDA_POWER_SAVE
514bf54c 4960static int stac92xx_hp_check_power_status(struct hda_codec *codec,
6fce61ae 4961 hda_nid_t nid)
ae6241fb
CP
4962{
4963 struct sigmatel_spec *spec = codec->spec;
c21bd025 4964 int i, muted = 1;
6fce61ae 4965
c21bd025
TI
4966 for (i = 0; i < spec->multiout.num_dacs; i++) {
4967 nid = spec->multiout.dac_nids[i];
4968 if (!(snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
4969 HDA_AMP_MUTE)) {
4970 muted = 0; /* something heard */
4971 break;
5bdaaada 4972 }
ae6241fb 4973 }
c21bd025
TI
4974 if (muted)
4975 spec->gpio_data &= ~spec->gpio_led; /* orange */
4976 else
4977 spec->gpio_data |= spec->gpio_led; /* white */
ae6241fb 4978
c21bd025
TI
4979 if (!spec->gpio_led_polarity) {
4980 /* LED state is inverted on these systems */
4981 spec->gpio_data ^= spec->gpio_led;
4982 }
b4e81876 4983
b4e81876 4984 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
b4e81876
TI
4985 return 0;
4986}
ae6241fb
CP
4987#endif
4988
c6798d2b
MR
4989static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4990{
167eae5a 4991 stac92xx_shutup(codec);
c6798d2b
MR
4992 return 0;
4993}
ff6fdc37
M
4994#endif
4995
2f2f4251
M
4996static struct hda_codec_ops stac92xx_patch_ops = {
4997 .build_controls = stac92xx_build_controls,
4998 .build_pcms = stac92xx_build_pcms,
4999 .init = stac92xx_init,
5000 .free = stac92xx_free,
4e55096e 5001 .unsol_event = stac92xx_unsol_event,
cb53c626 5002#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 5003 .suspend = stac92xx_suspend,
ff6fdc37
M
5004 .resume = stac92xx_resume,
5005#endif
fb8d1a34 5006 .reboot_notify = stac92xx_shutup,
2f2f4251
M
5007};
5008
5009static int patch_stac9200(struct hda_codec *codec)
5010{
5011 struct sigmatel_spec *spec;
c7d4b2fa 5012 int err;
2f2f4251 5013
e560d8d8 5014 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
5015 if (spec == NULL)
5016 return -ENOMEM;
5017
a252c81a 5018 codec->no_trigger_sense = 1;
2f2f4251 5019 codec->spec = spec;
1b0e372d 5020 spec->linear_tone_beep = 1;
a4eed138 5021 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 5022 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI
5023 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
5024 stac9200_models,
5025 stac9200_cfg_tbl);
330ee995 5026 if (spec->board_config < 0)
9a11f1aa
TI
5027 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5028 codec->chip_name);
330ee995
TI
5029 else
5030 stac92xx_set_config_regs(codec,
af9f341a 5031 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M
5032
5033 spec->multiout.max_channels = 2;
5034 spec->multiout.num_dacs = 1;
5035 spec->multiout.dac_nids = stac9200_dac_nids;
5036 spec->adc_nids = stac9200_adc_nids;
5037 spec->mux_nids = stac9200_mux_nids;
dabbed6f 5038 spec->num_muxes = 1;
8b65727b 5039 spec->num_dmics = 0;
9e05b7a3 5040 spec->num_adcs = 1;
a64135a2 5041 spec->num_pwrs = 0;
c7d4b2fa 5042
58eec423
MCC
5043 if (spec->board_config == STAC_9200_M4 ||
5044 spec->board_config == STAC_9200_M4_2 ||
bf277785 5045 spec->board_config == STAC_9200_OQO)
1194b5b7
TI
5046 spec->init = stac9200_eapd_init;
5047 else
5048 spec->init = stac9200_core_init;
2f2f4251 5049 spec->mixer = stac9200_mixer;
c7d4b2fa 5050
117f257d
TI
5051 if (spec->board_config == STAC_9200_PANASONIC) {
5052 spec->gpio_mask = spec->gpio_dir = 0x09;
5053 spec->gpio_data = 0x00;
5054 }
5055
c7d4b2fa
M
5056 err = stac9200_parse_auto_config(codec);
5057 if (err < 0) {
5058 stac92xx_free(codec);
5059 return err;
5060 }
2f2f4251 5061
2acc9dcb
TI
5062 /* CF-74 has no headphone detection, and the driver should *NOT*
5063 * do detection and HP/speaker toggle because the hardware does it.
5064 */
5065 if (spec->board_config == STAC_9200_PANASONIC)
5066 spec->hp_detect = 0;
5067
2f2f4251
M
5068 codec->patch_ops = stac92xx_patch_ops;
5069
5070 return 0;
5071}
5072
8e21c34c
TD
5073static int patch_stac925x(struct hda_codec *codec)
5074{
5075 struct sigmatel_spec *spec;
5076 int err;
5077
5078 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5079 if (spec == NULL)
5080 return -ENOMEM;
5081
a252c81a 5082 codec->no_trigger_sense = 1;
8e21c34c 5083 codec->spec = spec;
1b0e372d 5084 spec->linear_tone_beep = 1;
a4eed138 5085 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 5086 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC
5087
5088 /* Check first for codec ID */
5089 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5090 STAC_925x_MODELS,
5091 stac925x_models,
5092 stac925x_codec_id_cfg_tbl);
5093
5094 /* Now checks for PCI ID, if codec ID is not found */
5095 if (spec->board_config < 0)
5096 spec->board_config = snd_hda_check_board_config(codec,
5097 STAC_925x_MODELS,
8e21c34c
TD
5098 stac925x_models,
5099 stac925x_cfg_tbl);
9e507abd 5100 again:
330ee995 5101 if (spec->board_config < 0)
9a11f1aa
TI
5102 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5103 codec->chip_name);
330ee995
TI
5104 else
5105 stac92xx_set_config_regs(codec,
af9f341a 5106 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD
5107
5108 spec->multiout.max_channels = 2;
5109 spec->multiout.num_dacs = 1;
5110 spec->multiout.dac_nids = stac925x_dac_nids;
5111 spec->adc_nids = stac925x_adc_nids;
5112 spec->mux_nids = stac925x_mux_nids;
5113 spec->num_muxes = 1;
9e05b7a3 5114 spec->num_adcs = 1;
a64135a2 5115 spec->num_pwrs = 0;
2c11f955
TD
5116 switch (codec->vendor_id) {
5117 case 0x83847632: /* STAC9202 */
5118 case 0x83847633: /* STAC9202D */
5119 case 0x83847636: /* STAC9251 */
5120 case 0x83847637: /* STAC9251D */
f6e9852a 5121 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5122 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI
5123 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5124 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD
5125 break;
5126 default:
5127 spec->num_dmics = 0;
5128 break;
5129 }
8e21c34c
TD
5130
5131 spec->init = stac925x_core_init;
5132 spec->mixer = stac925x_mixer;
6479c631
TI
5133 spec->num_caps = 1;
5134 spec->capvols = stac925x_capvols;
5135 spec->capsws = stac925x_capsws;
8e21c34c
TD
5136
5137 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI
5138 if (!err) {
5139 if (spec->board_config < 0) {
5140 printk(KERN_WARNING "hda_codec: No auto-config is "
5141 "available, default to model=ref\n");
5142 spec->board_config = STAC_925x_REF;
5143 goto again;
5144 }
5145 err = -EINVAL;
5146 }
8e21c34c
TD
5147 if (err < 0) {
5148 stac92xx_free(codec);
5149 return err;
5150 }
5151
5152 codec->patch_ops = stac92xx_patch_ops;
5153
5154 return 0;
5155}
5156
e1f0d669
MR
5157static int patch_stac92hd73xx(struct hda_codec *codec)
5158{
5159 struct sigmatel_spec *spec;
5160 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
5161 int err = 0;
c21ca4a8 5162 int num_dacs;
e1f0d669
MR
5163
5164 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5165 if (spec == NULL)
5166 return -ENOMEM;
5167
a252c81a 5168 codec->no_trigger_sense = 1;
e1f0d669 5169 codec->spec = spec;
1b0e372d 5170 spec->linear_tone_beep = 0;
e99d32b3 5171 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR
5172 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
5173 spec->pin_nids = stac92hd73xx_pin_nids;
5174 spec->board_config = snd_hda_check_board_config(codec,
5175 STAC_92HD73XX_MODELS,
5176 stac92hd73xx_models,
5177 stac92hd73xx_cfg_tbl);
842ae638
TI
5178 /* check codec subsystem id if not found */
5179 if (spec->board_config < 0)
5180 spec->board_config =
5181 snd_hda_check_board_codec_sid_config(codec,
5182 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5183 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5184again:
330ee995 5185 if (spec->board_config < 0)
9a11f1aa
TI
5186 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5187 codec->chip_name);
330ee995
TI
5188 else
5189 stac92xx_set_config_regs(codec,
af9f341a 5190 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5191
c21ca4a8 5192 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR
5193 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5194
c21ca4a8 5195 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR
5196 printk(KERN_WARNING "hda_codec: Could not determine "
5197 "number of channels defaulting to DAC count\n");
c21ca4a8 5198 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5199 }
e2aec171 5200 spec->init = stac92hd73xx_core_init;
c21ca4a8 5201 switch (num_dacs) {
e1f0d669 5202 case 0x3: /* 6 Channel */
d78d7a90 5203 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR
5204 break;
5205 case 0x4: /* 8 Channel */
d78d7a90 5206 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR
5207 break;
5208 case 0x5: /* 10 Channel */
d78d7a90
TI
5209 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5210 break;
c21ca4a8
TI
5211 }
5212 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5213
e1f0d669
MR
5214 spec->aloopback_mask = 0x01;
5215 spec->aloopback_shift = 8;
5216
1cd2224c 5217 spec->digbeep_nid = 0x1c;
e1f0d669
MR
5218 spec->mux_nids = stac92hd73xx_mux_nids;
5219 spec->adc_nids = stac92hd73xx_adc_nids;
5220 spec->dmic_nids = stac92hd73xx_dmic_nids;
5221 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5222 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR
5223
5224 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5225 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5226 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5227
6479c631
TI
5228 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5229 spec->capvols = stac92hd73xx_capvols;
5230 spec->capsws = stac92hd73xx_capsws;
5231
a7662640 5232 switch (spec->board_config) {
6b3ab21e 5233 case STAC_DELL_EQ:
d654a660 5234 spec->init = dell_eq_core_init;
6b3ab21e 5235 /* fallthru */
661cd8fb
TI
5236 case STAC_DELL_M6_AMIC:
5237 case STAC_DELL_M6_DMIC:
5238 case STAC_DELL_M6_BOTH:
2a9c7816 5239 spec->num_smuxes = 0;
c0cea0d0 5240 spec->eapd_switch = 0;
6b3ab21e 5241
661cd8fb
TI
5242 switch (spec->board_config) {
5243 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5244 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR
5245 spec->num_dmics = 0;
5246 break;
661cd8fb 5247 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5248 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR
5249 spec->num_dmics = 1;
5250 break;
661cd8fb 5251 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI
5252 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5253 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR
5254 spec->num_dmics = 1;
5255 break;
5256 }
5257 break;
842ae638
TI
5258 case STAC_ALIENWARE_M17X:
5259 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5260 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5261 spec->eapd_switch = 0;
5262 break;
a7662640
MR
5263 default:
5264 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5265 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5266 spec->eapd_switch = 1;
5207e10e 5267 break;
a7662640 5268 }
af6ee302 5269 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR
5270 /* GPIO0 High = Enable EAPD */
5271 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5272 spec->gpio_data = 0x01;
5273 }
a7662640 5274
a64135a2
MR
5275 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5276 spec->pwr_nids = stac92hd73xx_pwr_nids;
5277
d9737751 5278 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR
5279
5280 if (!err) {
5281 if (spec->board_config < 0) {
5282 printk(KERN_WARNING "hda_codec: No auto-config is "
5283 "available, default to model=ref\n");
5284 spec->board_config = STAC_92HD73XX_REF;
5285 goto again;
5286 }
5287 err = -EINVAL;
5288 }
5289
5290 if (err < 0) {
5291 stac92xx_free(codec);
5292 return err;
5293 }
5294
9e43f0de
TI
5295 if (spec->board_config == STAC_92HD73XX_NO_JD)
5296 spec->hp_detect = 0;
5297
e1f0d669
MR
5298 codec->patch_ops = stac92xx_patch_ops;
5299
2d34e1b3
TI
5300 codec->proc_widget_hook = stac92hd7x_proc_hook;
5301
e1f0d669
MR
5302 return 0;
5303}
5304
d0513fc6
MR
5305static int patch_stac92hd83xxx(struct hda_codec *codec)
5306{
5307 struct sigmatel_spec *spec;
65557f35 5308 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 5309 int err;
65557f35 5310 int num_dacs;
d0513fc6
MR
5311
5312 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5313 if (spec == NULL)
5314 return -ENOMEM;
5315
a252c81a 5316 codec->no_trigger_sense = 1;
d0513fc6 5317 codec->spec = spec;
1b0e372d 5318 spec->linear_tone_beep = 1;
0ffa9807 5319 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5320 spec->digbeep_nid = 0x21;
667067d8
TI
5321 spec->mux_nids = stac92hd83xxx_mux_nids;
5322 spec->num_muxes = ARRAY_SIZE(stac92hd83xxx_mux_nids);
d0513fc6 5323 spec->adc_nids = stac92hd83xxx_adc_nids;
7570ef18 5324 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
d0513fc6
MR
5325 spec->pwr_nids = stac92hd83xxx_pwr_nids;
5326 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
5327 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5328 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR
5329
5330 spec->init = stac92hd83xxx_core_init;
d0513fc6 5331 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
d0513fc6 5332 spec->pin_nids = stac92hd83xxx_pin_nids;
6479c631
TI
5333 spec->num_caps = STAC92HD83XXX_NUM_CAPS;
5334 spec->capvols = stac92hd83xxx_capvols;
5335 spec->capsws = stac92hd83xxx_capsws;
5336
d0513fc6
MR
5337 spec->board_config = snd_hda_check_board_config(codec,
5338 STAC_92HD83XXX_MODELS,
5339 stac92hd83xxx_models,
5340 stac92hd83xxx_cfg_tbl);
5341again:
330ee995 5342 if (spec->board_config < 0)
9a11f1aa
TI
5343 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5344 codec->chip_name);
330ee995
TI
5345 else
5346 stac92xx_set_config_regs(codec,
af9f341a 5347 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5348
32ed3f46 5349 switch (codec->vendor_id) {
36706005
CC
5350 case 0x111d7666:
5351 case 0x111d7667:
5352 case 0x111d7668:
5353 case 0x111d7669:
8a345a04
CC
5354 case 0x111d76d1:
5355 case 0x111d76d9:
36706005
CC
5356 spec->num_pins = ARRAY_SIZE(stac92hd88xxx_pin_nids);
5357 spec->pin_nids = stac92hd88xxx_pin_nids;
5358 spec->mono_nid = 0;
5359 spec->digbeep_nid = 0;
5360 spec->num_pwrs = 0;
5361 break;
32ed3f46 5362 case 0x111d7604:
a9694faa 5363 case 0x111d76d4:
32ed3f46 5364 case 0x111d7605:
ff2e7337 5365 case 0x111d76d5:
32ed3f46
MR
5366 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
5367 break;
5368 spec->num_pwrs = 0;
5369 break;
5370 }
5371
b4e81876
TI
5372 codec->patch_ops = stac92xx_patch_ops;
5373
dce17d4f 5374 if (find_mute_led_gpio(codec, 0))
e108c7b7
VK
5375 snd_printd("mute LED gpio %d polarity %d\n",
5376 spec->gpio_led,
5377 spec->gpio_led_polarity);
5378
b4e81876
TI
5379#ifdef CONFIG_SND_HDA_POWER_SAVE
5380 if (spec->gpio_led) {
5381 spec->gpio_mask |= spec->gpio_led;
5382 spec->gpio_dir |= spec->gpio_led;
5383 spec->gpio_data |= spec->gpio_led;
5384 /* register check_power_status callback. */
5385 codec->patch_ops.check_power_status =
c21bd025 5386 stac92xx_hp_check_power_status;
b4e81876
TI
5387 }
5388#endif
5389
d0513fc6
MR
5390 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
5391 if (!err) {
5392 if (spec->board_config < 0) {
5393 printk(KERN_WARNING "hda_codec: No auto-config is "
5394 "available, default to model=ref\n");
5395 spec->board_config = STAC_92HD83XXX_REF;
5396 goto again;
5397 }
5398 err = -EINVAL;
5399 }
5400
5401 if (err < 0) {
5402 stac92xx_free(codec);
5403 return err;
5404 }
5405
04b5efe5
CC
5406 /* docking output support */
5407 num_dacs = snd_hda_get_connections(codec, 0xF,
8bb0ac55 5408 conn, STAC92HD83_DAC_COUNT + 1) - 1;
04b5efe5
CC
5409 /* skip non-DAC connections */
5410 while (num_dacs >= 0 &&
5411 (get_wcaps_type(get_wcaps(codec, conn[num_dacs]))
5412 != AC_WID_AUD_OUT))
5413 num_dacs--;
5414 /* set port E and F to select the last DAC */
5415 if (num_dacs >= 0) {
5416 snd_hda_codec_write_cache(codec, 0xE, 0,
5417 AC_VERB_SET_CONNECT_SEL, num_dacs);
5418 snd_hda_codec_write_cache(codec, 0xF, 0,
8bb0ac55 5419 AC_VERB_SET_CONNECT_SEL, num_dacs);
04b5efe5 5420 }
8bb0ac55 5421
2d34e1b3
TI
5422 codec->proc_widget_hook = stac92hd_proc_hook;
5423
d0513fc6
MR
5424 return 0;
5425}
5426
330ee995
TI
5427/* get the pin connection (fixed, none, etc) */
5428static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
5429{
5430 struct sigmatel_spec *spec = codec->spec;
5431 unsigned int cfg;
5432
5433 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
5434 return get_defcfg_connect(cfg);
5435}
5436
6df703ae
HRK
5437static int stac92hd71bxx_connected_ports(struct hda_codec *codec,
5438 hda_nid_t *nids, int num_nids)
5439{
5440 struct sigmatel_spec *spec = codec->spec;
5441 int idx, num;
5442 unsigned int def_conf;
5443
5444 for (num = 0; num < num_nids; num++) {
5445 for (idx = 0; idx < spec->num_pins; idx++)
5446 if (spec->pin_nids[idx] == nids[num])
5447 break;
5448 if (idx >= spec->num_pins)
5449 break;
330ee995 5450 def_conf = stac_get_defcfg_connect(codec, idx);
6df703ae
HRK
5451 if (def_conf == AC_JACK_PORT_NONE)
5452 break;
5453 }
5454 return num;
5455}
5456
5457static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5458 hda_nid_t dig0pin)
5459{
5460 struct sigmatel_spec *spec = codec->spec;
5461 int idx;
5462
5463 for (idx = 0; idx < spec->num_pins; idx++)
5464 if (spec->pin_nids[idx] == dig0pin)
5465 break;
5466 if ((idx + 2) >= spec->num_pins)
5467 return 0;
5468
5469 /* dig1pin case */
330ee995 5470 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK
5471 return 2;
5472
5473 /* dig0pin + dig2pin case */
330ee995 5474 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5475 return 2;
330ee995 5476 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK
5477 return 1;
5478 else
5479 return 0;
5480}
5481
75d1aeb9
TI
5482/* HP dv7 bass switch - GPIO5 */
5483#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5484static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5485 struct snd_ctl_elem_value *ucontrol)
5486{
5487 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5488 struct sigmatel_spec *spec = codec->spec;
5489 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5490 return 0;
5491}
5492
5493static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5494 struct snd_ctl_elem_value *ucontrol)
5495{
5496 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5497 struct sigmatel_spec *spec = codec->spec;
5498 unsigned int gpio_data;
5499
5500 gpio_data = (spec->gpio_data & ~0x20) |
5501 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5502 if (gpio_data == spec->gpio_data)
5503 return 0;
5504 spec->gpio_data = gpio_data;
5505 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5506 return 1;
5507}
5508
5509static struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
5510 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5511 .info = stac_hp_bass_gpio_info,
5512 .get = stac_hp_bass_gpio_get,
5513 .put = stac_hp_bass_gpio_put,
5514};
5515
5516static int stac_add_hp_bass_switch(struct hda_codec *codec)
5517{
5518 struct sigmatel_spec *spec = codec->spec;
5519
5520 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5521 "Bass Speaker Playback Switch", 0))
5522 return -ENOMEM;
5523
5524 spec->gpio_mask |= 0x20;
5525 spec->gpio_dir |= 0x20;
5526 spec->gpio_data |= 0x20;
5527 return 0;
5528}
5529
e035b841
MR
5530static int patch_stac92hd71bxx(struct hda_codec *codec)
5531{
5532 struct sigmatel_spec *spec;
ca8d33fc 5533 struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5534 unsigned int pin_cfg;
e035b841
MR
5535 int err = 0;
5536
5537 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5538 if (spec == NULL)
5539 return -ENOMEM;
5540
a252c81a 5541 codec->no_trigger_sense = 1;
e035b841 5542 codec->spec = spec;
1b0e372d 5543 spec->linear_tone_beep = 0;
8daaaa97 5544 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK
5545 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5546 switch (codec->vendor_id) {
5547 case 0x111d76b6:
5548 case 0x111d76b7:
5549 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5550 break;
5551 case 0x111d7603:
5552 case 0x111d7608:
5553 /* On 92HD75Bx 0x27 isn't a pin nid */
5554 spec->num_pins--;
5555 /* fallthrough */
5556 default:
5557 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5558 }
aafc4412 5559 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR
5560 spec->board_config = snd_hda_check_board_config(codec,
5561 STAC_92HD71BXX_MODELS,
5562 stac92hd71bxx_models,
5563 stac92hd71bxx_cfg_tbl);
5564again:
330ee995 5565 if (spec->board_config < 0)
9a11f1aa
TI
5566 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5567 codec->chip_name);
330ee995
TI
5568 else
5569 stac92xx_set_config_regs(codec,
af9f341a 5570 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5571
fc64b26c 5572 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI
5573 /* GPIO0 = EAPD */
5574 spec->gpio_mask = 0x01;
5575 spec->gpio_dir = 0x01;
5576 spec->gpio_data = 0x01;
5577 }
5578
6df703ae
HRK
5579 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5580 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5581
6479c631
TI
5582 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5583 spec->capvols = stac92hd71bxx_capvols;
5584 spec->capsws = stac92hd71bxx_capsws;
5585
541eee87
MR
5586 switch (codec->vendor_id) {
5587 case 0x111d76b6: /* 4 Port without Analog Mixer */
5588 case 0x111d76b7:
23c7b521
HRK
5589 unmute_init++;
5590 /* fallthru */
541eee87
MR
5591 case 0x111d76b4: /* 6 Port without Analog Mixer */
5592 case 0x111d76b5:
541eee87 5593 spec->init = stac92hd71bxx_core_init;
0ffa9807 5594 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
6df703ae
HRK
5595 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5596 stac92hd71bxx_dmic_nids,
5597 STAC92HD71BXX_NUM_DMICS);
541eee87 5598 break;
aafc4412 5599 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI
5600 switch (spec->board_config) {
5601 case STAC_HP_M4:
72474be6 5602 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI
5603 err = stac_add_event(spec, codec->afg,
5604 STAC_VREF_EVENT, 0x02);
5605 if (err < 0)
5606 return err;
c5d08bb5 5607 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR
5608 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5609 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5610 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5611 AC_USRSP_EN | err);
72474be6
MR
5612 spec->gpio_mask |= 0x02;
5613 break;
5614 }
8daaaa97 5615 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5616 (codec->revision_id & 0xf) == 1)
8daaaa97 5617 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5618
aafc4412
MR
5619 /* no output amps */
5620 spec->num_pwrs = 0;
aafc4412 5621 /* disable VSW */
26a27980 5622 spec->init = stac92hd71bxx_core_init;
ca8d33fc 5623 unmute_init++;
330ee995
TI
5624 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5625 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
6df703ae
HRK
5626 stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0;
5627 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5628 stac92hd71bxx_dmic_nids,
5629 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR
5630 break;
5631 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5632 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5633 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5634
aafc4412
MR
5635 /* no output amps */
5636 spec->num_pwrs = 0;
5637 /* fallthru */
541eee87 5638 default:
26a27980 5639 spec->init = stac92hd71bxx_core_init;
0ffa9807 5640 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
6df703ae
HRK
5641 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5642 stac92hd71bxx_dmic_nids,
5643 STAC92HD71BXX_NUM_DMICS);
5207e10e 5644 break;
541eee87
MR
5645 }
5646
ca8d33fc
MR
5647 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5648 snd_hda_sequence_write_cache(codec, unmute_init);
5649
b20f3b83
TI
5650 /* Some HP machines seem to have unstable codec communications
5651 * especially with ATI fglrx driver. For recovering from the
5652 * CORB/RIRB stall, allow the BUS reset and keep always sync
5653 */
5654 if (spec->board_config == STAC_HP_DV5) {
5655 codec->bus->sync_write = 1;
5656 codec->bus->allow_bus_reset = 1;
5657 }
5658
d78d7a90 5659 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5660 spec->aloopback_mask = 0x50;
541eee87
MR
5661 spec->aloopback_shift = 0;
5662
8daaaa97 5663 spec->powerdown_adcs = 1;
1cd2224c 5664 spec->digbeep_nid = 0x26;
e035b841
MR
5665 spec->mux_nids = stac92hd71bxx_mux_nids;
5666 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5667 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5668 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR
5669
5670 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5671 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5672 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5673 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5674
d38cce70
KG
5675 snd_printdd("Found board config: %d\n", spec->board_config);
5676
6a14f585
MR
5677 switch (spec->board_config) {
5678 case STAC_HP_M4:
6a14f585 5679 /* enable internal microphone */
330ee995 5680 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR
5681 stac92xx_auto_set_pinctl(codec, 0x0e,
5682 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR
5683 /* fallthru */
5684 case STAC_DELL_M4_2:
5685 spec->num_dmics = 0;
5686 spec->num_smuxes = 0;
5687 spec->num_dmuxes = 0;
5688 break;
5689 case STAC_DELL_M4_1:
5690 case STAC_DELL_M4_3:
5691 spec->num_dmics = 1;
5692 spec->num_smuxes = 0;
ea18aa46 5693 spec->num_dmuxes = 1;
6a14f585 5694 break;
514bf54c
JG
5695 case STAC_HP_DV4_1222NR:
5696 spec->num_dmics = 1;
5697 /* I don't know if it needs 1 or 2 smuxes - will wait for
5698 * bug reports to fix if needed
5699 */
5700 spec->num_smuxes = 1;
5701 spec->num_dmuxes = 1;
514bf54c 5702 /* fallthrough */
2a6ce6e5
TI
5703 case STAC_HP_DV4:
5704 spec->gpio_led = 0x01;
5705 /* fallthrough */
e2ea57a8 5706 case STAC_HP_DV5:
330ee995 5707 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5708 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI
5709 /* HP dv6 gives the headphone pin as a line-out. Thus we
5710 * need to set hp_detect flag here to force to enable HP
5711 * detection.
5712 */
5713 spec->hp_detect = 1;
e2ea57a8 5714 break;
ae6241fb
CP
5715 case STAC_HP_HDX:
5716 spec->num_dmics = 1;
5717 spec->num_dmuxes = 1;
5718 spec->num_smuxes = 1;
26ebe0a2 5719 spec->gpio_led = 0x08;
86d190e7
TI
5720 break;
5721 }
443e26d0 5722
c357aab0 5723 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK
5724 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
5725 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
5726 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
5727 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
5728 /* It was changed in the BIOS to just satisfy MS DTM.
5729 * Lets turn it back into slaved HP
5730 */
5731 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
5732 | (AC_JACK_HP_OUT <<
5733 AC_DEFCFG_DEVICE_SHIFT);
5734 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
5735 | AC_DEFCFG_SEQUENCE)))
5736 | 0x1f;
5737 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
5738 }
5739 }
5740
dce17d4f 5741 if (find_mute_led_gpio(codec, 1))
c357aab0
VK
5742 snd_printd("mute LED gpio %d polarity %d\n",
5743 spec->gpio_led,
5744 spec->gpio_led_polarity);
5bdaaada 5745
86d190e7
TI
5746#ifdef CONFIG_SND_HDA_POWER_SAVE
5747 if (spec->gpio_led) {
5748 spec->gpio_mask |= spec->gpio_led;
5749 spec->gpio_dir |= spec->gpio_led;
5750 spec->gpio_data |= spec->gpio_led;
443e26d0 5751 /* register check_power_status callback. */
6fce61ae 5752 codec->patch_ops.check_power_status =
86d190e7
TI
5753 stac92xx_hp_check_power_status;
5754 }
443e26d0 5755#endif
6a14f585 5756
c21ca4a8 5757 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5758
29d4ab4d 5759 err = stac92xx_parse_auto_config(codec, 0x21, 0);
e035b841
MR
5760 if (!err) {
5761 if (spec->board_config < 0) {
5762 printk(KERN_WARNING "hda_codec: No auto-config is "
5763 "available, default to model=ref\n");
5764 spec->board_config = STAC_92HD71BXX_REF;
5765 goto again;
5766 }
5767 err = -EINVAL;
5768 }
5769
5770 if (err < 0) {
5771 stac92xx_free(codec);
5772 return err;
5773 }
5774
75d1aeb9 5775 /* enable bass on HP dv7 */
2a6ce6e5
TI
5776 if (spec->board_config == STAC_HP_DV4 ||
5777 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI
5778 unsigned int cap;
5779 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
5780 cap &= AC_GPIO_IO_COUNT;
5781 if (cap >= 6)
5782 stac_add_hp_bass_switch(codec);
5783 }
5784
2d34e1b3
TI
5785 codec->proc_widget_hook = stac92hd7x_proc_hook;
5786
e035b841 5787 return 0;
86d190e7 5788}
e035b841 5789
2f2f4251
M
5790static int patch_stac922x(struct hda_codec *codec)
5791{
5792 struct sigmatel_spec *spec;
c7d4b2fa 5793 int err;
2f2f4251 5794
e560d8d8 5795 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
5796 if (spec == NULL)
5797 return -ENOMEM;
5798
a252c81a 5799 codec->no_trigger_sense = 1;
2f2f4251 5800 codec->spec = spec;
1b0e372d 5801 spec->linear_tone_beep = 1;
a4eed138 5802 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5803 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI
5804 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5805 stac922x_models,
5806 stac922x_cfg_tbl);
536319af 5807 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR
5808 spec->gpio_mask = spec->gpio_dir = 0x03;
5809 spec->gpio_data = 0x03;
3fc24d85
TI
5810 /* Intel Macs have all same PCI SSID, so we need to check
5811 * codec SSID to distinguish the exact models
5812 */
6f0778d8 5813 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5814 switch (codec->subsystem_id) {
5d5d3bc3
IZ
5815
5816 case 0x106b0800:
5817 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5818 break;
5d5d3bc3
IZ
5819 case 0x106b0600:
5820 case 0x106b0700:
5821 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5822 break;
5d5d3bc3
IZ
5823 case 0x106b0e00:
5824 case 0x106b0f00:
5825 case 0x106b1600:
5826 case 0x106b1700:
5827 case 0x106b0200:
5828 case 0x106b1e00:
5829 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5830 break;
5d5d3bc3
IZ
5831 case 0x106b1a00:
5832 case 0x00000100:
5833 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5834 break;
5d5d3bc3
IZ
5835 case 0x106b0a00:
5836 case 0x106b2200:
5837 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5838 break;
536319af
NB
5839 default:
5840 spec->board_config = STAC_INTEL_MAC_V3;
5841 break;
3fc24d85
TI
5842 }
5843 }
5844
9e507abd 5845 again:
330ee995 5846 if (spec->board_config < 0)
9a11f1aa
TI
5847 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5848 codec->chip_name);
330ee995
TI
5849 else
5850 stac92xx_set_config_regs(codec,
af9f341a 5851 stac922x_brd_tbl[spec->board_config]);
2f2f4251 5852
c7d4b2fa
M
5853 spec->adc_nids = stac922x_adc_nids;
5854 spec->mux_nids = stac922x_mux_nids;
2549413e 5855 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5856 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5857 spec->num_dmics = 0;
a64135a2 5858 spec->num_pwrs = 0;
c7d4b2fa
M
5859
5860 spec->init = stac922x_core_init;
6479c631
TI
5861
5862 spec->num_caps = STAC922X_NUM_CAPS;
5863 spec->capvols = stac922x_capvols;
5864 spec->capsws = stac922x_capsws;
c7d4b2fa
M
5865
5866 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5867
3cc08dc6 5868 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI
5869 if (!err) {
5870 if (spec->board_config < 0) {
5871 printk(KERN_WARNING "hda_codec: No auto-config is "
5872 "available, default to model=ref\n");
5873 spec->board_config = STAC_D945_REF;
5874 goto again;
5875 }
5876 err = -EINVAL;
5877 }
3cc08dc6
MP
5878 if (err < 0) {
5879 stac92xx_free(codec);
5880 return err;
5881 }
5882
5883 codec->patch_ops = stac92xx_patch_ops;
5884
807a4636
TI
5885 /* Fix Mux capture level; max to 2 */
5886 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5887 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5888 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5889 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5890 (0 << AC_AMPCAP_MUTE_SHIFT));
5891
3cc08dc6
MP
5892 return 0;
5893}
5894
5895static int patch_stac927x(struct hda_codec *codec)
5896{
5897 struct sigmatel_spec *spec;
5898 int err;
5899
5900 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5901 if (spec == NULL)
5902 return -ENOMEM;
5903
a252c81a 5904 codec->no_trigger_sense = 1;
3cc08dc6 5905 codec->spec = spec;
1b0e372d 5906 spec->linear_tone_beep = 1;
45c1d85b 5907 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 5908 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5909 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI
5910 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5911 stac927x_models,
5912 stac927x_cfg_tbl);
9e507abd 5913 again:
330ee995 5914 if (spec->board_config < 0)
9a11f1aa
TI
5915 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5916 codec->chip_name);
330ee995
TI
5917 else
5918 stac92xx_set_config_regs(codec,
af9f341a 5919 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 5920
1cd2224c 5921 spec->digbeep_nid = 0x23;
8e9068b1
MR
5922 spec->adc_nids = stac927x_adc_nids;
5923 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5924 spec->mux_nids = stac927x_mux_nids;
5925 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR
5926 spec->smux_nids = stac927x_smux_nids;
5927 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5928 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5929 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR
5930 spec->multiout.dac_nids = spec->dac_nids;
5931
af6ee302
TI
5932 if (spec->board_config != STAC_D965_REF) {
5933 /* GPIO0 High = Enable EAPD */
5934 spec->eapd_mask = spec->gpio_mask = 0x01;
5935 spec->gpio_dir = spec->gpio_data = 0x01;
5936 }
5937
81d3dbde 5938 switch (spec->board_config) {
93ed1503 5939 case STAC_D965_3ST:
93ed1503 5940 case STAC_D965_5ST:
8e9068b1 5941 /* GPIO0 High = Enable EAPD */
8e9068b1 5942 spec->num_dmics = 0;
93ed1503 5943 spec->init = d965_core_init;
81d3dbde 5944 break;
8e9068b1 5945 case STAC_DELL_BIOS:
780c8be4
MR
5946 switch (codec->subsystem_id) {
5947 case 0x10280209:
5948 case 0x1028022e:
5949 /* correct the device field to SPDIF out */
330ee995 5950 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 5951 break;
86d190e7 5952 }
03d7ca17 5953 /* configure the analog microphone on some laptops */
330ee995 5954 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 5955 /* correct the front output jack as a hp out */
330ee995 5956 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 5957 /* correct the front input jack as a mic */
330ee995 5958 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 5959 /* fallthru */
8e9068b1 5960 case STAC_DELL_3ST:
af6ee302
TI
5961 if (codec->subsystem_id != 0x1028022f) {
5962 /* GPIO2 High = Enable EAPD */
5963 spec->eapd_mask = spec->gpio_mask = 0x04;
5964 spec->gpio_dir = spec->gpio_data = 0x04;
5965 }
7f16859a
MR
5966 spec->dmic_nids = stac927x_dmic_nids;
5967 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5968
ccca7cdc 5969 spec->init = dell_3st_core_init;
8e9068b1 5970 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5971 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 5972 break;
54930531
TI
5973 case STAC_927X_VOLKNOB:
5974 spec->num_dmics = 0;
5975 spec->init = stac927x_volknob_core_init;
5976 break;
7f16859a 5977 default:
8e9068b1 5978 spec->num_dmics = 0;
8e9068b1 5979 spec->init = stac927x_core_init;
af6ee302 5980 break;
7f16859a
MR
5981 }
5982
6479c631
TI
5983 spec->num_caps = STAC927X_NUM_CAPS;
5984 spec->capvols = stac927x_capvols;
5985 spec->capsws = stac927x_capsws;
5986
a64135a2 5987 spec->num_pwrs = 0;
d78d7a90 5988 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR
5989 spec->aloopback_mask = 0x40;
5990 spec->aloopback_shift = 0;
c0cea0d0 5991 spec->eapd_switch = 1;
8e9068b1 5992
3cc08dc6 5993 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI
5994 if (!err) {
5995 if (spec->board_config < 0) {
5996 printk(KERN_WARNING "hda_codec: No auto-config is "
5997 "available, default to model=ref\n");
5998 spec->board_config = STAC_D965_REF;
5999 goto again;
6000 }
6001 err = -EINVAL;
6002 }
c7d4b2fa
M
6003 if (err < 0) {
6004 stac92xx_free(codec);
6005 return err;
6006 }
2f2f4251
M
6007
6008 codec->patch_ops = stac92xx_patch_ops;
6009
2d34e1b3
TI
6010 codec->proc_widget_hook = stac927x_proc_hook;
6011
52987656
TI
6012 /*
6013 * !!FIXME!!
6014 * The STAC927x seem to require fairly long delays for certain
6015 * command sequences. With too short delays (even if the answer
6016 * is set to RIRB properly), it results in the silence output
6017 * on some hardwares like Dell.
6018 *
6019 * The below flag enables the longer delay (see get_response
6020 * in hda_intel.c).
6021 */
6022 codec->bus->needs_damn_long_delay = 1;
6023
e28d8322
TI
6024 /* no jack detecion for ref-no-jd model */
6025 if (spec->board_config == STAC_D965_REF_NO_JD)
6026 spec->hp_detect = 0;
6027
2f2f4251
M
6028 return 0;
6029}
6030
f3302a59
MP
6031static int patch_stac9205(struct hda_codec *codec)
6032{
6033 struct sigmatel_spec *spec;
8259980e 6034 int err;
f3302a59
MP
6035
6036 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6037 if (spec == NULL)
6038 return -ENOMEM;
6039
a252c81a 6040 codec->no_trigger_sense = 1;
f3302a59 6041 codec->spec = spec;
1b0e372d 6042 spec->linear_tone_beep = 1;
a4eed138 6043 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 6044 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI
6045 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6046 stac9205_models,
6047 stac9205_cfg_tbl);
9e507abd 6048 again:
330ee995 6049 if (spec->board_config < 0)
9a11f1aa
TI
6050 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6051 codec->chip_name);
330ee995
TI
6052 else
6053 stac92xx_set_config_regs(codec,
af9f341a 6054 stac9205_brd_tbl[spec->board_config]);
f3302a59 6055
1cd2224c 6056 spec->digbeep_nid = 0x23;
f3302a59 6057 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6058 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6059 spec->mux_nids = stac9205_mux_nids;
2549413e 6060 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR
6061 spec->smux_nids = stac9205_smux_nids;
6062 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6063 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6064 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6065 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6066 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6067 spec->num_pwrs = 0;
f3302a59
MP
6068
6069 spec->init = stac9205_core_init;
d78d7a90 6070 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6071
6479c631
TI
6072 spec->num_caps = STAC9205_NUM_CAPS;
6073 spec->capvols = stac9205_capvols;
6074 spec->capsws = stac9205_capsws;
6075
e1f0d669
MR
6076 spec->aloopback_mask = 0x40;
6077 spec->aloopback_shift = 0;
d9a4268e
TI
6078 /* Turn on/off EAPD per HP plugging */
6079 if (spec->board_config != STAC_9205_EAPD)
6080 spec->eapd_switch = 1;
f3302a59 6081 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6082
ae0a8ed8 6083 switch (spec->board_config){
ae0a8ed8 6084 case STAC_9205_DELL_M43:
87d48363 6085 /* Enable SPDIF in/out */
330ee995
TI
6086 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6087 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6088
4fe5195c 6089 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI
6090 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
6091 if (err < 0)
6092 return err;
c5d08bb5 6093 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR
6094 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
6095 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI
6096 AC_VERB_SET_UNSOLICITED_ENABLE,
6097 AC_USRSP_EN | err);
4fe5195c
MR
6098
6099 spec->gpio_dir = 0x0b;
0fc9dec4 6100 spec->eapd_mask = 0x01;
4fe5195c
MR
6101 spec->gpio_mask = 0x1b;
6102 spec->gpio_mute = 0x10;
e2e7d624 6103 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6104 * GPIO3 Low = DRM
87d48363 6105 */
4fe5195c 6106 spec->gpio_data = 0x01;
ae0a8ed8 6107 break;
b2c4f4d7
MR
6108 case STAC_9205_REF:
6109 /* SPDIF-In enabled */
6110 break;
ae0a8ed8
TD
6111 default:
6112 /* GPIO0 High = EAPD */
0fc9dec4 6113 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6114 spec->gpio_data = 0x01;
ae0a8ed8
TD
6115 break;
6116 }
33382403 6117
f3302a59 6118 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI
6119 if (!err) {
6120 if (spec->board_config < 0) {
6121 printk(KERN_WARNING "hda_codec: No auto-config is "
6122 "available, default to model=ref\n");
6123 spec->board_config = STAC_9205_REF;
6124 goto again;
6125 }
6126 err = -EINVAL;
6127 }
f3302a59
MP
6128 if (err < 0) {
6129 stac92xx_free(codec);
6130 return err;
6131 }
6132
6133 codec->patch_ops = stac92xx_patch_ops;
6134
2d34e1b3
TI
6135 codec->proc_widget_hook = stac9205_proc_hook;
6136
f3302a59
MP
6137 return 0;
6138}
6139
db064e50 6140/*
6d859065 6141 * STAC9872 hack
db064e50
TI
6142 */
6143
1e137f92 6144static struct hda_verb stac9872_core_init[] = {
1624cb9a 6145 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM
6146 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6147 {}
6148};
6149
caa10b6e
TI
6150static hda_nid_t stac9872_pin_nids[] = {
6151 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6152 0x11, 0x13, 0x14,
6153};
6154
6155static hda_nid_t stac9872_adc_nids[] = {
6156 0x8 /*,0x6*/
6157};
6158
6159static hda_nid_t stac9872_mux_nids[] = {
6160 0x15
6161};
6162
6479c631
TI
6163static unsigned long stac9872_capvols[] = {
6164 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6165};
6166#define stac9872_capsws stac9872_capvols
6167
307282c8
TI
6168static unsigned int stac9872_vaio_pin_configs[9] = {
6169 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6170 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6171 0x90a7013e
6172};
6173
6174static const char *stac9872_models[STAC_9872_MODELS] = {
6175 [STAC_9872_AUTO] = "auto",
6176 [STAC_9872_VAIO] = "vaio",
6177};
6178
6179static unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
6180 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6181};
6182
6183static struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI
6184 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6185 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI
6186 {} /* terminator */
6187};
6188
6d859065 6189static int patch_stac9872(struct hda_codec *codec)
db064e50
TI
6190{
6191 struct sigmatel_spec *spec;
1e137f92 6192 int err;
db064e50 6193
db064e50
TI
6194 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6195 if (spec == NULL)
6196 return -ENOMEM;
a252c81a 6197 codec->no_trigger_sense = 1;
db064e50 6198 codec->spec = spec;
1b0e372d 6199 spec->linear_tone_beep = 1;
b04add95
TI
6200 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
6201 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI
6202
6203 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6204 stac9872_models,
6205 stac9872_cfg_tbl);
307282c8 6206 if (spec->board_config < 0)
9a11f1aa
TI
6207 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6208 codec->chip_name);
307282c8
TI
6209 else
6210 stac92xx_set_config_regs(codec,
6211 stac9872_brd_tbl[spec->board_config]);
db064e50 6212
1e137f92
TI
6213 spec->multiout.dac_nids = spec->dac_nids;
6214 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6215 spec->adc_nids = stac9872_adc_nids;
6216 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6217 spec->mux_nids = stac9872_mux_nids;
1e137f92 6218 spec->init = stac9872_core_init;
6479c631
TI
6219 spec->num_caps = 1;
6220 spec->capvols = stac9872_capvols;
6221 spec->capsws = stac9872_capsws;
1e137f92
TI
6222
6223 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
6224 if (err < 0) {
6225 stac92xx_free(codec);
6226 return -EINVAL;
6227 }
6228 spec->input_mux = &spec->private_imux;
6229 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI
6230 return 0;
6231}
6232
6233
2f2f4251
M
6234/*
6235 * patch entries
6236 */
1289e9e8 6237static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M
6238 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6239 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6240 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6241 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6242 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6243 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6244 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP
6245 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6246 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6247 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6248 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6249 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6250 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP
6251 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6252 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6253 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6254 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6255 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6256 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6257 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6258 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6259 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6260 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD
6261 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6262 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6263 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6264 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6265 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6266 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI
6267 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6268 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM
6269 /* The following does not take into account .id=0x83847661 when subsys =
6270 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6271 * currently not fully supported.
6272 */
6273 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6274 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6275 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6276 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP
6277 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6278 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6279 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6280 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6281 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6282 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6283 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6284 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6285 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6286 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6287 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6288 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6289 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC
6290 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6291 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC
6292 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6293 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6294 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6295 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6296 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR
6297 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6298 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6299 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR
6300 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6301 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6302 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6303 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6304 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6305 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6306 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6307 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC
6308 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6309 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6310 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6311 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6312 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6313 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6314 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6315 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6316 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6317 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6318 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6319 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6320 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6321 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6322 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
2f2f4251
M
6323 {} /* terminator */
6324};
1289e9e8
TI
6325
6326MODULE_ALIAS("snd-hda-codec-id:8384*");
6327MODULE_ALIAS("snd-hda-codec-id:111d*");
6328
6329MODULE_LICENSE("GPL");
6330MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6331
6332static struct hda_codec_preset_list sigmatel_list = {
6333 .preset = snd_hda_preset_sigmatel,
6334 .owner = THIS_MODULE,
6335};
6336
6337static int __init patch_sigmatel_init(void)
6338{
6339 return snd_hda_add_codec_preset(&sigmatel_list);
6340}
6341
6342static void __exit patch_sigmatel_exit(void)
6343{
6344 snd_hda_delete_codec_preset(&sigmatel_list);
6345}
6346
6347module_init(patch_sigmatel_init)
6348module_exit(patch_sigmatel_exit)