[net-next-2.6.git] / drivers / staging / dream / camera / mt9p012_reg.c

/*
 * Copyright (C) 2009 QUALCOMM Incorporated.
 */

#include "mt9p012.h"
#include <linux/kernel.h>

/*Micron settings from Applications for lower power consumption.*/
struct reg_struct mt9p012_reg_pat[2] = {
	{ /* Preview */
		/* vt_pix_clk_div          REG=0x0300 */
		6,  /* 5 */

		/* vt_sys_clk_div          REG=0x0302 */
		1,

		/* pre_pll_clk_div         REG=0x0304 */
		2,

		/* pll_multiplier          REG=0x0306 */
		60,

		/* op_pix_clk_div          REG=0x0308 */
		8,  /* 10 */

		/* op_sys_clk_div          REG=0x030A */
		1,

		/* scale_m                 REG=0x0404 */
		16,

		/* row_speed               REG=0x3016 */
		0x0111,

		/* x_addr_start            REG=0x3004 */
		8,

		/* x_addr_end              REG=0x3008 */
		2597,

		/* y_addr_start            REG=0x3002 */
		8,

		/* y_addr_end              REG=0x3006 */
		1949,

		/* read_mode               REG=0x3040
		 * Preview 2x2 skipping */
		0x00C3,

		/* x_output_size           REG=0x034C */
		1296,

		/* y_output_size           REG=0x034E */
		972,

		/* line_length_pck         REG=0x300C */
		3784,

		/* frame_length_lines      REG=0x300A */
		1057,

		/* coarse_integration_time REG=0x3012 */
		16,

		/* fine_integration_time   REG=0x3014 */
		1764
	},
	{ /*Snapshot*/
		/* vt_pix_clk_div          REG=0x0300 */
		6,

		/* vt_sys_clk_div          REG=0x0302 */
		1,

		/* pre_pll_clk_div         REG=0x0304 */
		2,

		/* pll_multiplier          REG=0x0306
		 * 60 for 10fps snapshot */
		60,

		/* op_pix_clk_div          REG=0x0308 */
		8,

		/* op_sys_clk_div          REG=0x030A */
		1,

		/* scale_m                 REG=0x0404 */
		16,

		/* row_speed               REG=0x3016 */
		0x0111,

		/* x_addr_start            REG=0x3004 */
		8,

		/* x_addr_end              REG=0x3008 */
		2615,

		/* y_addr_start            REG=0x3002 */
		8,

		/* y_addr_end              REG=0x3006 */
		1967,

		/* read_mode               REG=0x3040 */
		0x0041,

		/* x_output_size           REG=0x034C */
		2608,

		/* y_output_size           REG=0x034E */
		1960,

		/* line_length_pck         REG=0x300C */
		3911,

		/* frame_length_lines      REG=0x300A //10 fps snapshot */
		2045,

		/* coarse_integration_time REG=0x3012 */
		16,

		/* fine_integration_time   REG=0x3014 */
		882
	}
};


struct mt9p012_i2c_reg_conf mt9p012_test_tbl[] = {
	{0x3044, 0x0544 & 0xFBFF},
	{0x30CA, 0x0004 | 0x0001},
	{0x30D4, 0x9020 & 0x7FFF},
	{0x31E0, 0x0003 & 0xFFFE},
	{0x3180, 0x91FF & 0x7FFF},
	{0x301A, (0x10CC | 0x8000) & 0xFFF7},
	{0x301E, 0x0000},
	{0x3780, 0x0000},
};


struct mt9p012_i2c_reg_conf mt9p012_lc_tbl[] = {
	/* [Lens shading 85 Percent TL84] */
	/* P_RD_P0Q0 */
	{0x360A, 0x7FEF},
	/* P_RD_P0Q1 */
	{0x360C, 0x232C},
	/* P_RD_P0Q2 */
	{0x360E, 0x7050},
	/* P_RD_P0Q3 */
	{0x3610, 0xF3CC},
	/* P_RD_P0Q4 */
	{0x3612, 0x89D1},
	/* P_RD_P1Q0 */
	{0x364A, 0xBE0D},
	/* P_RD_P1Q1 */
	{0x364C, 0x9ACB},
	/* P_RD_P1Q2 */
	{0x364E, 0x2150},
	/* P_RD_P1Q3 */
	{0x3650, 0xB26B},
	/* P_RD_P1Q4 */
	{0x3652, 0x9511},
	/* P_RD_P2Q0 */
	{0x368A, 0x2151},
	/* P_RD_P2Q1 */
	{0x368C, 0x00AD},
	/* P_RD_P2Q2 */
	{0x368E, 0x8334},
	/* P_RD_P2Q3 */
	{0x3690, 0x478E},
	/* P_RD_P2Q4 */
	{0x3692, 0x0515},
	/* P_RD_P3Q0 */
	{0x36CA, 0x0710},
	/* P_RD_P3Q1 */
	{0x36CC, 0x452D},
	/* P_RD_P3Q2 */
	{0x36CE, 0xF352},
	/* P_RD_P3Q3 */
	{0x36D0, 0x190F},
	/* P_RD_P3Q4 */
	{0x36D2, 0x4413},
	/* P_RD_P4Q0 */
	{0x370A, 0xD112},
	/* P_RD_P4Q1 */
	{0x370C, 0xF50F},
	/* P_RD_P4Q2 */
	{0x370C, 0xF50F},
	/* P_RD_P4Q3 */
	{0x3710, 0xDC11},
	/* P_RD_P4Q4 */
	{0x3712, 0xD776},
	/* P_GR_P0Q0 */
	{0x3600, 0x1750},
	/* P_GR_P0Q1 */
	{0x3602, 0xF0AC},
	/* P_GR_P0Q2 */
	{0x3604, 0x4711},
	/* P_GR_P0Q3 */
	{0x3606, 0x07CE},
	/* P_GR_P0Q4 */
	{0x3608, 0x96B2},
	/* P_GR_P1Q0 */
	{0x3640, 0xA9AE},
	/* P_GR_P1Q1 */
	{0x3642, 0xF9AC},
	/* P_GR_P1Q2 */
	{0x3644, 0x39F1},
	/* P_GR_P1Q3 */
	{0x3646, 0x016F},
	/* P_GR_P1Q4 */
	{0x3648, 0x8AB2},
	/* P_GR_P2Q0 */
	{0x3680, 0x1752},
	/* P_GR_P2Q1 */
	{0x3682, 0x70F0},
	/* P_GR_P2Q2 */
	{0x3684, 0x83F5},
	/* P_GR_P2Q3 */
	{0x3686, 0x8392},
	/* P_GR_P2Q4 */
	{0x3688, 0x1FD6},
	/* P_GR_P3Q0 */
	{0x36C0, 0x1131},
	/* P_GR_P3Q1 */
	{0x36C2, 0x3DAF},
	/* P_GR_P3Q2 */
	{0x36C4, 0x89B4},
	/* P_GR_P3Q3 */
	{0x36C6, 0xA391},
	/* P_GR_P3Q4 */
	{0x36C8, 0x1334},
	/* P_GR_P4Q0 */
	{0x3700, 0xDC13},
	/* P_GR_P4Q1 */
	{0x3702, 0xD052},
	/* P_GR_P4Q2 */
	{0x3704, 0x5156},
	/* P_GR_P4Q3 */
	{0x3706, 0x1F13},
	/* P_GR_P4Q4 */
	{0x3708, 0x8C38},
	/* P_BL_P0Q0 */
	{0x3614, 0x0050},
	/* P_BL_P0Q1 */
	{0x3616, 0xBD4C},
	/* P_BL_P0Q2 */
	{0x3618, 0x41B0},
	/* P_BL_P0Q3 */
	{0x361A, 0x660D},
	/* P_BL_P0Q4 */
	{0x361C, 0xC590},
	/* P_BL_P1Q0 */
	{0x3654, 0x87EC},
	/* P_BL_P1Q1 */
	{0x3656, 0xE44C},
	/* P_BL_P1Q2 */
	{0x3658, 0x302E},
	/* P_BL_P1Q3 */
	{0x365A, 0x106E},
	/* P_BL_P1Q4 */
	{0x365C, 0xB58E},
	/* P_BL_P2Q0 */
	{0x3694, 0x0DD1},
	/* P_BL_P2Q1 */
	{0x3696, 0x2A50},
	/* P_BL_P2Q2 */
	{0x3698, 0xC793},
	/* P_BL_P2Q3 */
	{0x369A, 0xE8F1},
	/* P_BL_P2Q4 */
	{0x369C, 0x4174},
	/* P_BL_P3Q0 */
	{0x36D4, 0x01EF},
	/* P_BL_P3Q1 */
	{0x36D6, 0x06CF},
	/* P_BL_P3Q2 */
	{0x36D8, 0x8D91},
	/* P_BL_P3Q3 */
	{0x36DA, 0x91F0},
	/* P_BL_P3Q4 */
	{0x36DC, 0x52EF},
	/* P_BL_P4Q0 */
	{0x3714, 0xA6D2},
	/* P_BL_P4Q1 */
	{0x3716, 0xA312},
	/* P_BL_P4Q2 */
	{0x3718, 0x2695},
	/* P_BL_P4Q3 */
	{0x371A, 0x3953},
	/* P_BL_P4Q4 */
	{0x371C, 0x9356},
	/* P_GB_P0Q0 */
	{0x361E, 0x7EAF},
	/* P_GB_P0Q1 */
	{0x3620, 0x2A4C},
	/* P_GB_P0Q2 */
	{0x3622, 0x49F0},
	{0x3624, 0xF1EC},
	/* P_GB_P0Q4 */
	{0x3626, 0xC670},
	/* P_GB_P1Q0 */
	{0x365E, 0x8E0C},
	/* P_GB_P1Q1 */
	{0x3660, 0xC2A9},
	/* P_GB_P1Q2 */
	{0x3662, 0x274F},
	/* P_GB_P1Q3 */
	{0x3664, 0xADAB},
	/* P_GB_P1Q4 */
	{0x3666, 0x8EF0},
	/* P_GB_P2Q0 */
	{0x369E, 0x09B1},
	/* P_GB_P2Q1 */
	{0x36A0, 0xAA2E},
	/* P_GB_P2Q2 */
	{0x36A2, 0xC3D3},
	/* P_GB_P2Q3 */
	{0x36A4, 0x7FAF},
	/* P_GB_P2Q4 */
	{0x36A6, 0x3F34},
	/* P_GB_P3Q0 */
	{0x36DE, 0x4C8F},
	/* P_GB_P3Q1 */
	{0x36E0, 0x886E},
	/* P_GB_P3Q2 */
	{0x36E2, 0xE831},
	/* P_GB_P3Q3 */
	{0x36E4, 0x1FD0},
	/* P_GB_P3Q4 */
	{0x36E6, 0x1192},
	/* P_GB_P4Q0 */
	{0x371E, 0xB952},
	/* P_GB_P4Q1 */
	{0x3720, 0x6DCF},
	/* P_GB_P4Q2 */
	{0x3722, 0x1B55},
	/* P_GB_P4Q3 */
	{0x3724, 0xA112},
	/* P_GB_P4Q4 */
	{0x3726, 0x82F6},
	/* POLY_ORIGIN_C */
	{0x3782, 0x0510},
	/* POLY_ORIGIN_R  */
	{0x3784, 0x0390},
	/* POLY_SC_ENABLE */
	{0x3780, 0x8000},
};

/* rolloff table for illuminant A */
struct mt9p012_i2c_reg_conf mt9p012_rolloff_tbl[] = {
	/* P_RD_P0Q0 */
	{0x360A, 0x7FEF},
	/* P_RD_P0Q1 */
	{0x360C, 0x232C},
	/* P_RD_P0Q2 */
	{0x360E, 0x7050},
	/* P_RD_P0Q3 */
	{0x3610, 0xF3CC},
	/* P_RD_P0Q4 */
	{0x3612, 0x89D1},
	/* P_RD_P1Q0 */
	{0x364A, 0xBE0D},
	/* P_RD_P1Q1 */
	{0x364C, 0x9ACB},
	/* P_RD_P1Q2 */
	{0x364E, 0x2150},
	/* P_RD_P1Q3 */
	{0x3650, 0xB26B},
	/* P_RD_P1Q4 */
	{0x3652, 0x9511},
	/* P_RD_P2Q0 */
	{0x368A, 0x2151},
	/* P_RD_P2Q1 */
	{0x368C, 0x00AD},
	/* P_RD_P2Q2 */
	{0x368E, 0x8334},
	/* P_RD_P2Q3 */
	{0x3690, 0x478E},
	/* P_RD_P2Q4 */
	{0x3692, 0x0515},
	/* P_RD_P3Q0 */
	{0x36CA, 0x0710},
	/* P_RD_P3Q1 */
	{0x36CC, 0x452D},
	/* P_RD_P3Q2 */
	{0x36CE, 0xF352},
	/* P_RD_P3Q3 */
	{0x36D0, 0x190F},
	/* P_RD_P3Q4 */
	{0x36D2, 0x4413},
	/* P_RD_P4Q0 */
	{0x370A, 0xD112},
	/* P_RD_P4Q1 */
	{0x370C, 0xF50F},
	/* P_RD_P4Q2 */
	{0x370E, 0x6375},
	/* P_RD_P4Q3 */
	{0x3710, 0xDC11},
	/* P_RD_P4Q4 */
	{0x3712, 0xD776},
	/* P_GR_P0Q0 */
	{0x3600, 0x1750},
	/* P_GR_P0Q1 */
	{0x3602, 0xF0AC},
	/* P_GR_P0Q2 */
	{0x3604, 0x4711},
	/* P_GR_P0Q3 */
	{0x3606, 0x07CE},
	/* P_GR_P0Q4 */
	{0x3608, 0x96B2},
	/* P_GR_P1Q0 */
	{0x3640, 0xA9AE},
	/* P_GR_P1Q1 */
	{0x3642, 0xF9AC},
	/* P_GR_P1Q2 */
	{0x3644, 0x39F1},
	/* P_GR_P1Q3 */
	{0x3646, 0x016F},
	/* P_GR_P1Q4 */
	{0x3648, 0x8AB2},
	/* P_GR_P2Q0 */
	{0x3680, 0x1752},
	/* P_GR_P2Q1 */
	{0x3682, 0x70F0},
	/* P_GR_P2Q2 */
	{0x3684, 0x83F5},
	/* P_GR_P2Q3 */
	{0x3686, 0x8392},
	/* P_GR_P2Q4 */
	{0x3688, 0x1FD6},
	/* P_GR_P3Q0 */
	{0x36C0, 0x1131},
	/* P_GR_P3Q1 */
	{0x36C2, 0x3DAF},
	/* P_GR_P3Q2 */
	{0x36C4, 0x89B4},
	/* P_GR_P3Q3 */
	{0x36C6, 0xA391},
	/* P_GR_P3Q4 */
	{0x36C8, 0x1334},
	/* P_GR_P4Q0 */
	{0x3700, 0xDC13},
	/* P_GR_P4Q1 */
	{0x3702, 0xD052},
	/* P_GR_P4Q2 */
	{0x3704, 0x5156},
	/* P_GR_P4Q3 */
	{0x3706, 0x1F13},
	/* P_GR_P4Q4 */
	{0x3708, 0x8C38},
	/* P_BL_P0Q0 */
	{0x3614, 0x0050},
	/* P_BL_P0Q1 */
	{0x3616, 0xBD4C},
	/* P_BL_P0Q2 */
	{0x3618, 0x41B0},
	/* P_BL_P0Q3 */
	{0x361A, 0x660D},
	/* P_BL_P0Q4 */
	{0x361C, 0xC590},
	/* P_BL_P1Q0 */
	{0x3654, 0x87EC},
	/* P_BL_P1Q1 */
	{0x3656, 0xE44C},
	/* P_BL_P1Q2 */
	{0x3658, 0x302E},
	/* P_BL_P1Q3 */
	{0x365A, 0x106E},
	/* P_BL_P1Q4 */
	{0x365C, 0xB58E},
	/* P_BL_P2Q0 */
	{0x3694, 0x0DD1},
	/* P_BL_P2Q1 */
	{0x3696, 0x2A50},
	/* P_BL_P2Q2 */
	{0x3698, 0xC793},
	/* P_BL_P2Q3 */
	{0x369A, 0xE8F1},
	/* P_BL_P2Q4 */
	{0x369C, 0x4174},
	/* P_BL_P3Q0 */
	{0x36D4, 0x01EF},
	/* P_BL_P3Q1 */
	{0x36D6, 0x06CF},
	/* P_BL_P3Q2 */
	{0x36D8, 0x8D91},
	/* P_BL_P3Q3 */
	{0x36DA, 0x91F0},
	/* P_BL_P3Q4 */
	{0x36DC, 0x52EF},
	/* P_BL_P4Q0 */
	{0x3714, 0xA6D2},
	/* P_BL_P4Q1 */
	{0x3716, 0xA312},
	/* P_BL_P4Q2 */
	{0x3718, 0x2695},
	/* P_BL_P4Q3 */
	{0x371A, 0x3953},
	/* P_BL_P4Q4 */
	{0x371C, 0x9356},
	/* P_GB_P0Q0 */
	{0x361E, 0x7EAF},
	/* P_GB_P0Q1 */
	{0x3620, 0x2A4C},
	/* P_GB_P0Q2 */
	{0x3622, 0x49F0},
	{0x3624, 0xF1EC},
	/* P_GB_P0Q4 */
	{0x3626, 0xC670},
	/* P_GB_P1Q0 */
	{0x365E, 0x8E0C},
	/* P_GB_P1Q1 */
	{0x3660, 0xC2A9},
	/* P_GB_P1Q2 */
	{0x3662, 0x274F},
	/* P_GB_P1Q3 */
	{0x3664, 0xADAB},
	/* P_GB_P1Q4 */
	{0x3666, 0x8EF0},
	/* P_GB_P2Q0 */
	{0x369E, 0x09B1},
	/* P_GB_P2Q1 */
	{0x36A0, 0xAA2E},
	/* P_GB_P2Q2 */
	{0x36A2, 0xC3D3},
	/* P_GB_P2Q3 */
	{0x36A4, 0x7FAF},
	/* P_GB_P2Q4 */
	{0x36A6, 0x3F34},
	/* P_GB_P3Q0 */
	{0x36DE, 0x4C8F},
	/* P_GB_P3Q1 */
	{0x36E0, 0x886E},
	/* P_GB_P3Q2 */
	{0x36E2, 0xE831},
	/* P_GB_P3Q3 */
	{0x36E4, 0x1FD0},
	/* P_GB_P3Q4 */
	{0x36E6, 0x1192},
	/* P_GB_P4Q0 */
	{0x371E, 0xB952},
	/* P_GB_P4Q1 */
	{0x3720, 0x6DCF},
	/* P_GB_P4Q2 */
	{0x3722, 0x1B55},
	/* P_GB_P4Q3 */
	{0x3724, 0xA112},
	/* P_GB_P4Q4 */
	{0x3726, 0x82F6},
	/* POLY_ORIGIN_C */
	{0x3782, 0x0510},
	/* POLY_ORIGIN_R  */
	{0x3784, 0x0390},
	/* POLY_SC_ENABLE */
	{0x3780, 0x8000},
};


struct mt9p012_reg mt9p012_regs = {
	.reg_pat = &mt9p012_reg_pat[0],
	.reg_pat_size = ARRAY_SIZE(mt9p012_reg_pat),
	.ttbl = &mt9p012_test_tbl[0],
	.ttbl_size = ARRAY_SIZE(mt9p012_test_tbl),
	.lctbl = &mt9p012_lc_tbl[0],
	.lctbl_size = ARRAY_SIZE(mt9p012_lc_tbl),
	.rftbl = &mt9p012_rolloff_tbl[0],
	.rftbl_size = ARRAY_SIZE(mt9p012_rolloff_tbl)
};
Commit	Line	Data
eb7b797b BS	1	/*
	2	* Copyright (C) 2009 QUALCOMM Incorporated.
	3	*/
	4
	5	#include "mt9p012.h"
	6	#include <linux/kernel.h>
	7
	8	/Micron settings from Applications for lower power consumption./
	9	struct reg_struct mt9p012_reg_pat[2] = {
	10	{ /* Preview */
	11	/* vt_pix_clk_div REG=0x0300 */
	12	6, /* 5 */
	13
	14	/* vt_sys_clk_div REG=0x0302 */
	15	1,
	16
	17	/* pre_pll_clk_div REG=0x0304 */
	18	2,
	19
	20	/* pll_multiplier REG=0x0306 */
	21	60,
	22
	23	/* op_pix_clk_div REG=0x0308 */
	24	8, /* 10 */
	25
	26	/* op_sys_clk_div REG=0x030A */
	27	1,
	28
	29	/* scale_m REG=0x0404 */
	30	16,
	31
	32	/* row_speed REG=0x3016 */
	33	0x0111,
	34
	35	/* x_addr_start REG=0x3004 */
	36	8,
	37
	38	/* x_addr_end REG=0x3008 */
	39	2597,
	40
	41	/* y_addr_start REG=0x3002 */
	42	8,
	43
	44	/* y_addr_end REG=0x3006 */
	45	1949,
	46
	47	/* read_mode REG=0x3040
	48	* Preview 2x2 skipping */
	49	0x00C3,
	50
	51	/* x_output_size REG=0x034C */
	52	1296,
	53
	54	/* y_output_size REG=0x034E */
	55	972,
	56
	57	/* line_length_pck REG=0x300C */
	58	3784,
	59
	60	/* frame_length_lines REG=0x300A */
	61	1057,
	62
	63	/* coarse_integration_time REG=0x3012 */
	64	16,
65
66	/* fine_integration_time REG=0x3014 */
67	1764
68	},
69	{ /Snapshot/
70	/* vt_pix_clk_div REG=0x0300 */
71	6,
72
73	/* vt_sys_clk_div REG=0x0302 */
74	1,
75
76	/* pre_pll_clk_div REG=0x0304 */
77	2,
78
79	/* pll_multiplier REG=0x0306
80	* 60 for 10fps snapshot */
81	60,
82
83	/* op_pix_clk_div REG=0x0308 */
84	8,
85
86	/* op_sys_clk_div REG=0x030A */
87	1,
88
89	/* scale_m REG=0x0404 */
90	16,
91
92	/* row_speed REG=0x3016 */
93	0x0111,
94
95	/* x_addr_start REG=0x3004 */
96	8,
97
98	/* x_addr_end REG=0x3008 */
99	2615,
100
101	/* y_addr_start REG=0x3002 */
102	8,
103
104	/* y_addr_end REG=0x3006 */
105	1967,
106
107	/* read_mode REG=0x3040 */
108	0x0041,
109
110	/* x_output_size REG=0x034C */
111	2608,
112
113	/* y_output_size REG=0x034E */
114	1960,
115
116	/* line_length_pck REG=0x300C */
117	3911,
118
119	/* frame_length_lines REG=0x300A //10 fps snapshot */
120	2045,
121
122	/* coarse_integration_time REG=0x3012 */
123	16,
124
125	/* fine_integration_time REG=0x3014 */
126	882
127	}
128	};
129
130
131	struct mt9p012_i2c_reg_conf mt9p012_test_tbl[] = {
132	{0x3044, 0x0544 & 0xFBFF},
133	{0x30CA, 0x0004 \| 0x0001},
134	{0x30D4, 0x9020 & 0x7FFF},
135	{0x31E0, 0x0003 & 0xFFFE},
136	{0x3180, 0x91FF & 0x7FFF},
137	{0x301A, (0x10CC \| 0x8000) & 0xFFF7},
138	{0x301E, 0x0000},
139	{0x3780, 0x0000},
140	};
141
142
143	struct mt9p012_i2c_reg_conf mt9p012_lc_tbl[] = {
144	/* [Lens shading 85 Percent TL84] */
145	/* P_RD_P0Q0 */
146	{0x360A, 0x7FEF},
147	/* P_RD_P0Q1 */
148	{0x360C, 0x232C},
149	/* P_RD_P0Q2 */
150	{0x360E, 0x7050},
151	/* P_RD_P0Q3 */
152	{0x3610, 0xF3CC},
153	/* P_RD_P0Q4 */
154	{0x3612, 0x89D1},
155	/* P_RD_P1Q0 */
156	{0x364A, 0xBE0D},
157	/* P_RD_P1Q1 */
158	{0x364C, 0x9ACB},
159	/* P_RD_P1Q2 */
160	{0x364E, 0x2150},
161	/* P_RD_P1Q3 */
162	{0x3650, 0xB26B},
163	/* P_RD_P1Q4 */
164	{0x3652, 0x9511},
165	/* P_RD_P2Q0 */
166	{0x368A, 0x2151},
167	/* P_RD_P2Q1 */
168	{0x368C, 0x00AD},
169	/* P_RD_P2Q2 */
170	{0x368E, 0x8334},
171	/* P_RD_P2Q3 */
172	{0x3690, 0x478E},
173	/* P_RD_P2Q4 */
174	{0x3692, 0x0515},
175	/* P_RD_P3Q0 */
176	{0x36CA, 0x0710},
177	/* P_RD_P3Q1 */
178	{0x36CC, 0x452D},
179	/* P_RD_P3Q2 */
180	{0x36CE, 0xF352},
181	/* P_RD_P3Q3 */
182	{0x36D0, 0x190F},
183	/* P_RD_P3Q4 */
184	{0x36D2, 0x4413},
185	/* P_RD_P4Q0 */
186	{0x370A, 0xD112},
187	/* P_RD_P4Q1 */
188	{0x370C, 0xF50F},
189	/* P_RD_P4Q2 */
190	{0x370C, 0xF50F},
191	/* P_RD_P4Q3 */
192	{0x3710, 0xDC11},
193	/* P_RD_P4Q4 */
194	{0x3712, 0xD776},
195	/* P_GR_P0Q0 */
196	{0x3600, 0x1750},
197	/* P_GR_P0Q1 */
198	{0x3602, 0xF0AC},
199	/* P_GR_P0Q2 */
200	{0x3604, 0x4711},
201	/* P_GR_P0Q3 */
202	{0x3606, 0x07CE},
203	/* P_GR_P0Q4 */
204	{0x3608, 0x96B2},
205	/* P_GR_P1Q0 */
206	{0x3640, 0xA9AE},
207	/* P_GR_P1Q1 */
208	{0x3642, 0xF9AC},
209	/* P_GR_P1Q2 */
210	{0x3644, 0x39F1},
211	/* P_GR_P1Q3 */
212	{0x3646, 0x016F},
213	/* P_GR_P1Q4 */
214	{0x3648, 0x8AB2},
215	/* P_GR_P2Q0 */
216	{0x3680, 0x1752},
217	/* P_GR_P2Q1 */
218	{0x3682, 0x70F0},
219	/* P_GR_P2Q2 */
220	{0x3684, 0x83F5},
221	/* P_GR_P2Q3 */
222	{0x3686, 0x8392},
223	/* P_GR_P2Q4 */
224	{0x3688, 0x1FD6},
225	/* P_GR_P3Q0 */
226	{0x36C0, 0x1131},
227	/* P_GR_P3Q1 */
228	{0x36C2, 0x3DAF},
229	/* P_GR_P3Q2 */
230	{0x36C4, 0x89B4},
231	/* P_GR_P3Q3 */
232	{0x36C6, 0xA391},
233	/* P_GR_P3Q4 */
234	{0x36C8, 0x1334},
235	/* P_GR_P4Q0 */
236	{0x3700, 0xDC13},
237	/* P_GR_P4Q1 */
238	{0x3702, 0xD052},
239	/* P_GR_P4Q2 */
240	{0x3704, 0x5156},
241	/* P_GR_P4Q3 */
242	{0x3706, 0x1F13},
243	/* P_GR_P4Q4 */
244	{0x3708, 0x8C38},
245	/* P_BL_P0Q0 */
246	{0x3614, 0x0050},
247	/* P_BL_P0Q1 */
248	{0x3616, 0xBD4C},
249	/* P_BL_P0Q2 */
250	{0x3618, 0x41B0},
251	/* P_BL_P0Q3 */
252	{0x361A, 0x660D},
253	/* P_BL_P0Q4 */
254	{0x361C, 0xC590},
255	/* P_BL_P1Q0 */
256	{0x3654, 0x87EC},
257	/* P_BL_P1Q1 */
258	{0x3656, 0xE44C},
259	/* P_BL_P1Q2 */
260	{0x3658, 0x302E},
261	/* P_BL_P1Q3 */
262	{0x365A, 0x106E},
263	/* P_BL_P1Q4 */
264	{0x365C, 0xB58E},
265	/* P_BL_P2Q0 */
266	{0x3694, 0x0DD1},
267	/* P_BL_P2Q1 */
268	{0x3696, 0x2A50},
269	/* P_BL_P2Q2 */
270	{0x3698, 0xC793},
271	/* P_BL_P2Q3 */
272	{0x369A, 0xE8F1},
273	/* P_BL_P2Q4 */
274	{0x369C, 0x4174},
275	/* P_BL_P3Q0 */
276	{0x36D4, 0x01EF},
277	/* P_BL_P3Q1 */
278	{0x36D6, 0x06CF},
279	/* P_BL_P3Q2 */
280	{0x36D8, 0x8D91},
281	/* P_BL_P3Q3 */
282	{0x36DA, 0x91F0},
283	/* P_BL_P3Q4 */
284	{0x36DC, 0x52EF},
285	/* P_BL_P4Q0 */
286	{0x3714, 0xA6D2},
287	/* P_BL_P4Q1 */
288	{0x3716, 0xA312},
289	/* P_BL_P4Q2 */
290	{0x3718, 0x2695},
291	/* P_BL_P4Q3 */
292	{0x371A, 0x3953},
293	/* P_BL_P4Q4 */
294	{0x371C, 0x9356},
295	/* P_GB_P0Q0 */
296	{0x361E, 0x7EAF},
297	/* P_GB_P0Q1 */
298	{0x3620, 0x2A4C},
299	/* P_GB_P0Q2 */
300	{0x3622, 0x49F0},
301	{0x3624, 0xF1EC},
302	/* P_GB_P0Q4 */
303	{0x3626, 0xC670},
304	/* P_GB_P1Q0 */
305	{0x365E, 0x8E0C},
306	/* P_GB_P1Q1 */
307	{0x3660, 0xC2A9},
308	/* P_GB_P1Q2 */
309	{0x3662, 0x274F},
310	/* P_GB_P1Q3 */
311	{0x3664, 0xADAB},
312	/* P_GB_P1Q4 */
313	{0x3666, 0x8EF0},
314	/* P_GB_P2Q0 */
315	{0x369E, 0x09B1},
316	/* P_GB_P2Q1 */
317	{0x36A0, 0xAA2E},
318	/* P_GB_P2Q2 */
319	{0x36A2, 0xC3D3},
320	/* P_GB_P2Q3 */
321	{0x36A4, 0x7FAF},
322	/* P_GB_P2Q4 */
323	{0x36A6, 0x3F34},
324	/* P_GB_P3Q0 */
325	{0x36DE, 0x4C8F},
326	/* P_GB_P3Q1 */
327	{0x36E0, 0x886E},
328	/* P_GB_P3Q2 */
329	{0x36E2, 0xE831},
330	/* P_GB_P3Q3 */
331	{0x36E4, 0x1FD0},
332	/* P_GB_P3Q4 */
333	{0x36E6, 0x1192},
334	/* P_GB_P4Q0 */
335	{0x371E, 0xB952},
336	/* P_GB_P4Q1 */
337	{0x3720, 0x6DCF},
338	/* P_GB_P4Q2 */
339	{0x3722, 0x1B55},
340	/* P_GB_P4Q3 */
341	{0x3724, 0xA112},
342	/* P_GB_P4Q4 */
343	{0x3726, 0x82F6},
344	/* POLY_ORIGIN_C */
345	{0x3782, 0x0510},
346	/* POLY_ORIGIN_R */
347	{0x3784, 0x0390},
348	/* POLY_SC_ENABLE */
349	{0x3780, 0x8000},
350	};
351
352	/* rolloff table for illuminant A */
353	struct mt9p012_i2c_reg_conf mt9p012_rolloff_tbl[] = {
354	/* P_RD_P0Q0 */
355	{0x360A, 0x7FEF},
356	/* P_RD_P0Q1 */
357	{0x360C, 0x232C},
358	/* P_RD_P0Q2 */
359	{0x360E, 0x7050},
360	/* P_RD_P0Q3 */
361	{0x3610, 0xF3CC},
362	/* P_RD_P0Q4 */
363	{0x3612, 0x89D1},
364	/* P_RD_P1Q0 */
365	{0x364A, 0xBE0D},
366	/* P_RD_P1Q1 */
367	{0x364C, 0x9ACB},
368	/* P_RD_P1Q2 */
369	{0x364E, 0x2150},
370	/* P_RD_P1Q3 */
371	{0x3650, 0xB26B},
372	/* P_RD_P1Q4 */
373	{0x3652, 0x9511},
374	/* P_RD_P2Q0 */
375	{0x368A, 0x2151},
376	/* P_RD_P2Q1 */
377	{0x368C, 0x00AD},
378	/* P_RD_P2Q2 */
379	{0x368E, 0x8334},
380	/* P_RD_P2Q3 */
381	{0x3690, 0x478E},
382	/* P_RD_P2Q4 */
383	{0x3692, 0x0515},
384	/* P_RD_P3Q0 */
385	{0x36CA, 0x0710},
386	/* P_RD_P3Q1 */
387	{0x36CC, 0x452D},
388	/* P_RD_P3Q2 */
389	{0x36CE, 0xF352},
390	/* P_RD_P3Q3 */
391	{0x36D0, 0x190F},
392	/* P_RD_P3Q4 */
393	{0x36D2, 0x4413},
394	/* P_RD_P4Q0 */
395	{0x370A, 0xD112},
396	/* P_RD_P4Q1 */
397	{0x370C, 0xF50F},
398	/* P_RD_P4Q2 */
399	{0x370E, 0x6375},
400	/* P_RD_P4Q3 */
401	{0x3710, 0xDC11},
402	/* P_RD_P4Q4 */
403	{0x3712, 0xD776},
404	/* P_GR_P0Q0 */
405	{0x3600, 0x1750},
406	/* P_GR_P0Q1 */
407	{0x3602, 0xF0AC},
408	/* P_GR_P0Q2 */
409	{0x3604, 0x4711},
410	/* P_GR_P0Q3 */
411	{0x3606, 0x07CE},
412	/* P_GR_P0Q4 */
413	{0x3608, 0x96B2},
414	/* P_GR_P1Q0 */
415	{0x3640, 0xA9AE},
416	/* P_GR_P1Q1 */
417	{0x3642, 0xF9AC},
418	/* P_GR_P1Q2 */
419	{0x3644, 0x39F1},
420	/* P_GR_P1Q3 */
421	{0x3646, 0x016F},
422	/* P_GR_P1Q4 */
423	{0x3648, 0x8AB2},
424	/* P_GR_P2Q0 */
425	{0x3680, 0x1752},
426	/* P_GR_P2Q1 */
427	{0x3682, 0x70F0},
428	/* P_GR_P2Q2 */
429	{0x3684, 0x83F5},
430	/* P_GR_P2Q3 */
431	{0x3686, 0x8392},
432	/* P_GR_P2Q4 */
433	{0x3688, 0x1FD6},
434	/* P_GR_P3Q0 */
435	{0x36C0, 0x1131},
436	/* P_GR_P3Q1 */
437	{0x36C2, 0x3DAF},
438	/* P_GR_P3Q2 */
439	{0x36C4, 0x89B4},
440	/* P_GR_P3Q3 */
441	{0x36C6, 0xA391},
442	/* P_GR_P3Q4 */
443	{0x36C8, 0x1334},
444	/* P_GR_P4Q0 */
445	{0x3700, 0xDC13},
446	/* P_GR_P4Q1 */
447	{0x3702, 0xD052},
448	/* P_GR_P4Q2 */
449	{0x3704, 0x5156},
450	/* P_GR_P4Q3 */
451	{0x3706, 0x1F13},
452	/* P_GR_P4Q4 */
453	{0x3708, 0x8C38},
454	/* P_BL_P0Q0 */
455	{0x3614, 0x0050},
456	/* P_BL_P0Q1 */
457	{0x3616, 0xBD4C},
458	/* P_BL_P0Q2 */
459	{0x3618, 0x41B0},
460	/* P_BL_P0Q3 */
461	{0x361A, 0x660D},
462	/* P_BL_P0Q4 */
463	{0x361C, 0xC590},
464	/* P_BL_P1Q0 */
465	{0x3654, 0x87EC},
466	/* P_BL_P1Q1 */
467	{0x3656, 0xE44C},
468	/* P_BL_P1Q2 */
469	{0x3658, 0x302E},
470	/* P_BL_P1Q3 */
471	{0x365A, 0x106E},
472	/* P_BL_P1Q4 */
473	{0x365C, 0xB58E},
474	/* P_BL_P2Q0 */
475	{0x3694, 0x0DD1},
476	/* P_BL_P2Q1 */
477	{0x3696, 0x2A50},
478	/* P_BL_P2Q2 */
479	{0x3698, 0xC793},
480	/* P_BL_P2Q3 */
481	{0x369A, 0xE8F1},
482	/* P_BL_P2Q4 */
483	{0x369C, 0x4174},
484	/* P_BL_P3Q0 */
485	{0x36D4, 0x01EF},
486	/* P_BL_P3Q1 */
487	{0x36D6, 0x06CF},
488	/* P_BL_P3Q2 */
489	{0x36D8, 0x8D91},
490	/* P_BL_P3Q3 */
491	{0x36DA, 0x91F0},
492	/* P_BL_P3Q4 */
493	{0x36DC, 0x52EF},
494	/* P_BL_P4Q0 */
495	{0x3714, 0xA6D2},
496	/* P_BL_P4Q1 */
497	{0x3716, 0xA312},
498	/* P_BL_P4Q2 */
499	{0x3718, 0x2695},
500	/* P_BL_P4Q3 */
501	{0x371A, 0x3953},
502	/* P_BL_P4Q4 */
503	{0x371C, 0x9356},
504	/* P_GB_P0Q0 */
505	{0x361E, 0x7EAF},
506	/* P_GB_P0Q1 */
507	{0x3620, 0x2A4C},
508	/* P_GB_P0Q2 */
509	{0x3622, 0x49F0},
510	{0x3624, 0xF1EC},
511	/* P_GB_P0Q4 */
512	{0x3626, 0xC670},
513	/* P_GB_P1Q0 */
514	{0x365E, 0x8E0C},
515	/* P_GB_P1Q1 */
516	{0x3660, 0xC2A9},
517	/* P_GB_P1Q2 */
518	{0x3662, 0x274F},
519	/* P_GB_P1Q3 */
520	{0x3664, 0xADAB},
521	/* P_GB_P1Q4 */
522	{0x3666, 0x8EF0},
523	/* P_GB_P2Q0 */
524	{0x369E, 0x09B1},
525	/* P_GB_P2Q1 */
526	{0x36A0, 0xAA2E},
527	/* P_GB_P2Q2 */
528	{0x36A2, 0xC3D3},
529	/* P_GB_P2Q3 */
530	{0x36A4, 0x7FAF},
531	/* P_GB_P2Q4 */
532	{0x36A6, 0x3F34},
533	/* P_GB_P3Q0 */
534	{0x36DE, 0x4C8F},
535	/* P_GB_P3Q1 */
536	{0x36E0, 0x886E},
537	/* P_GB_P3Q2 */
538	{0x36E2, 0xE831},
539	/* P_GB_P3Q3 */
540	{0x36E4, 0x1FD0},
541	/* P_GB_P3Q4 */
542	{0x36E6, 0x1192},
543	/* P_GB_P4Q0 */
544	{0x371E, 0xB952},
545	/* P_GB_P4Q1 */
546	{0x3720, 0x6DCF},
547	/* P_GB_P4Q2 */
548	{0x3722, 0x1B55},
549	/* P_GB_P4Q3 */
550	{0x3724, 0xA112},
551	/* P_GB_P4Q4 */
552	{0x3726, 0x82F6},
553	/* POLY_ORIGIN_C */
554	{0x3782, 0x0510},
555	/* POLY_ORIGIN_R */
556	{0x3784, 0x0390},
557	/* POLY_SC_ENABLE */
558	{0x3780, 0x8000},
559	};
560
561
562	struct mt9p012_reg mt9p012_regs = {
563	.reg_pat = &mt9p012_reg_pat[0],
564	.reg_pat_size = ARRAY_SIZE(mt9p012_reg_pat),
565	.ttbl = &mt9p012_test_tbl[0],
566	.ttbl_size = ARRAY_SIZE(mt9p012_test_tbl),
567	.lctbl = &mt9p012_lc_tbl[0],
568	.lctbl_size = ARRAY_SIZE(mt9p012_lc_tbl),
569	.rftbl = &mt9p012_rolloff_tbl[0],
570	.rftbl_size = ARRAY_SIZE(mt9p012_rolloff_tbl)
571	};
572
573