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d1a890fa SB |
1 | /* |
2 | * Linux driver for VMware's vmxnet3 ethernet NIC. | |
3 | * | |
4 | * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; version 2 of the License and no later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
13 | * NON INFRINGEMENT. See the GNU General Public License for more | |
14 | * details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
19 | * | |
20 | * The full GNU General Public License is included in this distribution in | |
21 | * the file called "COPYING". | |
22 | * | |
23 | * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com> | |
24 | * | |
25 | */ | |
26 | ||
b038b040 SR |
27 | #include <net/ip6_checksum.h> |
28 | ||
d1a890fa SB |
29 | #include "vmxnet3_int.h" |
30 | ||
31 | char vmxnet3_driver_name[] = "vmxnet3"; | |
32 | #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver" | |
33 | ||
d1a890fa SB |
34 | /* |
35 | * PCI Device ID Table | |
36 | * Last entry must be all 0s | |
37 | */ | |
a3aa1884 | 38 | static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = { |
d1a890fa SB |
39 | {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)}, |
40 | {0} | |
41 | }; | |
42 | ||
43 | MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table); | |
44 | ||
45 | static atomic_t devices_found; | |
46 | ||
47 | ||
48 | /* | |
49 | * Enable/Disable the given intr | |
50 | */ | |
51 | static void | |
52 | vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) | |
53 | { | |
54 | VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0); | |
55 | } | |
56 | ||
57 | ||
58 | static void | |
59 | vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) | |
60 | { | |
61 | VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1); | |
62 | } | |
63 | ||
64 | ||
65 | /* | |
66 | * Enable/Disable all intrs used by the device | |
67 | */ | |
68 | static void | |
69 | vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter) | |
70 | { | |
71 | int i; | |
72 | ||
73 | for (i = 0; i < adapter->intr.num_intrs; i++) | |
74 | vmxnet3_enable_intr(adapter, i); | |
6929fe8a RZ |
75 | adapter->shared->devRead.intrConf.intrCtrl &= |
76 | cpu_to_le32(~VMXNET3_IC_DISABLE_ALL); | |
d1a890fa SB |
77 | } |
78 | ||
79 | ||
80 | static void | |
81 | vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter) | |
82 | { | |
83 | int i; | |
84 | ||
6929fe8a RZ |
85 | adapter->shared->devRead.intrConf.intrCtrl |= |
86 | cpu_to_le32(VMXNET3_IC_DISABLE_ALL); | |
d1a890fa SB |
87 | for (i = 0; i < adapter->intr.num_intrs; i++) |
88 | vmxnet3_disable_intr(adapter, i); | |
89 | } | |
90 | ||
91 | ||
92 | static void | |
93 | vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events) | |
94 | { | |
95 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events); | |
96 | } | |
97 | ||
98 | ||
99 | static bool | |
100 | vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) | |
101 | { | |
102 | return netif_queue_stopped(adapter->netdev); | |
103 | } | |
104 | ||
105 | ||
106 | static void | |
107 | vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) | |
108 | { | |
109 | tq->stopped = false; | |
110 | netif_start_queue(adapter->netdev); | |
111 | } | |
112 | ||
113 | ||
114 | static void | |
115 | vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) | |
116 | { | |
117 | tq->stopped = false; | |
118 | netif_wake_queue(adapter->netdev); | |
119 | } | |
120 | ||
121 | ||
122 | static void | |
123 | vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) | |
124 | { | |
125 | tq->stopped = true; | |
126 | tq->num_stop++; | |
127 | netif_stop_queue(adapter->netdev); | |
128 | } | |
129 | ||
130 | ||
131 | /* | |
132 | * Check the link state. This may start or stop the tx queue. | |
133 | */ | |
134 | static void | |
4a1745fc | 135 | vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue) |
d1a890fa SB |
136 | { |
137 | u32 ret; | |
138 | ||
139 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK); | |
140 | ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); | |
141 | adapter->link_speed = ret >> 16; | |
142 | if (ret & 1) { /* Link is up. */ | |
143 | printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n", | |
144 | adapter->netdev->name, adapter->link_speed); | |
145 | if (!netif_carrier_ok(adapter->netdev)) | |
146 | netif_carrier_on(adapter->netdev); | |
147 | ||
4a1745fc SB |
148 | if (affectTxQueue) |
149 | vmxnet3_tq_start(&adapter->tx_queue, adapter); | |
d1a890fa SB |
150 | } else { |
151 | printk(KERN_INFO "%s: NIC Link is Down\n", | |
152 | adapter->netdev->name); | |
153 | if (netif_carrier_ok(adapter->netdev)) | |
154 | netif_carrier_off(adapter->netdev); | |
155 | ||
4a1745fc SB |
156 | if (affectTxQueue) |
157 | vmxnet3_tq_stop(&adapter->tx_queue, adapter); | |
d1a890fa SB |
158 | } |
159 | } | |
160 | ||
d1a890fa SB |
161 | static void |
162 | vmxnet3_process_events(struct vmxnet3_adapter *adapter) | |
163 | { | |
115924b6 | 164 | u32 events = le32_to_cpu(adapter->shared->ecr); |
d1a890fa SB |
165 | if (!events) |
166 | return; | |
167 | ||
168 | vmxnet3_ack_events(adapter, events); | |
169 | ||
170 | /* Check if link state has changed */ | |
171 | if (events & VMXNET3_ECR_LINK) | |
4a1745fc | 172 | vmxnet3_check_link(adapter, true); |
d1a890fa SB |
173 | |
174 | /* Check if there is an error on xmit/recv queues */ | |
175 | if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) { | |
176 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | |
177 | VMXNET3_CMD_GET_QUEUE_STATUS); | |
178 | ||
179 | if (adapter->tqd_start->status.stopped) { | |
180 | printk(KERN_ERR "%s: tq error 0x%x\n", | |
181 | adapter->netdev->name, | |
115924b6 | 182 | le32_to_cpu(adapter->tqd_start->status.error)); |
d1a890fa SB |
183 | } |
184 | if (adapter->rqd_start->status.stopped) { | |
185 | printk(KERN_ERR "%s: rq error 0x%x\n", | |
186 | adapter->netdev->name, | |
187 | adapter->rqd_start->status.error); | |
188 | } | |
189 | ||
190 | schedule_work(&adapter->work); | |
191 | } | |
192 | } | |
193 | ||
115924b6 SB |
194 | #ifdef __BIG_ENDIAN_BITFIELD |
195 | /* | |
196 | * The device expects the bitfields in shared structures to be written in | |
197 | * little endian. When CPU is big endian, the following routines are used to | |
198 | * correctly read and write into ABI. | |
199 | * The general technique used here is : double word bitfields are defined in | |
200 | * opposite order for big endian architecture. Then before reading them in | |
201 | * driver the complete double word is translated using le32_to_cpu. Similarly | |
202 | * After the driver writes into bitfields, cpu_to_le32 is used to translate the | |
203 | * double words into required format. | |
204 | * In order to avoid touching bits in shared structure more than once, temporary | |
205 | * descriptors are used. These are passed as srcDesc to following functions. | |
206 | */ | |
207 | static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc, | |
208 | struct Vmxnet3_RxDesc *dstDesc) | |
209 | { | |
210 | u32 *src = (u32 *)srcDesc + 2; | |
211 | u32 *dst = (u32 *)dstDesc + 2; | |
212 | dstDesc->addr = le64_to_cpu(srcDesc->addr); | |
213 | *dst = le32_to_cpu(*src); | |
214 | dstDesc->ext1 = le32_to_cpu(srcDesc->ext1); | |
215 | } | |
216 | ||
217 | static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc, | |
218 | struct Vmxnet3_TxDesc *dstDesc) | |
219 | { | |
220 | int i; | |
221 | u32 *src = (u32 *)(srcDesc + 1); | |
222 | u32 *dst = (u32 *)(dstDesc + 1); | |
223 | ||
224 | /* Working backwards so that the gen bit is set at the end. */ | |
225 | for (i = 2; i > 0; i--) { | |
226 | src--; | |
227 | dst--; | |
228 | *dst = cpu_to_le32(*src); | |
229 | } | |
230 | } | |
231 | ||
232 | ||
233 | static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc, | |
234 | struct Vmxnet3_RxCompDesc *dstDesc) | |
235 | { | |
236 | int i = 0; | |
237 | u32 *src = (u32 *)srcDesc; | |
238 | u32 *dst = (u32 *)dstDesc; | |
239 | for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) { | |
240 | *dst = le32_to_cpu(*src); | |
241 | src++; | |
242 | dst++; | |
243 | } | |
244 | } | |
245 | ||
246 | ||
247 | /* Used to read bitfield values from double words. */ | |
248 | static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size) | |
249 | { | |
250 | u32 temp = le32_to_cpu(*bitfield); | |
251 | u32 mask = ((1 << size) - 1) << pos; | |
252 | temp &= mask; | |
253 | temp >>= pos; | |
254 | return temp; | |
255 | } | |
256 | ||
257 | ||
258 | ||
259 | #endif /* __BIG_ENDIAN_BITFIELD */ | |
260 | ||
261 | #ifdef __BIG_ENDIAN_BITFIELD | |
262 | ||
263 | # define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \ | |
264 | txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \ | |
265 | VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE) | |
266 | # define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \ | |
267 | txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \ | |
268 | VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE) | |
269 | # define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \ | |
270 | VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \ | |
271 | VMXNET3_TCD_GEN_SIZE) | |
272 | # define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \ | |
273 | VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE) | |
274 | # define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \ | |
275 | (dstrcd) = (tmp); \ | |
276 | vmxnet3_RxCompToCPU((rcd), (tmp)); \ | |
277 | } while (0) | |
278 | # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \ | |
279 | (dstrxd) = (tmp); \ | |
280 | vmxnet3_RxDescToCPU((rxd), (tmp)); \ | |
281 | } while (0) | |
282 | ||
283 | #else | |
284 | ||
285 | # define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen) | |
286 | # define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop) | |
287 | # define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen) | |
288 | # define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx) | |
289 | # define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd) | |
290 | # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd) | |
291 | ||
292 | #endif /* __BIG_ENDIAN_BITFIELD */ | |
293 | ||
d1a890fa SB |
294 | |
295 | static void | |
296 | vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi, | |
297 | struct pci_dev *pdev) | |
298 | { | |
299 | if (tbi->map_type == VMXNET3_MAP_SINGLE) | |
300 | pci_unmap_single(pdev, tbi->dma_addr, tbi->len, | |
301 | PCI_DMA_TODEVICE); | |
302 | else if (tbi->map_type == VMXNET3_MAP_PAGE) | |
303 | pci_unmap_page(pdev, tbi->dma_addr, tbi->len, | |
304 | PCI_DMA_TODEVICE); | |
305 | else | |
306 | BUG_ON(tbi->map_type != VMXNET3_MAP_NONE); | |
307 | ||
308 | tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */ | |
309 | } | |
310 | ||
311 | ||
312 | static int | |
313 | vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq, | |
314 | struct pci_dev *pdev, struct vmxnet3_adapter *adapter) | |
315 | { | |
316 | struct sk_buff *skb; | |
317 | int entries = 0; | |
318 | ||
319 | /* no out of order completion */ | |
320 | BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp); | |
115924b6 | 321 | BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1); |
d1a890fa SB |
322 | |
323 | skb = tq->buf_info[eop_idx].skb; | |
324 | BUG_ON(skb == NULL); | |
325 | tq->buf_info[eop_idx].skb = NULL; | |
326 | ||
327 | VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size); | |
328 | ||
329 | while (tq->tx_ring.next2comp != eop_idx) { | |
330 | vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp, | |
331 | pdev); | |
332 | ||
333 | /* update next2comp w/o tx_lock. Since we are marking more, | |
334 | * instead of less, tx ring entries avail, the worst case is | |
335 | * that the tx routine incorrectly re-queues a pkt due to | |
336 | * insufficient tx ring entries. | |
337 | */ | |
338 | vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); | |
339 | entries++; | |
340 | } | |
341 | ||
342 | dev_kfree_skb_any(skb); | |
343 | return entries; | |
344 | } | |
345 | ||
346 | ||
347 | static int | |
348 | vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq, | |
349 | struct vmxnet3_adapter *adapter) | |
350 | { | |
351 | int completed = 0; | |
352 | union Vmxnet3_GenericDesc *gdesc; | |
353 | ||
354 | gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; | |
115924b6 SB |
355 | while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) { |
356 | completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX( | |
357 | &gdesc->tcd), tq, adapter->pdev, | |
358 | adapter); | |
d1a890fa SB |
359 | |
360 | vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring); | |
361 | gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; | |
362 | } | |
363 | ||
364 | if (completed) { | |
365 | spin_lock(&tq->tx_lock); | |
366 | if (unlikely(vmxnet3_tq_stopped(tq, adapter) && | |
367 | vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) > | |
368 | VMXNET3_WAKE_QUEUE_THRESHOLD(tq) && | |
369 | netif_carrier_ok(adapter->netdev))) { | |
370 | vmxnet3_tq_wake(tq, adapter); | |
371 | } | |
372 | spin_unlock(&tq->tx_lock); | |
373 | } | |
374 | return completed; | |
375 | } | |
376 | ||
377 | ||
378 | static void | |
379 | vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq, | |
380 | struct vmxnet3_adapter *adapter) | |
381 | { | |
382 | int i; | |
383 | ||
384 | while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) { | |
385 | struct vmxnet3_tx_buf_info *tbi; | |
386 | union Vmxnet3_GenericDesc *gdesc; | |
387 | ||
388 | tbi = tq->buf_info + tq->tx_ring.next2comp; | |
389 | gdesc = tq->tx_ring.base + tq->tx_ring.next2comp; | |
390 | ||
391 | vmxnet3_unmap_tx_buf(tbi, adapter->pdev); | |
392 | if (tbi->skb) { | |
393 | dev_kfree_skb_any(tbi->skb); | |
394 | tbi->skb = NULL; | |
395 | } | |
396 | vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); | |
397 | } | |
398 | ||
399 | /* sanity check, verify all buffers are indeed unmapped and freed */ | |
400 | for (i = 0; i < tq->tx_ring.size; i++) { | |
401 | BUG_ON(tq->buf_info[i].skb != NULL || | |
402 | tq->buf_info[i].map_type != VMXNET3_MAP_NONE); | |
403 | } | |
404 | ||
405 | tq->tx_ring.gen = VMXNET3_INIT_GEN; | |
406 | tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; | |
407 | ||
408 | tq->comp_ring.gen = VMXNET3_INIT_GEN; | |
409 | tq->comp_ring.next2proc = 0; | |
410 | } | |
411 | ||
412 | ||
413 | void | |
414 | vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq, | |
415 | struct vmxnet3_adapter *adapter) | |
416 | { | |
417 | if (tq->tx_ring.base) { | |
418 | pci_free_consistent(adapter->pdev, tq->tx_ring.size * | |
419 | sizeof(struct Vmxnet3_TxDesc), | |
420 | tq->tx_ring.base, tq->tx_ring.basePA); | |
421 | tq->tx_ring.base = NULL; | |
422 | } | |
423 | if (tq->data_ring.base) { | |
424 | pci_free_consistent(adapter->pdev, tq->data_ring.size * | |
425 | sizeof(struct Vmxnet3_TxDataDesc), | |
426 | tq->data_ring.base, tq->data_ring.basePA); | |
427 | tq->data_ring.base = NULL; | |
428 | } | |
429 | if (tq->comp_ring.base) { | |
430 | pci_free_consistent(adapter->pdev, tq->comp_ring.size * | |
431 | sizeof(struct Vmxnet3_TxCompDesc), | |
432 | tq->comp_ring.base, tq->comp_ring.basePA); | |
433 | tq->comp_ring.base = NULL; | |
434 | } | |
435 | kfree(tq->buf_info); | |
436 | tq->buf_info = NULL; | |
437 | } | |
438 | ||
439 | ||
440 | static void | |
441 | vmxnet3_tq_init(struct vmxnet3_tx_queue *tq, | |
442 | struct vmxnet3_adapter *adapter) | |
443 | { | |
444 | int i; | |
445 | ||
446 | /* reset the tx ring contents to 0 and reset the tx ring states */ | |
447 | memset(tq->tx_ring.base, 0, tq->tx_ring.size * | |
448 | sizeof(struct Vmxnet3_TxDesc)); | |
449 | tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; | |
450 | tq->tx_ring.gen = VMXNET3_INIT_GEN; | |
451 | ||
452 | memset(tq->data_ring.base, 0, tq->data_ring.size * | |
453 | sizeof(struct Vmxnet3_TxDataDesc)); | |
454 | ||
455 | /* reset the tx comp ring contents to 0 and reset comp ring states */ | |
456 | memset(tq->comp_ring.base, 0, tq->comp_ring.size * | |
457 | sizeof(struct Vmxnet3_TxCompDesc)); | |
458 | tq->comp_ring.next2proc = 0; | |
459 | tq->comp_ring.gen = VMXNET3_INIT_GEN; | |
460 | ||
461 | /* reset the bookkeeping data */ | |
462 | memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size); | |
463 | for (i = 0; i < tq->tx_ring.size; i++) | |
464 | tq->buf_info[i].map_type = VMXNET3_MAP_NONE; | |
465 | ||
466 | /* stats are not reset */ | |
467 | } | |
468 | ||
469 | ||
470 | static int | |
471 | vmxnet3_tq_create(struct vmxnet3_tx_queue *tq, | |
472 | struct vmxnet3_adapter *adapter) | |
473 | { | |
474 | BUG_ON(tq->tx_ring.base || tq->data_ring.base || | |
475 | tq->comp_ring.base || tq->buf_info); | |
476 | ||
477 | tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size | |
478 | * sizeof(struct Vmxnet3_TxDesc), | |
479 | &tq->tx_ring.basePA); | |
480 | if (!tq->tx_ring.base) { | |
481 | printk(KERN_ERR "%s: failed to allocate tx ring\n", | |
482 | adapter->netdev->name); | |
483 | goto err; | |
484 | } | |
485 | ||
486 | tq->data_ring.base = pci_alloc_consistent(adapter->pdev, | |
487 | tq->data_ring.size * | |
488 | sizeof(struct Vmxnet3_TxDataDesc), | |
489 | &tq->data_ring.basePA); | |
490 | if (!tq->data_ring.base) { | |
491 | printk(KERN_ERR "%s: failed to allocate data ring\n", | |
492 | adapter->netdev->name); | |
493 | goto err; | |
494 | } | |
495 | ||
496 | tq->comp_ring.base = pci_alloc_consistent(adapter->pdev, | |
497 | tq->comp_ring.size * | |
498 | sizeof(struct Vmxnet3_TxCompDesc), | |
499 | &tq->comp_ring.basePA); | |
500 | if (!tq->comp_ring.base) { | |
501 | printk(KERN_ERR "%s: failed to allocate tx comp ring\n", | |
502 | adapter->netdev->name); | |
503 | goto err; | |
504 | } | |
505 | ||
506 | tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]), | |
507 | GFP_KERNEL); | |
508 | if (!tq->buf_info) { | |
509 | printk(KERN_ERR "%s: failed to allocate tx bufinfo\n", | |
510 | adapter->netdev->name); | |
511 | goto err; | |
512 | } | |
513 | ||
514 | return 0; | |
515 | ||
516 | err: | |
517 | vmxnet3_tq_destroy(tq, adapter); | |
518 | return -ENOMEM; | |
519 | } | |
520 | ||
521 | ||
522 | /* | |
523 | * starting from ring->next2fill, allocate rx buffers for the given ring | |
524 | * of the rx queue and update the rx desc. stop after @num_to_alloc buffers | |
525 | * are allocated or allocation fails | |
526 | */ | |
527 | ||
528 | static int | |
529 | vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx, | |
530 | int num_to_alloc, struct vmxnet3_adapter *adapter) | |
531 | { | |
532 | int num_allocated = 0; | |
533 | struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx]; | |
534 | struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx]; | |
535 | u32 val; | |
536 | ||
537 | while (num_allocated < num_to_alloc) { | |
538 | struct vmxnet3_rx_buf_info *rbi; | |
539 | union Vmxnet3_GenericDesc *gd; | |
540 | ||
541 | rbi = rbi_base + ring->next2fill; | |
542 | gd = ring->base + ring->next2fill; | |
543 | ||
544 | if (rbi->buf_type == VMXNET3_RX_BUF_SKB) { | |
545 | if (rbi->skb == NULL) { | |
546 | rbi->skb = dev_alloc_skb(rbi->len + | |
547 | NET_IP_ALIGN); | |
548 | if (unlikely(rbi->skb == NULL)) { | |
549 | rq->stats.rx_buf_alloc_failure++; | |
550 | break; | |
551 | } | |
552 | rbi->skb->dev = adapter->netdev; | |
553 | ||
554 | skb_reserve(rbi->skb, NET_IP_ALIGN); | |
555 | rbi->dma_addr = pci_map_single(adapter->pdev, | |
556 | rbi->skb->data, rbi->len, | |
557 | PCI_DMA_FROMDEVICE); | |
558 | } else { | |
559 | /* rx buffer skipped by the device */ | |
560 | } | |
561 | val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT; | |
562 | } else { | |
563 | BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE || | |
564 | rbi->len != PAGE_SIZE); | |
565 | ||
566 | if (rbi->page == NULL) { | |
567 | rbi->page = alloc_page(GFP_ATOMIC); | |
568 | if (unlikely(rbi->page == NULL)) { | |
569 | rq->stats.rx_buf_alloc_failure++; | |
570 | break; | |
571 | } | |
572 | rbi->dma_addr = pci_map_page(adapter->pdev, | |
573 | rbi->page, 0, PAGE_SIZE, | |
574 | PCI_DMA_FROMDEVICE); | |
575 | } else { | |
576 | /* rx buffers skipped by the device */ | |
577 | } | |
578 | val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT; | |
579 | } | |
580 | ||
581 | BUG_ON(rbi->dma_addr == 0); | |
115924b6 SB |
582 | gd->rxd.addr = cpu_to_le64(rbi->dma_addr); |
583 | gd->dword[2] = cpu_to_le32((ring->gen << VMXNET3_RXD_GEN_SHIFT) | |
584 | | val | rbi->len); | |
d1a890fa SB |
585 | |
586 | num_allocated++; | |
587 | vmxnet3_cmd_ring_adv_next2fill(ring); | |
588 | } | |
589 | rq->uncommitted[ring_idx] += num_allocated; | |
590 | ||
f6965582 RD |
591 | dev_dbg(&adapter->netdev->dev, |
592 | "alloc_rx_buf: %d allocated, next2fill %u, next2comp " | |
d1a890fa SB |
593 | "%u, uncommited %u\n", num_allocated, ring->next2fill, |
594 | ring->next2comp, rq->uncommitted[ring_idx]); | |
595 | ||
596 | /* so that the device can distinguish a full ring and an empty ring */ | |
597 | BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp); | |
598 | ||
599 | return num_allocated; | |
600 | } | |
601 | ||
602 | ||
603 | static void | |
604 | vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd, | |
605 | struct vmxnet3_rx_buf_info *rbi) | |
606 | { | |
607 | struct skb_frag_struct *frag = skb_shinfo(skb)->frags + | |
608 | skb_shinfo(skb)->nr_frags; | |
609 | ||
610 | BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS); | |
611 | ||
612 | frag->page = rbi->page; | |
613 | frag->page_offset = 0; | |
614 | frag->size = rcd->len; | |
615 | skb->data_len += frag->size; | |
616 | skb_shinfo(skb)->nr_frags++; | |
617 | } | |
618 | ||
619 | ||
620 | static void | |
621 | vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx, | |
622 | struct vmxnet3_tx_queue *tq, struct pci_dev *pdev, | |
623 | struct vmxnet3_adapter *adapter) | |
624 | { | |
625 | u32 dw2, len; | |
626 | unsigned long buf_offset; | |
627 | int i; | |
628 | union Vmxnet3_GenericDesc *gdesc; | |
629 | struct vmxnet3_tx_buf_info *tbi = NULL; | |
630 | ||
631 | BUG_ON(ctx->copy_size > skb_headlen(skb)); | |
632 | ||
633 | /* use the previous gen bit for the SOP desc */ | |
634 | dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT; | |
635 | ||
636 | ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill; | |
637 | gdesc = ctx->sop_txd; /* both loops below can be skipped */ | |
638 | ||
639 | /* no need to map the buffer if headers are copied */ | |
640 | if (ctx->copy_size) { | |
115924b6 | 641 | ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA + |
d1a890fa | 642 | tq->tx_ring.next2fill * |
115924b6 SB |
643 | sizeof(struct Vmxnet3_TxDataDesc)); |
644 | ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size); | |
d1a890fa SB |
645 | ctx->sop_txd->dword[3] = 0; |
646 | ||
647 | tbi = tq->buf_info + tq->tx_ring.next2fill; | |
648 | tbi->map_type = VMXNET3_MAP_NONE; | |
649 | ||
f6965582 RD |
650 | dev_dbg(&adapter->netdev->dev, |
651 | "txd[%u]: 0x%Lx 0x%x 0x%x\n", | |
115924b6 SB |
652 | tq->tx_ring.next2fill, |
653 | le64_to_cpu(ctx->sop_txd->txd.addr), | |
d1a890fa SB |
654 | ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]); |
655 | vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); | |
656 | ||
657 | /* use the right gen for non-SOP desc */ | |
658 | dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; | |
659 | } | |
660 | ||
661 | /* linear part can use multiple tx desc if it's big */ | |
662 | len = skb_headlen(skb) - ctx->copy_size; | |
663 | buf_offset = ctx->copy_size; | |
664 | while (len) { | |
665 | u32 buf_size; | |
666 | ||
1f4b1612 BD |
667 | if (len < VMXNET3_MAX_TX_BUF_SIZE) { |
668 | buf_size = len; | |
669 | dw2 |= len; | |
670 | } else { | |
671 | buf_size = VMXNET3_MAX_TX_BUF_SIZE; | |
672 | /* spec says that for TxDesc.len, 0 == 2^14 */ | |
673 | } | |
d1a890fa SB |
674 | |
675 | tbi = tq->buf_info + tq->tx_ring.next2fill; | |
676 | tbi->map_type = VMXNET3_MAP_SINGLE; | |
677 | tbi->dma_addr = pci_map_single(adapter->pdev, | |
678 | skb->data + buf_offset, buf_size, | |
679 | PCI_DMA_TODEVICE); | |
680 | ||
1f4b1612 | 681 | tbi->len = buf_size; |
d1a890fa SB |
682 | |
683 | gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; | |
684 | BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); | |
685 | ||
115924b6 | 686 | gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); |
1f4b1612 | 687 | gdesc->dword[2] = cpu_to_le32(dw2); |
d1a890fa SB |
688 | gdesc->dword[3] = 0; |
689 | ||
f6965582 RD |
690 | dev_dbg(&adapter->netdev->dev, |
691 | "txd[%u]: 0x%Lx 0x%x 0x%x\n", | |
115924b6 SB |
692 | tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), |
693 | le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); | |
d1a890fa SB |
694 | vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); |
695 | dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; | |
696 | ||
697 | len -= buf_size; | |
698 | buf_offset += buf_size; | |
699 | } | |
700 | ||
701 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | |
702 | struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; | |
703 | ||
704 | tbi = tq->buf_info + tq->tx_ring.next2fill; | |
705 | tbi->map_type = VMXNET3_MAP_PAGE; | |
706 | tbi->dma_addr = pci_map_page(adapter->pdev, frag->page, | |
707 | frag->page_offset, frag->size, | |
708 | PCI_DMA_TODEVICE); | |
709 | ||
710 | tbi->len = frag->size; | |
711 | ||
712 | gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; | |
713 | BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); | |
714 | ||
115924b6 SB |
715 | gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); |
716 | gdesc->dword[2] = cpu_to_le32(dw2 | frag->size); | |
d1a890fa SB |
717 | gdesc->dword[3] = 0; |
718 | ||
f6965582 RD |
719 | dev_dbg(&adapter->netdev->dev, |
720 | "txd[%u]: 0x%llu %u %u\n", | |
115924b6 SB |
721 | tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), |
722 | le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); | |
d1a890fa SB |
723 | vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); |
724 | dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; | |
725 | } | |
726 | ||
727 | ctx->eop_txd = gdesc; | |
728 | ||
729 | /* set the last buf_info for the pkt */ | |
730 | tbi->skb = skb; | |
731 | tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base; | |
732 | } | |
733 | ||
734 | ||
735 | /* | |
736 | * parse and copy relevant protocol headers: | |
737 | * For a tso pkt, relevant headers are L2/3/4 including options | |
738 | * For a pkt requesting csum offloading, they are L2/3 and may include L4 | |
739 | * if it's a TCP/UDP pkt | |
740 | * | |
741 | * Returns: | |
742 | * -1: error happens during parsing | |
743 | * 0: protocol headers parsed, but too big to be copied | |
744 | * 1: protocol headers parsed and copied | |
745 | * | |
746 | * Other effects: | |
747 | * 1. related *ctx fields are updated. | |
748 | * 2. ctx->copy_size is # of bytes copied | |
749 | * 3. the portion copied is guaranteed to be in the linear part | |
750 | * | |
751 | */ | |
752 | static int | |
753 | vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, | |
754 | struct vmxnet3_tx_ctx *ctx, | |
755 | struct vmxnet3_adapter *adapter) | |
756 | { | |
757 | struct Vmxnet3_TxDataDesc *tdd; | |
758 | ||
759 | if (ctx->mss) { | |
760 | ctx->eth_ip_hdr_size = skb_transport_offset(skb); | |
761 | ctx->l4_hdr_size = ((struct tcphdr *) | |
762 | skb_transport_header(skb))->doff * 4; | |
763 | ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size; | |
764 | } else { | |
765 | unsigned int pull_size; | |
766 | ||
767 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | |
768 | ctx->eth_ip_hdr_size = skb_transport_offset(skb); | |
769 | ||
770 | if (ctx->ipv4) { | |
771 | struct iphdr *iph = (struct iphdr *) | |
772 | skb_network_header(skb); | |
773 | if (iph->protocol == IPPROTO_TCP) { | |
774 | pull_size = ctx->eth_ip_hdr_size + | |
775 | sizeof(struct tcphdr); | |
776 | ||
777 | if (unlikely(!pskb_may_pull(skb, | |
778 | pull_size))) { | |
779 | goto err; | |
780 | } | |
781 | ctx->l4_hdr_size = ((struct tcphdr *) | |
782 | skb_transport_header(skb))->doff * 4; | |
783 | } else if (iph->protocol == IPPROTO_UDP) { | |
784 | ctx->l4_hdr_size = | |
785 | sizeof(struct udphdr); | |
786 | } else { | |
787 | ctx->l4_hdr_size = 0; | |
788 | } | |
789 | } else { | |
790 | /* for simplicity, don't copy L4 headers */ | |
791 | ctx->l4_hdr_size = 0; | |
792 | } | |
793 | ctx->copy_size = ctx->eth_ip_hdr_size + | |
794 | ctx->l4_hdr_size; | |
795 | } else { | |
796 | ctx->eth_ip_hdr_size = 0; | |
797 | ctx->l4_hdr_size = 0; | |
798 | /* copy as much as allowed */ | |
799 | ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE | |
800 | , skb_headlen(skb)); | |
801 | } | |
802 | ||
803 | /* make sure headers are accessible directly */ | |
804 | if (unlikely(!pskb_may_pull(skb, ctx->copy_size))) | |
805 | goto err; | |
806 | } | |
807 | ||
808 | if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) { | |
809 | tq->stats.oversized_hdr++; | |
810 | ctx->copy_size = 0; | |
811 | return 0; | |
812 | } | |
813 | ||
814 | tdd = tq->data_ring.base + tq->tx_ring.next2fill; | |
815 | ||
816 | memcpy(tdd->data, skb->data, ctx->copy_size); | |
f6965582 RD |
817 | dev_dbg(&adapter->netdev->dev, |
818 | "copy %u bytes to dataRing[%u]\n", | |
d1a890fa SB |
819 | ctx->copy_size, tq->tx_ring.next2fill); |
820 | return 1; | |
821 | ||
822 | err: | |
823 | return -1; | |
824 | } | |
825 | ||
826 | ||
827 | static void | |
828 | vmxnet3_prepare_tso(struct sk_buff *skb, | |
829 | struct vmxnet3_tx_ctx *ctx) | |
830 | { | |
831 | struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb); | |
832 | if (ctx->ipv4) { | |
833 | struct iphdr *iph = (struct iphdr *)skb_network_header(skb); | |
834 | iph->check = 0; | |
835 | tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0, | |
836 | IPPROTO_TCP, 0); | |
837 | } else { | |
838 | struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb); | |
839 | tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0, | |
840 | IPPROTO_TCP, 0); | |
841 | } | |
842 | } | |
843 | ||
844 | ||
845 | /* | |
846 | * Transmits a pkt thru a given tq | |
847 | * Returns: | |
848 | * NETDEV_TX_OK: descriptors are setup successfully | |
849 | * NETDEV_TX_OK: error occured, the pkt is dropped | |
850 | * NETDEV_TX_BUSY: tx ring is full, queue is stopped | |
851 | * | |
852 | * Side-effects: | |
853 | * 1. tx ring may be changed | |
854 | * 2. tq stats may be updated accordingly | |
855 | * 3. shared->txNumDeferred may be updated | |
856 | */ | |
857 | ||
858 | static int | |
859 | vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, | |
860 | struct vmxnet3_adapter *adapter, struct net_device *netdev) | |
861 | { | |
862 | int ret; | |
863 | u32 count; | |
864 | unsigned long flags; | |
865 | struct vmxnet3_tx_ctx ctx; | |
866 | union Vmxnet3_GenericDesc *gdesc; | |
115924b6 SB |
867 | #ifdef __BIG_ENDIAN_BITFIELD |
868 | /* Use temporary descriptor to avoid touching bits multiple times */ | |
869 | union Vmxnet3_GenericDesc tempTxDesc; | |
870 | #endif | |
d1a890fa SB |
871 | |
872 | /* conservatively estimate # of descriptors to use */ | |
873 | count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + | |
874 | skb_shinfo(skb)->nr_frags + 1; | |
875 | ||
1b803fbf | 876 | ctx.ipv4 = (skb->protocol == cpu_to_be16(ETH_P_IP)); |
d1a890fa SB |
877 | |
878 | ctx.mss = skb_shinfo(skb)->gso_size; | |
879 | if (ctx.mss) { | |
880 | if (skb_header_cloned(skb)) { | |
881 | if (unlikely(pskb_expand_head(skb, 0, 0, | |
882 | GFP_ATOMIC) != 0)) { | |
883 | tq->stats.drop_tso++; | |
884 | goto drop_pkt; | |
885 | } | |
886 | tq->stats.copy_skb_header++; | |
887 | } | |
888 | vmxnet3_prepare_tso(skb, &ctx); | |
889 | } else { | |
890 | if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) { | |
891 | ||
892 | /* non-tso pkts must not use more than | |
893 | * VMXNET3_MAX_TXD_PER_PKT entries | |
894 | */ | |
895 | if (skb_linearize(skb) != 0) { | |
896 | tq->stats.drop_too_many_frags++; | |
897 | goto drop_pkt; | |
898 | } | |
899 | tq->stats.linearized++; | |
900 | ||
901 | /* recalculate the # of descriptors to use */ | |
902 | count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1; | |
903 | } | |
904 | } | |
905 | ||
906 | ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter); | |
907 | if (ret >= 0) { | |
908 | BUG_ON(ret <= 0 && ctx.copy_size != 0); | |
909 | /* hdrs parsed, check against other limits */ | |
910 | if (ctx.mss) { | |
911 | if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size > | |
912 | VMXNET3_MAX_TX_BUF_SIZE)) { | |
913 | goto hdr_too_big; | |
914 | } | |
915 | } else { | |
916 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | |
917 | if (unlikely(ctx.eth_ip_hdr_size + | |
918 | skb->csum_offset > | |
919 | VMXNET3_MAX_CSUM_OFFSET)) { | |
920 | goto hdr_too_big; | |
921 | } | |
922 | } | |
923 | } | |
924 | } else { | |
925 | tq->stats.drop_hdr_inspect_err++; | |
926 | goto drop_pkt; | |
927 | } | |
928 | ||
929 | spin_lock_irqsave(&tq->tx_lock, flags); | |
930 | ||
931 | if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) { | |
932 | tq->stats.tx_ring_full++; | |
f6965582 RD |
933 | dev_dbg(&adapter->netdev->dev, |
934 | "tx queue stopped on %s, next2comp %u" | |
d1a890fa SB |
935 | " next2fill %u\n", adapter->netdev->name, |
936 | tq->tx_ring.next2comp, tq->tx_ring.next2fill); | |
937 | ||
938 | vmxnet3_tq_stop(tq, adapter); | |
939 | spin_unlock_irqrestore(&tq->tx_lock, flags); | |
940 | return NETDEV_TX_BUSY; | |
941 | } | |
942 | ||
943 | /* fill tx descs related to addr & len */ | |
944 | vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter); | |
945 | ||
946 | /* setup the EOP desc */ | |
115924b6 | 947 | ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP); |
d1a890fa SB |
948 | |
949 | /* setup the SOP desc */ | |
115924b6 SB |
950 | #ifdef __BIG_ENDIAN_BITFIELD |
951 | gdesc = &tempTxDesc; | |
952 | gdesc->dword[2] = ctx.sop_txd->dword[2]; | |
953 | gdesc->dword[3] = ctx.sop_txd->dword[3]; | |
954 | #else | |
d1a890fa | 955 | gdesc = ctx.sop_txd; |
115924b6 | 956 | #endif |
d1a890fa SB |
957 | if (ctx.mss) { |
958 | gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size; | |
959 | gdesc->txd.om = VMXNET3_OM_TSO; | |
960 | gdesc->txd.msscof = ctx.mss; | |
115924b6 SB |
961 | le32_add_cpu(&tq->shared->txNumDeferred, (skb->len - |
962 | gdesc->txd.hlen + ctx.mss - 1) / ctx.mss); | |
d1a890fa SB |
963 | } else { |
964 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | |
965 | gdesc->txd.hlen = ctx.eth_ip_hdr_size; | |
966 | gdesc->txd.om = VMXNET3_OM_CSUM; | |
967 | gdesc->txd.msscof = ctx.eth_ip_hdr_size + | |
968 | skb->csum_offset; | |
969 | } else { | |
970 | gdesc->txd.om = 0; | |
971 | gdesc->txd.msscof = 0; | |
972 | } | |
115924b6 | 973 | le32_add_cpu(&tq->shared->txNumDeferred, 1); |
d1a890fa SB |
974 | } |
975 | ||
976 | if (vlan_tx_tag_present(skb)) { | |
977 | gdesc->txd.ti = 1; | |
978 | gdesc->txd.tci = vlan_tx_tag_get(skb); | |
979 | } | |
980 | ||
115924b6 SB |
981 | /* finally flips the GEN bit of the SOP desc. */ |
982 | gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^ | |
983 | VMXNET3_TXD_GEN); | |
984 | #ifdef __BIG_ENDIAN_BITFIELD | |
985 | /* Finished updating in bitfields of Tx Desc, so write them in original | |
986 | * place. | |
987 | */ | |
988 | vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc, | |
989 | (struct Vmxnet3_TxDesc *)ctx.sop_txd); | |
990 | gdesc = ctx.sop_txd; | |
991 | #endif | |
f6965582 RD |
992 | dev_dbg(&adapter->netdev->dev, |
993 | "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n", | |
d1a890fa | 994 | (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd - |
115924b6 SB |
995 | tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr), |
996 | le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3])); | |
d1a890fa SB |
997 | |
998 | spin_unlock_irqrestore(&tq->tx_lock, flags); | |
999 | ||
115924b6 SB |
1000 | if (le32_to_cpu(tq->shared->txNumDeferred) >= |
1001 | le32_to_cpu(tq->shared->txThreshold)) { | |
d1a890fa SB |
1002 | tq->shared->txNumDeferred = 0; |
1003 | VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_TXPROD, | |
1004 | tq->tx_ring.next2fill); | |
1005 | } | |
d1a890fa SB |
1006 | |
1007 | return NETDEV_TX_OK; | |
1008 | ||
1009 | hdr_too_big: | |
1010 | tq->stats.drop_oversized_hdr++; | |
1011 | drop_pkt: | |
1012 | tq->stats.drop_total++; | |
1013 | dev_kfree_skb(skb); | |
1014 | return NETDEV_TX_OK; | |
1015 | } | |
1016 | ||
1017 | ||
1018 | static netdev_tx_t | |
1019 | vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
1020 | { | |
1021 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
d1a890fa | 1022 | |
115924b6 | 1023 | return vmxnet3_tq_xmit(skb, &adapter->tx_queue, adapter, netdev); |
d1a890fa SB |
1024 | } |
1025 | ||
1026 | ||
1027 | static void | |
1028 | vmxnet3_rx_csum(struct vmxnet3_adapter *adapter, | |
1029 | struct sk_buff *skb, | |
1030 | union Vmxnet3_GenericDesc *gdesc) | |
1031 | { | |
1032 | if (!gdesc->rcd.cnc && adapter->rxcsum) { | |
1033 | /* typical case: TCP/UDP over IP and both csums are correct */ | |
115924b6 | 1034 | if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) == |
d1a890fa SB |
1035 | VMXNET3_RCD_CSUM_OK) { |
1036 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1037 | BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp)); | |
1038 | BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6)); | |
1039 | BUG_ON(gdesc->rcd.frg); | |
1040 | } else { | |
1041 | if (gdesc->rcd.csum) { | |
1042 | skb->csum = htons(gdesc->rcd.csum); | |
1043 | skb->ip_summed = CHECKSUM_PARTIAL; | |
1044 | } else { | |
bc8acf2c | 1045 | skb_checksum_none_assert(skb); |
d1a890fa SB |
1046 | } |
1047 | } | |
1048 | } else { | |
bc8acf2c | 1049 | skb_checksum_none_assert(skb); |
d1a890fa SB |
1050 | } |
1051 | } | |
1052 | ||
1053 | ||
1054 | static void | |
1055 | vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd, | |
1056 | struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter) | |
1057 | { | |
1058 | rq->stats.drop_err++; | |
1059 | if (!rcd->fcs) | |
1060 | rq->stats.drop_fcs++; | |
1061 | ||
1062 | rq->stats.drop_total++; | |
1063 | ||
1064 | /* | |
1065 | * We do not unmap and chain the rx buffer to the skb. | |
1066 | * We basically pretend this buffer is not used and will be recycled | |
1067 | * by vmxnet3_rq_alloc_rx_buf() | |
1068 | */ | |
1069 | ||
1070 | /* | |
1071 | * ctx->skb may be NULL if this is the first and the only one | |
1072 | * desc for the pkt | |
1073 | */ | |
1074 | if (ctx->skb) | |
1075 | dev_kfree_skb_irq(ctx->skb); | |
1076 | ||
1077 | ctx->skb = NULL; | |
1078 | } | |
1079 | ||
1080 | ||
1081 | static int | |
1082 | vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq, | |
1083 | struct vmxnet3_adapter *adapter, int quota) | |
1084 | { | |
1085 | static u32 rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2}; | |
1086 | u32 num_rxd = 0; | |
1087 | struct Vmxnet3_RxCompDesc *rcd; | |
1088 | struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx; | |
115924b6 SB |
1089 | #ifdef __BIG_ENDIAN_BITFIELD |
1090 | struct Vmxnet3_RxDesc rxCmdDesc; | |
1091 | struct Vmxnet3_RxCompDesc rxComp; | |
1092 | #endif | |
1093 | vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, | |
1094 | &rxComp); | |
d1a890fa SB |
1095 | while (rcd->gen == rq->comp_ring.gen) { |
1096 | struct vmxnet3_rx_buf_info *rbi; | |
1097 | struct sk_buff *skb; | |
1098 | int num_to_alloc; | |
1099 | struct Vmxnet3_RxDesc *rxd; | |
1100 | u32 idx, ring_idx; | |
1101 | ||
1102 | if (num_rxd >= quota) { | |
1103 | /* we may stop even before we see the EOP desc of | |
1104 | * the current pkt | |
1105 | */ | |
1106 | break; | |
1107 | } | |
1108 | num_rxd++; | |
1109 | ||
1110 | idx = rcd->rxdIdx; | |
1111 | ring_idx = rcd->rqID == rq->qid ? 0 : 1; | |
115924b6 SB |
1112 | vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd, |
1113 | &rxCmdDesc); | |
d1a890fa SB |
1114 | rbi = rq->buf_info[ring_idx] + idx; |
1115 | ||
115924b6 SB |
1116 | BUG_ON(rxd->addr != rbi->dma_addr || |
1117 | rxd->len != rbi->len); | |
d1a890fa SB |
1118 | |
1119 | if (unlikely(rcd->eop && rcd->err)) { | |
1120 | vmxnet3_rx_error(rq, rcd, ctx, adapter); | |
1121 | goto rcd_done; | |
1122 | } | |
1123 | ||
1124 | if (rcd->sop) { /* first buf of the pkt */ | |
1125 | BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD || | |
1126 | rcd->rqID != rq->qid); | |
1127 | ||
1128 | BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB); | |
1129 | BUG_ON(ctx->skb != NULL || rbi->skb == NULL); | |
1130 | ||
1131 | if (unlikely(rcd->len == 0)) { | |
1132 | /* Pretend the rx buffer is skipped. */ | |
1133 | BUG_ON(!(rcd->sop && rcd->eop)); | |
f6965582 RD |
1134 | dev_dbg(&adapter->netdev->dev, |
1135 | "rxRing[%u][%u] 0 length\n", | |
d1a890fa SB |
1136 | ring_idx, idx); |
1137 | goto rcd_done; | |
1138 | } | |
1139 | ||
1140 | ctx->skb = rbi->skb; | |
1141 | rbi->skb = NULL; | |
1142 | ||
1143 | pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len, | |
1144 | PCI_DMA_FROMDEVICE); | |
1145 | ||
1146 | skb_put(ctx->skb, rcd->len); | |
1147 | } else { | |
1148 | BUG_ON(ctx->skb == NULL); | |
1149 | /* non SOP buffer must be type 1 in most cases */ | |
1150 | if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) { | |
1151 | BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY); | |
1152 | ||
1153 | if (rcd->len) { | |
1154 | pci_unmap_page(adapter->pdev, | |
1155 | rbi->dma_addr, rbi->len, | |
1156 | PCI_DMA_FROMDEVICE); | |
1157 | ||
1158 | vmxnet3_append_frag(ctx->skb, rcd, rbi); | |
1159 | rbi->page = NULL; | |
1160 | } | |
1161 | } else { | |
1162 | /* | |
1163 | * The only time a non-SOP buffer is type 0 is | |
1164 | * when it's EOP and error flag is raised, which | |
1165 | * has already been handled. | |
1166 | */ | |
1167 | BUG_ON(true); | |
1168 | } | |
1169 | } | |
1170 | ||
1171 | skb = ctx->skb; | |
1172 | if (rcd->eop) { | |
1173 | skb->len += skb->data_len; | |
1174 | skb->truesize += skb->data_len; | |
1175 | ||
1176 | vmxnet3_rx_csum(adapter, skb, | |
1177 | (union Vmxnet3_GenericDesc *)rcd); | |
1178 | skb->protocol = eth_type_trans(skb, adapter->netdev); | |
1179 | ||
1180 | if (unlikely(adapter->vlan_grp && rcd->ts)) { | |
1181 | vlan_hwaccel_receive_skb(skb, | |
1182 | adapter->vlan_grp, rcd->tci); | |
1183 | } else { | |
1184 | netif_receive_skb(skb); | |
1185 | } | |
1186 | ||
d1a890fa SB |
1187 | ctx->skb = NULL; |
1188 | } | |
1189 | ||
1190 | rcd_done: | |
1191 | /* device may skip some rx descs */ | |
1192 | rq->rx_ring[ring_idx].next2comp = idx; | |
1193 | VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp, | |
1194 | rq->rx_ring[ring_idx].size); | |
1195 | ||
1196 | /* refill rx buffers frequently to avoid starving the h/w */ | |
1197 | num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring + | |
1198 | ring_idx); | |
1199 | if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq, | |
1200 | ring_idx, adapter))) { | |
1201 | vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc, | |
1202 | adapter); | |
1203 | ||
1204 | /* if needed, update the register */ | |
1205 | if (unlikely(rq->shared->updateRxProd)) { | |
1206 | VMXNET3_WRITE_BAR0_REG(adapter, | |
1207 | rxprod_reg[ring_idx] + rq->qid * 8, | |
1208 | rq->rx_ring[ring_idx].next2fill); | |
1209 | rq->uncommitted[ring_idx] = 0; | |
1210 | } | |
1211 | } | |
1212 | ||
1213 | vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring); | |
115924b6 SB |
1214 | vmxnet3_getRxComp(rcd, |
1215 | &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp); | |
d1a890fa SB |
1216 | } |
1217 | ||
1218 | return num_rxd; | |
1219 | } | |
1220 | ||
1221 | ||
1222 | static void | |
1223 | vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq, | |
1224 | struct vmxnet3_adapter *adapter) | |
1225 | { | |
1226 | u32 i, ring_idx; | |
1227 | struct Vmxnet3_RxDesc *rxd; | |
1228 | ||
1229 | for (ring_idx = 0; ring_idx < 2; ring_idx++) { | |
1230 | for (i = 0; i < rq->rx_ring[ring_idx].size; i++) { | |
115924b6 SB |
1231 | #ifdef __BIG_ENDIAN_BITFIELD |
1232 | struct Vmxnet3_RxDesc rxDesc; | |
1233 | #endif | |
1234 | vmxnet3_getRxDesc(rxd, | |
1235 | &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc); | |
d1a890fa SB |
1236 | |
1237 | if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD && | |
1238 | rq->buf_info[ring_idx][i].skb) { | |
1239 | pci_unmap_single(adapter->pdev, rxd->addr, | |
1240 | rxd->len, PCI_DMA_FROMDEVICE); | |
1241 | dev_kfree_skb(rq->buf_info[ring_idx][i].skb); | |
1242 | rq->buf_info[ring_idx][i].skb = NULL; | |
1243 | } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY && | |
1244 | rq->buf_info[ring_idx][i].page) { | |
1245 | pci_unmap_page(adapter->pdev, rxd->addr, | |
1246 | rxd->len, PCI_DMA_FROMDEVICE); | |
1247 | put_page(rq->buf_info[ring_idx][i].page); | |
1248 | rq->buf_info[ring_idx][i].page = NULL; | |
1249 | } | |
1250 | } | |
1251 | ||
1252 | rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN; | |
1253 | rq->rx_ring[ring_idx].next2fill = | |
1254 | rq->rx_ring[ring_idx].next2comp = 0; | |
1255 | rq->uncommitted[ring_idx] = 0; | |
1256 | } | |
1257 | ||
1258 | rq->comp_ring.gen = VMXNET3_INIT_GEN; | |
1259 | rq->comp_ring.next2proc = 0; | |
1260 | } | |
1261 | ||
1262 | ||
1263 | void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq, | |
1264 | struct vmxnet3_adapter *adapter) | |
1265 | { | |
1266 | int i; | |
1267 | int j; | |
1268 | ||
1269 | /* all rx buffers must have already been freed */ | |
1270 | for (i = 0; i < 2; i++) { | |
1271 | if (rq->buf_info[i]) { | |
1272 | for (j = 0; j < rq->rx_ring[i].size; j++) | |
1273 | BUG_ON(rq->buf_info[i][j].page != NULL); | |
1274 | } | |
1275 | } | |
1276 | ||
1277 | ||
1278 | kfree(rq->buf_info[0]); | |
1279 | ||
1280 | for (i = 0; i < 2; i++) { | |
1281 | if (rq->rx_ring[i].base) { | |
1282 | pci_free_consistent(adapter->pdev, rq->rx_ring[i].size | |
1283 | * sizeof(struct Vmxnet3_RxDesc), | |
1284 | rq->rx_ring[i].base, | |
1285 | rq->rx_ring[i].basePA); | |
1286 | rq->rx_ring[i].base = NULL; | |
1287 | } | |
1288 | rq->buf_info[i] = NULL; | |
1289 | } | |
1290 | ||
1291 | if (rq->comp_ring.base) { | |
1292 | pci_free_consistent(adapter->pdev, rq->comp_ring.size * | |
1293 | sizeof(struct Vmxnet3_RxCompDesc), | |
1294 | rq->comp_ring.base, rq->comp_ring.basePA); | |
1295 | rq->comp_ring.base = NULL; | |
1296 | } | |
1297 | } | |
1298 | ||
1299 | ||
1300 | static int | |
1301 | vmxnet3_rq_init(struct vmxnet3_rx_queue *rq, | |
1302 | struct vmxnet3_adapter *adapter) | |
1303 | { | |
1304 | int i; | |
1305 | ||
1306 | /* initialize buf_info */ | |
1307 | for (i = 0; i < rq->rx_ring[0].size; i++) { | |
1308 | ||
1309 | /* 1st buf for a pkt is skbuff */ | |
1310 | if (i % adapter->rx_buf_per_pkt == 0) { | |
1311 | rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB; | |
1312 | rq->buf_info[0][i].len = adapter->skb_buf_size; | |
1313 | } else { /* subsequent bufs for a pkt is frag */ | |
1314 | rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE; | |
1315 | rq->buf_info[0][i].len = PAGE_SIZE; | |
1316 | } | |
1317 | } | |
1318 | for (i = 0; i < rq->rx_ring[1].size; i++) { | |
1319 | rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE; | |
1320 | rq->buf_info[1][i].len = PAGE_SIZE; | |
1321 | } | |
1322 | ||
1323 | /* reset internal state and allocate buffers for both rings */ | |
1324 | for (i = 0; i < 2; i++) { | |
1325 | rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0; | |
1326 | rq->uncommitted[i] = 0; | |
1327 | ||
1328 | memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size * | |
1329 | sizeof(struct Vmxnet3_RxDesc)); | |
1330 | rq->rx_ring[i].gen = VMXNET3_INIT_GEN; | |
1331 | } | |
1332 | if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1, | |
1333 | adapter) == 0) { | |
1334 | /* at least has 1 rx buffer for the 1st ring */ | |
1335 | return -ENOMEM; | |
1336 | } | |
1337 | vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter); | |
1338 | ||
1339 | /* reset the comp ring */ | |
1340 | rq->comp_ring.next2proc = 0; | |
1341 | memset(rq->comp_ring.base, 0, rq->comp_ring.size * | |
1342 | sizeof(struct Vmxnet3_RxCompDesc)); | |
1343 | rq->comp_ring.gen = VMXNET3_INIT_GEN; | |
1344 | ||
1345 | /* reset rxctx */ | |
1346 | rq->rx_ctx.skb = NULL; | |
1347 | ||
1348 | /* stats are not reset */ | |
1349 | return 0; | |
1350 | } | |
1351 | ||
1352 | ||
1353 | static int | |
1354 | vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter) | |
1355 | { | |
1356 | int i; | |
1357 | size_t sz; | |
1358 | struct vmxnet3_rx_buf_info *bi; | |
1359 | ||
1360 | for (i = 0; i < 2; i++) { | |
1361 | ||
1362 | sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc); | |
1363 | rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz, | |
1364 | &rq->rx_ring[i].basePA); | |
1365 | if (!rq->rx_ring[i].base) { | |
1366 | printk(KERN_ERR "%s: failed to allocate rx ring %d\n", | |
1367 | adapter->netdev->name, i); | |
1368 | goto err; | |
1369 | } | |
1370 | } | |
1371 | ||
1372 | sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc); | |
1373 | rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz, | |
1374 | &rq->comp_ring.basePA); | |
1375 | if (!rq->comp_ring.base) { | |
1376 | printk(KERN_ERR "%s: failed to allocate rx comp ring\n", | |
1377 | adapter->netdev->name); | |
1378 | goto err; | |
1379 | } | |
1380 | ||
1381 | sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size + | |
1382 | rq->rx_ring[1].size); | |
476c609e | 1383 | bi = kzalloc(sz, GFP_KERNEL); |
d1a890fa SB |
1384 | if (!bi) { |
1385 | printk(KERN_ERR "%s: failed to allocate rx bufinfo\n", | |
1386 | adapter->netdev->name); | |
1387 | goto err; | |
1388 | } | |
d1a890fa SB |
1389 | rq->buf_info[0] = bi; |
1390 | rq->buf_info[1] = bi + rq->rx_ring[0].size; | |
1391 | ||
1392 | return 0; | |
1393 | ||
1394 | err: | |
1395 | vmxnet3_rq_destroy(rq, adapter); | |
1396 | return -ENOMEM; | |
1397 | } | |
1398 | ||
1399 | ||
1400 | static int | |
1401 | vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget) | |
1402 | { | |
1403 | if (unlikely(adapter->shared->ecr)) | |
1404 | vmxnet3_process_events(adapter); | |
1405 | ||
1406 | vmxnet3_tq_tx_complete(&adapter->tx_queue, adapter); | |
1407 | return vmxnet3_rq_rx_complete(&adapter->rx_queue, adapter, budget); | |
1408 | } | |
1409 | ||
1410 | ||
1411 | static int | |
1412 | vmxnet3_poll(struct napi_struct *napi, int budget) | |
1413 | { | |
1414 | struct vmxnet3_adapter *adapter = container_of(napi, | |
1415 | struct vmxnet3_adapter, napi); | |
1416 | int rxd_done; | |
1417 | ||
1418 | rxd_done = vmxnet3_do_poll(adapter, budget); | |
1419 | ||
1420 | if (rxd_done < budget) { | |
1421 | napi_complete(napi); | |
1422 | vmxnet3_enable_intr(adapter, 0); | |
1423 | } | |
1424 | return rxd_done; | |
1425 | } | |
1426 | ||
1427 | ||
1428 | /* Interrupt handler for vmxnet3 */ | |
1429 | static irqreturn_t | |
1430 | vmxnet3_intr(int irq, void *dev_id) | |
1431 | { | |
1432 | struct net_device *dev = dev_id; | |
1433 | struct vmxnet3_adapter *adapter = netdev_priv(dev); | |
1434 | ||
1435 | if (unlikely(adapter->intr.type == VMXNET3_IT_INTX)) { | |
1436 | u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR); | |
1437 | if (unlikely(icr == 0)) | |
1438 | /* not ours */ | |
1439 | return IRQ_NONE; | |
1440 | } | |
1441 | ||
1442 | ||
1443 | /* disable intr if needed */ | |
1444 | if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) | |
1445 | vmxnet3_disable_intr(adapter, 0); | |
1446 | ||
1447 | napi_schedule(&adapter->napi); | |
1448 | ||
1449 | return IRQ_HANDLED; | |
1450 | } | |
1451 | ||
1452 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1453 | ||
1454 | ||
1455 | /* netpoll callback. */ | |
1456 | static void | |
1457 | vmxnet3_netpoll(struct net_device *netdev) | |
1458 | { | |
1459 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
1460 | int irq; | |
1461 | ||
8f7e524c | 1462 | #ifdef CONFIG_PCI_MSI |
d1a890fa SB |
1463 | if (adapter->intr.type == VMXNET3_IT_MSIX) |
1464 | irq = adapter->intr.msix_entries[0].vector; | |
1465 | else | |
8f7e524c | 1466 | #endif |
d1a890fa SB |
1467 | irq = adapter->pdev->irq; |
1468 | ||
1469 | disable_irq(irq); | |
1470 | vmxnet3_intr(irq, netdev); | |
1471 | enable_irq(irq); | |
1472 | } | |
1473 | #endif | |
1474 | ||
1475 | static int | |
1476 | vmxnet3_request_irqs(struct vmxnet3_adapter *adapter) | |
1477 | { | |
1478 | int err; | |
1479 | ||
8f7e524c | 1480 | #ifdef CONFIG_PCI_MSI |
d1a890fa SB |
1481 | if (adapter->intr.type == VMXNET3_IT_MSIX) { |
1482 | /* we only use 1 MSI-X vector */ | |
1483 | err = request_irq(adapter->intr.msix_entries[0].vector, | |
1484 | vmxnet3_intr, 0, adapter->netdev->name, | |
1485 | adapter->netdev); | |
115924b6 | 1486 | } else if (adapter->intr.type == VMXNET3_IT_MSI) { |
d1a890fa SB |
1487 | err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0, |
1488 | adapter->netdev->name, adapter->netdev); | |
115924b6 SB |
1489 | } else |
1490 | #endif | |
1491 | { | |
d1a890fa SB |
1492 | err = request_irq(adapter->pdev->irq, vmxnet3_intr, |
1493 | IRQF_SHARED, adapter->netdev->name, | |
1494 | adapter->netdev); | |
1495 | } | |
1496 | ||
1497 | if (err) | |
1498 | printk(KERN_ERR "Failed to request irq %s (intr type:%d), error" | |
1499 | ":%d\n", adapter->netdev->name, adapter->intr.type, err); | |
1500 | ||
1501 | ||
1502 | if (!err) { | |
1503 | int i; | |
1504 | /* init our intr settings */ | |
1505 | for (i = 0; i < adapter->intr.num_intrs; i++) | |
1506 | adapter->intr.mod_levels[i] = UPT1_IML_ADAPTIVE; | |
1507 | ||
1508 | /* next setup intr index for all intr sources */ | |
1509 | adapter->tx_queue.comp_ring.intr_idx = 0; | |
1510 | adapter->rx_queue.comp_ring.intr_idx = 0; | |
1511 | adapter->intr.event_intr_idx = 0; | |
1512 | ||
1513 | printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors " | |
1514 | "allocated\n", adapter->netdev->name, adapter->intr.type, | |
1515 | adapter->intr.mask_mode, adapter->intr.num_intrs); | |
1516 | } | |
1517 | ||
1518 | return err; | |
1519 | } | |
1520 | ||
1521 | ||
1522 | static void | |
1523 | vmxnet3_free_irqs(struct vmxnet3_adapter *adapter) | |
1524 | { | |
1525 | BUG_ON(adapter->intr.type == VMXNET3_IT_AUTO || | |
1526 | adapter->intr.num_intrs <= 0); | |
1527 | ||
1528 | switch (adapter->intr.type) { | |
8f7e524c | 1529 | #ifdef CONFIG_PCI_MSI |
d1a890fa SB |
1530 | case VMXNET3_IT_MSIX: |
1531 | { | |
1532 | int i; | |
1533 | ||
1534 | for (i = 0; i < adapter->intr.num_intrs; i++) | |
1535 | free_irq(adapter->intr.msix_entries[i].vector, | |
1536 | adapter->netdev); | |
1537 | break; | |
1538 | } | |
8f7e524c | 1539 | #endif |
d1a890fa SB |
1540 | case VMXNET3_IT_MSI: |
1541 | free_irq(adapter->pdev->irq, adapter->netdev); | |
1542 | break; | |
1543 | case VMXNET3_IT_INTX: | |
1544 | free_irq(adapter->pdev->irq, adapter->netdev); | |
1545 | break; | |
1546 | default: | |
1547 | BUG_ON(true); | |
1548 | } | |
1549 | } | |
1550 | ||
d1a890fa SB |
1551 | static void |
1552 | vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
1553 | { | |
1554 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
1555 | struct Vmxnet3_DriverShared *shared = adapter->shared; | |
1556 | u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; | |
1557 | ||
1558 | if (grp) { | |
1559 | /* add vlan rx stripping. */ | |
1560 | if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) { | |
1561 | int i; | |
1562 | struct Vmxnet3_DSDevRead *devRead = &shared->devRead; | |
1563 | adapter->vlan_grp = grp; | |
1564 | ||
1565 | /* update FEATURES to device */ | |
3843e515 | 1566 | devRead->misc.uptFeatures |= UPT1_F_RXVLAN; |
d1a890fa SB |
1567 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, |
1568 | VMXNET3_CMD_UPDATE_FEATURE); | |
1569 | /* | |
1570 | * Clear entire vfTable; then enable untagged pkts. | |
1571 | * Note: setting one entry in vfTable to non-zero turns | |
1572 | * on VLAN rx filtering. | |
1573 | */ | |
1574 | for (i = 0; i < VMXNET3_VFT_SIZE; i++) | |
1575 | vfTable[i] = 0; | |
1576 | ||
1577 | VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); | |
1578 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | |
1579 | VMXNET3_CMD_UPDATE_VLAN_FILTERS); | |
1580 | } else { | |
1581 | printk(KERN_ERR "%s: vlan_rx_register when device has " | |
1582 | "no NETIF_F_HW_VLAN_RX\n", netdev->name); | |
1583 | } | |
1584 | } else { | |
1585 | /* remove vlan rx stripping. */ | |
1586 | struct Vmxnet3_DSDevRead *devRead = &shared->devRead; | |
1587 | adapter->vlan_grp = NULL; | |
1588 | ||
3843e515 | 1589 | if (devRead->misc.uptFeatures & UPT1_F_RXVLAN) { |
d1a890fa SB |
1590 | int i; |
1591 | ||
1592 | for (i = 0; i < VMXNET3_VFT_SIZE; i++) { | |
1593 | /* clear entire vfTable; this also disables | |
1594 | * VLAN rx filtering | |
1595 | */ | |
1596 | vfTable[i] = 0; | |
1597 | } | |
1598 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | |
1599 | VMXNET3_CMD_UPDATE_VLAN_FILTERS); | |
1600 | ||
1601 | /* update FEATURES to device */ | |
3843e515 | 1602 | devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN; |
d1a890fa SB |
1603 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, |
1604 | VMXNET3_CMD_UPDATE_FEATURE); | |
1605 | } | |
1606 | } | |
1607 | } | |
1608 | ||
1609 | ||
1610 | static void | |
1611 | vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter) | |
1612 | { | |
1613 | if (adapter->vlan_grp) { | |
1614 | u16 vid; | |
1615 | u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; | |
1616 | bool activeVlan = false; | |
1617 | ||
b738127d | 1618 | for (vid = 0; vid < VLAN_N_VID; vid++) { |
d1a890fa SB |
1619 | if (vlan_group_get_device(adapter->vlan_grp, vid)) { |
1620 | VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); | |
1621 | activeVlan = true; | |
1622 | } | |
1623 | } | |
1624 | if (activeVlan) { | |
1625 | /* continue to allow untagged pkts */ | |
1626 | VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); | |
1627 | } | |
1628 | } | |
1629 | } | |
1630 | ||
1631 | ||
1632 | static void | |
1633 | vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid) | |
1634 | { | |
1635 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
1636 | u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; | |
1637 | ||
1638 | VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); | |
1639 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | |
1640 | VMXNET3_CMD_UPDATE_VLAN_FILTERS); | |
1641 | } | |
1642 | ||
1643 | ||
1644 | static void | |
1645 | vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) | |
1646 | { | |
1647 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
1648 | u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; | |
1649 | ||
1650 | VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid); | |
1651 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | |
1652 | VMXNET3_CMD_UPDATE_VLAN_FILTERS); | |
1653 | } | |
1654 | ||
1655 | ||
1656 | static u8 * | |
1657 | vmxnet3_copy_mc(struct net_device *netdev) | |
1658 | { | |
1659 | u8 *buf = NULL; | |
4cd24eaf | 1660 | u32 sz = netdev_mc_count(netdev) * ETH_ALEN; |
d1a890fa SB |
1661 | |
1662 | /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */ | |
1663 | if (sz <= 0xffff) { | |
1664 | /* We may be called with BH disabled */ | |
1665 | buf = kmalloc(sz, GFP_ATOMIC); | |
1666 | if (buf) { | |
22bedad3 | 1667 | struct netdev_hw_addr *ha; |
567ec874 | 1668 | int i = 0; |
d1a890fa | 1669 | |
22bedad3 JP |
1670 | netdev_for_each_mc_addr(ha, netdev) |
1671 | memcpy(buf + i++ * ETH_ALEN, ha->addr, | |
d1a890fa | 1672 | ETH_ALEN); |
d1a890fa SB |
1673 | } |
1674 | } | |
1675 | return buf; | |
1676 | } | |
1677 | ||
1678 | ||
1679 | static void | |
1680 | vmxnet3_set_mc(struct net_device *netdev) | |
1681 | { | |
1682 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
1683 | struct Vmxnet3_RxFilterConf *rxConf = | |
1684 | &adapter->shared->devRead.rxFilterConf; | |
1685 | u8 *new_table = NULL; | |
1686 | u32 new_mode = VMXNET3_RXM_UCAST; | |
1687 | ||
1688 | if (netdev->flags & IFF_PROMISC) | |
1689 | new_mode |= VMXNET3_RXM_PROMISC; | |
1690 | ||
1691 | if (netdev->flags & IFF_BROADCAST) | |
1692 | new_mode |= VMXNET3_RXM_BCAST; | |
1693 | ||
1694 | if (netdev->flags & IFF_ALLMULTI) | |
1695 | new_mode |= VMXNET3_RXM_ALL_MULTI; | |
1696 | else | |
4cd24eaf | 1697 | if (!netdev_mc_empty(netdev)) { |
d1a890fa SB |
1698 | new_table = vmxnet3_copy_mc(netdev); |
1699 | if (new_table) { | |
1700 | new_mode |= VMXNET3_RXM_MCAST; | |
115924b6 | 1701 | rxConf->mfTableLen = cpu_to_le16( |
4cd24eaf | 1702 | netdev_mc_count(netdev) * ETH_ALEN); |
115924b6 SB |
1703 | rxConf->mfTablePA = cpu_to_le64(virt_to_phys( |
1704 | new_table)); | |
d1a890fa SB |
1705 | } else { |
1706 | printk(KERN_INFO "%s: failed to copy mcast list" | |
1707 | ", setting ALL_MULTI\n", netdev->name); | |
1708 | new_mode |= VMXNET3_RXM_ALL_MULTI; | |
1709 | } | |
1710 | } | |
1711 | ||
1712 | ||
1713 | if (!(new_mode & VMXNET3_RXM_MCAST)) { | |
1714 | rxConf->mfTableLen = 0; | |
1715 | rxConf->mfTablePA = 0; | |
1716 | } | |
1717 | ||
1718 | if (new_mode != rxConf->rxMode) { | |
115924b6 | 1719 | rxConf->rxMode = cpu_to_le32(new_mode); |
d1a890fa SB |
1720 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, |
1721 | VMXNET3_CMD_UPDATE_RX_MODE); | |
1722 | } | |
1723 | ||
1724 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | |
1725 | VMXNET3_CMD_UPDATE_MAC_FILTERS); | |
1726 | ||
1727 | kfree(new_table); | |
1728 | } | |
1729 | ||
1730 | ||
1731 | /* | |
1732 | * Set up driver_shared based on settings in adapter. | |
1733 | */ | |
1734 | ||
1735 | static void | |
1736 | vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter) | |
1737 | { | |
1738 | struct Vmxnet3_DriverShared *shared = adapter->shared; | |
1739 | struct Vmxnet3_DSDevRead *devRead = &shared->devRead; | |
1740 | struct Vmxnet3_TxQueueConf *tqc; | |
1741 | struct Vmxnet3_RxQueueConf *rqc; | |
1742 | int i; | |
1743 | ||
1744 | memset(shared, 0, sizeof(*shared)); | |
1745 | ||
1746 | /* driver settings */ | |
115924b6 SB |
1747 | shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC); |
1748 | devRead->misc.driverInfo.version = cpu_to_le32( | |
1749 | VMXNET3_DRIVER_VERSION_NUM); | |
d1a890fa SB |
1750 | devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ? |
1751 | VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64); | |
1752 | devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX; | |
115924b6 SB |
1753 | *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32( |
1754 | *((u32 *)&devRead->misc.driverInfo.gos)); | |
1755 | devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1); | |
1756 | devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1); | |
d1a890fa | 1757 | |
115924b6 SB |
1758 | devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter)); |
1759 | devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter)); | |
d1a890fa SB |
1760 | |
1761 | /* set up feature flags */ | |
1762 | if (adapter->rxcsum) | |
3843e515 | 1763 | devRead->misc.uptFeatures |= UPT1_F_RXCSUM; |
d1a890fa SB |
1764 | |
1765 | if (adapter->lro) { | |
3843e515 | 1766 | devRead->misc.uptFeatures |= UPT1_F_LRO; |
115924b6 | 1767 | devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS); |
d1a890fa | 1768 | } |
8e95a202 JP |
1769 | if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) && |
1770 | adapter->vlan_grp) { | |
3843e515 | 1771 | devRead->misc.uptFeatures |= UPT1_F_RXVLAN; |
d1a890fa SB |
1772 | } |
1773 | ||
115924b6 SB |
1774 | devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu); |
1775 | devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa); | |
1776 | devRead->misc.queueDescLen = cpu_to_le32( | |
1777 | sizeof(struct Vmxnet3_TxQueueDesc) + | |
1778 | sizeof(struct Vmxnet3_RxQueueDesc)); | |
d1a890fa SB |
1779 | |
1780 | /* tx queue settings */ | |
1781 | BUG_ON(adapter->tx_queue.tx_ring.base == NULL); | |
1782 | ||
1783 | devRead->misc.numTxQueues = 1; | |
1784 | tqc = &adapter->tqd_start->conf; | |
115924b6 SB |
1785 | tqc->txRingBasePA = cpu_to_le64(adapter->tx_queue.tx_ring.basePA); |
1786 | tqc->dataRingBasePA = cpu_to_le64(adapter->tx_queue.data_ring.basePA); | |
1787 | tqc->compRingBasePA = cpu_to_le64(adapter->tx_queue.comp_ring.basePA); | |
1788 | tqc->ddPA = cpu_to_le64(virt_to_phys( | |
1789 | adapter->tx_queue.buf_info)); | |
1790 | tqc->txRingSize = cpu_to_le32(adapter->tx_queue.tx_ring.size); | |
1791 | tqc->dataRingSize = cpu_to_le32(adapter->tx_queue.data_ring.size); | |
1792 | tqc->compRingSize = cpu_to_le32(adapter->tx_queue.comp_ring.size); | |
1793 | tqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_tx_buf_info) * | |
1794 | tqc->txRingSize); | |
d1a890fa SB |
1795 | tqc->intrIdx = adapter->tx_queue.comp_ring.intr_idx; |
1796 | ||
1797 | /* rx queue settings */ | |
1798 | devRead->misc.numRxQueues = 1; | |
1799 | rqc = &adapter->rqd_start->conf; | |
115924b6 SB |
1800 | rqc->rxRingBasePA[0] = cpu_to_le64(adapter->rx_queue.rx_ring[0].basePA); |
1801 | rqc->rxRingBasePA[1] = cpu_to_le64(adapter->rx_queue.rx_ring[1].basePA); | |
1802 | rqc->compRingBasePA = cpu_to_le64(adapter->rx_queue.comp_ring.basePA); | |
1803 | rqc->ddPA = cpu_to_le64(virt_to_phys( | |
1804 | adapter->rx_queue.buf_info)); | |
1805 | rqc->rxRingSize[0] = cpu_to_le32(adapter->rx_queue.rx_ring[0].size); | |
1806 | rqc->rxRingSize[1] = cpu_to_le32(adapter->rx_queue.rx_ring[1].size); | |
1807 | rqc->compRingSize = cpu_to_le32(adapter->rx_queue.comp_ring.size); | |
1808 | rqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_rx_buf_info) * | |
1809 | (rqc->rxRingSize[0] + rqc->rxRingSize[1])); | |
d1a890fa SB |
1810 | rqc->intrIdx = adapter->rx_queue.comp_ring.intr_idx; |
1811 | ||
1812 | /* intr settings */ | |
1813 | devRead->intrConf.autoMask = adapter->intr.mask_mode == | |
1814 | VMXNET3_IMM_AUTO; | |
1815 | devRead->intrConf.numIntrs = adapter->intr.num_intrs; | |
1816 | for (i = 0; i < adapter->intr.num_intrs; i++) | |
1817 | devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i]; | |
1818 | ||
1819 | devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx; | |
6929fe8a | 1820 | devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL); |
d1a890fa SB |
1821 | |
1822 | /* rx filter settings */ | |
1823 | devRead->rxFilterConf.rxMode = 0; | |
1824 | vmxnet3_restore_vlan(adapter); | |
1825 | /* the rest are already zeroed */ | |
1826 | } | |
1827 | ||
1828 | ||
1829 | int | |
1830 | vmxnet3_activate_dev(struct vmxnet3_adapter *adapter) | |
1831 | { | |
1832 | int err; | |
1833 | u32 ret; | |
1834 | ||
f6965582 RD |
1835 | dev_dbg(&adapter->netdev->dev, |
1836 | "%s: skb_buf_size %d, rx_buf_per_pkt %d, ring sizes" | |
d1a890fa SB |
1837 | " %u %u %u\n", adapter->netdev->name, adapter->skb_buf_size, |
1838 | adapter->rx_buf_per_pkt, adapter->tx_queue.tx_ring.size, | |
1839 | adapter->rx_queue.rx_ring[0].size, | |
1840 | adapter->rx_queue.rx_ring[1].size); | |
1841 | ||
1842 | vmxnet3_tq_init(&adapter->tx_queue, adapter); | |
1843 | err = vmxnet3_rq_init(&adapter->rx_queue, adapter); | |
1844 | if (err) { | |
1845 | printk(KERN_ERR "Failed to init rx queue for %s: error %d\n", | |
1846 | adapter->netdev->name, err); | |
1847 | goto rq_err; | |
1848 | } | |
1849 | ||
1850 | err = vmxnet3_request_irqs(adapter); | |
1851 | if (err) { | |
1852 | printk(KERN_ERR "Failed to setup irq for %s: error %d\n", | |
1853 | adapter->netdev->name, err); | |
1854 | goto irq_err; | |
1855 | } | |
1856 | ||
1857 | vmxnet3_setup_driver_shared(adapter); | |
1858 | ||
115924b6 SB |
1859 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO( |
1860 | adapter->shared_pa)); | |
1861 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI( | |
1862 | adapter->shared_pa)); | |
d1a890fa SB |
1863 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, |
1864 | VMXNET3_CMD_ACTIVATE_DEV); | |
1865 | ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); | |
1866 | ||
1867 | if (ret != 0) { | |
1868 | printk(KERN_ERR "Failed to activate dev %s: error %u\n", | |
1869 | adapter->netdev->name, ret); | |
1870 | err = -EINVAL; | |
1871 | goto activate_err; | |
1872 | } | |
1873 | VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD, | |
1874 | adapter->rx_queue.rx_ring[0].next2fill); | |
1875 | VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD2, | |
1876 | adapter->rx_queue.rx_ring[1].next2fill); | |
1877 | ||
1878 | /* Apply the rx filter settins last. */ | |
1879 | vmxnet3_set_mc(adapter->netdev); | |
1880 | ||
1881 | /* | |
1882 | * Check link state when first activating device. It will start the | |
1883 | * tx queue if the link is up. | |
1884 | */ | |
4a1745fc | 1885 | vmxnet3_check_link(adapter, true); |
d1a890fa SB |
1886 | |
1887 | napi_enable(&adapter->napi); | |
1888 | vmxnet3_enable_all_intrs(adapter); | |
1889 | clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); | |
1890 | return 0; | |
1891 | ||
1892 | activate_err: | |
1893 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0); | |
1894 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0); | |
1895 | vmxnet3_free_irqs(adapter); | |
1896 | irq_err: | |
1897 | rq_err: | |
1898 | /* free up buffers we allocated */ | |
1899 | vmxnet3_rq_cleanup(&adapter->rx_queue, adapter); | |
1900 | return err; | |
1901 | } | |
1902 | ||
1903 | ||
1904 | void | |
1905 | vmxnet3_reset_dev(struct vmxnet3_adapter *adapter) | |
1906 | { | |
1907 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV); | |
1908 | } | |
1909 | ||
1910 | ||
1911 | int | |
1912 | vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter) | |
1913 | { | |
1914 | if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state)) | |
1915 | return 0; | |
1916 | ||
1917 | ||
1918 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | |
1919 | VMXNET3_CMD_QUIESCE_DEV); | |
1920 | vmxnet3_disable_all_intrs(adapter); | |
1921 | ||
1922 | napi_disable(&adapter->napi); | |
1923 | netif_tx_disable(adapter->netdev); | |
1924 | adapter->link_speed = 0; | |
1925 | netif_carrier_off(adapter->netdev); | |
1926 | ||
1927 | vmxnet3_tq_cleanup(&adapter->tx_queue, adapter); | |
1928 | vmxnet3_rq_cleanup(&adapter->rx_queue, adapter); | |
1929 | vmxnet3_free_irqs(adapter); | |
1930 | return 0; | |
1931 | } | |
1932 | ||
1933 | ||
1934 | static void | |
1935 | vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) | |
1936 | { | |
1937 | u32 tmp; | |
1938 | ||
1939 | tmp = *(u32 *)mac; | |
1940 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp); | |
1941 | ||
1942 | tmp = (mac[5] << 8) | mac[4]; | |
1943 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp); | |
1944 | } | |
1945 | ||
1946 | ||
1947 | static int | |
1948 | vmxnet3_set_mac_addr(struct net_device *netdev, void *p) | |
1949 | { | |
1950 | struct sockaddr *addr = p; | |
1951 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
1952 | ||
1953 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
1954 | vmxnet3_write_mac_addr(adapter, addr->sa_data); | |
1955 | ||
1956 | return 0; | |
1957 | } | |
1958 | ||
1959 | ||
1960 | /* ==================== initialization and cleanup routines ============ */ | |
1961 | ||
1962 | static int | |
1963 | vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64) | |
1964 | { | |
1965 | int err; | |
1966 | unsigned long mmio_start, mmio_len; | |
1967 | struct pci_dev *pdev = adapter->pdev; | |
1968 | ||
1969 | err = pci_enable_device(pdev); | |
1970 | if (err) { | |
1971 | printk(KERN_ERR "Failed to enable adapter %s: error %d\n", | |
1972 | pci_name(pdev), err); | |
1973 | return err; | |
1974 | } | |
1975 | ||
1976 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) { | |
1977 | if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) { | |
1978 | printk(KERN_ERR "pci_set_consistent_dma_mask failed " | |
1979 | "for adapter %s\n", pci_name(pdev)); | |
1980 | err = -EIO; | |
1981 | goto err_set_mask; | |
1982 | } | |
1983 | *dma64 = true; | |
1984 | } else { | |
1985 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) { | |
1986 | printk(KERN_ERR "pci_set_dma_mask failed for adapter " | |
1987 | "%s\n", pci_name(pdev)); | |
1988 | err = -EIO; | |
1989 | goto err_set_mask; | |
1990 | } | |
1991 | *dma64 = false; | |
1992 | } | |
1993 | ||
1994 | err = pci_request_selected_regions(pdev, (1 << 2) - 1, | |
1995 | vmxnet3_driver_name); | |
1996 | if (err) { | |
1997 | printk(KERN_ERR "Failed to request region for adapter %s: " | |
1998 | "error %d\n", pci_name(pdev), err); | |
1999 | goto err_set_mask; | |
2000 | } | |
2001 | ||
2002 | pci_set_master(pdev); | |
2003 | ||
2004 | mmio_start = pci_resource_start(pdev, 0); | |
2005 | mmio_len = pci_resource_len(pdev, 0); | |
2006 | adapter->hw_addr0 = ioremap(mmio_start, mmio_len); | |
2007 | if (!adapter->hw_addr0) { | |
2008 | printk(KERN_ERR "Failed to map bar0 for adapter %s\n", | |
2009 | pci_name(pdev)); | |
2010 | err = -EIO; | |
2011 | goto err_ioremap; | |
2012 | } | |
2013 | ||
2014 | mmio_start = pci_resource_start(pdev, 1); | |
2015 | mmio_len = pci_resource_len(pdev, 1); | |
2016 | adapter->hw_addr1 = ioremap(mmio_start, mmio_len); | |
2017 | if (!adapter->hw_addr1) { | |
2018 | printk(KERN_ERR "Failed to map bar1 for adapter %s\n", | |
2019 | pci_name(pdev)); | |
2020 | err = -EIO; | |
2021 | goto err_bar1; | |
2022 | } | |
2023 | return 0; | |
2024 | ||
2025 | err_bar1: | |
2026 | iounmap(adapter->hw_addr0); | |
2027 | err_ioremap: | |
2028 | pci_release_selected_regions(pdev, (1 << 2) - 1); | |
2029 | err_set_mask: | |
2030 | pci_disable_device(pdev); | |
2031 | return err; | |
2032 | } | |
2033 | ||
2034 | ||
2035 | static void | |
2036 | vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter) | |
2037 | { | |
2038 | BUG_ON(!adapter->pdev); | |
2039 | ||
2040 | iounmap(adapter->hw_addr0); | |
2041 | iounmap(adapter->hw_addr1); | |
2042 | pci_release_selected_regions(adapter->pdev, (1 << 2) - 1); | |
2043 | pci_disable_device(adapter->pdev); | |
2044 | } | |
2045 | ||
2046 | ||
2047 | static void | |
2048 | vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter) | |
2049 | { | |
2050 | size_t sz; | |
2051 | ||
2052 | if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE - | |
2053 | VMXNET3_MAX_ETH_HDR_SIZE) { | |
2054 | adapter->skb_buf_size = adapter->netdev->mtu + | |
2055 | VMXNET3_MAX_ETH_HDR_SIZE; | |
2056 | if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE) | |
2057 | adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE; | |
2058 | ||
2059 | adapter->rx_buf_per_pkt = 1; | |
2060 | } else { | |
2061 | adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE; | |
2062 | sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE + | |
2063 | VMXNET3_MAX_ETH_HDR_SIZE; | |
2064 | adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE; | |
2065 | } | |
2066 | ||
2067 | /* | |
2068 | * for simplicity, force the ring0 size to be a multiple of | |
2069 | * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN | |
2070 | */ | |
2071 | sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN; | |
2072 | adapter->rx_queue.rx_ring[0].size = (adapter->rx_queue.rx_ring[0].size + | |
2073 | sz - 1) / sz * sz; | |
2074 | adapter->rx_queue.rx_ring[0].size = min_t(u32, | |
2075 | adapter->rx_queue.rx_ring[0].size, | |
2076 | VMXNET3_RX_RING_MAX_SIZE / sz * sz); | |
2077 | } | |
2078 | ||
2079 | ||
2080 | int | |
2081 | vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size, | |
2082 | u32 rx_ring_size, u32 rx_ring2_size) | |
2083 | { | |
2084 | int err; | |
2085 | ||
2086 | adapter->tx_queue.tx_ring.size = tx_ring_size; | |
2087 | adapter->tx_queue.data_ring.size = tx_ring_size; | |
2088 | adapter->tx_queue.comp_ring.size = tx_ring_size; | |
2089 | adapter->tx_queue.shared = &adapter->tqd_start->ctrl; | |
2090 | adapter->tx_queue.stopped = true; | |
2091 | err = vmxnet3_tq_create(&adapter->tx_queue, adapter); | |
2092 | if (err) | |
2093 | return err; | |
2094 | ||
2095 | adapter->rx_queue.rx_ring[0].size = rx_ring_size; | |
2096 | adapter->rx_queue.rx_ring[1].size = rx_ring2_size; | |
2097 | vmxnet3_adjust_rx_ring_size(adapter); | |
2098 | adapter->rx_queue.comp_ring.size = adapter->rx_queue.rx_ring[0].size + | |
2099 | adapter->rx_queue.rx_ring[1].size; | |
2100 | adapter->rx_queue.qid = 0; | |
2101 | adapter->rx_queue.qid2 = 1; | |
2102 | adapter->rx_queue.shared = &adapter->rqd_start->ctrl; | |
2103 | err = vmxnet3_rq_create(&adapter->rx_queue, adapter); | |
2104 | if (err) | |
2105 | vmxnet3_tq_destroy(&adapter->tx_queue, adapter); | |
2106 | ||
2107 | return err; | |
2108 | } | |
2109 | ||
2110 | static int | |
2111 | vmxnet3_open(struct net_device *netdev) | |
2112 | { | |
2113 | struct vmxnet3_adapter *adapter; | |
2114 | int err; | |
2115 | ||
2116 | adapter = netdev_priv(netdev); | |
2117 | ||
2118 | spin_lock_init(&adapter->tx_queue.tx_lock); | |
2119 | ||
2120 | err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE, | |
2121 | VMXNET3_DEF_RX_RING_SIZE, | |
2122 | VMXNET3_DEF_RX_RING_SIZE); | |
2123 | if (err) | |
2124 | goto queue_err; | |
2125 | ||
2126 | err = vmxnet3_activate_dev(adapter); | |
2127 | if (err) | |
2128 | goto activate_err; | |
2129 | ||
2130 | return 0; | |
2131 | ||
2132 | activate_err: | |
2133 | vmxnet3_rq_destroy(&adapter->rx_queue, adapter); | |
2134 | vmxnet3_tq_destroy(&adapter->tx_queue, adapter); | |
2135 | queue_err: | |
2136 | return err; | |
2137 | } | |
2138 | ||
2139 | ||
2140 | static int | |
2141 | vmxnet3_close(struct net_device *netdev) | |
2142 | { | |
2143 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
2144 | ||
2145 | /* | |
2146 | * Reset_work may be in the middle of resetting the device, wait for its | |
2147 | * completion. | |
2148 | */ | |
2149 | while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) | |
2150 | msleep(1); | |
2151 | ||
2152 | vmxnet3_quiesce_dev(adapter); | |
2153 | ||
2154 | vmxnet3_rq_destroy(&adapter->rx_queue, adapter); | |
2155 | vmxnet3_tq_destroy(&adapter->tx_queue, adapter); | |
2156 | ||
2157 | clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); | |
2158 | ||
2159 | ||
2160 | return 0; | |
2161 | } | |
2162 | ||
2163 | ||
2164 | void | |
2165 | vmxnet3_force_close(struct vmxnet3_adapter *adapter) | |
2166 | { | |
2167 | /* | |
2168 | * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise | |
2169 | * vmxnet3_close() will deadlock. | |
2170 | */ | |
2171 | BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)); | |
2172 | ||
2173 | /* we need to enable NAPI, otherwise dev_close will deadlock */ | |
2174 | napi_enable(&adapter->napi); | |
2175 | dev_close(adapter->netdev); | |
2176 | } | |
2177 | ||
2178 | ||
2179 | static int | |
2180 | vmxnet3_change_mtu(struct net_device *netdev, int new_mtu) | |
2181 | { | |
2182 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
2183 | int err = 0; | |
2184 | ||
2185 | if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU) | |
2186 | return -EINVAL; | |
2187 | ||
2188 | if (new_mtu > 1500 && !adapter->jumbo_frame) | |
2189 | return -EINVAL; | |
2190 | ||
2191 | netdev->mtu = new_mtu; | |
2192 | ||
2193 | /* | |
2194 | * Reset_work may be in the middle of resetting the device, wait for its | |
2195 | * completion. | |
2196 | */ | |
2197 | while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) | |
2198 | msleep(1); | |
2199 | ||
2200 | if (netif_running(netdev)) { | |
2201 | vmxnet3_quiesce_dev(adapter); | |
2202 | vmxnet3_reset_dev(adapter); | |
2203 | ||
2204 | /* we need to re-create the rx queue based on the new mtu */ | |
2205 | vmxnet3_rq_destroy(&adapter->rx_queue, adapter); | |
2206 | vmxnet3_adjust_rx_ring_size(adapter); | |
2207 | adapter->rx_queue.comp_ring.size = | |
2208 | adapter->rx_queue.rx_ring[0].size + | |
2209 | adapter->rx_queue.rx_ring[1].size; | |
2210 | err = vmxnet3_rq_create(&adapter->rx_queue, adapter); | |
2211 | if (err) { | |
2212 | printk(KERN_ERR "%s: failed to re-create rx queue," | |
2213 | " error %d. Closing it.\n", netdev->name, err); | |
2214 | goto out; | |
2215 | } | |
2216 | ||
2217 | err = vmxnet3_activate_dev(adapter); | |
2218 | if (err) { | |
2219 | printk(KERN_ERR "%s: failed to re-activate, error %d. " | |
2220 | "Closing it\n", netdev->name, err); | |
2221 | goto out; | |
2222 | } | |
2223 | } | |
2224 | ||
2225 | out: | |
2226 | clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); | |
2227 | if (err) | |
2228 | vmxnet3_force_close(adapter); | |
2229 | ||
2230 | return err; | |
2231 | } | |
2232 | ||
2233 | ||
2234 | static void | |
2235 | vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64) | |
2236 | { | |
2237 | struct net_device *netdev = adapter->netdev; | |
2238 | ||
2239 | netdev->features = NETIF_F_SG | | |
2240 | NETIF_F_HW_CSUM | | |
2241 | NETIF_F_HW_VLAN_TX | | |
2242 | NETIF_F_HW_VLAN_RX | | |
2243 | NETIF_F_HW_VLAN_FILTER | | |
2244 | NETIF_F_TSO | | |
2245 | NETIF_F_TSO6 | | |
2246 | NETIF_F_LRO; | |
2247 | ||
2248 | printk(KERN_INFO "features: sg csum vlan jf tso tsoIPv6 lro"); | |
2249 | ||
2250 | adapter->rxcsum = true; | |
2251 | adapter->jumbo_frame = true; | |
2252 | adapter->lro = true; | |
2253 | ||
2254 | if (dma64) { | |
2255 | netdev->features |= NETIF_F_HIGHDMA; | |
2256 | printk(" highDMA"); | |
2257 | } | |
2258 | ||
2259 | netdev->vlan_features = netdev->features; | |
2260 | printk("\n"); | |
2261 | } | |
2262 | ||
2263 | ||
2264 | static void | |
2265 | vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) | |
2266 | { | |
2267 | u32 tmp; | |
2268 | ||
2269 | tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL); | |
2270 | *(u32 *)mac = tmp; | |
2271 | ||
2272 | tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH); | |
2273 | mac[4] = tmp & 0xff; | |
2274 | mac[5] = (tmp >> 8) & 0xff; | |
2275 | } | |
2276 | ||
2277 | ||
2278 | static void | |
2279 | vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter) | |
2280 | { | |
2281 | u32 cfg; | |
2282 | ||
2283 | /* intr settings */ | |
2284 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | |
2285 | VMXNET3_CMD_GET_CONF_INTR); | |
2286 | cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); | |
2287 | adapter->intr.type = cfg & 0x3; | |
2288 | adapter->intr.mask_mode = (cfg >> 2) & 0x3; | |
2289 | ||
2290 | if (adapter->intr.type == VMXNET3_IT_AUTO) { | |
0bdc0d70 SB |
2291 | adapter->intr.type = VMXNET3_IT_MSIX; |
2292 | } | |
d1a890fa | 2293 | |
8f7e524c | 2294 | #ifdef CONFIG_PCI_MSI |
0bdc0d70 SB |
2295 | if (adapter->intr.type == VMXNET3_IT_MSIX) { |
2296 | int err; | |
2297 | ||
d1a890fa SB |
2298 | adapter->intr.msix_entries[0].entry = 0; |
2299 | err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries, | |
2300 | VMXNET3_LINUX_MAX_MSIX_VECT); | |
2301 | if (!err) { | |
2302 | adapter->intr.num_intrs = 1; | |
2303 | adapter->intr.type = VMXNET3_IT_MSIX; | |
2304 | return; | |
2305 | } | |
0bdc0d70 SB |
2306 | adapter->intr.type = VMXNET3_IT_MSI; |
2307 | } | |
d1a890fa | 2308 | |
0bdc0d70 SB |
2309 | if (adapter->intr.type == VMXNET3_IT_MSI) { |
2310 | int err; | |
d1a890fa SB |
2311 | err = pci_enable_msi(adapter->pdev); |
2312 | if (!err) { | |
2313 | adapter->intr.num_intrs = 1; | |
d1a890fa SB |
2314 | return; |
2315 | } | |
2316 | } | |
0bdc0d70 | 2317 | #endif /* CONFIG_PCI_MSI */ |
d1a890fa SB |
2318 | |
2319 | adapter->intr.type = VMXNET3_IT_INTX; | |
2320 | ||
2321 | /* INT-X related setting */ | |
2322 | adapter->intr.num_intrs = 1; | |
2323 | } | |
2324 | ||
2325 | ||
2326 | static void | |
2327 | vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter) | |
2328 | { | |
2329 | if (adapter->intr.type == VMXNET3_IT_MSIX) | |
2330 | pci_disable_msix(adapter->pdev); | |
2331 | else if (adapter->intr.type == VMXNET3_IT_MSI) | |
2332 | pci_disable_msi(adapter->pdev); | |
2333 | else | |
2334 | BUG_ON(adapter->intr.type != VMXNET3_IT_INTX); | |
2335 | } | |
2336 | ||
2337 | ||
2338 | static void | |
2339 | vmxnet3_tx_timeout(struct net_device *netdev) | |
2340 | { | |
2341 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
2342 | adapter->tx_timeout_count++; | |
2343 | ||
2344 | printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name); | |
2345 | schedule_work(&adapter->work); | |
2346 | } | |
2347 | ||
2348 | ||
2349 | static void | |
2350 | vmxnet3_reset_work(struct work_struct *data) | |
2351 | { | |
2352 | struct vmxnet3_adapter *adapter; | |
2353 | ||
2354 | adapter = container_of(data, struct vmxnet3_adapter, work); | |
2355 | ||
2356 | /* if another thread is resetting the device, no need to proceed */ | |
2357 | if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) | |
2358 | return; | |
2359 | ||
2360 | /* if the device is closed, we must leave it alone */ | |
d9a5f210 | 2361 | rtnl_lock(); |
d1a890fa SB |
2362 | if (netif_running(adapter->netdev)) { |
2363 | printk(KERN_INFO "%s: resetting\n", adapter->netdev->name); | |
2364 | vmxnet3_quiesce_dev(adapter); | |
2365 | vmxnet3_reset_dev(adapter); | |
2366 | vmxnet3_activate_dev(adapter); | |
2367 | } else { | |
2368 | printk(KERN_INFO "%s: already closed\n", adapter->netdev->name); | |
2369 | } | |
d9a5f210 | 2370 | rtnl_unlock(); |
d1a890fa SB |
2371 | |
2372 | clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); | |
2373 | } | |
2374 | ||
2375 | ||
2376 | static int __devinit | |
2377 | vmxnet3_probe_device(struct pci_dev *pdev, | |
2378 | const struct pci_device_id *id) | |
2379 | { | |
2380 | static const struct net_device_ops vmxnet3_netdev_ops = { | |
2381 | .ndo_open = vmxnet3_open, | |
2382 | .ndo_stop = vmxnet3_close, | |
2383 | .ndo_start_xmit = vmxnet3_xmit_frame, | |
2384 | .ndo_set_mac_address = vmxnet3_set_mac_addr, | |
2385 | .ndo_change_mtu = vmxnet3_change_mtu, | |
2386 | .ndo_get_stats = vmxnet3_get_stats, | |
2387 | .ndo_tx_timeout = vmxnet3_tx_timeout, | |
2388 | .ndo_set_multicast_list = vmxnet3_set_mc, | |
2389 | .ndo_vlan_rx_register = vmxnet3_vlan_rx_register, | |
2390 | .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid, | |
2391 | .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid, | |
2392 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
2393 | .ndo_poll_controller = vmxnet3_netpoll, | |
2394 | #endif | |
2395 | }; | |
2396 | int err; | |
2397 | bool dma64 = false; /* stupid gcc */ | |
2398 | u32 ver; | |
2399 | struct net_device *netdev; | |
2400 | struct vmxnet3_adapter *adapter; | |
2401 | u8 mac[ETH_ALEN]; | |
2402 | ||
2403 | netdev = alloc_etherdev(sizeof(struct vmxnet3_adapter)); | |
2404 | if (!netdev) { | |
2405 | printk(KERN_ERR "Failed to alloc ethernet device for adapter " | |
2406 | "%s\n", pci_name(pdev)); | |
2407 | return -ENOMEM; | |
2408 | } | |
2409 | ||
2410 | pci_set_drvdata(pdev, netdev); | |
2411 | adapter = netdev_priv(netdev); | |
2412 | adapter->netdev = netdev; | |
2413 | adapter->pdev = pdev; | |
2414 | ||
2415 | adapter->shared = pci_alloc_consistent(adapter->pdev, | |
2416 | sizeof(struct Vmxnet3_DriverShared), | |
2417 | &adapter->shared_pa); | |
2418 | if (!adapter->shared) { | |
2419 | printk(KERN_ERR "Failed to allocate memory for %s\n", | |
2420 | pci_name(pdev)); | |
2421 | err = -ENOMEM; | |
2422 | goto err_alloc_shared; | |
2423 | } | |
2424 | ||
2425 | adapter->tqd_start = pci_alloc_consistent(adapter->pdev, | |
2426 | sizeof(struct Vmxnet3_TxQueueDesc) + | |
2427 | sizeof(struct Vmxnet3_RxQueueDesc), | |
2428 | &adapter->queue_desc_pa); | |
2429 | ||
2430 | if (!adapter->tqd_start) { | |
2431 | printk(KERN_ERR "Failed to allocate memory for %s\n", | |
2432 | pci_name(pdev)); | |
2433 | err = -ENOMEM; | |
2434 | goto err_alloc_queue_desc; | |
2435 | } | |
2436 | adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start | |
2437 | + 1); | |
2438 | ||
2439 | adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL); | |
2440 | if (adapter->pm_conf == NULL) { | |
2441 | printk(KERN_ERR "Failed to allocate memory for %s\n", | |
2442 | pci_name(pdev)); | |
2443 | err = -ENOMEM; | |
2444 | goto err_alloc_pm; | |
2445 | } | |
2446 | ||
2447 | err = vmxnet3_alloc_pci_resources(adapter, &dma64); | |
2448 | if (err < 0) | |
2449 | goto err_alloc_pci; | |
2450 | ||
2451 | ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS); | |
2452 | if (ver & 1) { | |
2453 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1); | |
2454 | } else { | |
2455 | printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter" | |
2456 | " %s\n", ver, pci_name(pdev)); | |
2457 | err = -EBUSY; | |
2458 | goto err_ver; | |
2459 | } | |
2460 | ||
2461 | ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS); | |
2462 | if (ver & 1) { | |
2463 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1); | |
2464 | } else { | |
2465 | printk(KERN_ERR "Incompatible upt version (0x%x) for " | |
2466 | "adapter %s\n", ver, pci_name(pdev)); | |
2467 | err = -EBUSY; | |
2468 | goto err_ver; | |
2469 | } | |
2470 | ||
2471 | vmxnet3_declare_features(adapter, dma64); | |
2472 | ||
2473 | adapter->dev_number = atomic_read(&devices_found); | |
2474 | vmxnet3_alloc_intr_resources(adapter); | |
2475 | ||
2476 | vmxnet3_read_mac_addr(adapter, mac); | |
2477 | memcpy(netdev->dev_addr, mac, netdev->addr_len); | |
2478 | ||
2479 | netdev->netdev_ops = &vmxnet3_netdev_ops; | |
2480 | netdev->watchdog_timeo = 5 * HZ; | |
2481 | vmxnet3_set_ethtool_ops(netdev); | |
2482 | ||
2483 | INIT_WORK(&adapter->work, vmxnet3_reset_work); | |
2484 | ||
2485 | netif_napi_add(netdev, &adapter->napi, vmxnet3_poll, 64); | |
2486 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
2487 | err = register_netdev(netdev); | |
2488 | ||
2489 | if (err) { | |
2490 | printk(KERN_ERR "Failed to register adapter %s\n", | |
2491 | pci_name(pdev)); | |
2492 | goto err_register; | |
2493 | } | |
2494 | ||
2495 | set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); | |
4a1745fc | 2496 | vmxnet3_check_link(adapter, false); |
d1a890fa SB |
2497 | atomic_inc(&devices_found); |
2498 | return 0; | |
2499 | ||
2500 | err_register: | |
2501 | vmxnet3_free_intr_resources(adapter); | |
2502 | err_ver: | |
2503 | vmxnet3_free_pci_resources(adapter); | |
2504 | err_alloc_pci: | |
2505 | kfree(adapter->pm_conf); | |
2506 | err_alloc_pm: | |
2507 | pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) + | |
2508 | sizeof(struct Vmxnet3_RxQueueDesc), | |
2509 | adapter->tqd_start, adapter->queue_desc_pa); | |
2510 | err_alloc_queue_desc: | |
2511 | pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), | |
2512 | adapter->shared, adapter->shared_pa); | |
2513 | err_alloc_shared: | |
2514 | pci_set_drvdata(pdev, NULL); | |
2515 | free_netdev(netdev); | |
2516 | return err; | |
2517 | } | |
2518 | ||
2519 | ||
2520 | static void __devexit | |
2521 | vmxnet3_remove_device(struct pci_dev *pdev) | |
2522 | { | |
2523 | struct net_device *netdev = pci_get_drvdata(pdev); | |
2524 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
2525 | ||
2526 | flush_scheduled_work(); | |
2527 | ||
2528 | unregister_netdev(netdev); | |
2529 | ||
2530 | vmxnet3_free_intr_resources(adapter); | |
2531 | vmxnet3_free_pci_resources(adapter); | |
2532 | kfree(adapter->pm_conf); | |
2533 | pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) + | |
2534 | sizeof(struct Vmxnet3_RxQueueDesc), | |
2535 | adapter->tqd_start, adapter->queue_desc_pa); | |
2536 | pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), | |
2537 | adapter->shared, adapter->shared_pa); | |
2538 | free_netdev(netdev); | |
2539 | } | |
2540 | ||
2541 | ||
2542 | #ifdef CONFIG_PM | |
2543 | ||
2544 | static int | |
2545 | vmxnet3_suspend(struct device *device) | |
2546 | { | |
2547 | struct pci_dev *pdev = to_pci_dev(device); | |
2548 | struct net_device *netdev = pci_get_drvdata(pdev); | |
2549 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
2550 | struct Vmxnet3_PMConf *pmConf; | |
2551 | struct ethhdr *ehdr; | |
2552 | struct arphdr *ahdr; | |
2553 | u8 *arpreq; | |
2554 | struct in_device *in_dev; | |
2555 | struct in_ifaddr *ifa; | |
2556 | int i = 0; | |
2557 | ||
2558 | if (!netif_running(netdev)) | |
2559 | return 0; | |
2560 | ||
2561 | vmxnet3_disable_all_intrs(adapter); | |
2562 | vmxnet3_free_irqs(adapter); | |
2563 | vmxnet3_free_intr_resources(adapter); | |
2564 | ||
2565 | netif_device_detach(netdev); | |
2566 | netif_stop_queue(netdev); | |
2567 | ||
2568 | /* Create wake-up filters. */ | |
2569 | pmConf = adapter->pm_conf; | |
2570 | memset(pmConf, 0, sizeof(*pmConf)); | |
2571 | ||
2572 | if (adapter->wol & WAKE_UCAST) { | |
2573 | pmConf->filters[i].patternSize = ETH_ALEN; | |
2574 | pmConf->filters[i].maskSize = 1; | |
2575 | memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN); | |
2576 | pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */ | |
2577 | ||
3843e515 | 2578 | pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; |
d1a890fa SB |
2579 | i++; |
2580 | } | |
2581 | ||
2582 | if (adapter->wol & WAKE_ARP) { | |
2583 | in_dev = in_dev_get(netdev); | |
2584 | if (!in_dev) | |
2585 | goto skip_arp; | |
2586 | ||
2587 | ifa = (struct in_ifaddr *)in_dev->ifa_list; | |
2588 | if (!ifa) | |
2589 | goto skip_arp; | |
2590 | ||
2591 | pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/ | |
2592 | sizeof(struct arphdr) + /* ARP header */ | |
2593 | 2 * ETH_ALEN + /* 2 Ethernet addresses*/ | |
2594 | 2 * sizeof(u32); /*2 IPv4 addresses */ | |
2595 | pmConf->filters[i].maskSize = | |
2596 | (pmConf->filters[i].patternSize - 1) / 8 + 1; | |
2597 | ||
2598 | /* ETH_P_ARP in Ethernet header. */ | |
2599 | ehdr = (struct ethhdr *)pmConf->filters[i].pattern; | |
2600 | ehdr->h_proto = htons(ETH_P_ARP); | |
2601 | ||
2602 | /* ARPOP_REQUEST in ARP header. */ | |
2603 | ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN]; | |
2604 | ahdr->ar_op = htons(ARPOP_REQUEST); | |
2605 | arpreq = (u8 *)(ahdr + 1); | |
2606 | ||
2607 | /* The Unicast IPv4 address in 'tip' field. */ | |
2608 | arpreq += 2 * ETH_ALEN + sizeof(u32); | |
2609 | *(u32 *)arpreq = ifa->ifa_address; | |
2610 | ||
2611 | /* The mask for the relevant bits. */ | |
2612 | pmConf->filters[i].mask[0] = 0x00; | |
2613 | pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */ | |
2614 | pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */ | |
2615 | pmConf->filters[i].mask[3] = 0x00; | |
2616 | pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */ | |
2617 | pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */ | |
2618 | in_dev_put(in_dev); | |
2619 | ||
3843e515 | 2620 | pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; |
d1a890fa SB |
2621 | i++; |
2622 | } | |
2623 | ||
2624 | skip_arp: | |
2625 | if (adapter->wol & WAKE_MAGIC) | |
3843e515 | 2626 | pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC; |
d1a890fa SB |
2627 | |
2628 | pmConf->numFilters = i; | |
2629 | ||
115924b6 SB |
2630 | adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); |
2631 | adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( | |
2632 | *pmConf)); | |
2633 | adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( | |
2634 | pmConf)); | |
d1a890fa SB |
2635 | |
2636 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | |
2637 | VMXNET3_CMD_UPDATE_PMCFG); | |
2638 | ||
2639 | pci_save_state(pdev); | |
2640 | pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND), | |
2641 | adapter->wol); | |
2642 | pci_disable_device(pdev); | |
2643 | pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND)); | |
2644 | ||
2645 | return 0; | |
2646 | } | |
2647 | ||
2648 | ||
2649 | static int | |
2650 | vmxnet3_resume(struct device *device) | |
2651 | { | |
2652 | int err; | |
2653 | struct pci_dev *pdev = to_pci_dev(device); | |
2654 | struct net_device *netdev = pci_get_drvdata(pdev); | |
2655 | struct vmxnet3_adapter *adapter = netdev_priv(netdev); | |
2656 | struct Vmxnet3_PMConf *pmConf; | |
2657 | ||
2658 | if (!netif_running(netdev)) | |
2659 | return 0; | |
2660 | ||
2661 | /* Destroy wake-up filters. */ | |
2662 | pmConf = adapter->pm_conf; | |
2663 | memset(pmConf, 0, sizeof(*pmConf)); | |
2664 | ||
115924b6 SB |
2665 | adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); |
2666 | adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( | |
2667 | *pmConf)); | |
0561cf3d | 2668 | adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( |
115924b6 | 2669 | pmConf)); |
d1a890fa SB |
2670 | |
2671 | netif_device_attach(netdev); | |
2672 | pci_set_power_state(pdev, PCI_D0); | |
2673 | pci_restore_state(pdev); | |
2674 | err = pci_enable_device_mem(pdev); | |
2675 | if (err != 0) | |
2676 | return err; | |
2677 | ||
2678 | pci_enable_wake(pdev, PCI_D0, 0); | |
2679 | ||
2680 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | |
2681 | VMXNET3_CMD_UPDATE_PMCFG); | |
2682 | vmxnet3_alloc_intr_resources(adapter); | |
2683 | vmxnet3_request_irqs(adapter); | |
2684 | vmxnet3_enable_all_intrs(adapter); | |
2685 | ||
2686 | return 0; | |
2687 | } | |
2688 | ||
47145210 | 2689 | static const struct dev_pm_ops vmxnet3_pm_ops = { |
d1a890fa SB |
2690 | .suspend = vmxnet3_suspend, |
2691 | .resume = vmxnet3_resume, | |
2692 | }; | |
2693 | #endif | |
2694 | ||
2695 | static struct pci_driver vmxnet3_driver = { | |
2696 | .name = vmxnet3_driver_name, | |
2697 | .id_table = vmxnet3_pciid_table, | |
2698 | .probe = vmxnet3_probe_device, | |
2699 | .remove = __devexit_p(vmxnet3_remove_device), | |
2700 | #ifdef CONFIG_PM | |
2701 | .driver.pm = &vmxnet3_pm_ops, | |
2702 | #endif | |
2703 | }; | |
2704 | ||
2705 | ||
2706 | static int __init | |
2707 | vmxnet3_init_module(void) | |
2708 | { | |
2709 | printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC, | |
2710 | VMXNET3_DRIVER_VERSION_REPORT); | |
2711 | return pci_register_driver(&vmxnet3_driver); | |
2712 | } | |
2713 | ||
2714 | module_init(vmxnet3_init_module); | |
2715 | ||
2716 | ||
2717 | static void | |
2718 | vmxnet3_exit_module(void) | |
2719 | { | |
2720 | pci_unregister_driver(&vmxnet3_driver); | |
2721 | } | |
2722 | ||
2723 | module_exit(vmxnet3_exit_module); | |
2724 | ||
2725 | MODULE_AUTHOR("VMware, Inc."); | |
2726 | MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC); | |
2727 | MODULE_LICENSE("GPL v2"); | |
2728 | MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING); |