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[PATCH] r8169: add module parameter (media)
[net-next-2.6.git] / drivers / net / r8169.c
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1da177e4
LT		 1/*
2=========================================================================
3 r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4 --------------------------------------------------------------------
5
6 History:
7 Feb 4 2002 - created initially by ShuChen <shuchen@realtek.com.tw>.
8 May 20 2002 - Add link status force-mode and TBI mode support.
9 2004 - Massive updates. See kernel SCM system for details.
10=========================================================================
11 1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
12 Command: 'insmod r8169 media = SET_MEDIA'
13 Ex: 'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
14
15 SET_MEDIA can be:
16 _10_Half = 0x01
17 _10_Full = 0x02
18 _100_Half = 0x04
19 _100_Full = 0x08
20 _1000_Full = 0x10
21
22 2. Support TBI mode.
23=========================================================================
24VERSION 1.1 <2002/10/4>
25
26 The bit4:0 of MII register 4 is called "selector field", and have to be
27 00001b to indicate support of IEEE std 802.3 during NWay process of
28 exchanging Link Code Word (FLP).
29
30VERSION 1.2 <2002/11/30>
31
32 - Large style cleanup
33 - Use ether_crc in stock kernel (linux/crc32.h)
34 - Copy mc_filter setup code from 8139cp
35 (includes an optimization, and avoids set_bit use)
36
37VERSION 1.6LK <2004/04/14>
38
39 - Merge of Realtek's version 1.6
40 - Conversion to DMA API
41 - Suspend/resume
42 - Endianness
43 - Misc Rx/Tx bugs
44
45VERSION 2.2LK <2005/01/25>
46
47 - RX csum, TX csum/SG, TSO
48 - VLAN
49 - baby (< 7200) Jumbo frames support
50 - Merge of Realtek's version 2.2 (new phy)
51 */
52
53#include <linux/module.h>
54#include <linux/moduleparam.h>
55#include <linux/pci.h>
56#include <linux/netdevice.h>
57#include <linux/etherdevice.h>
58#include <linux/delay.h>
59#include <linux/ethtool.h>
60#include <linux/mii.h>
61#include <linux/if_vlan.h>
62#include <linux/crc32.h>
63#include <linux/in.h>
64#include <linux/ip.h>
65#include <linux/tcp.h>
66#include <linux/init.h>
67#include <linux/dma-mapping.h>
68
69#include <asm/io.h>
70#include <asm/irq.h>
71
f7ccf420
SH		 72#ifdef CONFIG_R8169_NAPI
73#define NAPI_SUFFIX "-NAPI"
74#else
75#define NAPI_SUFFIX ""
76#endif
77
78#define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
1da177e4
LT		 79#define MODULENAME "r8169"
80#define PFX MODULENAME ": "
81
82#ifdef RTL8169_DEBUG
83#define assert(expr) \
84 if(!(expr)) { \
85 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
86 #expr,__FILE__,__FUNCTION__,__LINE__); \
87 }
88#define dprintk(fmt, args...) do { printk(PFX fmt, ## args); } while (0)
89#else
90#define assert(expr) do {} while (0)
91#define dprintk(fmt, args...) do {} while (0)
92#endif /* RTL8169_DEBUG */
93
94#define TX_BUFFS_AVAIL(tp) \
95 (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
96
97#ifdef CONFIG_R8169_NAPI
98#define rtl8169_rx_skb netif_receive_skb
99#define rtl8169_rx_hwaccel_skb vlan_hwaccel_rx
100#define rtl8169_rx_quota(count, quota) min(count, quota)
101#else
102#define rtl8169_rx_skb netif_rx
103#define rtl8169_rx_hwaccel_skb vlan_hwaccel_receive_skb
104#define rtl8169_rx_quota(count, quota) count
105#endif
106
107/* media options */
108#define MAX_UNITS 8
109static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
110static int num_media = 0;
111
112/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
113static int max_interrupt_work = 20;
114
115/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
116 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
117static int multicast_filter_limit = 32;
118
119/* MAC address length */
120#define MAC_ADDR_LEN 6
121
122#define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
123#define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
124#define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
125#define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
126#define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
127#define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */
128#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
129
130#define R8169_REGS_SIZE 256
131#define R8169_NAPI_WEIGHT 64
132#define NUM_TX_DESC 64 /* Number of Tx descriptor registers */
133#define NUM_RX_DESC 256 /* Number of Rx descriptor registers */
134#define RX_BUF_SIZE 1536 /* Rx Buffer size */
135#define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
136#define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
137
138#define RTL8169_TX_TIMEOUT (6*HZ)
139#define RTL8169_PHY_TIMEOUT (10*HZ)
140
141/* write/read MMIO register */
142#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
143#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
144#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
145#define RTL_R8(reg) readb (ioaddr + (reg))
146#define RTL_R16(reg) readw (ioaddr + (reg))
147#define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
148
149enum mac_version {
150 RTL_GIGA_MAC_VER_B = 0x00,
151 /* RTL_GIGA_MAC_VER_C = 0x03, */
152 RTL_GIGA_MAC_VER_D = 0x01,
153 RTL_GIGA_MAC_VER_E = 0x02,
154 RTL_GIGA_MAC_VER_X = 0x04 /* Greater than RTL_GIGA_MAC_VER_E */
155};
156
157enum phy_version {
158 RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
159 RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
160 RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
161 RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
162 RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
163 RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
164};
165
166
167#define _R(NAME,MAC,MASK) \
168 { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
169
170const static struct {
171 const char *name;
172 u8 mac_version;
173 u32 RxConfigMask; /* Clears the bits supported by this chip */
174} rtl_chip_info[] = {
175 _R("RTL8169", RTL_GIGA_MAC_VER_B, 0xff7e1880),
176 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_D, 0xff7e1880),
177 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_E, 0xff7e1880),
178 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_X, 0xff7e1880),
179};
180#undef _R
181
182static struct pci_device_id rtl8169_pci_tbl[] = {
53456f60
FR		 183 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), },
184 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), },
185 { PCI_DEVICE(0x16ec, 0x0116), },
1da177e4
LT		 186 {0,},
187};
188
189MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
190
191static int rx_copybreak = 200;
192static int use_dac;
193
194enum RTL8169_registers {
195 MAC0 = 0, /* Ethernet hardware address. */
196 MAR0 = 8, /* Multicast filter. */
197 TxDescStartAddrLow = 0x20,
198 TxDescStartAddrHigh = 0x24,
199 TxHDescStartAddrLow = 0x28,
200 TxHDescStartAddrHigh = 0x2c,
201 FLASH = 0x30,
202 ERSR = 0x36,
203 ChipCmd = 0x37,
204 TxPoll = 0x38,
205 IntrMask = 0x3C,
206 IntrStatus = 0x3E,
207 TxConfig = 0x40,
208 RxConfig = 0x44,
209 RxMissed = 0x4C,
210 Cfg9346 = 0x50,
211 Config0 = 0x51,
212 Config1 = 0x52,
213 Config2 = 0x53,
214 Config3 = 0x54,
215 Config4 = 0x55,
216 Config5 = 0x56,
217 MultiIntr = 0x5C,
218 PHYAR = 0x60,
219 TBICSR = 0x64,
220 TBI_ANAR = 0x68,
221 TBI_LPAR = 0x6A,
222 PHYstatus = 0x6C,
223 RxMaxSize = 0xDA,
224 CPlusCmd = 0xE0,
225 IntrMitigate = 0xE2,
226 RxDescAddrLow = 0xE4,
227 RxDescAddrHigh = 0xE8,
228 EarlyTxThres = 0xEC,
229 FuncEvent = 0xF0,
230 FuncEventMask = 0xF4,
231 FuncPresetState = 0xF8,
232 FuncForceEvent = 0xFC,
233};
234
235enum RTL8169_register_content {
236 /* InterruptStatusBits */
237 SYSErr = 0x8000,
238 PCSTimeout = 0x4000,
239 SWInt = 0x0100,
240 TxDescUnavail = 0x80,
241 RxFIFOOver = 0x40,
242 LinkChg = 0x20,
243 RxOverflow = 0x10,
244 TxErr = 0x08,
245 TxOK = 0x04,
246 RxErr = 0x02,
247 RxOK = 0x01,
248
249 /* RxStatusDesc */
250 RxRES = 0x00200000,
251 RxCRC = 0x00080000,
252 RxRUNT = 0x00100000,
253 RxRWT = 0x00400000,
254
255 /* ChipCmdBits */
256 CmdReset = 0x10,
257 CmdRxEnb = 0x08,
258 CmdTxEnb = 0x04,
259 RxBufEmpty = 0x01,
260
261 /* Cfg9346Bits */
262 Cfg9346_Lock = 0x00,
263 Cfg9346_Unlock = 0xC0,
264
265 /* rx_mode_bits */
266 AcceptErr = 0x20,
267 AcceptRunt = 0x10,
268 AcceptBroadcast = 0x08,
269 AcceptMulticast = 0x04,
270 AcceptMyPhys = 0x02,
271 AcceptAllPhys = 0x01,
272
273 /* RxConfigBits */
274 RxCfgFIFOShift = 13,
275 RxCfgDMAShift = 8,
276
277 /* TxConfigBits */
278 TxInterFrameGapShift = 24,
279 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
280
281 /* TBICSR p.28 */
282 TBIReset = 0x80000000,
283 TBILoopback = 0x40000000,
284 TBINwEnable = 0x20000000,
285 TBINwRestart = 0x10000000,
286 TBILinkOk = 0x02000000,
287 TBINwComplete = 0x01000000,
288
289 /* CPlusCmd p.31 */
290 RxVlan = (1 << 6),
291 RxChkSum = (1 << 5),
292 PCIDAC = (1 << 4),
293 PCIMulRW = (1 << 3),
294
295 /* rtl8169_PHYstatus */
296 TBI_Enable = 0x80,
297 TxFlowCtrl = 0x40,
298 RxFlowCtrl = 0x20,
299 _1000bpsF = 0x10,
300 _100bps = 0x08,
301 _10bps = 0x04,
302 LinkStatus = 0x02,
303 FullDup = 0x01,
304
305 /* GIGABIT_PHY_registers */
306 PHY_CTRL_REG = 0,
307 PHY_STAT_REG = 1,
308 PHY_AUTO_NEGO_REG = 4,
309 PHY_1000_CTRL_REG = 9,
310
311 /* GIGABIT_PHY_REG_BIT */
312 PHY_Restart_Auto_Nego = 0x0200,
313 PHY_Enable_Auto_Nego = 0x1000,
314
315 /* PHY_STAT_REG = 1 */
316 PHY_Auto_Neco_Comp = 0x0020,
317
318 /* PHY_AUTO_NEGO_REG = 4 */
319 PHY_Cap_10_Half = 0x0020,
320 PHY_Cap_10_Full = 0x0040,
321 PHY_Cap_100_Half = 0x0080,
322 PHY_Cap_100_Full = 0x0100,
323
324 /* PHY_1000_CTRL_REG = 9 */
325 PHY_Cap_1000_Full = 0x0200,
326
327 PHY_Cap_Null = 0x0,
328
329 /* _MediaType */
330 _10_Half = 0x01,
331 _10_Full = 0x02,
332 _100_Half = 0x04,
333 _100_Full = 0x08,
334 _1000_Full = 0x10,
335
336 /* _TBICSRBit */
337 TBILinkOK = 0x02000000,
338};
339
340enum _DescStatusBit {
341 DescOwn = (1 << 31), /* Descriptor is owned by NIC */
342 RingEnd = (1 << 30), /* End of descriptor ring */
343 FirstFrag = (1 << 29), /* First segment of a packet */
344 LastFrag = (1 << 28), /* Final segment of a packet */
345
346 /* Tx private */
347 LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */
348 MSSShift = 16, /* MSS value position */
349 MSSMask = 0xfff, /* MSS value + LargeSend bit: 12 bits */
350 IPCS = (1 << 18), /* Calculate IP checksum */
351 UDPCS = (1 << 17), /* Calculate UDP/IP checksum */
352 TCPCS = (1 << 16), /* Calculate TCP/IP checksum */
353 TxVlanTag = (1 << 17), /* Add VLAN tag */
354
355 /* Rx private */
356 PID1 = (1 << 18), /* Protocol ID bit 1/2 */
357 PID0 = (1 << 17), /* Protocol ID bit 2/2 */
358
359#define RxProtoUDP (PID1)
360#define RxProtoTCP (PID0)
361#define RxProtoIP (PID1 | PID0)
362#define RxProtoMask RxProtoIP
363
364 IPFail = (1 << 16), /* IP checksum failed */
365 UDPFail = (1 << 15), /* UDP/IP checksum failed */
366 TCPFail = (1 << 14), /* TCP/IP checksum failed */
367 RxVlanTag = (1 << 16), /* VLAN tag available */
368};
369
370#define RsvdMask 0x3fffc000
371
372struct TxDesc {
373 u32 opts1;
374 u32 opts2;
375 u64 addr;
376};
377
378struct RxDesc {
379 u32 opts1;
380 u32 opts2;
381 u64 addr;
382};
383
384struct ring_info {
385 struct sk_buff *skb;
386 u32 len;
387 u8 __pad[sizeof(void *) - sizeof(u32)];
388};
389
390struct rtl8169_private {
391 void __iomem *mmio_addr; /* memory map physical address */
392 struct pci_dev *pci_dev; /* Index of PCI device */
393 struct net_device_stats stats; /* statistics of net device */
394 spinlock_t lock; /* spin lock flag */
395 int chipset;
396 int mac_version;
397 int phy_version;
398 u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
399 u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
400 u32 dirty_rx;
401 u32 dirty_tx;
402 struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
403 struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
404 dma_addr_t TxPhyAddr;
405 dma_addr_t RxPhyAddr;
406 struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
407 struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */
408 unsigned rx_buf_sz;
409 struct timer_list timer;
410 u16 cp_cmd;
411 u16 intr_mask;
412 int phy_auto_nego_reg;
413 int phy_1000_ctrl_reg;
414#ifdef CONFIG_R8169_VLAN
415 struct vlan_group *vlgrp;
416#endif
417 int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
418 void (*get_settings)(struct net_device *, struct ethtool_cmd *);
419 void (*phy_reset_enable)(void __iomem *);
420 unsigned int (*phy_reset_pending)(void __iomem *);
421 unsigned int (*link_ok)(void __iomem *);
422 struct work_struct task;
423};
424
425MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@oss.sgi.com>");
426MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
427module_param_array(media, int, &num_media, 0);
df0a1bf6 428MODULE_PARM_DESC(media, "force phy operation. Deprecated by ethtool (8).");
1da177e4 429module_param(rx_copybreak, int, 0);
1b7efd58 430MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
1da177e4
LT		 431module_param(use_dac, int, 0);
432MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
433MODULE_LICENSE("GPL");
434MODULE_VERSION(RTL8169_VERSION);
435
436static int rtl8169_open(struct net_device *dev);
437static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
438static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance,
439 struct pt_regs *regs);
440static int rtl8169_init_ring(struct net_device *dev);
441static void rtl8169_hw_start(struct net_device *dev);
442static int rtl8169_close(struct net_device *dev);
443static void rtl8169_set_rx_mode(struct net_device *dev);
444static void rtl8169_tx_timeout(struct net_device *dev);
445static struct net_device_stats *rtl8169_get_stats(struct net_device *netdev);
446static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
447 void __iomem *);
448static int rtl8169_change_mtu(struct net_device *netdev, int new_mtu);
449static void rtl8169_down(struct net_device *dev);
450
451#ifdef CONFIG_R8169_NAPI
452static int rtl8169_poll(struct net_device *dev, int *budget);
453#endif
454
455static const u16 rtl8169_intr_mask =
456 SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
457static const u16 rtl8169_napi_event =
458 RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
459static const unsigned int rtl8169_rx_config =
460 (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
461
462#define PHY_Cap_10_Half_Or_Less PHY_Cap_10_Half
463#define PHY_Cap_10_Full_Or_Less PHY_Cap_10_Full | PHY_Cap_10_Half_Or_Less
464#define PHY_Cap_100_Half_Or_Less PHY_Cap_100_Half | PHY_Cap_10_Full_Or_Less
465#define PHY_Cap_100_Full_Or_Less PHY_Cap_100_Full | PHY_Cap_100_Half_Or_Less
466
467static void mdio_write(void __iomem *ioaddr, int RegAddr, int value)
468{
469 int i;
470
471 RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
472 udelay(1000);
473
474 for (i = 2000; i > 0; i--) {
475 /* Check if the RTL8169 has completed writing to the specified MII register */
476 if (!(RTL_R32(PHYAR) & 0x80000000))
477 break;
478 udelay(100);
479 }
480}
481
482static int mdio_read(void __iomem *ioaddr, int RegAddr)
483{
484 int i, value = -1;
485
486 RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
487 udelay(1000);
488
489 for (i = 2000; i > 0; i--) {
490 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
491 if (RTL_R32(PHYAR) & 0x80000000) {
492 value = (int) (RTL_R32(PHYAR) & 0xFFFF);
493 break;
494 }
495 udelay(100);
496 }
497 return value;
498}
499
500static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
501{
502 RTL_W16(IntrMask, 0x0000);
503
504 RTL_W16(IntrStatus, 0xffff);
505}
506
507static void rtl8169_asic_down(void __iomem *ioaddr)
508{
509 RTL_W8(ChipCmd, 0x00);
510 rtl8169_irq_mask_and_ack(ioaddr);
511 RTL_R16(CPlusCmd);
512}
513
514static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr)
515{
516 return RTL_R32(TBICSR) & TBIReset;
517}
518
519static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr)
520{
521 return mdio_read(ioaddr, 0) & 0x8000;
522}
523
524static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
525{
526 return RTL_R32(TBICSR) & TBILinkOk;
527}
528
529static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
530{
531 return RTL_R8(PHYstatus) & LinkStatus;
532}
533
534static void rtl8169_tbi_reset_enable(void __iomem *ioaddr)
535{
536 RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
537}
538
539static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
540{
541 unsigned int val;
542
543 val = (mdio_read(ioaddr, PHY_CTRL_REG) | 0x8000) & 0xffff;
544 mdio_write(ioaddr, PHY_CTRL_REG, val);
545}
546
547static void rtl8169_check_link_status(struct net_device *dev,
548 struct rtl8169_private *tp, void __iomem *ioaddr)
549{
550 unsigned long flags;
551
552 spin_lock_irqsave(&tp->lock, flags);
553 if (tp->link_ok(ioaddr)) {
554 netif_carrier_on(dev);
555 printk(KERN_INFO PFX "%s: link up\n", dev->name);
556 } else
557 netif_carrier_off(dev);
558 spin_unlock_irqrestore(&tp->lock, flags);
559}
560
561static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
562{
563 struct {
564 u16 speed;
565 u8 duplex;
566 u8 autoneg;
567 u8 media;
568 } link_settings[] = {
569 { SPEED_10, DUPLEX_HALF, AUTONEG_DISABLE, _10_Half },
570 { SPEED_10, DUPLEX_FULL, AUTONEG_DISABLE, _10_Full },
571 { SPEED_100, DUPLEX_HALF, AUTONEG_DISABLE, _100_Half },
572 { SPEED_100, DUPLEX_FULL, AUTONEG_DISABLE, _100_Full },
573 { SPEED_1000, DUPLEX_FULL, AUTONEG_DISABLE, _1000_Full },
574 /* Make TBI happy */
575 { SPEED_1000, DUPLEX_FULL, AUTONEG_ENABLE, 0xff }
576 }, *p;
577 unsigned char option;
578
579 option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
580
581 if ((option != 0xff) && !idx)
582 printk(KERN_WARNING PFX "media option is deprecated.\n");
583
584 for (p = link_settings; p->media != 0xff; p++) {
585 if (p->media == option)
586 break;
587 }
588 *autoneg = p->autoneg;
589 *speed = p->speed;
590 *duplex = p->duplex;
591}
592
593static void rtl8169_get_drvinfo(struct net_device *dev,
594 struct ethtool_drvinfo *info)
595{
596 struct rtl8169_private *tp = netdev_priv(dev);
597
598 strcpy(info->driver, MODULENAME);
599 strcpy(info->version, RTL8169_VERSION);
600 strcpy(info->bus_info, pci_name(tp->pci_dev));
601}
602
603static int rtl8169_get_regs_len(struct net_device *dev)
604{
605 return R8169_REGS_SIZE;
606}
607
608static int rtl8169_set_speed_tbi(struct net_device *dev,
609 u8 autoneg, u16 speed, u8 duplex)
610{
611 struct rtl8169_private *tp = netdev_priv(dev);
612 void __iomem *ioaddr = tp->mmio_addr;
613 int ret = 0;
614 u32 reg;
615
616 reg = RTL_R32(TBICSR);
617 if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
618 (duplex == DUPLEX_FULL)) {
619 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
620 } else if (autoneg == AUTONEG_ENABLE)
621 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
622 else {
623 printk(KERN_WARNING PFX
624 "%s: incorrect speed setting refused in TBI mode\n",
625 dev->name);
626 ret = -EOPNOTSUPP;
627 }
628
629 return ret;
630}
631
632static int rtl8169_set_speed_xmii(struct net_device *dev,
633 u8 autoneg, u16 speed, u8 duplex)
634{
635 struct rtl8169_private *tp = netdev_priv(dev);
636 void __iomem *ioaddr = tp->mmio_addr;
637 int auto_nego, giga_ctrl;
638
639 auto_nego = mdio_read(ioaddr, PHY_AUTO_NEGO_REG);
640 auto_nego &= ~(PHY_Cap_10_Half | PHY_Cap_10_Full |
641 PHY_Cap_100_Half | PHY_Cap_100_Full);
642 giga_ctrl = mdio_read(ioaddr, PHY_1000_CTRL_REG);
643 giga_ctrl &= ~(PHY_Cap_1000_Full | PHY_Cap_Null);
644
645 if (autoneg == AUTONEG_ENABLE) {
646 auto_nego |= (PHY_Cap_10_Half | PHY_Cap_10_Full |
647 PHY_Cap_100_Half | PHY_Cap_100_Full);
648 giga_ctrl |= PHY_Cap_1000_Full;
649 } else {
650 if (speed == SPEED_10)
651 auto_nego |= PHY_Cap_10_Half | PHY_Cap_10_Full;
652 else if (speed == SPEED_100)
653 auto_nego |= PHY_Cap_100_Half | PHY_Cap_100_Full;
654 else if (speed == SPEED_1000)
655 giga_ctrl |= PHY_Cap_1000_Full;
656
657 if (duplex == DUPLEX_HALF)
658 auto_nego &= ~(PHY_Cap_10_Full | PHY_Cap_100_Full);
659 }
660
661 tp->phy_auto_nego_reg = auto_nego;
662 tp->phy_1000_ctrl_reg = giga_ctrl;
663
664 mdio_write(ioaddr, PHY_AUTO_NEGO_REG, auto_nego);
665 mdio_write(ioaddr, PHY_1000_CTRL_REG, giga_ctrl);
666 mdio_write(ioaddr, PHY_CTRL_REG, PHY_Enable_Auto_Nego |
667 PHY_Restart_Auto_Nego);
668 return 0;
669}
670
671static int rtl8169_set_speed(struct net_device *dev,
672 u8 autoneg, u16 speed, u8 duplex)
673{
674 struct rtl8169_private *tp = netdev_priv(dev);
675 int ret;
676
677 ret = tp->set_speed(dev, autoneg, speed, duplex);
678
679 if (netif_running(dev) && (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
680 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
681
682 return ret;
683}
684
685static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
686{
687 struct rtl8169_private *tp = netdev_priv(dev);
688 unsigned long flags;
689 int ret;
690
691 spin_lock_irqsave(&tp->lock, flags);
692 ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
693 spin_unlock_irqrestore(&tp->lock, flags);
694
695 return ret;
696}
697
698static u32 rtl8169_get_rx_csum(struct net_device *dev)
699{
700 struct rtl8169_private *tp = netdev_priv(dev);
701
702 return tp->cp_cmd & RxChkSum;
703}
704
705static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
706{
707 struct rtl8169_private *tp = netdev_priv(dev);
708 void __iomem *ioaddr = tp->mmio_addr;
709 unsigned long flags;
710
711 spin_lock_irqsave(&tp->lock, flags);
712
713 if (data)
714 tp->cp_cmd |= RxChkSum;
715 else
716 tp->cp_cmd &= ~RxChkSum;
717
718 RTL_W16(CPlusCmd, tp->cp_cmd);
719 RTL_R16(CPlusCmd);
720
721 spin_unlock_irqrestore(&tp->lock, flags);
722
723 return 0;
724}
725
726#ifdef CONFIG_R8169_VLAN
727
728static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
729 struct sk_buff *skb)
730{
731 return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
732 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
733}
734
735static void rtl8169_vlan_rx_register(struct net_device *dev,
736 struct vlan_group *grp)
737{
738 struct rtl8169_private *tp = netdev_priv(dev);
739 void __iomem *ioaddr = tp->mmio_addr;
740 unsigned long flags;
741
742 spin_lock_irqsave(&tp->lock, flags);
743 tp->vlgrp = grp;
744 if (tp->vlgrp)
745 tp->cp_cmd |= RxVlan;
746 else
747 tp->cp_cmd &= ~RxVlan;
748 RTL_W16(CPlusCmd, tp->cp_cmd);
749 RTL_R16(CPlusCmd);
750 spin_unlock_irqrestore(&tp->lock, flags);
751}
752
753static void rtl8169_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
754{
755 struct rtl8169_private *tp = netdev_priv(dev);
756 unsigned long flags;
757
758 spin_lock_irqsave(&tp->lock, flags);
759 if (tp->vlgrp)
760 tp->vlgrp->vlan_devices[vid] = NULL;
761 spin_unlock_irqrestore(&tp->lock, flags);
762}
763
764static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
765 struct sk_buff *skb)
766{
767 u32 opts2 = le32_to_cpu(desc->opts2);
768 int ret;
769
770 if (tp->vlgrp && (opts2 & RxVlanTag)) {
771 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp,
772 swab16(opts2 & 0xffff));
773 ret = 0;
774 } else
775 ret = -1;
776 desc->opts2 = 0;
777 return ret;
778}
779
780#else /* !CONFIG_R8169_VLAN */
781
782static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
783 struct sk_buff *skb)
784{
785 return 0;
786}
787
788static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
789 struct sk_buff *skb)
790{
791 return -1;
792}
793
794#endif
795
796static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
797{
798 struct rtl8169_private *tp = netdev_priv(dev);
799 void __iomem *ioaddr = tp->mmio_addr;
800 u32 status;
801
802 cmd->supported =
803 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
804 cmd->port = PORT_FIBRE;
805 cmd->transceiver = XCVR_INTERNAL;
806
807 status = RTL_R32(TBICSR);
808 cmd->advertising = (status & TBINwEnable) ? ADVERTISED_Autoneg : 0;
809 cmd->autoneg = !!(status & TBINwEnable);
810
811 cmd->speed = SPEED_1000;
812 cmd->duplex = DUPLEX_FULL; /* Always set */
813}
814
815static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
816{
817 struct rtl8169_private *tp = netdev_priv(dev);
818 void __iomem *ioaddr = tp->mmio_addr;
819 u8 status;
820
821 cmd->supported = SUPPORTED_10baseT_Half |
822 SUPPORTED_10baseT_Full |
823 SUPPORTED_100baseT_Half |
824 SUPPORTED_100baseT_Full |
825 SUPPORTED_1000baseT_Full |
826 SUPPORTED_Autoneg |
827 SUPPORTED_TP;
828
829 cmd->autoneg = 1;
830 cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
831
832 if (tp->phy_auto_nego_reg & PHY_Cap_10_Half)
833 cmd->advertising |= ADVERTISED_10baseT_Half;
834 if (tp->phy_auto_nego_reg & PHY_Cap_10_Full)
835 cmd->advertising |= ADVERTISED_10baseT_Full;
836 if (tp->phy_auto_nego_reg & PHY_Cap_100_Half)
837 cmd->advertising |= ADVERTISED_100baseT_Half;
838 if (tp->phy_auto_nego_reg & PHY_Cap_100_Full)
839 cmd->advertising |= ADVERTISED_100baseT_Full;
840 if (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full)
841 cmd->advertising |= ADVERTISED_1000baseT_Full;
842
843 status = RTL_R8(PHYstatus);
844
845 if (status & _1000bpsF)
846 cmd->speed = SPEED_1000;
847 else if (status & _100bps)
848 cmd->speed = SPEED_100;
849 else if (status & _10bps)
850 cmd->speed = SPEED_10;
851
852 cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
853 DUPLEX_FULL : DUPLEX_HALF;
854}
855
856static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
857{
858 struct rtl8169_private *tp = netdev_priv(dev);
859 unsigned long flags;
860
861 spin_lock_irqsave(&tp->lock, flags);
862
863 tp->get_settings(dev, cmd);
864
865 spin_unlock_irqrestore(&tp->lock, flags);
866 return 0;
867}
868
869static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
870 void *p)
871{
872 struct rtl8169_private *tp = netdev_priv(dev);
873 unsigned long flags;
874
875 if (regs->len > R8169_REGS_SIZE)
876 regs->len = R8169_REGS_SIZE;
877
878 spin_lock_irqsave(&tp->lock, flags);
879 memcpy_fromio(p, tp->mmio_addr, regs->len);
880 spin_unlock_irqrestore(&tp->lock, flags);
881}
882
883static struct ethtool_ops rtl8169_ethtool_ops = {
884 .get_drvinfo = rtl8169_get_drvinfo,
885 .get_regs_len = rtl8169_get_regs_len,
886 .get_link = ethtool_op_get_link,
887 .get_settings = rtl8169_get_settings,
888 .set_settings = rtl8169_set_settings,
889 .get_rx_csum = rtl8169_get_rx_csum,
890 .set_rx_csum = rtl8169_set_rx_csum,
891 .get_tx_csum = ethtool_op_get_tx_csum,
892 .set_tx_csum = ethtool_op_set_tx_csum,
893 .get_sg = ethtool_op_get_sg,
894 .set_sg = ethtool_op_set_sg,
895 .get_tso = ethtool_op_get_tso,
896 .set_tso = ethtool_op_set_tso,
897 .get_regs = rtl8169_get_regs,
898};
899
900static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum,
901 int bitval)
902{
903 int val;
904
905 val = mdio_read(ioaddr, reg);
906 val = (bitval == 1) ?
907 val | (bitval << bitnum) : val & ~(0x0001 << bitnum);
908 mdio_write(ioaddr, reg, val & 0xffff);
909}
910
911static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
912{
913 const struct {
914 u32 mask;
915 int mac_version;
916 } mac_info[] = {
917 { 0x1 << 28, RTL_GIGA_MAC_VER_X },
918 { 0x1 << 26, RTL_GIGA_MAC_VER_E },
919 { 0x1 << 23, RTL_GIGA_MAC_VER_D },
920 { 0x00000000, RTL_GIGA_MAC_VER_B } /* Catch-all */
921 }, *p = mac_info;
922 u32 reg;
923
924 reg = RTL_R32(TxConfig) & 0x7c800000;
925 while ((reg & p->mask) != p->mask)
926 p++;
927 tp->mac_version = p->mac_version;
928}
929
930static void rtl8169_print_mac_version(struct rtl8169_private *tp)
931{
932 struct {
933 int version;
934 char *msg;
935 } mac_print[] = {
936 { RTL_GIGA_MAC_VER_E, "RTL_GIGA_MAC_VER_E" },
937 { RTL_GIGA_MAC_VER_D, "RTL_GIGA_MAC_VER_D" },
938 { RTL_GIGA_MAC_VER_B, "RTL_GIGA_MAC_VER_B" },
939 { 0, NULL }
940 }, *p;
941
942 for (p = mac_print; p->msg; p++) {
943 if (tp->mac_version == p->version) {
944 dprintk("mac_version == %s (%04d)\n", p->msg,
945 p->version);
946 return;
947 }
948 }
949 dprintk("mac_version == Unknown\n");
950}
951
952static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr)
953{
954 const struct {
955 u16 mask;
956 u16 set;
957 int phy_version;
958 } phy_info[] = {
959 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
960 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
961 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
962 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
963 }, *p = phy_info;
964 u16 reg;
965
966 reg = mdio_read(ioaddr, 3) & 0xffff;
967 while ((reg & p->mask) != p->set)
968 p++;
969 tp->phy_version = p->phy_version;
970}
971
972static void rtl8169_print_phy_version(struct rtl8169_private *tp)
973{
974 struct {
975 int version;
976 char *msg;
977 u32 reg;
978 } phy_print[] = {
979 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
980 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
981 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
982 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
983 { 0, NULL, 0x0000 }
984 }, *p;
985
986 for (p = phy_print; p->msg; p++) {
987 if (tp->phy_version == p->version) {
988 dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
989 return;
990 }
991 }
992 dprintk("phy_version == Unknown\n");
993}
994
995static void rtl8169_hw_phy_config(struct net_device *dev)
996{
997 struct rtl8169_private *tp = netdev_priv(dev);
998 void __iomem *ioaddr = tp->mmio_addr;
999 struct {
1000 u16 regs[5]; /* Beware of bit-sign propagation */
1001 } phy_magic[5] = { {
1002 { 0x0000, //w 4 15 12 0
1003 0x00a1, //w 3 15 0 00a1
1004 0x0008, //w 2 15 0 0008
1005 0x1020, //w 1 15 0 1020
1006 0x1000 } },{ //w 0 15 0 1000
1007 { 0x7000, //w 4 15 12 7
1008 0xff41, //w 3 15 0 ff41
1009 0xde60, //w 2 15 0 de60
1010 0x0140, //w 1 15 0 0140
1011 0x0077 } },{ //w 0 15 0 0077
1012 { 0xa000, //w 4 15 12 a
1013 0xdf01, //w 3 15 0 df01
1014 0xdf20, //w 2 15 0 df20
1015 0xff95, //w 1 15 0 ff95
1016 0xfa00 } },{ //w 0 15 0 fa00
1017 { 0xb000, //w 4 15 12 b
1018 0xff41, //w 3 15 0 ff41
1019 0xde20, //w 2 15 0 de20
1020 0x0140, //w 1 15 0 0140
1021 0x00bb } },{ //w 0 15 0 00bb
1022 { 0xf000, //w 4 15 12 f
1023 0xdf01, //w 3 15 0 df01
1024 0xdf20, //w 2 15 0 df20
1025 0xff95, //w 1 15 0 ff95
1026 0xbf00 } //w 0 15 0 bf00
1027 }
1028 }, *p = phy_magic;
1029 int i;
1030
1031 rtl8169_print_mac_version(tp);
1032 rtl8169_print_phy_version(tp);
1033
1034 if (tp->mac_version <= RTL_GIGA_MAC_VER_B)
1035 return;
1036 if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
1037 return;
1038
1039 dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1040 dprintk("Do final_reg2.cfg\n");
1041
1042 /* Shazam ! */
1043
1044 if (tp->mac_version == RTL_GIGA_MAC_VER_X) {
1045 mdio_write(ioaddr, 31, 0x0001);
1046 mdio_write(ioaddr, 9, 0x273a);
1047 mdio_write(ioaddr, 14, 0x7bfb);
1048 mdio_write(ioaddr, 27, 0x841e);
1049
1050 mdio_write(ioaddr, 31, 0x0002);
1051 mdio_write(ioaddr, 1, 0x90d0);
1052 mdio_write(ioaddr, 31, 0x0000);
1053 return;
1054 }
1055
1056 /* phy config for RTL8169s mac_version C chip */
1057 mdio_write(ioaddr, 31, 0x0001); //w 31 2 0 1
1058 mdio_write(ioaddr, 21, 0x1000); //w 21 15 0 1000
1059 mdio_write(ioaddr, 24, 0x65c7); //w 24 15 0 65c7
1060 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1061
1062 for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
1063 int val, pos = 4;
1064
1065 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
1066 mdio_write(ioaddr, pos, val);
1067 while (--pos >= 0)
1068 mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
1069 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
1070 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1071 }
1072 mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
1073}
1074
1075static void rtl8169_phy_timer(unsigned long __opaque)
1076{
1077 struct net_device *dev = (struct net_device *)__opaque;
1078 struct rtl8169_private *tp = netdev_priv(dev);
1079 struct timer_list *timer = &tp->timer;
1080 void __iomem *ioaddr = tp->mmio_addr;
1081 unsigned long timeout = RTL8169_PHY_TIMEOUT;
1082
1083 assert(tp->mac_version > RTL_GIGA_MAC_VER_B);
1084 assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
1085
1086 if (!(tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
1087 return;
1088
1089 spin_lock_irq(&tp->lock);
1090
1091 if (tp->phy_reset_pending(ioaddr)) {
1092 /*
1093 * A busy loop could burn quite a few cycles on nowadays CPU.
1094 * Let's delay the execution of the timer for a few ticks.
1095 */
1096 timeout = HZ/10;
1097 goto out_mod_timer;
1098 }
1099
1100 if (tp->link_ok(ioaddr))
1101 goto out_unlock;
1102
1103 printk(KERN_WARNING PFX "%s: PHY reset until link up\n", dev->name);
1104
1105 tp->phy_reset_enable(ioaddr);
1106
1107out_mod_timer:
1108 mod_timer(timer, jiffies + timeout);
1109out_unlock:
1110 spin_unlock_irq(&tp->lock);
1111}
1112
1113static inline void rtl8169_delete_timer(struct net_device *dev)
1114{
1115 struct rtl8169_private *tp = netdev_priv(dev);
1116 struct timer_list *timer = &tp->timer;
1117
1118 if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1119 (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1120 return;
1121
1122 del_timer_sync(timer);
1123}
1124
1125static inline void rtl8169_request_timer(struct net_device *dev)
1126{
1127 struct rtl8169_private *tp = netdev_priv(dev);
1128 struct timer_list *timer = &tp->timer;
1129
1130 if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1131 (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1132 return;
1133
1134 init_timer(timer);
1135 timer->expires = jiffies + RTL8169_PHY_TIMEOUT;
1136 timer->data = (unsigned long)(dev);
1137 timer->function = rtl8169_phy_timer;
1138 add_timer(timer);
1139}
1140
1141#ifdef CONFIG_NET_POLL_CONTROLLER
1142/*
1143 * Polling 'interrupt' - used by things like netconsole to send skbs
1144 * without having to re-enable interrupts. It's not called while
1145 * the interrupt routine is executing.
1146 */
1147static void rtl8169_netpoll(struct net_device *dev)
1148{
1149 struct rtl8169_private *tp = netdev_priv(dev);
1150 struct pci_dev *pdev = tp->pci_dev;
1151
1152 disable_irq(pdev->irq);
1153 rtl8169_interrupt(pdev->irq, dev, NULL);
1154 enable_irq(pdev->irq);
1155}
1156#endif
1157
1158static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
1159 void __iomem *ioaddr)
1160{
1161 iounmap(ioaddr);
1162 pci_release_regions(pdev);
1163 pci_disable_device(pdev);
1164 free_netdev(dev);
1165}
1166
1167static int __devinit
1168rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out,
1169 void __iomem **ioaddr_out)
1170{
1171 void __iomem *ioaddr;
1172 struct net_device *dev;
1173 struct rtl8169_private *tp;
1174 int rc = -ENOMEM, i, acpi_idle_state = 0, pm_cap;
1175
1176 assert(ioaddr_out != NULL);
1177
1178 /* dev zeroed in alloc_etherdev */
1179 dev = alloc_etherdev(sizeof (*tp));
1180 if (dev == NULL) {
1181 printk(KERN_ERR PFX "unable to alloc new ethernet\n");
1182 goto err_out;
1183 }
1184
1185 SET_MODULE_OWNER(dev);
1186 SET_NETDEV_DEV(dev, &pdev->dev);
1187 tp = netdev_priv(dev);
1188
1189 /* enable device (incl. PCI PM wakeup and hotplug setup) */
1190 rc = pci_enable_device(pdev);
1191 if (rc) {
1192 printk(KERN_ERR PFX "%s: enable failure\n", pci_name(pdev));
1193 goto err_out_free_dev;
1194 }
1195
1196 rc = pci_set_mwi(pdev);
1197 if (rc < 0)
1198 goto err_out_disable;
1199
1200 /* save power state before pci_enable_device overwrites it */
1201 pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1202 if (pm_cap) {
1203 u16 pwr_command;
1204
1205 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1206 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1207 } else {
1208 printk(KERN_ERR PFX
1209 "Cannot find PowerManagement capability, aborting.\n");
1210 goto err_out_mwi;
1211 }
1212
1213 /* make sure PCI base addr 1 is MMIO */
1214 if (!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1215 printk(KERN_ERR PFX
1216 "region #1 not an MMIO resource, aborting\n");
1217 rc = -ENODEV;
1218 goto err_out_mwi;
1219 }
1220 /* check for weird/broken PCI region reporting */
1221 if (pci_resource_len(pdev, 1) < R8169_REGS_SIZE) {
1222 printk(KERN_ERR PFX "Invalid PCI region size(s), aborting\n");
1223 rc = -ENODEV;
1224 goto err_out_mwi;
1225 }
1226
1227 rc = pci_request_regions(pdev, MODULENAME);
1228 if (rc) {
1229 printk(KERN_ERR PFX "%s: could not request regions.\n",
1230 pci_name(pdev));
1231 goto err_out_mwi;
1232 }
1233
1234 tp->cp_cmd = PCIMulRW | RxChkSum;
1235
1236 if ((sizeof(dma_addr_t) > 4) &&
1237 !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
1238 tp->cp_cmd |= PCIDAC;
1239 dev->features |= NETIF_F_HIGHDMA;
1240 } else {
1241 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1242 if (rc < 0) {
1243 printk(KERN_ERR PFX "DMA configuration failed.\n");
1244 goto err_out_free_res;
1245 }
1246 }
1247
1248 pci_set_master(pdev);
1249
1250 /* ioremap MMIO region */
1251 ioaddr = ioremap(pci_resource_start(pdev, 1), R8169_REGS_SIZE);
1252 if (ioaddr == NULL) {
1253 printk(KERN_ERR PFX "cannot remap MMIO, aborting\n");
1254 rc = -EIO;
1255 goto err_out_free_res;
1256 }
1257
1258 /* Unneeded ? Don't mess with Mrs. Murphy. */
1259 rtl8169_irq_mask_and_ack(ioaddr);
1260
1261 /* Soft reset the chip. */
1262 RTL_W8(ChipCmd, CmdReset);
1263
1264 /* Check that the chip has finished the reset. */
1265 for (i = 1000; i > 0; i--) {
1266 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1267 break;
1268 udelay(10);
1269 }
1270
1271 /* Identify chip attached to board */
1272 rtl8169_get_mac_version(tp, ioaddr);
1273 rtl8169_get_phy_version(tp, ioaddr);
1274
1275 rtl8169_print_mac_version(tp);
1276 rtl8169_print_phy_version(tp);
1277
1278 for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1279 if (tp->mac_version == rtl_chip_info[i].mac_version)
1280 break;
1281 }
1282 if (i < 0) {
1283 /* Unknown chip: assume array element #0, original RTL-8169 */
1284 printk(KERN_DEBUG PFX
1285 "PCI device %s: unknown chip version, assuming %s\n",
1286 pci_name(pdev), rtl_chip_info[0].name);
1287 i++;
1288 }
1289 tp->chipset = i;
1290
1291 *ioaddr_out = ioaddr;
1292 *dev_out = dev;
1293out:
1294 return rc;
1295
1296err_out_free_res:
1297 pci_release_regions(pdev);
1298
1299err_out_mwi:
1300 pci_clear_mwi(pdev);
1301
1302err_out_disable:
1303 pci_disable_device(pdev);
1304
1305err_out_free_dev:
1306 free_netdev(dev);
1307err_out:
1308 *ioaddr_out = NULL;
1309 *dev_out = NULL;
1310 goto out;
1311}
1312
1313static int __devinit
1314rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1315{
1316 struct net_device *dev = NULL;
1317 struct rtl8169_private *tp;
1318 void __iomem *ioaddr = NULL;
1319 static int board_idx = -1;
1320 static int printed_version = 0;
1321 u8 autoneg, duplex;
1322 u16 speed;
1323 int i, rc;
1324
1325 assert(pdev != NULL);
1326 assert(ent != NULL);
1327
1328 board_idx++;
1329
1330 if (!printed_version) {
1331 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
1332 MODULENAME, RTL8169_VERSION);
1333 printed_version = 1;
1334 }
1335
1336 rc = rtl8169_init_board(pdev, &dev, &ioaddr);
1337 if (rc)
1338 return rc;
1339
1340 tp = netdev_priv(dev);
1341 assert(ioaddr != NULL);
1342
1343 if (RTL_R8(PHYstatus) & TBI_Enable) {
1344 tp->set_speed = rtl8169_set_speed_tbi;
1345 tp->get_settings = rtl8169_gset_tbi;
1346 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1347 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1348 tp->link_ok = rtl8169_tbi_link_ok;
1349
1350 tp->phy_1000_ctrl_reg = PHY_Cap_1000_Full; /* Implied by TBI */
1351 } else {
1352 tp->set_speed = rtl8169_set_speed_xmii;
1353 tp->get_settings = rtl8169_gset_xmii;
1354 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1355 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1356 tp->link_ok = rtl8169_xmii_link_ok;
1357 }
1358
1359 /* Get MAC address. FIXME: read EEPROM */
1360 for (i = 0; i < MAC_ADDR_LEN; i++)
1361 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1362
1363 dev->open = rtl8169_open;
1364 dev->hard_start_xmit = rtl8169_start_xmit;
1365 dev->get_stats = rtl8169_get_stats;
1366 SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
1367 dev->stop = rtl8169_close;
1368 dev->tx_timeout = rtl8169_tx_timeout;
1369 dev->set_multicast_list = rtl8169_set_rx_mode;
1370 dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1371 dev->irq = pdev->irq;
1372 dev->base_addr = (unsigned long) ioaddr;
1373 dev->change_mtu = rtl8169_change_mtu;
1374
1375#ifdef CONFIG_R8169_NAPI
1376 dev->poll = rtl8169_poll;
1377 dev->weight = R8169_NAPI_WEIGHT;
1da177e4
LT		 1378#endif
1379
1380#ifdef CONFIG_R8169_VLAN
1381 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1382 dev->vlan_rx_register = rtl8169_vlan_rx_register;
1383 dev->vlan_rx_kill_vid = rtl8169_vlan_rx_kill_vid;
1384#endif
1385
1386#ifdef CONFIG_NET_POLL_CONTROLLER
1387 dev->poll_controller = rtl8169_netpoll;
1388#endif
1389
1390 tp->intr_mask = 0xffff;
1391 tp->pci_dev = pdev;
1392 tp->mmio_addr = ioaddr;
1393
1394 spin_lock_init(&tp->lock);
1395
1396 rc = register_netdev(dev);
1397 if (rc) {
1398 rtl8169_release_board(pdev, dev, ioaddr);
1399 return rc;
1400 }
1401
1402 printk(KERN_DEBUG "%s: Identified chip type is '%s'.\n", dev->name,
1403 rtl_chip_info[tp->chipset].name);
1404
1405 pci_set_drvdata(pdev, dev);
1406
1407 printk(KERN_INFO "%s: %s at 0x%lx, "
1408 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1409 "IRQ %d\n",
1410 dev->name,
1411 rtl_chip_info[ent->driver_data].name,
1412 dev->base_addr,
1413 dev->dev_addr[0], dev->dev_addr[1],
1414 dev->dev_addr[2], dev->dev_addr[3],
1415 dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1416
1417 rtl8169_hw_phy_config(dev);
1418
1419 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1420 RTL_W8(0x82, 0x01);
1421
1422 if (tp->mac_version < RTL_GIGA_MAC_VER_E) {
1423 dprintk("Set PCI Latency=0x40\n");
1424 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
1425 }
1426
1427 if (tp->mac_version == RTL_GIGA_MAC_VER_D) {
1428 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1429 RTL_W8(0x82, 0x01);
1430 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1431 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1432 }
1433
1434 rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1435
1436 rtl8169_set_speed(dev, autoneg, speed, duplex);
1437
1438 if (RTL_R8(PHYstatus) & TBI_Enable)
1439 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1440
1441 return 0;
1442}
1443
1444static void __devexit
1445rtl8169_remove_one(struct pci_dev *pdev)
1446{
1447 struct net_device *dev = pci_get_drvdata(pdev);
1448 struct rtl8169_private *tp = netdev_priv(dev);
1449
1450 assert(dev != NULL);
1451 assert(tp != NULL);
1452
1453 unregister_netdev(dev);
1454 rtl8169_release_board(pdev, dev, tp->mmio_addr);
1455 pci_set_drvdata(pdev, NULL);
1456}
1457
1458#ifdef CONFIG_PM
1459
05adc3b7 1460static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 1461{
1462 struct net_device *dev = pci_get_drvdata(pdev);
1463 struct rtl8169_private *tp = netdev_priv(dev);
1464 void __iomem *ioaddr = tp->mmio_addr;
1465 unsigned long flags;
1466
1467 if (!netif_running(dev))
1468 return 0;
1469
1470 netif_device_detach(dev);
1471 netif_stop_queue(dev);
1472 spin_lock_irqsave(&tp->lock, flags);
1473
1474 /* Disable interrupts, stop Rx and Tx */
1475 RTL_W16(IntrMask, 0);
1476 RTL_W8(ChipCmd, 0);
1477
1478 /* Update the error counts. */
1479 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
1480 RTL_W32(RxMissed, 0);
1481 spin_unlock_irqrestore(&tp->lock, flags);
1482
1483 return 0;
1484}
1485
1486static int rtl8169_resume(struct pci_dev *pdev)
1487{
1488 struct net_device *dev = pci_get_drvdata(pdev);
1489
1490 if (!netif_running(dev))
1491 return 0;
1492
1493 netif_device_attach(dev);
1494 rtl8169_hw_start(dev);
1495
1496 return 0;
1497}
1498
1499#endif /* CONFIG_PM */
1500
1501static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1502 struct net_device *dev)
1503{
1504 unsigned int mtu = dev->mtu;
1505
1506 tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1507}
1508
1509static int rtl8169_open(struct net_device *dev)
1510{
1511 struct rtl8169_private *tp = netdev_priv(dev);
1512 struct pci_dev *pdev = tp->pci_dev;
1513 int retval;
1514
1515 rtl8169_set_rxbufsize(tp, dev);
1516
1517 retval =
1518 request_irq(dev->irq, rtl8169_interrupt, SA_SHIRQ, dev->name, dev);
1519 if (retval < 0)
1520 goto out;
1521
1522 retval = -ENOMEM;
1523
1524 /*
1525 * Rx and Tx desscriptors needs 256 bytes alignment.
1526 * pci_alloc_consistent provides more.
1527 */
1528 tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1529 &tp->TxPhyAddr);
1530 if (!tp->TxDescArray)
1531 goto err_free_irq;
1532
1533 tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1534 &tp->RxPhyAddr);
1535 if (!tp->RxDescArray)
1536 goto err_free_tx;
1537
1538 retval = rtl8169_init_ring(dev);
1539 if (retval < 0)
1540 goto err_free_rx;
1541
1542 INIT_WORK(&tp->task, NULL, dev);
1543
1544 rtl8169_hw_start(dev);
1545
1546 rtl8169_request_timer(dev);
1547
1548 rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1549out:
1550 return retval;
1551
1552err_free_rx:
1553 pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1554 tp->RxPhyAddr);
1555err_free_tx:
1556 pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1557 tp->TxPhyAddr);
1558err_free_irq:
1559 free_irq(dev->irq, dev);
1560 goto out;
1561}
1562
1563static void rtl8169_hw_reset(void __iomem *ioaddr)
1564{
1565 /* Disable interrupts */
1566 rtl8169_irq_mask_and_ack(ioaddr);
1567
1568 /* Reset the chipset */
1569 RTL_W8(ChipCmd, CmdReset);
1570
1571 /* PCI commit */
1572 RTL_R8(ChipCmd);
1573}
1574
1575static void
1576rtl8169_hw_start(struct net_device *dev)
1577{
1578 struct rtl8169_private *tp = netdev_priv(dev);
1579 void __iomem *ioaddr = tp->mmio_addr;
1580 u32 i;
1581
1582 /* Soft reset the chip. */
1583 RTL_W8(ChipCmd, CmdReset);
1584
1585 /* Check that the chip has finished the reset. */
1586 for (i = 1000; i > 0; i--) {
1587 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1588 break;
1589 udelay(10);
1590 }
1591
1592 RTL_W8(Cfg9346, Cfg9346_Unlock);
1593 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1594 RTL_W8(EarlyTxThres, EarlyTxThld);
1595
126fa4b9
FR		 1596 /* Low hurts. Let's disable the filtering. */
1597 RTL_W16(RxMaxSize, 16383);
1da177e4
LT		 1598
1599 /* Set Rx Config register */
1600 i = rtl8169_rx_config |
1601 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1602 RTL_W32(RxConfig, i);
1603
1604 /* Set DMA burst size and Interframe Gap Time */
1605 RTL_W32(TxConfig,
1606 (TX_DMA_BURST << TxDMAShift) | (InterFrameGap <<
1607 TxInterFrameGapShift));
1608 tp->cp_cmd |= RTL_R16(CPlusCmd);
1609 RTL_W16(CPlusCmd, tp->cp_cmd);
1610
1611 if ((tp->mac_version == RTL_GIGA_MAC_VER_D) ||
1612 (tp->mac_version == RTL_GIGA_MAC_VER_E)) {
1613 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1614 "Bit-3 and bit-14 MUST be 1\n");
1615 tp->cp_cmd |= (1 << 14) | PCIMulRW;
1616 RTL_W16(CPlusCmd, tp->cp_cmd);
1617 }
1618
1619 /*
1620 * Undocumented corner. Supposedly:
1621 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1622 */
1623 RTL_W16(IntrMitigate, 0x0000);
1624
1625 RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1626 RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1627 RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1628 RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1629 RTL_W8(Cfg9346, Cfg9346_Lock);
1630 udelay(10);
1631
1632 RTL_W32(RxMissed, 0);
1633
1634 rtl8169_set_rx_mode(dev);
1635
1636 /* no early-rx interrupts */
1637 RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1638
1639 /* Enable all known interrupts by setting the interrupt mask. */
1640 RTL_W16(IntrMask, rtl8169_intr_mask);
1641
1642 netif_start_queue(dev);
1643}
1644
1645static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
1646{
1647 struct rtl8169_private *tp = netdev_priv(dev);
1648 int ret = 0;
1649
1650 if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
1651 return -EINVAL;
1652
1653 dev->mtu = new_mtu;
1654
1655 if (!netif_running(dev))
1656 goto out;
1657
1658 rtl8169_down(dev);
1659
1660 rtl8169_set_rxbufsize(tp, dev);
1661
1662 ret = rtl8169_init_ring(dev);
1663 if (ret < 0)
1664 goto out;
1665
1666 netif_poll_enable(dev);
1667
1668 rtl8169_hw_start(dev);
1669
1670 rtl8169_request_timer(dev);
1671
1672out:
1673 return ret;
1674}
1675
1676static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1677{
1678 desc->addr = 0x0badbadbadbadbadull;
1679 desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
1680}
1681
1682static void rtl8169_free_rx_skb(struct rtl8169_private *tp,
1683 struct sk_buff **sk_buff, struct RxDesc *desc)
1684{
1685 struct pci_dev *pdev = tp->pci_dev;
1686
1687 pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
1688 PCI_DMA_FROMDEVICE);
1689 dev_kfree_skb(*sk_buff);
1690 *sk_buff = NULL;
1691 rtl8169_make_unusable_by_asic(desc);
1692}
1693
1694static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
1695{
1696 u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
1697
1698 desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
1699}
1700
1701static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
1702 u32 rx_buf_sz)
1703{
1704 desc->addr = cpu_to_le64(mapping);
1705 wmb();
1706 rtl8169_mark_to_asic(desc, rx_buf_sz);
1707}
1708
1709static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
1710 struct RxDesc *desc, int rx_buf_sz)
1711{
1712 struct sk_buff *skb;
1713 dma_addr_t mapping;
1714 int ret = 0;
1715
1716 skb = dev_alloc_skb(rx_buf_sz + NET_IP_ALIGN);
1717 if (!skb)
1718 goto err_out;
1719
1720 skb_reserve(skb, NET_IP_ALIGN);
1721 *sk_buff = skb;
1722
1723 mapping = pci_map_single(pdev, skb->tail, rx_buf_sz,
1724 PCI_DMA_FROMDEVICE);
1725
1726 rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
1727
1728out:
1729 return ret;
1730
1731err_out:
1732 ret = -ENOMEM;
1733 rtl8169_make_unusable_by_asic(desc);
1734 goto out;
1735}
1736
1737static void rtl8169_rx_clear(struct rtl8169_private *tp)
1738{
1739 int i;
1740
1741 for (i = 0; i < NUM_RX_DESC; i++) {
1742 if (tp->Rx_skbuff[i]) {
1743 rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i,
1744 tp->RxDescArray + i);
1745 }
1746 }
1747}
1748
1749static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
1750 u32 start, u32 end)
1751{
1752 u32 cur;
1753
1754 for (cur = start; end - cur > 0; cur++) {
1755 int ret, i = cur % NUM_RX_DESC;
1756
1757 if (tp->Rx_skbuff[i])
1758 continue;
1759
1760 ret = rtl8169_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
1761 tp->RxDescArray + i, tp->rx_buf_sz);
1762 if (ret < 0)
1763 break;
1764 }
1765 return cur - start;
1766}
1767
1768static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
1769{
1770 desc->opts1 |= cpu_to_le32(RingEnd);
1771}
1772
1773static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
1774{
1775 tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
1776}
1777
1778static int rtl8169_init_ring(struct net_device *dev)
1779{
1780 struct rtl8169_private *tp = netdev_priv(dev);
1781
1782 rtl8169_init_ring_indexes(tp);
1783
1784 memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
1785 memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
1786
1787 if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
1788 goto err_out;
1789
1790 rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
1791
1792 return 0;
1793
1794err_out:
1795 rtl8169_rx_clear(tp);
1796 return -ENOMEM;
1797}
1798
1799static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb,
1800 struct TxDesc *desc)
1801{
1802 unsigned int len = tx_skb->len;
1803
1804 pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
1805 desc->opts1 = 0x00;
1806 desc->opts2 = 0x00;
1807 desc->addr = 0x00;
1808 tx_skb->len = 0;
1809}
1810
1811static void rtl8169_tx_clear(struct rtl8169_private *tp)
1812{
1813 unsigned int i;
1814
1815 for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) {
1816 unsigned int entry = i % NUM_TX_DESC;
1817 struct ring_info *tx_skb = tp->tx_skb + entry;
1818 unsigned int len = tx_skb->len;
1819
1820 if (len) {
1821 struct sk_buff *skb = tx_skb->skb;
1822
1823 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb,
1824 tp->TxDescArray + entry);
1825 if (skb) {
1826 dev_kfree_skb(skb);
1827 tx_skb->skb = NULL;
1828 }
1829 tp->stats.tx_dropped++;
1830 }
1831 }
1832 tp->cur_tx = tp->dirty_tx = 0;
1833}
1834
1835static void rtl8169_schedule_work(struct net_device *dev, void (*task)(void *))
1836{
1837 struct rtl8169_private *tp = netdev_priv(dev);
1838
1839 PREPARE_WORK(&tp->task, task, dev);
1840 schedule_delayed_work(&tp->task, 4);
1841}
1842
1843static void rtl8169_wait_for_quiescence(struct net_device *dev)
1844{
1845 struct rtl8169_private *tp = netdev_priv(dev);
1846 void __iomem *ioaddr = tp->mmio_addr;
1847
1848 synchronize_irq(dev->irq);
1849
1850 /* Wait for any pending NAPI task to complete */
1851 netif_poll_disable(dev);
1852
1853 rtl8169_irq_mask_and_ack(ioaddr);
1854
1855 netif_poll_enable(dev);
1856}
1857
1858static void rtl8169_reinit_task(void *_data)
1859{
1860 struct net_device *dev = _data;
1861 int ret;
1862
1863 if (netif_running(dev)) {
1864 rtl8169_wait_for_quiescence(dev);
1865 rtl8169_close(dev);
1866 }
1867
1868 ret = rtl8169_open(dev);
1869 if (unlikely(ret < 0)) {
1870 if (net_ratelimit()) {
1871 printk(PFX KERN_ERR "%s: reinit failure (status = %d)."
1872 " Rescheduling.\n", dev->name, ret);
1873 }
1874 rtl8169_schedule_work(dev, rtl8169_reinit_task);
1875 }
1876}
1877
1878static void rtl8169_reset_task(void *_data)
1879{
1880 struct net_device *dev = _data;
1881 struct rtl8169_private *tp = netdev_priv(dev);
1882
1883 if (!netif_running(dev))
1884 return;
1885
1886 rtl8169_wait_for_quiescence(dev);
1887
1888 rtl8169_rx_interrupt(dev, tp, tp->mmio_addr);
1889 rtl8169_tx_clear(tp);
1890
1891 if (tp->dirty_rx == tp->cur_rx) {
1892 rtl8169_init_ring_indexes(tp);
1893 rtl8169_hw_start(dev);
1894 netif_wake_queue(dev);
1895 } else {
1896 if (net_ratelimit()) {
1897 printk(PFX KERN_EMERG "%s: Rx buffers shortage\n",
1898 dev->name);
1899 }
1900 rtl8169_schedule_work(dev, rtl8169_reset_task);
1901 }
1902}
1903
1904static void rtl8169_tx_timeout(struct net_device *dev)
1905{
1906 struct rtl8169_private *tp = netdev_priv(dev);
1907
1908 rtl8169_hw_reset(tp->mmio_addr);
1909
1910 /* Let's wait a bit while any (async) irq lands on */
1911 rtl8169_schedule_work(dev, rtl8169_reset_task);
1912}
1913
1914static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
1915 u32 opts1)
1916{
1917 struct skb_shared_info *info = skb_shinfo(skb);
1918 unsigned int cur_frag, entry;
1919 struct TxDesc *txd;
1920
1921 entry = tp->cur_tx;
1922 for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
1923 skb_frag_t *frag = info->frags + cur_frag;
1924 dma_addr_t mapping;
1925 u32 status, len;
1926 void *addr;
1927
1928 entry = (entry + 1) % NUM_TX_DESC;
1929
1930 txd = tp->TxDescArray + entry;
1931 len = frag->size;
1932 addr = ((void *) page_address(frag->page)) + frag->page_offset;
1933 mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
1934
1935 /* anti gcc 2.95.3 bugware (sic) */
1936 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
1937
1938 txd->opts1 = cpu_to_le32(status);
1939 txd->addr = cpu_to_le64(mapping);
1940
1941 tp->tx_skb[entry].len = len;
1942 }
1943
1944 if (cur_frag) {
1945 tp->tx_skb[entry].skb = skb;
1946 txd->opts1 |= cpu_to_le32(LastFrag);
1947 }
1948
1949 return cur_frag;
1950}
1951
1952static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
1953{
1954 if (dev->features & NETIF_F_TSO) {
1955 u32 mss = skb_shinfo(skb)->tso_size;
1956
1957 if (mss)
1958 return LargeSend | ((mss & MSSMask) << MSSShift);
1959 }
1960 if (skb->ip_summed == CHECKSUM_HW) {
1961 const struct iphdr *ip = skb->nh.iph;
1962
1963 if (ip->protocol == IPPROTO_TCP)
1964 return IPCS | TCPCS;
1965 else if (ip->protocol == IPPROTO_UDP)
1966 return IPCS | UDPCS;
1967 WARN_ON(1); /* we need a WARN() */
1968 }
1969 return 0;
1970}
1971
1972static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
1973{
1974 struct rtl8169_private *tp = netdev_priv(dev);
1975 unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC;
1976 struct TxDesc *txd = tp->TxDescArray + entry;
1977 void __iomem *ioaddr = tp->mmio_addr;
1978 dma_addr_t mapping;
1979 u32 status, len;
1980 u32 opts1;
1981 int ret = 0;
1982
1983 if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
1984 printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n",
1985 dev->name);
1986 goto err_stop;
1987 }
1988
1989 if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
1990 goto err_stop;
1991
1992 opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
1993
1994 frags = rtl8169_xmit_frags(tp, skb, opts1);
1995 if (frags) {
1996 len = skb_headlen(skb);
1997 opts1 |= FirstFrag;
1998 } else {
1999 len = skb->len;
2000
2001 if (unlikely(len < ETH_ZLEN)) {
2002 skb = skb_padto(skb, ETH_ZLEN);
2003 if (!skb)
2004 goto err_update_stats;
2005 len = ETH_ZLEN;
2006 }
2007
2008 opts1 |= FirstFrag | LastFrag;
2009 tp->tx_skb[entry].skb = skb;
2010 }
2011
2012 mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
2013
2014 tp->tx_skb[entry].len = len;
2015 txd->addr = cpu_to_le64(mapping);
2016 txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
2017
2018 wmb();
2019
2020 /* anti gcc 2.95.3 bugware (sic) */
2021 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2022 txd->opts1 = cpu_to_le32(status);
2023
2024 dev->trans_start = jiffies;
2025
2026 tp->cur_tx += frags + 1;
2027
2028 smp_wmb();
2029
2030 RTL_W8(TxPoll, 0x40); /* set polling bit */
2031
2032 if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
2033 netif_stop_queue(dev);
2034 smp_rmb();
2035 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
2036 netif_wake_queue(dev);
2037 }
2038
2039out:
2040 return ret;
2041
2042err_stop:
2043 netif_stop_queue(dev);
2044 ret = 1;
2045err_update_stats:
2046 tp->stats.tx_dropped++;
2047 goto out;
2048}
2049
2050static void rtl8169_pcierr_interrupt(struct net_device *dev)
2051{
2052 struct rtl8169_private *tp = netdev_priv(dev);
2053 struct pci_dev *pdev = tp->pci_dev;
2054 void __iomem *ioaddr = tp->mmio_addr;
2055 u16 pci_status, pci_cmd;
2056
2057 pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
2058 pci_read_config_word(pdev, PCI_STATUS, &pci_status);
2059
2060 printk(KERN_ERR PFX "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2061 dev->name, pci_cmd, pci_status);
2062
2063 /*
2064 * The recovery sequence below admits a very elaborated explanation:
2065 * - it seems to work;
2066 * - I did not see what else could be done.
2067 *
2068 * Feel free to adjust to your needs.
2069 */
2070 pci_write_config_word(pdev, PCI_COMMAND,
2071 pci_cmd | PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
2072
2073 pci_write_config_word(pdev, PCI_STATUS,
2074 pci_status & (PCI_STATUS_DETECTED_PARITY |
2075 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
2076 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
2077
2078 /* The infamous DAC f*ckup only happens at boot time */
2079 if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
2080 printk(KERN_INFO PFX "%s: disabling PCI DAC.\n", dev->name);
2081 tp->cp_cmd &= ~PCIDAC;
2082 RTL_W16(CPlusCmd, tp->cp_cmd);
2083 dev->features &= ~NETIF_F_HIGHDMA;
2084 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2085 }
2086
2087 rtl8169_hw_reset(ioaddr);
2088}
2089
2090static void
2091rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2092 void __iomem *ioaddr)
2093{
2094 unsigned int dirty_tx, tx_left;
2095
2096 assert(dev != NULL);
2097 assert(tp != NULL);
2098 assert(ioaddr != NULL);
2099
2100 dirty_tx = tp->dirty_tx;
2101 smp_rmb();
2102 tx_left = tp->cur_tx - dirty_tx;
2103
2104 while (tx_left > 0) {
2105 unsigned int entry = dirty_tx % NUM_TX_DESC;
2106 struct ring_info *tx_skb = tp->tx_skb + entry;
2107 u32 len = tx_skb->len;
2108 u32 status;
2109
2110 rmb();
2111 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
2112 if (status & DescOwn)
2113 break;
2114
2115 tp->stats.tx_bytes += len;
2116 tp->stats.tx_packets++;
2117
2118 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
2119
2120 if (status & LastFrag) {
2121 dev_kfree_skb_irq(tx_skb->skb);
2122 tx_skb->skb = NULL;
2123 }
2124 dirty_tx++;
2125 tx_left--;
2126 }
2127
2128 if (tp->dirty_tx != dirty_tx) {
2129 tp->dirty_tx = dirty_tx;
2130 smp_wmb();
2131 if (netif_queue_stopped(dev) &&
2132 (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
2133 netif_wake_queue(dev);
2134 }
2135 }
2136}
2137
126fa4b9
FR		 2138static inline int rtl8169_fragmented_frame(u32 status)
2139{
2140 return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
2141}
2142
1da177e4
LT		 2143static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2144{
2145 u32 opts1 = le32_to_cpu(desc->opts1);
2146 u32 status = opts1 & RxProtoMask;
2147
2148 if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
2149 ((status == RxProtoUDP) && !(opts1 & UDPFail)) ||
2150 ((status == RxProtoIP) && !(opts1 & IPFail)))
2151 skb->ip_summed = CHECKSUM_UNNECESSARY;
2152 else
2153 skb->ip_summed = CHECKSUM_NONE;
2154}
2155
2156static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2157 struct RxDesc *desc, int rx_buf_sz)
2158{
2159 int ret = -1;
2160
2161 if (pkt_size < rx_copybreak) {
2162 struct sk_buff *skb;
2163
2164 skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN);
2165 if (skb) {
2166 skb_reserve(skb, NET_IP_ALIGN);
2167 eth_copy_and_sum(skb, sk_buff[0]->tail, pkt_size, 0);
2168 *sk_buff = skb;
2169 rtl8169_mark_to_asic(desc, rx_buf_sz);
2170 ret = 0;
2171 }
2172 }
2173 return ret;
2174}
2175
2176static int
2177rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2178 void __iomem *ioaddr)
2179{
2180 unsigned int cur_rx, rx_left;
2181 unsigned int delta, count;
2182
2183 assert(dev != NULL);
2184 assert(tp != NULL);
2185 assert(ioaddr != NULL);
2186
2187 cur_rx = tp->cur_rx;
2188 rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2189 rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
2190
2191 while (rx_left > 0) {
2192 unsigned int entry = cur_rx % NUM_RX_DESC;
126fa4b9 2193 struct RxDesc *desc = tp->RxDescArray + entry;
1da177e4
LT		 2194 u32 status;
2195
2196 rmb();
126fa4b9 2197 status = le32_to_cpu(desc->opts1);
1da177e4
LT		 2198
2199 if (status & DescOwn)
2200 break;
2201 if (status & RxRES) {
126fa4b9
FR		 2202 printk(KERN_INFO "%s: Rx ERROR. status = %08x\n",
2203 dev->name, status);
1da177e4
LT		 2204 tp->stats.rx_errors++;
2205 if (status & (RxRWT | RxRUNT))
2206 tp->stats.rx_length_errors++;
2207 if (status & RxCRC)
2208 tp->stats.rx_crc_errors++;
126fa4b9 2209 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
1da177e4 2210 } else {
1da177e4
LT		 2211 struct sk_buff *skb = tp->Rx_skbuff[entry];
2212 int pkt_size = (status & 0x00001FFF) - 4;
2213 void (*pci_action)(struct pci_dev *, dma_addr_t,
2214 size_t, int) = pci_dma_sync_single_for_device;
2215
126fa4b9
FR		 2216 /*
2217 * The driver does not support incoming fragmented
2218 * frames. They are seen as a symptom of over-mtu
2219 * sized frames.
2220 */
2221 if (unlikely(rtl8169_fragmented_frame(status))) {
2222 tp->stats.rx_dropped++;
2223 tp->stats.rx_length_errors++;
2224 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2225 goto move_on;
2226 }
2227
1da177e4
LT		 2228 rtl8169_rx_csum(skb, desc);
2229
2230 pci_dma_sync_single_for_cpu(tp->pci_dev,
2231 le64_to_cpu(desc->addr), tp->rx_buf_sz,
2232 PCI_DMA_FROMDEVICE);
2233
2234 if (rtl8169_try_rx_copy(&skb, pkt_size, desc,
2235 tp->rx_buf_sz)) {
2236 pci_action = pci_unmap_single;
2237 tp->Rx_skbuff[entry] = NULL;
2238 }
2239
2240 pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
2241 tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
2242
2243 skb->dev = dev;
2244 skb_put(skb, pkt_size);
2245 skb->protocol = eth_type_trans(skb, dev);
2246
2247 if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
2248 rtl8169_rx_skb(skb);
2249
2250 dev->last_rx = jiffies;
2251 tp->stats.rx_bytes += pkt_size;
2252 tp->stats.rx_packets++;
2253 }
126fa4b9 2254move_on:
1da177e4
LT		 2255 cur_rx++;
2256 rx_left--;
2257 }
2258
2259 count = cur_rx - tp->cur_rx;
2260 tp->cur_rx = cur_rx;
2261
2262 delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
2263 if (!delta && count)
2264 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
2265 tp->dirty_rx += delta;
2266
2267 /*
2268 * FIXME: until there is periodic timer to try and refill the ring,
2269 * a temporary shortage may definitely kill the Rx process.
2270 * - disable the asic to try and avoid an overflow and kick it again
2271 * after refill ?
2272 * - how do others driver handle this condition (Uh oh...).
2273 */
2274 if (tp->dirty_rx + NUM_RX_DESC == tp->cur_rx)
2275 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
2276
2277 return count;
2278}
2279
2280/* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2281static irqreturn_t
2282rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
2283{
2284 struct net_device *dev = (struct net_device *) dev_instance;
2285 struct rtl8169_private *tp = netdev_priv(dev);
2286 int boguscnt = max_interrupt_work;
2287 void __iomem *ioaddr = tp->mmio_addr;
2288 int status;
2289 int handled = 0;
2290
2291 do {
2292 status = RTL_R16(IntrStatus);
2293
2294 /* hotplug/major error/no more work/shared irq */
2295 if ((status == 0xFFFF) || !status)
2296 break;
2297
2298 handled = 1;
2299
2300 if (unlikely(!netif_running(dev))) {
2301 rtl8169_asic_down(ioaddr);
2302 goto out;
2303 }
2304
2305 status &= tp->intr_mask;
2306 RTL_W16(IntrStatus,
2307 (status & RxFIFOOver) ? (status | RxOverflow) : status);
2308
2309 if (!(status & rtl8169_intr_mask))
2310 break;
2311
2312 if (unlikely(status & SYSErr)) {
2313 rtl8169_pcierr_interrupt(dev);
2314 break;
2315 }
2316
2317 if (status & LinkChg)
2318 rtl8169_check_link_status(dev, tp, ioaddr);
2319
2320#ifdef CONFIG_R8169_NAPI
2321 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
2322 tp->intr_mask = ~rtl8169_napi_event;
2323
2324 if (likely(netif_rx_schedule_prep(dev)))
2325 __netif_rx_schedule(dev);
2326 else {
2327 printk(KERN_INFO "%s: interrupt %04x taken in poll\n",
2328 dev->name, status);
2329 }
2330 break;
2331#else
2332 /* Rx interrupt */
2333 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
2334 rtl8169_rx_interrupt(dev, tp, ioaddr);
2335 }
2336 /* Tx interrupt */
2337 if (status & (TxOK | TxErr))
2338 rtl8169_tx_interrupt(dev, tp, ioaddr);
2339#endif
2340
2341 boguscnt--;
2342 } while (boguscnt > 0);
2343
2344 if (boguscnt <= 0) {
2345 printk(KERN_WARNING "%s: Too much work at interrupt!\n",
2346 dev->name);
2347 /* Clear all interrupt sources. */
2348 RTL_W16(IntrStatus, 0xffff);
2349 }
2350out:
2351 return IRQ_RETVAL(handled);
2352}
2353
2354#ifdef CONFIG_R8169_NAPI
2355static int rtl8169_poll(struct net_device *dev, int *budget)
2356{
2357 unsigned int work_done, work_to_do = min(*budget, dev->quota);
2358 struct rtl8169_private *tp = netdev_priv(dev);
2359 void __iomem *ioaddr = tp->mmio_addr;
2360
2361 work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
2362 rtl8169_tx_interrupt(dev, tp, ioaddr);
2363
2364 *budget -= work_done;
2365 dev->quota -= work_done;
2366
2367 if (work_done < work_to_do) {
2368 netif_rx_complete(dev);
2369 tp->intr_mask = 0xffff;
2370 /*
2371 * 20040426: the barrier is not strictly required but the
2372 * behavior of the irq handler could be less predictable
2373 * without it. Btw, the lack of flush for the posted pci
2374 * write is safe - FR
2375 */
2376 smp_wmb();
2377 RTL_W16(IntrMask, rtl8169_intr_mask);
2378 }
2379
2380 return (work_done >= work_to_do);
2381}
2382#endif
2383
2384static void rtl8169_down(struct net_device *dev)
2385{
2386 struct rtl8169_private *tp = netdev_priv(dev);
2387 void __iomem *ioaddr = tp->mmio_addr;
2388 unsigned int poll_locked = 0;
2389
2390 rtl8169_delete_timer(dev);
2391
2392 netif_stop_queue(dev);
2393
2394 flush_scheduled_work();
2395
2396core_down:
2397 spin_lock_irq(&tp->lock);
2398
2399 rtl8169_asic_down(ioaddr);
2400
2401 /* Update the error counts. */
2402 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2403 RTL_W32(RxMissed, 0);
2404
2405 spin_unlock_irq(&tp->lock);
2406
2407 synchronize_irq(dev->irq);
2408
2409 if (!poll_locked) {
2410 netif_poll_disable(dev);
2411 poll_locked++;
2412 }
2413
2414 /* Give a racing hard_start_xmit a few cycles to complete. */
fbd568a3 2415 synchronize_sched(); /* FIXME: should this be synchronize_irq()? */
1da177e4
LT		 2416
2417 /*
2418 * And now for the 50k$ question: are IRQ disabled or not ?
2419 *
2420 * Two paths lead here:
2421 * 1) dev->close
2422 * -> netif_running() is available to sync the current code and the
2423 * IRQ handler. See rtl8169_interrupt for details.
2424 * 2) dev->change_mtu
2425 * -> rtl8169_poll can not be issued again and re-enable the
2426 * interruptions. Let's simply issue the IRQ down sequence again.
2427 */
2428 if (RTL_R16(IntrMask))
2429 goto core_down;
2430
2431 rtl8169_tx_clear(tp);
2432
2433 rtl8169_rx_clear(tp);
2434}
2435
2436static int rtl8169_close(struct net_device *dev)
2437{
2438 struct rtl8169_private *tp = netdev_priv(dev);
2439 struct pci_dev *pdev = tp->pci_dev;
2440
2441 rtl8169_down(dev);
2442
2443 free_irq(dev->irq, dev);
2444
2445 netif_poll_enable(dev);
2446
2447 pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
2448 tp->RxPhyAddr);
2449 pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
2450 tp->TxPhyAddr);
2451 tp->TxDescArray = NULL;
2452 tp->RxDescArray = NULL;
2453
2454 return 0;
2455}
2456
2457static void
2458rtl8169_set_rx_mode(struct net_device *dev)
2459{
2460 struct rtl8169_private *tp = netdev_priv(dev);
2461 void __iomem *ioaddr = tp->mmio_addr;
2462 unsigned long flags;
2463 u32 mc_filter[2]; /* Multicast hash filter */
2464 int i, rx_mode;
2465 u32 tmp = 0;
2466
2467 if (dev->flags & IFF_PROMISC) {
2468 /* Unconditionally log net taps. */
2469 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2470 dev->name);
2471 rx_mode =
2472 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2473 AcceptAllPhys;
2474 mc_filter[1] = mc_filter[0] = 0xffffffff;
2475 } else if ((dev->mc_count > multicast_filter_limit)
2476 || (dev->flags & IFF_ALLMULTI)) {
2477 /* Too many to filter perfectly -- accept all multicasts. */
2478 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2479 mc_filter[1] = mc_filter[0] = 0xffffffff;
2480 } else {
2481 struct dev_mc_list *mclist;
2482 rx_mode = AcceptBroadcast | AcceptMyPhys;
2483 mc_filter[1] = mc_filter[0] = 0;
2484 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2485 i++, mclist = mclist->next) {
2486 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2487 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2488 rx_mode |= AcceptMulticast;
2489 }
2490 }
2491
2492 spin_lock_irqsave(&tp->lock, flags);
2493
2494 tmp = rtl8169_rx_config | rx_mode |
2495 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
2496
2497 RTL_W32(RxConfig, tmp);
2498 RTL_W32(MAR0 + 0, mc_filter[0]);
2499 RTL_W32(MAR0 + 4, mc_filter[1]);
2500
2501 spin_unlock_irqrestore(&tp->lock, flags);
2502}
2503
2504/**
2505 * rtl8169_get_stats - Get rtl8169 read/write statistics
2506 * @dev: The Ethernet Device to get statistics for
2507 *
2508 * Get TX/RX statistics for rtl8169
2509 */
2510static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2511{
2512 struct rtl8169_private *tp = netdev_priv(dev);
2513 void __iomem *ioaddr = tp->mmio_addr;
2514 unsigned long flags;
2515
2516 if (netif_running(dev)) {
2517 spin_lock_irqsave(&tp->lock, flags);
2518 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2519 RTL_W32(RxMissed, 0);
2520 spin_unlock_irqrestore(&tp->lock, flags);
2521 }
2522
2523 return &tp->stats;
2524}
2525
2526static struct pci_driver rtl8169_pci_driver = {
2527 .name = MODULENAME,
2528 .id_table = rtl8169_pci_tbl,
2529 .probe = rtl8169_init_one,
2530 .remove = __devexit_p(rtl8169_remove_one),
2531#ifdef CONFIG_PM
2532 .suspend = rtl8169_suspend,
2533 .resume = rtl8169_resume,
2534#endif
2535};
2536
2537static int __init
2538rtl8169_init_module(void)
2539{
2540 return pci_module_init(&rtl8169_pci_driver);
2541}
2542
2543static void __exit
2544rtl8169_cleanup_module(void)
2545{
2546 pci_unregister_driver(&rtl8169_pci_driver);
2547}
2548
2549module_init(rtl8169_init_module);
2550module_exit(rtl8169_cleanup_module);
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