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e1000e: Save irq into netdev structure
[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
3be8c940 55#define DRV_VERSION "1.0.2-k2"
bc7f75fa
AK		 56char e1000e_driver_name[] = "e1000e";
57const char e1000e_driver_version[] = DRV_VERSION;
58
59static const struct e1000_info *e1000_info_tbl[] = {
60 [board_82571] = &e1000_82571_info,
61 [board_82572] = &e1000_82572_info,
62 [board_82573] = &e1000_82573_info,
4662e82b 63 [board_82574] = &e1000_82574_info,
8c81c9c3 64 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 65 [board_80003es2lan] = &e1000_es2_info,
66 [board_ich8lan] = &e1000_ich8_info,
67 [board_ich9lan] = &e1000_ich9_info,
f4187b56 68 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 69 [board_pchlan] = &e1000_pch_info,
bc7f75fa
AK		 70};
71
84f4ee90
TI		 72struct e1000_reg_info {
73 u32 ofs;
74 char *name;
75};
76
77#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
78#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
79#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
80#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
81#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
82
83#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
84#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
85#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
86#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
87#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
88
89static const struct e1000_reg_info e1000_reg_info_tbl[] = {
90
91 /* General Registers */
92 {E1000_CTRL, "CTRL"},
93 {E1000_STATUS, "STATUS"},
94 {E1000_CTRL_EXT, "CTRL_EXT"},
95
96 /* Interrupt Registers */
97 {E1000_ICR, "ICR"},
98
99 /* RX Registers */
100 {E1000_RCTL, "RCTL"},
101 {E1000_RDLEN, "RDLEN"},
102 {E1000_RDH, "RDH"},
103 {E1000_RDT, "RDT"},
104 {E1000_RDTR, "RDTR"},
105 {E1000_RXDCTL(0), "RXDCTL"},
106 {E1000_ERT, "ERT"},
107 {E1000_RDBAL, "RDBAL"},
108 {E1000_RDBAH, "RDBAH"},
109 {E1000_RDFH, "RDFH"},
110 {E1000_RDFT, "RDFT"},
111 {E1000_RDFHS, "RDFHS"},
112 {E1000_RDFTS, "RDFTS"},
113 {E1000_RDFPC, "RDFPC"},
114
115 /* TX Registers */
116 {E1000_TCTL, "TCTL"},
117 {E1000_TDBAL, "TDBAL"},
118 {E1000_TDBAH, "TDBAH"},
119 {E1000_TDLEN, "TDLEN"},
120 {E1000_TDH, "TDH"},
121 {E1000_TDT, "TDT"},
122 {E1000_TIDV, "TIDV"},
123 {E1000_TXDCTL(0), "TXDCTL"},
124 {E1000_TADV, "TADV"},
125 {E1000_TARC(0), "TARC"},
126 {E1000_TDFH, "TDFH"},
127 {E1000_TDFT, "TDFT"},
128 {E1000_TDFHS, "TDFHS"},
129 {E1000_TDFTS, "TDFTS"},
130 {E1000_TDFPC, "TDFPC"},
131
132 /* List Terminator */
133 {}
134};
135
136/*
137 * e1000_regdump - register printout routine
138 */
139static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
140{
141 int n = 0;
142 char rname[16];
143 u32 regs[8];
144
145 switch (reginfo->ofs) {
146 case E1000_RXDCTL(0):
147 for (n = 0; n < 2; n++)
148 regs[n] = __er32(hw, E1000_RXDCTL(n));
149 break;
150 case E1000_TXDCTL(0):
151 for (n = 0; n < 2; n++)
152 regs[n] = __er32(hw, E1000_TXDCTL(n));
153 break;
154 case E1000_TARC(0):
155 for (n = 0; n < 2; n++)
156 regs[n] = __er32(hw, E1000_TARC(n));
157 break;
158 default:
159 printk(KERN_INFO "%-15s %08x\n",
160 reginfo->name, __er32(hw, reginfo->ofs));
161 return;
162 }
163
164 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
165 printk(KERN_INFO "%-15s ", rname);
166 for (n = 0; n < 2; n++)
167 printk(KERN_CONT "%08x ", regs[n]);
168 printk(KERN_CONT "\n");
169}
170
171
172/*
173 * e1000e_dump - Print registers, tx-ring and rx-ring
174 */
175static void e1000e_dump(struct e1000_adapter *adapter)
176{
177 struct net_device *netdev = adapter->netdev;
178 struct e1000_hw *hw = &adapter->hw;
179 struct e1000_reg_info *reginfo;
180 struct e1000_ring *tx_ring = adapter->tx_ring;
181 struct e1000_tx_desc *tx_desc;
182 struct my_u0 { u64 a; u64 b; } *u0;
183 struct e1000_buffer *buffer_info;
184 struct e1000_ring *rx_ring = adapter->rx_ring;
185 union e1000_rx_desc_packet_split *rx_desc_ps;
186 struct e1000_rx_desc *rx_desc;
187 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
188 u32 staterr;
189 int i = 0;
190
191 if (!netif_msg_hw(adapter))
192 return;
193
194 /* Print netdevice Info */
195 if (netdev) {
196 dev_info(&adapter->pdev->dev, "Net device Info\n");
197 printk(KERN_INFO "Device Name state "
198 "trans_start last_rx\n");
199 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
200 netdev->name,
201 netdev->state,
202 netdev->trans_start,
203 netdev->last_rx);
204 }
205
206 /* Print Registers */
207 dev_info(&adapter->pdev->dev, "Register Dump\n");
208 printk(KERN_INFO " Register Name Value\n");
209 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
210 reginfo->name; reginfo++) {
211 e1000_regdump(hw, reginfo);
212 }
213
214 /* Print TX Ring Summary */
215 if (!netdev || !netif_running(netdev))
216 goto exit;
217
218 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
219 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
220 " leng ntw timestamp\n");
221 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
222 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
223 0, tx_ring->next_to_use, tx_ring->next_to_clean,
224 (u64)buffer_info->dma,
225 buffer_info->length,
226 buffer_info->next_to_watch,
227 (u64)buffer_info->time_stamp);
228
229 /* Print TX Rings */
230 if (!netif_msg_tx_done(adapter))
231 goto rx_ring_summary;
232
233 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
234
235 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
236 *
237 * Legacy Transmit Descriptor
238 * +--------------------------------------------------------------+
239 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
240 * +--------------------------------------------------------------+
241 * 8 | Special | CSS | Status | CMD | CSO | Length |
242 * +--------------------------------------------------------------+
243 * 63 48 47 36 35 32 31 24 23 16 15 0
244 *
245 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
246 * 63 48 47 40 39 32 31 16 15 8 7 0
247 * +----------------------------------------------------------------+
248 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
249 * +----------------------------------------------------------------+
250 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
251 * +----------------------------------------------------------------+
252 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
253 *
254 * Extended Data Descriptor (DTYP=0x1)
255 * +----------------------------------------------------------------+
256 * 0 | Buffer Address [63:0] |
257 * +----------------------------------------------------------------+
258 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
259 * +----------------------------------------------------------------+
260 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
261 */
262 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
263 " [bi->dma ] leng ntw timestamp bi->skb "
264 "<-- Legacy format\n");
265 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Ext Context format\n");
268 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Data format\n");
271 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
272 tx_desc = E1000_TX_DESC(*tx_ring, i);
273 buffer_info = &tx_ring->buffer_info[i];
274 u0 = (struct my_u0 *)tx_desc;
275 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
276 "%04X %3X %016llX %p",
277 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
278 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
279 le64_to_cpu(u0->a), le64_to_cpu(u0->b),
280 (u64)buffer_info->dma, buffer_info->length,
281 buffer_info->next_to_watch, (u64)buffer_info->time_stamp,
282 buffer_info->skb);
283 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
284 printk(KERN_CONT " NTC/U\n");
285 else if (i == tx_ring->next_to_use)
286 printk(KERN_CONT " NTU\n");
287 else if (i == tx_ring->next_to_clean)
288 printk(KERN_CONT " NTC\n");
289 else
290 printk(KERN_CONT "\n");
291
292 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
293 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
294 16, 1, phys_to_virt(buffer_info->dma),
295 buffer_info->length, true);
296 }
297
298 /* Print RX Rings Summary */
299rx_ring_summary:
300 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
301 printk(KERN_INFO "Queue [NTU] [NTC]\n");
302 printk(KERN_INFO " %5d %5X %5X\n", 0,
303 rx_ring->next_to_use, rx_ring->next_to_clean);
304
305 /* Print RX Rings */
306 if (!netif_msg_rx_status(adapter))
307 goto exit;
308
309 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
310 switch (adapter->rx_ps_pages) {
311 case 1:
312 case 2:
313 case 3:
314 /* [Extended] Packet Split Receive Descriptor Format
315 *
316 * +-----------------------------------------------------+
317 * 0 | Buffer Address 0 [63:0] |
318 * +-----------------------------------------------------+
319 * 8 | Buffer Address 1 [63:0] |
320 * +-----------------------------------------------------+
321 * 16 | Buffer Address 2 [63:0] |
322 * +-----------------------------------------------------+
323 * 24 | Buffer Address 3 [63:0] |
324 * +-----------------------------------------------------+
325 */
326 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
327 "[buffer 1 63:0 ] "
328 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
329 "[bi->skb] <-- Ext Pkt Split format\n");
330 /* [Extended] Receive Descriptor (Write-Back) Format
331 *
332 * 63 48 47 32 31 13 12 8 7 4 3 0
333 * +------------------------------------------------------+
334 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
335 * | Checksum | Ident | | Queue | | Type |
336 * +------------------------------------------------------+
337 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
338 * +------------------------------------------------------+
339 * 63 48 47 32 31 20 19 0
340 */
341 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
342 "[vl l0 ee es] "
343 "[ l3 l2 l1 hs] [reserved ] ---------------- "
344 "[bi->skb] <-- Ext Rx Write-Back format\n");
345 for (i = 0; i < rx_ring->count; i++) {
346 buffer_info = &rx_ring->buffer_info[i];
347 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
348 u1 = (struct my_u1 *)rx_desc_ps;
349 staterr =
350 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
351 if (staterr & E1000_RXD_STAT_DD) {
352 /* Descriptor Done */
353 printk(KERN_INFO "RWB[0x%03X] %016llX "
354 "%016llX %016llX %016llX "
355 "---------------- %p", i,
356 le64_to_cpu(u1->a),
357 le64_to_cpu(u1->b),
358 le64_to_cpu(u1->c),
359 le64_to_cpu(u1->d),
360 buffer_info->skb);
361 } else {
362 printk(KERN_INFO "R [0x%03X] %016llX "
363 "%016llX %016llX %016llX %016llX %p", i,
364 le64_to_cpu(u1->a),
365 le64_to_cpu(u1->b),
366 le64_to_cpu(u1->c),
367 le64_to_cpu(u1->d),
368 (u64)buffer_info->dma,
369 buffer_info->skb);
370
371 if (netif_msg_pktdata(adapter))
372 print_hex_dump(KERN_INFO, "",
373 DUMP_PREFIX_ADDRESS, 16, 1,
374 phys_to_virt(buffer_info->dma),
375 adapter->rx_ps_bsize0, true);
376 }
377
378 if (i == rx_ring->next_to_use)
379 printk(KERN_CONT " NTU\n");
380 else if (i == rx_ring->next_to_clean)
381 printk(KERN_CONT " NTC\n");
382 else
383 printk(KERN_CONT "\n");
384 }
385 break;
386 default:
387 case 0:
388 /* Legacy Receive Descriptor Format
389 *
390 * +-----------------------------------------------------+
391 * | Buffer Address [63:0] |
392 * +-----------------------------------------------------+
393 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
394 * +-----------------------------------------------------+
395 * 63 48 47 40 39 32 31 16 15 0
396 */
397 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
398 "[vl er S cks ln] [bi->dma ] [bi->skb] "
399 "<-- Legacy format\n");
400 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
401 rx_desc = E1000_RX_DESC(*rx_ring, i);
402 buffer_info = &rx_ring->buffer_info[i];
403 u0 = (struct my_u0 *)rx_desc;
404 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
405 "%016llX %p",
406 i, le64_to_cpu(u0->a), le64_to_cpu(u0->b),
407 (u64)buffer_info->dma, buffer_info->skb);
408 if (i == rx_ring->next_to_use)
409 printk(KERN_CONT " NTU\n");
410 else if (i == rx_ring->next_to_clean)
411 printk(KERN_CONT " NTC\n");
412 else
413 printk(KERN_CONT "\n");
414
415 if (netif_msg_pktdata(adapter))
416 print_hex_dump(KERN_INFO, "",
417 DUMP_PREFIX_ADDRESS,
418 16, 1, phys_to_virt(buffer_info->dma),
419 adapter->rx_buffer_len, true);
420 }
421 }
422
423exit:
424 return;
425}
426
bc7f75fa
AK		 427/**
428 * e1000_desc_unused - calculate if we have unused descriptors
429 **/
430static int e1000_desc_unused(struct e1000_ring *ring)
431{
432 if (ring->next_to_clean > ring->next_to_use)
433 return ring->next_to_clean - ring->next_to_use - 1;
434
435 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
436}
437
438/**
ad68076e 439 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 440 * @adapter: board private structure
441 * @status: descriptor status field as written by hardware
442 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
443 * @skb: pointer to sk_buff to be indicated to stack
444 **/
445static void e1000_receive_skb(struct e1000_adapter *adapter,
446 struct net_device *netdev,
447 struct sk_buff *skb,
a39fe742 448 u8 status, __le16 vlan)
bc7f75fa
AK		 449{
450 skb->protocol = eth_type_trans(skb, netdev);
451
452 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 453 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
454 le16_to_cpu(vlan), skb);
bc7f75fa 455 else
89c88b16 456 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 457}
458
459/**
460 * e1000_rx_checksum - Receive Checksum Offload for 82543
461 * @adapter: board private structure
462 * @status_err: receive descriptor status and error fields
463 * @csum: receive descriptor csum field
464 * @sk_buff: socket buffer with received data
465 **/
466static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
467 u32 csum, struct sk_buff *skb)
468{
469 u16 status = (u16)status_err;
470 u8 errors = (u8)(status_err >> 24);
471 skb->ip_summed = CHECKSUM_NONE;
472
473 /* Ignore Checksum bit is set */
474 if (status & E1000_RXD_STAT_IXSM)
475 return;
476 /* TCP/UDP checksum error bit is set */
477 if (errors & E1000_RXD_ERR_TCPE) {
478 /* let the stack verify checksum errors */
479 adapter->hw_csum_err++;
480 return;
481 }
482
483 /* TCP/UDP Checksum has not been calculated */
484 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
485 return;
486
487 /* It must be a TCP or UDP packet with a valid checksum */
488 if (status & E1000_RXD_STAT_TCPCS) {
489 /* TCP checksum is good */
490 skb->ip_summed = CHECKSUM_UNNECESSARY;
491 } else {
ad68076e
BA		 492 /*
493 * IP fragment with UDP payload
494 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 495 * and then put the value in host order for further stack use.
496 */
a39fe742
AV		 497 __sum16 sum = (__force __sum16)htons(csum);
498 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 499 skb->ip_summed = CHECKSUM_COMPLETE;
500 }
501 adapter->hw_csum_good++;
502}
503
504/**
505 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
506 * @adapter: address of board private structure
507 **/
508static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
509 int cleaned_count)
510{
511 struct net_device *netdev = adapter->netdev;
512 struct pci_dev *pdev = adapter->pdev;
513 struct e1000_ring *rx_ring = adapter->rx_ring;
514 struct e1000_rx_desc *rx_desc;
515 struct e1000_buffer *buffer_info;
516 struct sk_buff *skb;
517 unsigned int i;
89d71a66 518 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 519
520 i = rx_ring->next_to_use;
521 buffer_info = &rx_ring->buffer_info[i];
522
523 while (cleaned_count--) {
524 skb = buffer_info->skb;
525 if (skb) {
526 skb_trim(skb, 0);
527 goto map_skb;
528 }
529
89d71a66 530 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 531 if (!skb) {
532 /* Better luck next round */
533 adapter->alloc_rx_buff_failed++;
534 break;
535 }
536
bc7f75fa
AK		 537 buffer_info->skb = skb;
538map_skb:
0be3f55f 539 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 540 adapter->rx_buffer_len,
0be3f55f
NN		 541 DMA_FROM_DEVICE);
542 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 543 dev_err(&pdev->dev, "RX DMA map failed\n");
544 adapter->rx_dma_failed++;
545 break;
546 }
547
548 rx_desc = E1000_RX_DESC(*rx_ring, i);
549 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
550
50849d79
TH		 551 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
552 /*
553 * Force memory writes to complete before letting h/w
554 * know there are new descriptors to fetch. (Only
555 * applicable for weak-ordered memory model archs,
556 * such as IA-64).
557 */
558 wmb();
559 writel(i, adapter->hw.hw_addr + rx_ring->tail);
560 }
bc7f75fa
AK		 561 i++;
562 if (i == rx_ring->count)
563 i = 0;
564 buffer_info = &rx_ring->buffer_info[i];
565 }
566
50849d79 567 rx_ring->next_to_use = i;
bc7f75fa
AK		 568}
569
570/**
571 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
572 * @adapter: address of board private structure
573 **/
574static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
575 int cleaned_count)
576{
577 struct net_device *netdev = adapter->netdev;
578 struct pci_dev *pdev = adapter->pdev;
579 union e1000_rx_desc_packet_split *rx_desc;
580 struct e1000_ring *rx_ring = adapter->rx_ring;
581 struct e1000_buffer *buffer_info;
582 struct e1000_ps_page *ps_page;
583 struct sk_buff *skb;
584 unsigned int i, j;
585
586 i = rx_ring->next_to_use;
587 buffer_info = &rx_ring->buffer_info[i];
588
589 while (cleaned_count--) {
590 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
591
592 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 593 ps_page = &buffer_info->ps_pages[j];
594 if (j >= adapter->rx_ps_pages) {
595 /* all unused desc entries get hw null ptr */
a39fe742 596 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 597 continue;
598 }
599 if (!ps_page->page) {
600 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 601 if (!ps_page->page) {
47f44e40
AK		 602 adapter->alloc_rx_buff_failed++;
603 goto no_buffers;
604 }
0be3f55f
NN		 605 ps_page->dma = dma_map_page(&pdev->dev,
606 ps_page->page,
607 0, PAGE_SIZE,
608 DMA_FROM_DEVICE);
609 if (dma_mapping_error(&pdev->dev,
610 ps_page->dma)) {
47f44e40
AK		 611 dev_err(&adapter->pdev->dev,
612 "RX DMA page map failed\n");
613 adapter->rx_dma_failed++;
614 goto no_buffers;
bc7f75fa 615 }
bc7f75fa 616 }
47f44e40
AK		 617 /*
618 * Refresh the desc even if buffer_addrs
619 * didn't change because each write-back
620 * erases this info.
621 */
622 rx_desc->read.buffer_addr[j+1] =
623 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 624 }
625
89d71a66
ED		 626 skb = netdev_alloc_skb_ip_align(netdev,
627 adapter->rx_ps_bsize0);
bc7f75fa
AK		 628
629 if (!skb) {
630 adapter->alloc_rx_buff_failed++;
631 break;
632 }
633
bc7f75fa 634 buffer_info->skb = skb;
0be3f55f 635 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 636 adapter->rx_ps_bsize0,
0be3f55f
NN		 637 DMA_FROM_DEVICE);
638 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 639 dev_err(&pdev->dev, "RX DMA map failed\n");
640 adapter->rx_dma_failed++;
641 /* cleanup skb */
642 dev_kfree_skb_any(skb);
643 buffer_info->skb = NULL;
644 break;
645 }
646
647 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
648
50849d79
TH		 649 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
650 /*
651 * Force memory writes to complete before letting h/w
652 * know there are new descriptors to fetch. (Only
653 * applicable for weak-ordered memory model archs,
654 * such as IA-64).
655 */
656 wmb();
657 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
658 }
659
bc7f75fa
AK		 660 i++;
661 if (i == rx_ring->count)
662 i = 0;
663 buffer_info = &rx_ring->buffer_info[i];
664 }
665
666no_buffers:
50849d79 667 rx_ring->next_to_use = i;
bc7f75fa
AK		 668}
669
97ac8cae
BA		 670/**
671 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
672 * @adapter: address of board private structure
97ac8cae
BA		 673 * @cleaned_count: number of buffers to allocate this pass
674 **/
675
676static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
677 int cleaned_count)
678{
679 struct net_device *netdev = adapter->netdev;
680 struct pci_dev *pdev = adapter->pdev;
681 struct e1000_rx_desc *rx_desc;
682 struct e1000_ring *rx_ring = adapter->rx_ring;
683 struct e1000_buffer *buffer_info;
684 struct sk_buff *skb;
685 unsigned int i;
89d71a66 686 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 687
688 i = rx_ring->next_to_use;
689 buffer_info = &rx_ring->buffer_info[i];
690
691 while (cleaned_count--) {
692 skb = buffer_info->skb;
693 if (skb) {
694 skb_trim(skb, 0);
695 goto check_page;
696 }
697
89d71a66 698 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 699 if (unlikely(!skb)) {
700 /* Better luck next round */
701 adapter->alloc_rx_buff_failed++;
702 break;
703 }
704
97ac8cae
BA		 705 buffer_info->skb = skb;
706check_page:
707 /* allocate a new page if necessary */
708 if (!buffer_info->page) {
709 buffer_info->page = alloc_page(GFP_ATOMIC);
710 if (unlikely(!buffer_info->page)) {
711 adapter->alloc_rx_buff_failed++;
712 break;
713 }
714 }
715
716 if (!buffer_info->dma)
0be3f55f 717 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 718 buffer_info->page, 0,
719 PAGE_SIZE,
0be3f55f 720 DMA_FROM_DEVICE);
97ac8cae
BA		 721
722 rx_desc = E1000_RX_DESC(*rx_ring, i);
723 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
724
725 if (unlikely(++i == rx_ring->count))
726 i = 0;
727 buffer_info = &rx_ring->buffer_info[i];
728 }
729
730 if (likely(rx_ring->next_to_use != i)) {
731 rx_ring->next_to_use = i;
732 if (unlikely(i-- == 0))
733 i = (rx_ring->count - 1);
734
735 /* Force memory writes to complete before letting h/w
736 * know there are new descriptors to fetch. (Only
737 * applicable for weak-ordered memory model archs,
738 * such as IA-64). */
739 wmb();
740 writel(i, adapter->hw.hw_addr + rx_ring->tail);
741 }
742}
743
bc7f75fa
AK		 744/**
745 * e1000_clean_rx_irq - Send received data up the network stack; legacy
746 * @adapter: board private structure
747 *
748 * the return value indicates whether actual cleaning was done, there
749 * is no guarantee that everything was cleaned
750 **/
751static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
752 int *work_done, int work_to_do)
753{
754 struct net_device *netdev = adapter->netdev;
755 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 756 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 757 struct e1000_ring *rx_ring = adapter->rx_ring;
758 struct e1000_rx_desc *rx_desc, *next_rxd;
759 struct e1000_buffer *buffer_info, *next_buffer;
760 u32 length;
761 unsigned int i;
762 int cleaned_count = 0;
763 bool cleaned = 0;
764 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
765
766 i = rx_ring->next_to_clean;
767 rx_desc = E1000_RX_DESC(*rx_ring, i);
768 buffer_info = &rx_ring->buffer_info[i];
769
770 while (rx_desc->status & E1000_RXD_STAT_DD) {
771 struct sk_buff *skb;
772 u8 status;
773
774 if (*work_done >= work_to_do)
775 break;
776 (*work_done)++;
777
778 status = rx_desc->status;
779 skb = buffer_info->skb;
780 buffer_info->skb = NULL;
781
782 prefetch(skb->data - NET_IP_ALIGN);
783
784 i++;
785 if (i == rx_ring->count)
786 i = 0;
787 next_rxd = E1000_RX_DESC(*rx_ring, i);
788 prefetch(next_rxd);
789
790 next_buffer = &rx_ring->buffer_info[i];
791
792 cleaned = 1;
793 cleaned_count++;
0be3f55f 794 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 795 buffer_info->dma,
796 adapter->rx_buffer_len,
0be3f55f 797 DMA_FROM_DEVICE);
bc7f75fa
AK		 798 buffer_info->dma = 0;
799
800 length = le16_to_cpu(rx_desc->length);
801
b94b5028
JB		 802 /*
803 * !EOP means multiple descriptors were used to store a single
804 * packet, if that's the case we need to toss it. In fact, we
805 * need to toss every packet with the EOP bit clear and the
806 * next frame that _does_ have the EOP bit set, as it is by
807 * definition only a frame fragment
808 */
809 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
810 adapter->flags2 |= FLAG2_IS_DISCARDING;
811
812 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 813 /* All receives must fit into a single buffer */
3bb99fe2 814 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 815 /* recycle */
816 buffer_info->skb = skb;
b94b5028
JB		 817 if (status & E1000_RXD_STAT_EOP)
818 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 819 goto next_desc;
820 }
821
822 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
823 /* recycle */
824 buffer_info->skb = skb;
825 goto next_desc;
826 }
827
eb7c3adb
JK		 828 /* adjust length to remove Ethernet CRC */
829 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
830 length -= 4;
831
bc7f75fa
AK		 832 total_rx_bytes += length;
833 total_rx_packets++;
834
ad68076e
BA		 835 /*
836 * code added for copybreak, this should improve
bc7f75fa 837 * performance for small packets with large amounts
ad68076e
BA		 838 * of reassembly being done in the stack
839 */
bc7f75fa
AK		 840 if (length < copybreak) {
841 struct sk_buff *new_skb =
89d71a66 842 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 843 if (new_skb) {
808ff676
BA		 844 skb_copy_to_linear_data_offset(new_skb,
845 -NET_IP_ALIGN,
846 (skb->data -
847 NET_IP_ALIGN),
848 (length +
849 NET_IP_ALIGN));
bc7f75fa
AK		 850 /* save the skb in buffer_info as good */
851 buffer_info->skb = skb;
852 skb = new_skb;
853 }
854 /* else just continue with the old one */
855 }
856 /* end copybreak code */
857 skb_put(skb, length);
858
859 /* Receive Checksum Offload */
860 e1000_rx_checksum(adapter,
861 (u32)(status) |
862 ((u32)(rx_desc->errors) << 24),
863 le16_to_cpu(rx_desc->csum), skb);
864
865 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
866
867next_desc:
868 rx_desc->status = 0;
869
870 /* return some buffers to hardware, one at a time is too slow */
871 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
872 adapter->alloc_rx_buf(adapter, cleaned_count);
873 cleaned_count = 0;
874 }
875
876 /* use prefetched values */
877 rx_desc = next_rxd;
878 buffer_info = next_buffer;
879 }
880 rx_ring->next_to_clean = i;
881
882 cleaned_count = e1000_desc_unused(rx_ring);
883 if (cleaned_count)
884 adapter->alloc_rx_buf(adapter, cleaned_count);
885
bc7f75fa 886 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 887 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 888 netdev->stats.rx_bytes += total_rx_bytes;
889 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 890 return cleaned;
891}
892
bc7f75fa
AK		 893static void e1000_put_txbuf(struct e1000_adapter *adapter,
894 struct e1000_buffer *buffer_info)
895{
03b1320d
AD		 896 if (buffer_info->dma) {
897 if (buffer_info->mapped_as_page)
0be3f55f
NN		 898 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
899 buffer_info->length, DMA_TO_DEVICE);
03b1320d 900 else
0be3f55f
NN		 901 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
902 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 903 buffer_info->dma = 0;
904 }
bc7f75fa
AK		 905 if (buffer_info->skb) {
906 dev_kfree_skb_any(buffer_info->skb);
907 buffer_info->skb = NULL;
908 }
1b7719c4 909 buffer_info->time_stamp = 0;
bc7f75fa
AK		 910}
911
41cec6f1 912static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 913{
41cec6f1
BA		 914 struct e1000_adapter *adapter = container_of(work,
915 struct e1000_adapter,
916 print_hang_task);
bc7f75fa
AK		 917 struct e1000_ring *tx_ring = adapter->tx_ring;
918 unsigned int i = tx_ring->next_to_clean;
919 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
920 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 921 struct e1000_hw *hw = &adapter->hw;
922 u16 phy_status, phy_1000t_status, phy_ext_status;
923 u16 pci_status;
924
925 e1e_rphy(hw, PHY_STATUS, &phy_status);
926 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
927 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 928
41cec6f1
BA		 929 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
930
931 /* detected Hardware unit hang */
932 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 933 " TDH <%x>\n"
934 " TDT <%x>\n"
935 " next_to_use <%x>\n"
936 " next_to_clean <%x>\n"
937 "buffer_info[next_to_clean]:\n"
938 " time_stamp <%lx>\n"
939 " next_to_watch <%x>\n"
940 " jiffies <%lx>\n"
41cec6f1
BA		 941 " next_to_watch.status <%x>\n"
942 "MAC Status <%x>\n"
943 "PHY Status <%x>\n"
944 "PHY 1000BASE-T Status <%x>\n"
945 "PHY Extended Status <%x>\n"
946 "PCI Status <%x>\n",
44defeb3
JK		 947 readl(adapter->hw.hw_addr + tx_ring->head),
948 readl(adapter->hw.hw_addr + tx_ring->tail),
949 tx_ring->next_to_use,
950 tx_ring->next_to_clean,
951 tx_ring->buffer_info[eop].time_stamp,
952 eop,
953 jiffies,
41cec6f1
BA		 954 eop_desc->upper.fields.status,
955 er32(STATUS),
956 phy_status,
957 phy_1000t_status,
958 phy_ext_status,
959 pci_status);
bc7f75fa
AK		 960}
961
962/**
963 * e1000_clean_tx_irq - Reclaim resources after transmit completes
964 * @adapter: board private structure
965 *
966 * the return value indicates whether actual cleaning was done, there
967 * is no guarantee that everything was cleaned
968 **/
969static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
970{
971 struct net_device *netdev = adapter->netdev;
972 struct e1000_hw *hw = &adapter->hw;
973 struct e1000_ring *tx_ring = adapter->tx_ring;
974 struct e1000_tx_desc *tx_desc, *eop_desc;
975 struct e1000_buffer *buffer_info;
976 unsigned int i, eop;
977 unsigned int count = 0;
bc7f75fa
AK		 978 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
979
980 i = tx_ring->next_to_clean;
981 eop = tx_ring->buffer_info[i].next_to_watch;
982 eop_desc = E1000_TX_DESC(*tx_ring, eop);
983
12d04a3c
AD		 984 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
985 (count < tx_ring->count)) {
a86043c2
JB		 986 bool cleaned = false;
987 for (; !cleaned; count++) {
bc7f75fa
AK		 988 tx_desc = E1000_TX_DESC(*tx_ring, i);
989 buffer_info = &tx_ring->buffer_info[i];
990 cleaned = (i == eop);
991
992 if (cleaned) {
9ed318d5
TH		 993 total_tx_packets += buffer_info->segs;
994 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 995 }
996
997 e1000_put_txbuf(adapter, buffer_info);
998 tx_desc->upper.data = 0;
999
1000 i++;
1001 if (i == tx_ring->count)
1002 i = 0;
1003 }
1004
dac87619
TL		 1005 if (i == tx_ring->next_to_use)
1006 break;
bc7f75fa
AK		 1007 eop = tx_ring->buffer_info[i].next_to_watch;
1008 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1009 }
1010
1011 tx_ring->next_to_clean = i;
1012
1013#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1014 if (count && netif_carrier_ok(netdev) &&
1015 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1016 /* Make sure that anybody stopping the queue after this
1017 * sees the new next_to_clean.
1018 */
1019 smp_mb();
1020
1021 if (netif_queue_stopped(netdev) &&
1022 !(test_bit(__E1000_DOWN, &adapter->state))) {
1023 netif_wake_queue(netdev);
1024 ++adapter->restart_queue;
1025 }
1026 }
1027
1028 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1029 /*
1030 * Detect a transmit hang in hardware, this serializes the
1031 * check with the clearing of time_stamp and movement of i
1032 */
bc7f75fa 1033 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1034 if (tx_ring->buffer_info[i].time_stamp &&
1035 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1036 + (adapter->tx_timeout_factor * HZ)) &&
1037 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1038 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1039 netif_stop_queue(netdev);
1040 }
1041 }
1042 adapter->total_tx_bytes += total_tx_bytes;
1043 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 1044 netdev->stats.tx_bytes += total_tx_bytes;
1045 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 1046 return (count < tx_ring->count);
bc7f75fa
AK		 1047}
1048
bc7f75fa
AK		 1049/**
1050 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1051 * @adapter: board private structure
1052 *
1053 * the return value indicates whether actual cleaning was done, there
1054 * is no guarantee that everything was cleaned
1055 **/
1056static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1057 int *work_done, int work_to_do)
1058{
3bb99fe2 1059 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1060 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1061 struct net_device *netdev = adapter->netdev;
1062 struct pci_dev *pdev = adapter->pdev;
1063 struct e1000_ring *rx_ring = adapter->rx_ring;
1064 struct e1000_buffer *buffer_info, *next_buffer;
1065 struct e1000_ps_page *ps_page;
1066 struct sk_buff *skb;
1067 unsigned int i, j;
1068 u32 length, staterr;
1069 int cleaned_count = 0;
1070 bool cleaned = 0;
1071 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1072
1073 i = rx_ring->next_to_clean;
1074 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1075 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1076 buffer_info = &rx_ring->buffer_info[i];
1077
1078 while (staterr & E1000_RXD_STAT_DD) {
1079 if (*work_done >= work_to_do)
1080 break;
1081 (*work_done)++;
1082 skb = buffer_info->skb;
1083
1084 /* in the packet split case this is header only */
1085 prefetch(skb->data - NET_IP_ALIGN);
1086
1087 i++;
1088 if (i == rx_ring->count)
1089 i = 0;
1090 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1091 prefetch(next_rxd);
1092
1093 next_buffer = &rx_ring->buffer_info[i];
1094
1095 cleaned = 1;
1096 cleaned_count++;
0be3f55f 1097 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1098 adapter->rx_ps_bsize0,
0be3f55f 1099 DMA_FROM_DEVICE);
bc7f75fa
AK		 1100 buffer_info->dma = 0;
1101
b94b5028
JB		 1102 /* see !EOP comment in other rx routine */
1103 if (!(staterr & E1000_RXD_STAT_EOP))
1104 adapter->flags2 |= FLAG2_IS_DISCARDING;
1105
1106 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1107 e_dbg("Packet Split buffers didn't pick up the full "
1108 "packet\n");
bc7f75fa 1109 dev_kfree_skb_irq(skb);
b94b5028
JB		 1110 if (staterr & E1000_RXD_STAT_EOP)
1111 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1112 goto next_desc;
1113 }
1114
1115 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1116 dev_kfree_skb_irq(skb);
1117 goto next_desc;
1118 }
1119
1120 length = le16_to_cpu(rx_desc->wb.middle.length0);
1121
1122 if (!length) {
3bb99fe2
BA		 1123 e_dbg("Last part of the packet spanning multiple "
1124 "descriptors\n");
bc7f75fa
AK		 1125 dev_kfree_skb_irq(skb);
1126 goto next_desc;
1127 }
1128
1129 /* Good Receive */
1130 skb_put(skb, length);
1131
1132 {
ad68076e
BA		 1133 /*
1134 * this looks ugly, but it seems compiler issues make it
1135 * more efficient than reusing j
1136 */
bc7f75fa
AK		 1137 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1138
ad68076e
BA		 1139 /*
1140 * page alloc/put takes too long and effects small packet
1141 * throughput, so unsplit small packets and save the alloc/put
1142 * only valid in softirq (napi) context to call kmap_*
1143 */
bc7f75fa
AK		 1144 if (l1 && (l1 <= copybreak) &&
1145 ((length + l1) <= adapter->rx_ps_bsize0)) {
1146 u8 *vaddr;
1147
47f44e40 1148 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1149
ad68076e
BA		 1150 /*
1151 * there is no documentation about how to call
bc7f75fa 1152 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1153 * very long
1154 */
0be3f55f
NN		 1155 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1156 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1157 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1158 memcpy(skb_tail_pointer(skb), vaddr, l1);
1159 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1160 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1161 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1162
eb7c3adb
JK		 1163 /* remove the CRC */
1164 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1165 l1 -= 4;
1166
bc7f75fa
AK		 1167 skb_put(skb, l1);
1168 goto copydone;
1169 } /* if */
1170 }
1171
1172 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1173 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1174 if (!length)
1175 break;
1176
47f44e40 1177 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1178 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1179 DMA_FROM_DEVICE);
bc7f75fa
AK		 1180 ps_page->dma = 0;
1181 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1182 ps_page->page = NULL;
1183 skb->len += length;
1184 skb->data_len += length;
1185 skb->truesize += length;
1186 }
1187
eb7c3adb
JK		 1188 /* strip the ethernet crc, problem is we're using pages now so
1189 * this whole operation can get a little cpu intensive
1190 */
1191 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1192 pskb_trim(skb, skb->len - 4);
1193
bc7f75fa
AK		 1194copydone:
1195 total_rx_bytes += skb->len;
1196 total_rx_packets++;
1197
1198 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1199 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1200
1201 if (rx_desc->wb.upper.header_status &
1202 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1203 adapter->rx_hdr_split++;
1204
1205 e1000_receive_skb(adapter, netdev, skb,
1206 staterr, rx_desc->wb.middle.vlan);
1207
1208next_desc:
1209 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1210 buffer_info->skb = NULL;
1211
1212 /* return some buffers to hardware, one at a time is too slow */
1213 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1214 adapter->alloc_rx_buf(adapter, cleaned_count);
1215 cleaned_count = 0;
1216 }
1217
1218 /* use prefetched values */
1219 rx_desc = next_rxd;
1220 buffer_info = next_buffer;
1221
1222 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1223 }
1224 rx_ring->next_to_clean = i;
1225
1226 cleaned_count = e1000_desc_unused(rx_ring);
1227 if (cleaned_count)
1228 adapter->alloc_rx_buf(adapter, cleaned_count);
1229
bc7f75fa 1230 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1231 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1232 netdev->stats.rx_bytes += total_rx_bytes;
1233 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 1234 return cleaned;
1235}
1236
97ac8cae
BA		 1237/**
1238 * e1000_consume_page - helper function
1239 **/
1240static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1241 u16 length)
1242{
1243 bi->page = NULL;
1244 skb->len += length;
1245 skb->data_len += length;
1246 skb->truesize += length;
1247}
1248
1249/**
1250 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1251 * @adapter: board private structure
1252 *
1253 * the return value indicates whether actual cleaning was done, there
1254 * is no guarantee that everything was cleaned
1255 **/
1256
1257static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1258 int *work_done, int work_to_do)
1259{
1260 struct net_device *netdev = adapter->netdev;
1261 struct pci_dev *pdev = adapter->pdev;
1262 struct e1000_ring *rx_ring = adapter->rx_ring;
1263 struct e1000_rx_desc *rx_desc, *next_rxd;
1264 struct e1000_buffer *buffer_info, *next_buffer;
1265 u32 length;
1266 unsigned int i;
1267 int cleaned_count = 0;
1268 bool cleaned = false;
1269 unsigned int total_rx_bytes=0, total_rx_packets=0;
1270
1271 i = rx_ring->next_to_clean;
1272 rx_desc = E1000_RX_DESC(*rx_ring, i);
1273 buffer_info = &rx_ring->buffer_info[i];
1274
1275 while (rx_desc->status & E1000_RXD_STAT_DD) {
1276 struct sk_buff *skb;
1277 u8 status;
1278
1279 if (*work_done >= work_to_do)
1280 break;
1281 (*work_done)++;
1282
1283 status = rx_desc->status;
1284 skb = buffer_info->skb;
1285 buffer_info->skb = NULL;
1286
1287 ++i;
1288 if (i == rx_ring->count)
1289 i = 0;
1290 next_rxd = E1000_RX_DESC(*rx_ring, i);
1291 prefetch(next_rxd);
1292
1293 next_buffer = &rx_ring->buffer_info[i];
1294
1295 cleaned = true;
1296 cleaned_count++;
0be3f55f
NN		 1297 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1298 DMA_FROM_DEVICE);
97ac8cae
BA		 1299 buffer_info->dma = 0;
1300
1301 length = le16_to_cpu(rx_desc->length);
1302
1303 /* errors is only valid for DD + EOP descriptors */
1304 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1305 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1306 /* recycle both page and skb */
1307 buffer_info->skb = skb;
1308 /* an error means any chain goes out the window
1309 * too */
1310 if (rx_ring->rx_skb_top)
1311 dev_kfree_skb(rx_ring->rx_skb_top);
1312 rx_ring->rx_skb_top = NULL;
1313 goto next_desc;
1314 }
1315
1316#define rxtop rx_ring->rx_skb_top
1317 if (!(status & E1000_RXD_STAT_EOP)) {
1318 /* this descriptor is only the beginning (or middle) */
1319 if (!rxtop) {
1320 /* this is the beginning of a chain */
1321 rxtop = skb;
1322 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1323 0, length);
1324 } else {
1325 /* this is the middle of a chain */
1326 skb_fill_page_desc(rxtop,
1327 skb_shinfo(rxtop)->nr_frags,
1328 buffer_info->page, 0, length);
1329 /* re-use the skb, only consumed the page */
1330 buffer_info->skb = skb;
1331 }
1332 e1000_consume_page(buffer_info, rxtop, length);
1333 goto next_desc;
1334 } else {
1335 if (rxtop) {
1336 /* end of the chain */
1337 skb_fill_page_desc(rxtop,
1338 skb_shinfo(rxtop)->nr_frags,
1339 buffer_info->page, 0, length);
1340 /* re-use the current skb, we only consumed the
1341 * page */
1342 buffer_info->skb = skb;
1343 skb = rxtop;
1344 rxtop = NULL;
1345 e1000_consume_page(buffer_info, skb, length);
1346 } else {
1347 /* no chain, got EOP, this buf is the packet
1348 * copybreak to save the put_page/alloc_page */
1349 if (length <= copybreak &&
1350 skb_tailroom(skb) >= length) {
1351 u8 *vaddr;
1352 vaddr = kmap_atomic(buffer_info->page,
1353 KM_SKB_DATA_SOFTIRQ);
1354 memcpy(skb_tail_pointer(skb), vaddr,
1355 length);
1356 kunmap_atomic(vaddr,
1357 KM_SKB_DATA_SOFTIRQ);
1358 /* re-use the page, so don't erase
1359 * buffer_info->page */
1360 skb_put(skb, length);
1361 } else {
1362 skb_fill_page_desc(skb, 0,
1363 buffer_info->page, 0,
1364 length);
1365 e1000_consume_page(buffer_info, skb,
1366 length);
1367 }
1368 }
1369 }
1370
1371 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1372 e1000_rx_checksum(adapter,
1373 (u32)(status) |
1374 ((u32)(rx_desc->errors) << 24),
1375 le16_to_cpu(rx_desc->csum), skb);
1376
1377 /* probably a little skewed due to removing CRC */
1378 total_rx_bytes += skb->len;
1379 total_rx_packets++;
1380
1381 /* eth type trans needs skb->data to point to something */
1382 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1383 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1384 dev_kfree_skb(skb);
1385 goto next_desc;
1386 }
1387
1388 e1000_receive_skb(adapter, netdev, skb, status,
1389 rx_desc->special);
1390
1391next_desc:
1392 rx_desc->status = 0;
1393
1394 /* return some buffers to hardware, one at a time is too slow */
1395 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1396 adapter->alloc_rx_buf(adapter, cleaned_count);
1397 cleaned_count = 0;
1398 }
1399
1400 /* use prefetched values */
1401 rx_desc = next_rxd;
1402 buffer_info = next_buffer;
1403 }
1404 rx_ring->next_to_clean = i;
1405
1406 cleaned_count = e1000_desc_unused(rx_ring);
1407 if (cleaned_count)
1408 adapter->alloc_rx_buf(adapter, cleaned_count);
1409
1410 adapter->total_rx_bytes += total_rx_bytes;
1411 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1412 netdev->stats.rx_bytes += total_rx_bytes;
1413 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1414 return cleaned;
1415}
1416
bc7f75fa
AK		 1417/**
1418 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1419 * @adapter: board private structure
1420 **/
1421static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1422{
1423 struct e1000_ring *rx_ring = adapter->rx_ring;
1424 struct e1000_buffer *buffer_info;
1425 struct e1000_ps_page *ps_page;
1426 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1427 unsigned int i, j;
1428
1429 /* Free all the Rx ring sk_buffs */
1430 for (i = 0; i < rx_ring->count; i++) {
1431 buffer_info = &rx_ring->buffer_info[i];
1432 if (buffer_info->dma) {
1433 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1434 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1435 adapter->rx_buffer_len,
0be3f55f 1436 DMA_FROM_DEVICE);
97ac8cae 1437 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1438 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1439 PAGE_SIZE,
0be3f55f 1440 DMA_FROM_DEVICE);
bc7f75fa 1441 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1442 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1443 adapter->rx_ps_bsize0,
0be3f55f 1444 DMA_FROM_DEVICE);
bc7f75fa
AK		 1445 buffer_info->dma = 0;
1446 }
1447
97ac8cae
BA		 1448 if (buffer_info->page) {
1449 put_page(buffer_info->page);
1450 buffer_info->page = NULL;
1451 }
1452
bc7f75fa
AK		 1453 if (buffer_info->skb) {
1454 dev_kfree_skb(buffer_info->skb);
1455 buffer_info->skb = NULL;
1456 }
1457
1458 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1459 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1460 if (!ps_page->page)
1461 break;
0be3f55f
NN		 1462 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1463 DMA_FROM_DEVICE);
bc7f75fa
AK		 1464 ps_page->dma = 0;
1465 put_page(ps_page->page);
1466 ps_page->page = NULL;
1467 }
1468 }
1469
1470 /* there also may be some cached data from a chained receive */
1471 if (rx_ring->rx_skb_top) {
1472 dev_kfree_skb(rx_ring->rx_skb_top);
1473 rx_ring->rx_skb_top = NULL;
1474 }
1475
bc7f75fa
AK		 1476 /* Zero out the descriptor ring */
1477 memset(rx_ring->desc, 0, rx_ring->size);
1478
1479 rx_ring->next_to_clean = 0;
1480 rx_ring->next_to_use = 0;
b94b5028 1481 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1482
1483 writel(0, adapter->hw.hw_addr + rx_ring->head);
1484 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1485}
1486
a8f88ff5
JB		 1487static void e1000e_downshift_workaround(struct work_struct *work)
1488{
1489 struct e1000_adapter *adapter = container_of(work,
1490 struct e1000_adapter, downshift_task);
1491
1492 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1493}
1494
bc7f75fa
AK		 1495/**
1496 * e1000_intr_msi - Interrupt Handler
1497 * @irq: interrupt number
1498 * @data: pointer to a network interface device structure
1499 **/
1500static irqreturn_t e1000_intr_msi(int irq, void *data)
1501{
1502 struct net_device *netdev = data;
1503 struct e1000_adapter *adapter = netdev_priv(netdev);
1504 struct e1000_hw *hw = &adapter->hw;
1505 u32 icr = er32(ICR);
1506
ad68076e
BA		 1507 /*
1508 * read ICR disables interrupts using IAM
1509 */
bc7f75fa 1510
573cca8c 1511 if (icr & E1000_ICR_LSC) {
bc7f75fa 1512 hw->mac.get_link_status = 1;
ad68076e
BA		 1513 /*
1514 * ICH8 workaround-- Call gig speed drop workaround on cable
1515 * disconnect (LSC) before accessing any PHY registers
1516 */
bc7f75fa
AK		 1517 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1518 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1519 schedule_work(&adapter->downshift_task);
bc7f75fa 1520
ad68076e
BA		 1521 /*
1522 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1523 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1524 * adapter in watchdog
1525 */
bc7f75fa
AK		 1526 if (netif_carrier_ok(netdev) &&
1527 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1528 /* disable receives */
1529 u32 rctl = er32(RCTL);
1530 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1531 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1532 }
1533 /* guard against interrupt when we're going down */
1534 if (!test_bit(__E1000_DOWN, &adapter->state))
1535 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1536 }
1537
288379f0 1538 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1539 adapter->total_tx_bytes = 0;
1540 adapter->total_tx_packets = 0;
1541 adapter->total_rx_bytes = 0;
1542 adapter->total_rx_packets = 0;
288379f0 1543 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1544 }
1545
1546 return IRQ_HANDLED;
1547}
1548
1549/**
1550 * e1000_intr - Interrupt Handler
1551 * @irq: interrupt number
1552 * @data: pointer to a network interface device structure
1553 **/
1554static irqreturn_t e1000_intr(int irq, void *data)
1555{
1556 struct net_device *netdev = data;
1557 struct e1000_adapter *adapter = netdev_priv(netdev);
1558 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1559 u32 rctl, icr = er32(ICR);
4662e82b 1560
a68ea775 1561 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1562 return IRQ_NONE; /* Not our interrupt */
1563
ad68076e
BA		 1564 /*
1565 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1566 * not set, then the adapter didn't send an interrupt
1567 */
bc7f75fa
AK		 1568 if (!(icr & E1000_ICR_INT_ASSERTED))
1569 return IRQ_NONE;
1570
ad68076e
BA		 1571 /*
1572 * Interrupt Auto-Mask...upon reading ICR,
1573 * interrupts are masked. No need for the
1574 * IMC write
1575 */
bc7f75fa 1576
573cca8c 1577 if (icr & E1000_ICR_LSC) {
bc7f75fa 1578 hw->mac.get_link_status = 1;
ad68076e
BA		 1579 /*
1580 * ICH8 workaround-- Call gig speed drop workaround on cable
1581 * disconnect (LSC) before accessing any PHY registers
1582 */
bc7f75fa
AK		 1583 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1584 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1585 schedule_work(&adapter->downshift_task);
bc7f75fa 1586
ad68076e
BA		 1587 /*
1588 * 80003ES2LAN workaround--
bc7f75fa
AK		 1589 * For packet buffer work-around on link down event;
1590 * disable receives here in the ISR and
1591 * reset adapter in watchdog
1592 */
1593 if (netif_carrier_ok(netdev) &&
1594 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1595 /* disable receives */
1596 rctl = er32(RCTL);
1597 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1598 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1599 }
1600 /* guard against interrupt when we're going down */
1601 if (!test_bit(__E1000_DOWN, &adapter->state))
1602 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1603 }
1604
288379f0 1605 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1606 adapter->total_tx_bytes = 0;
1607 adapter->total_tx_packets = 0;
1608 adapter->total_rx_bytes = 0;
1609 adapter->total_rx_packets = 0;
288379f0 1610 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1611 }
1612
1613 return IRQ_HANDLED;
1614}
1615
4662e82b
BA		 1616static irqreturn_t e1000_msix_other(int irq, void *data)
1617{
1618 struct net_device *netdev = data;
1619 struct e1000_adapter *adapter = netdev_priv(netdev);
1620 struct e1000_hw *hw = &adapter->hw;
1621 u32 icr = er32(ICR);
1622
1623 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1624 if (!test_bit(__E1000_DOWN, &adapter->state))
1625 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1626 return IRQ_NONE;
1627 }
1628
1629 if (icr & adapter->eiac_mask)
1630 ew32(ICS, (icr & adapter->eiac_mask));
1631
1632 if (icr & E1000_ICR_OTHER) {
1633 if (!(icr & E1000_ICR_LSC))
1634 goto no_link_interrupt;
1635 hw->mac.get_link_status = 1;
1636 /* guard against interrupt when we're going down */
1637 if (!test_bit(__E1000_DOWN, &adapter->state))
1638 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1639 }
1640
1641no_link_interrupt:
a3c69fef
JB		 1642 if (!test_bit(__E1000_DOWN, &adapter->state))
1643 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1644
1645 return IRQ_HANDLED;
1646}
1647
1648
1649static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1650{
1651 struct net_device *netdev = data;
1652 struct e1000_adapter *adapter = netdev_priv(netdev);
1653 struct e1000_hw *hw = &adapter->hw;
1654 struct e1000_ring *tx_ring = adapter->tx_ring;
1655
1656
1657 adapter->total_tx_bytes = 0;
1658 adapter->total_tx_packets = 0;
1659
1660 if (!e1000_clean_tx_irq(adapter))
1661 /* Ring was not completely cleaned, so fire another interrupt */
1662 ew32(ICS, tx_ring->ims_val);
1663
1664 return IRQ_HANDLED;
1665}
1666
1667static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1668{
1669 struct net_device *netdev = data;
1670 struct e1000_adapter *adapter = netdev_priv(netdev);
1671
1672 /* Write the ITR value calculated at the end of the
1673 * previous interrupt.
1674 */
1675 if (adapter->rx_ring->set_itr) {
1676 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1677 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1678 adapter->rx_ring->set_itr = 0;
1679 }
1680
288379f0 1681 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1682 adapter->total_rx_bytes = 0;
1683 adapter->total_rx_packets = 0;
288379f0 1684 __napi_schedule(&adapter->napi);
4662e82b
BA		 1685 }
1686 return IRQ_HANDLED;
1687}
1688
1689/**
1690 * e1000_configure_msix - Configure MSI-X hardware
1691 *
1692 * e1000_configure_msix sets up the hardware to properly
1693 * generate MSI-X interrupts.
1694 **/
1695static void e1000_configure_msix(struct e1000_adapter *adapter)
1696{
1697 struct e1000_hw *hw = &adapter->hw;
1698 struct e1000_ring *rx_ring = adapter->rx_ring;
1699 struct e1000_ring *tx_ring = adapter->tx_ring;
1700 int vector = 0;
1701 u32 ctrl_ext, ivar = 0;
1702
1703 adapter->eiac_mask = 0;
1704
1705 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1706 if (hw->mac.type == e1000_82574) {
1707 u32 rfctl = er32(RFCTL);
1708 rfctl |= E1000_RFCTL_ACK_DIS;
1709 ew32(RFCTL, rfctl);
1710 }
1711
1712#define E1000_IVAR_INT_ALLOC_VALID 0x8
1713 /* Configure Rx vector */
1714 rx_ring->ims_val = E1000_IMS_RXQ0;
1715 adapter->eiac_mask |= rx_ring->ims_val;
1716 if (rx_ring->itr_val)
1717 writel(1000000000 / (rx_ring->itr_val * 256),
1718 hw->hw_addr + rx_ring->itr_register);
1719 else
1720 writel(1, hw->hw_addr + rx_ring->itr_register);
1721 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1722
1723 /* Configure Tx vector */
1724 tx_ring->ims_val = E1000_IMS_TXQ0;
1725 vector++;
1726 if (tx_ring->itr_val)
1727 writel(1000000000 / (tx_ring->itr_val * 256),
1728 hw->hw_addr + tx_ring->itr_register);
1729 else
1730 writel(1, hw->hw_addr + tx_ring->itr_register);
1731 adapter->eiac_mask |= tx_ring->ims_val;
1732 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1733
1734 /* set vector for Other Causes, e.g. link changes */
1735 vector++;
1736 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1737 if (rx_ring->itr_val)
1738 writel(1000000000 / (rx_ring->itr_val * 256),
1739 hw->hw_addr + E1000_EITR_82574(vector));
1740 else
1741 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1742
1743 /* Cause Tx interrupts on every write back */
1744 ivar |= (1 << 31);
1745
1746 ew32(IVAR, ivar);
1747
1748 /* enable MSI-X PBA support */
1749 ctrl_ext = er32(CTRL_EXT);
1750 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1751
1752 /* Auto-Mask Other interrupts upon ICR read */
1753#define E1000_EIAC_MASK_82574 0x01F00000
1754 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1755 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1756 ew32(CTRL_EXT, ctrl_ext);
1757 e1e_flush();
1758}
1759
1760void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1761{
1762 if (adapter->msix_entries) {
1763 pci_disable_msix(adapter->pdev);
1764 kfree(adapter->msix_entries);
1765 adapter->msix_entries = NULL;
1766 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1767 pci_disable_msi(adapter->pdev);
1768 adapter->flags &= ~FLAG_MSI_ENABLED;
1769 }
1770
1771 return;
1772}
1773
1774/**
1775 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1776 *
1777 * Attempt to configure interrupts using the best available
1778 * capabilities of the hardware and kernel.
1779 **/
1780void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1781{
1782 int err;
1783 int numvecs, i;
1784
1785
1786 switch (adapter->int_mode) {
1787 case E1000E_INT_MODE_MSIX:
1788 if (adapter->flags & FLAG_HAS_MSIX) {
1789 numvecs = 3; /* RxQ0, TxQ0 and other */
1790 adapter->msix_entries = kcalloc(numvecs,
1791 sizeof(struct msix_entry),
1792 GFP_KERNEL);
1793 if (adapter->msix_entries) {
1794 for (i = 0; i < numvecs; i++)
1795 adapter->msix_entries[i].entry = i;
1796
1797 err = pci_enable_msix(adapter->pdev,
1798 adapter->msix_entries,
1799 numvecs);
1800 if (err == 0)
1801 return;
1802 }
1803 /* MSI-X failed, so fall through and try MSI */
1804 e_err("Failed to initialize MSI-X interrupts. "
1805 "Falling back to MSI interrupts.\n");
1806 e1000e_reset_interrupt_capability(adapter);
1807 }
1808 adapter->int_mode = E1000E_INT_MODE_MSI;
1809 /* Fall through */
1810 case E1000E_INT_MODE_MSI:
1811 if (!pci_enable_msi(adapter->pdev)) {
1812 adapter->flags |= FLAG_MSI_ENABLED;
1813 } else {
1814 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1815 e_err("Failed to initialize MSI interrupts. Falling "
1816 "back to legacy interrupts.\n");
1817 }
1818 /* Fall through */
1819 case E1000E_INT_MODE_LEGACY:
1820 /* Don't do anything; this is the system default */
1821 break;
1822 }
1823
1824 return;
1825}
1826
1827/**
1828 * e1000_request_msix - Initialize MSI-X interrupts
1829 *
1830 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1831 * kernel.
1832 **/
1833static int e1000_request_msix(struct e1000_adapter *adapter)
1834{
1835 struct net_device *netdev = adapter->netdev;
1836 int err = 0, vector = 0;
1837
1838 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1839 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1840 else
1841 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1842 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1843 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1844 netdev);
1845 if (err)
1846 goto out;
1847 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1848 adapter->rx_ring->itr_val = adapter->itr;
1849 vector++;
1850
1851 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1852 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1853 else
1854 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1855 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1856 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1857 netdev);
1858 if (err)
1859 goto out;
1860 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1861 adapter->tx_ring->itr_val = adapter->itr;
1862 vector++;
1863
1864 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1865 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1866 if (err)
1867 goto out;
1868
1869 e1000_configure_msix(adapter);
1870 return 0;
1871out:
1872 return err;
1873}
1874
f8d59f78
BA		 1875/**
1876 * e1000_request_irq - initialize interrupts
1877 *
1878 * Attempts to configure interrupts using the best available
1879 * capabilities of the hardware and kernel.
1880 **/
bc7f75fa
AK		 1881static int e1000_request_irq(struct e1000_adapter *adapter)
1882{
1883 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1884 int err;
1885
4662e82b
BA		 1886 if (adapter->msix_entries) {
1887 err = e1000_request_msix(adapter);
1888 if (!err)
1889 return err;
1890 /* fall back to MSI */
1891 e1000e_reset_interrupt_capability(adapter);
1892 adapter->int_mode = E1000E_INT_MODE_MSI;
1893 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1894 }
4662e82b 1895 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1896 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1897 netdev->name, netdev);
1898 if (!err)
1899 return err;
bc7f75fa 1900
4662e82b
BA		 1901 /* fall back to legacy interrupt */
1902 e1000e_reset_interrupt_capability(adapter);
1903 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1904 }
1905
a0607fd3 1906 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1907 netdev->name, netdev);
1908 if (err)
1909 e_err("Unable to allocate interrupt, Error: %d\n", err);
1910
bc7f75fa
AK		 1911 return err;
1912}
1913
1914static void e1000_free_irq(struct e1000_adapter *adapter)
1915{
1916 struct net_device *netdev = adapter->netdev;
1917
4662e82b
BA		 1918 if (adapter->msix_entries) {
1919 int vector = 0;
1920
1921 free_irq(adapter->msix_entries[vector].vector, netdev);
1922 vector++;
1923
1924 free_irq(adapter->msix_entries[vector].vector, netdev);
1925 vector++;
1926
1927 /* Other Causes interrupt vector */
1928 free_irq(adapter->msix_entries[vector].vector, netdev);
1929 return;
bc7f75fa 1930 }
4662e82b
BA		 1931
1932 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1933}
1934
1935/**
1936 * e1000_irq_disable - Mask off interrupt generation on the NIC
1937 **/
1938static void e1000_irq_disable(struct e1000_adapter *adapter)
1939{
1940 struct e1000_hw *hw = &adapter->hw;
1941
bc7f75fa 1942 ew32(IMC, ~0);
4662e82b
BA		 1943 if (adapter->msix_entries)
1944 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1945 e1e_flush();
1946 synchronize_irq(adapter->pdev->irq);
1947}
1948
1949/**
1950 * e1000_irq_enable - Enable default interrupt generation settings
1951 **/
1952static void e1000_irq_enable(struct e1000_adapter *adapter)
1953{
1954 struct e1000_hw *hw = &adapter->hw;
1955
4662e82b
BA		 1956 if (adapter->msix_entries) {
1957 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1958 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1959 } else {
1960 ew32(IMS, IMS_ENABLE_MASK);
1961 }
74ef9c39 1962 e1e_flush();
bc7f75fa
AK		 1963}
1964
1965/**
1966 * e1000_get_hw_control - get control of the h/w from f/w
1967 * @adapter: address of board private structure
1968 *
489815ce 1969 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1970 * For ASF and Pass Through versions of f/w this means that
1971 * the driver is loaded. For AMT version (only with 82573)
1972 * of the f/w this means that the network i/f is open.
1973 **/
1974static void e1000_get_hw_control(struct e1000_adapter *adapter)
1975{
1976 struct e1000_hw *hw = &adapter->hw;
1977 u32 ctrl_ext;
1978 u32 swsm;
1979
1980 /* Let firmware know the driver has taken over */
1981 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1982 swsm = er32(SWSM);
1983 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1984 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1985 ctrl_ext = er32(CTRL_EXT);
ad68076e 1986 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1987 }
1988}
1989
1990/**
1991 * e1000_release_hw_control - release control of the h/w to f/w
1992 * @adapter: address of board private structure
1993 *
489815ce 1994 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1995 * For ASF and Pass Through versions of f/w this means that the
1996 * driver is no longer loaded. For AMT version (only with 82573) i
1997 * of the f/w this means that the network i/f is closed.
1998 *
1999 **/
2000static void e1000_release_hw_control(struct e1000_adapter *adapter)
2001{
2002 struct e1000_hw *hw = &adapter->hw;
2003 u32 ctrl_ext;
2004 u32 swsm;
2005
2006 /* Let firmware taken over control of h/w */
2007 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2008 swsm = er32(SWSM);
2009 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2010 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2011 ctrl_ext = er32(CTRL_EXT);
ad68076e 2012 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2013 }
2014}
2015
bc7f75fa
AK		 2016/**
2017 * @e1000_alloc_ring - allocate memory for a ring structure
2018 **/
2019static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2020 struct e1000_ring *ring)
2021{
2022 struct pci_dev *pdev = adapter->pdev;
2023
2024 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2025 GFP_KERNEL);
2026 if (!ring->desc)
2027 return -ENOMEM;
2028
2029 return 0;
2030}
2031
2032/**
2033 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2034 * @adapter: board private structure
2035 *
2036 * Return 0 on success, negative on failure
2037 **/
2038int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2039{
2040 struct e1000_ring *tx_ring = adapter->tx_ring;
2041 int err = -ENOMEM, size;
2042
2043 size = sizeof(struct e1000_buffer) * tx_ring->count;
2044 tx_ring->buffer_info = vmalloc(size);
2045 if (!tx_ring->buffer_info)
2046 goto err;
2047 memset(tx_ring->buffer_info, 0, size);
2048
2049 /* round up to nearest 4K */
2050 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2051 tx_ring->size = ALIGN(tx_ring->size, 4096);
2052
2053 err = e1000_alloc_ring_dma(adapter, tx_ring);
2054 if (err)
2055 goto err;
2056
2057 tx_ring->next_to_use = 0;
2058 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2059
2060 return 0;
2061err:
2062 vfree(tx_ring->buffer_info);
44defeb3 2063 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2064 return err;
2065}
2066
2067/**
2068 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2069 * @adapter: board private structure
2070 *
2071 * Returns 0 on success, negative on failure
2072 **/
2073int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2074{
2075 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2076 struct e1000_buffer *buffer_info;
2077 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2078
2079 size = sizeof(struct e1000_buffer) * rx_ring->count;
2080 rx_ring->buffer_info = vmalloc(size);
2081 if (!rx_ring->buffer_info)
2082 goto err;
2083 memset(rx_ring->buffer_info, 0, size);
2084
47f44e40
AK		 2085 for (i = 0; i < rx_ring->count; i++) {
2086 buffer_info = &rx_ring->buffer_info[i];
2087 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2088 sizeof(struct e1000_ps_page),
2089 GFP_KERNEL);
2090 if (!buffer_info->ps_pages)
2091 goto err_pages;
2092 }
bc7f75fa
AK		 2093
2094 desc_len = sizeof(union e1000_rx_desc_packet_split);
2095
2096 /* Round up to nearest 4K */
2097 rx_ring->size = rx_ring->count * desc_len;
2098 rx_ring->size = ALIGN(rx_ring->size, 4096);
2099
2100 err = e1000_alloc_ring_dma(adapter, rx_ring);
2101 if (err)
47f44e40 2102 goto err_pages;
bc7f75fa
AK		 2103
2104 rx_ring->next_to_clean = 0;
2105 rx_ring->next_to_use = 0;
2106 rx_ring->rx_skb_top = NULL;
2107
2108 return 0;
47f44e40
AK		 2109
2110err_pages:
2111 for (i = 0; i < rx_ring->count; i++) {
2112 buffer_info = &rx_ring->buffer_info[i];
2113 kfree(buffer_info->ps_pages);
2114 }
bc7f75fa
AK		 2115err:
2116 vfree(rx_ring->buffer_info);
44defeb3 2117 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2118 return err;
2119}
2120
2121/**
2122 * e1000_clean_tx_ring - Free Tx Buffers
2123 * @adapter: board private structure
2124 **/
2125static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2126{
2127 struct e1000_ring *tx_ring = adapter->tx_ring;
2128 struct e1000_buffer *buffer_info;
2129 unsigned long size;
2130 unsigned int i;
2131
2132 for (i = 0; i < tx_ring->count; i++) {
2133 buffer_info = &tx_ring->buffer_info[i];
2134 e1000_put_txbuf(adapter, buffer_info);
2135 }
2136
2137 size = sizeof(struct e1000_buffer) * tx_ring->count;
2138 memset(tx_ring->buffer_info, 0, size);
2139
2140 memset(tx_ring->desc, 0, tx_ring->size);
2141
2142 tx_ring->next_to_use = 0;
2143 tx_ring->next_to_clean = 0;
2144
2145 writel(0, adapter->hw.hw_addr + tx_ring->head);
2146 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2147}
2148
2149/**
2150 * e1000e_free_tx_resources - Free Tx Resources per Queue
2151 * @adapter: board private structure
2152 *
2153 * Free all transmit software resources
2154 **/
2155void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2156{
2157 struct pci_dev *pdev = adapter->pdev;
2158 struct e1000_ring *tx_ring = adapter->tx_ring;
2159
2160 e1000_clean_tx_ring(adapter);
2161
2162 vfree(tx_ring->buffer_info);
2163 tx_ring->buffer_info = NULL;
2164
2165 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2166 tx_ring->dma);
2167 tx_ring->desc = NULL;
2168}
2169
2170/**
2171 * e1000e_free_rx_resources - Free Rx Resources
2172 * @adapter: board private structure
2173 *
2174 * Free all receive software resources
2175 **/
2176
2177void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2178{
2179 struct pci_dev *pdev = adapter->pdev;
2180 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2181 int i;
bc7f75fa
AK		 2182
2183 e1000_clean_rx_ring(adapter);
2184
47f44e40
AK		 2185 for (i = 0; i < rx_ring->count; i++) {
2186 kfree(rx_ring->buffer_info[i].ps_pages);
2187 }
2188
bc7f75fa
AK		 2189 vfree(rx_ring->buffer_info);
2190 rx_ring->buffer_info = NULL;
2191
bc7f75fa
AK		 2192 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2193 rx_ring->dma);
2194 rx_ring->desc = NULL;
2195}
2196
2197/**
2198 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2199 * @adapter: pointer to adapter
2200 * @itr_setting: current adapter->itr
2201 * @packets: the number of packets during this measurement interval
2202 * @bytes: the number of bytes during this measurement interval
2203 *
bc7f75fa
AK		 2204 * Stores a new ITR value based on packets and byte
2205 * counts during the last interrupt. The advantage of per interrupt
2206 * computation is faster updates and more accurate ITR for the current
2207 * traffic pattern. Constants in this function were computed
2208 * based on theoretical maximum wire speed and thresholds were set based
2209 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2210 * while increasing bulk throughput. This functionality is controlled
2211 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2212 **/
2213static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2214 u16 itr_setting, int packets,
2215 int bytes)
2216{
2217 unsigned int retval = itr_setting;
2218
2219 if (packets == 0)
2220 goto update_itr_done;
2221
2222 switch (itr_setting) {
2223 case lowest_latency:
2224 /* handle TSO and jumbo frames */
2225 if (bytes/packets > 8000)
2226 retval = bulk_latency;
2227 else if ((packets < 5) && (bytes > 512)) {
2228 retval = low_latency;
2229 }
2230 break;
2231 case low_latency: /* 50 usec aka 20000 ints/s */
2232 if (bytes > 10000) {
2233 /* this if handles the TSO accounting */
2234 if (bytes/packets > 8000) {
2235 retval = bulk_latency;
2236 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2237 retval = bulk_latency;
2238 } else if ((packets > 35)) {
2239 retval = lowest_latency;
2240 }
2241 } else if (bytes/packets > 2000) {
2242 retval = bulk_latency;
2243 } else if (packets <= 2 && bytes < 512) {
2244 retval = lowest_latency;
2245 }
2246 break;
2247 case bulk_latency: /* 250 usec aka 4000 ints/s */
2248 if (bytes > 25000) {
2249 if (packets > 35) {
2250 retval = low_latency;
2251 }
2252 } else if (bytes < 6000) {
2253 retval = low_latency;
2254 }
2255 break;
2256 }
2257
2258update_itr_done:
2259 return retval;
2260}
2261
2262static void e1000_set_itr(struct e1000_adapter *adapter)
2263{
2264 struct e1000_hw *hw = &adapter->hw;
2265 u16 current_itr;
2266 u32 new_itr = adapter->itr;
2267
2268 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2269 if (adapter->link_speed != SPEED_1000) {
2270 current_itr = 0;
2271 new_itr = 4000;
2272 goto set_itr_now;
2273 }
2274
2275 adapter->tx_itr = e1000_update_itr(adapter,
2276 adapter->tx_itr,
2277 adapter->total_tx_packets,
2278 adapter->total_tx_bytes);
2279 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2280 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2281 adapter->tx_itr = low_latency;
2282
2283 adapter->rx_itr = e1000_update_itr(adapter,
2284 adapter->rx_itr,
2285 adapter->total_rx_packets,
2286 adapter->total_rx_bytes);
2287 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2288 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2289 adapter->rx_itr = low_latency;
2290
2291 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2292
2293 switch (current_itr) {
2294 /* counts and packets in update_itr are dependent on these numbers */
2295 case lowest_latency:
2296 new_itr = 70000;
2297 break;
2298 case low_latency:
2299 new_itr = 20000; /* aka hwitr = ~200 */
2300 break;
2301 case bulk_latency:
2302 new_itr = 4000;
2303 break;
2304 default:
2305 break;
2306 }
2307
2308set_itr_now:
2309 if (new_itr != adapter->itr) {
ad68076e
BA		 2310 /*
2311 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2312 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2313 * increasing
2314 */
bc7f75fa
AK		 2315 new_itr = new_itr > adapter->itr ?
2316 min(adapter->itr + (new_itr >> 2), new_itr) :
2317 new_itr;
2318 adapter->itr = new_itr;
4662e82b
BA		 2319 adapter->rx_ring->itr_val = new_itr;
2320 if (adapter->msix_entries)
2321 adapter->rx_ring->set_itr = 1;
2322 else
2323 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 2324 }
2325}
2326
4662e82b
BA		 2327/**
2328 * e1000_alloc_queues - Allocate memory for all rings
2329 * @adapter: board private structure to initialize
2330 **/
2331static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2332{
2333 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2334 if (!adapter->tx_ring)
2335 goto err;
2336
2337 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2338 if (!adapter->rx_ring)
2339 goto err;
2340
2341 return 0;
2342err:
2343 e_err("Unable to allocate memory for queues\n");
2344 kfree(adapter->rx_ring);
2345 kfree(adapter->tx_ring);
2346 return -ENOMEM;
2347}
2348
bc7f75fa
AK		 2349/**
2350 * e1000_clean - NAPI Rx polling callback
ad68076e 2351 * @napi: struct associated with this polling callback
489815ce 2352 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2353 **/
2354static int e1000_clean(struct napi_struct *napi, int budget)
2355{
2356 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2357 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2358 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2359 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2360
4cf1653a 2361 adapter = netdev_priv(poll_dev);
bc7f75fa 2362
4662e82b
BA		 2363 if (adapter->msix_entries &&
2364 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2365 goto clean_rx;
2366
92af3e95 2367 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2368
4662e82b 2369clean_rx:
bc7f75fa 2370 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2371
12d04a3c 2372 if (!tx_cleaned)
d2c7ddd6 2373 work_done = budget;
bc7f75fa 2374
53e52c72
DM		 2375 /* If budget not fully consumed, exit the polling mode */
2376 if (work_done < budget) {
bc7f75fa
AK		 2377 if (adapter->itr_setting & 3)
2378 e1000_set_itr(adapter);
288379f0 2379 napi_complete(napi);
a3c69fef
JB		 2380 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2381 if (adapter->msix_entries)
2382 ew32(IMS, adapter->rx_ring->ims_val);
2383 else
2384 e1000_irq_enable(adapter);
2385 }
bc7f75fa
AK		 2386 }
2387
2388 return work_done;
2389}
2390
2391static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2392{
2393 struct e1000_adapter *adapter = netdev_priv(netdev);
2394 struct e1000_hw *hw = &adapter->hw;
2395 u32 vfta, index;
2396
2397 /* don't update vlan cookie if already programmed */
2398 if ((adapter->hw.mng_cookie.status &
2399 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2400 (vid == adapter->mng_vlan_id))
2401 return;
caaddaf8 2402
bc7f75fa 2403 /* add VID to filter table */
caaddaf8
BA		 2404 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2405 index = (vid >> 5) & 0x7F;
2406 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2407 vfta |= (1 << (vid & 0x1F));
2408 hw->mac.ops.write_vfta(hw, index, vfta);
2409 }
bc7f75fa
AK		 2410}
2411
2412static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2413{
2414 struct e1000_adapter *adapter = netdev_priv(netdev);
2415 struct e1000_hw *hw = &adapter->hw;
2416 u32 vfta, index;
2417
74ef9c39
JB		 2418 if (!test_bit(__E1000_DOWN, &adapter->state))
2419 e1000_irq_disable(adapter);
bc7f75fa 2420 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2421
2422 if (!test_bit(__E1000_DOWN, &adapter->state))
2423 e1000_irq_enable(adapter);
bc7f75fa
AK		 2424
2425 if ((adapter->hw.mng_cookie.status &
2426 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2427 (vid == adapter->mng_vlan_id)) {
2428 /* release control to f/w */
2429 e1000_release_hw_control(adapter);
2430 return;
2431 }
2432
2433 /* remove VID from filter table */
caaddaf8
BA		 2434 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2435 index = (vid >> 5) & 0x7F;
2436 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2437 vfta &= ~(1 << (vid & 0x1F));
2438 hw->mac.ops.write_vfta(hw, index, vfta);
2439 }
bc7f75fa
AK		 2440}
2441
2442static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2443{
2444 struct net_device *netdev = adapter->netdev;
2445 u16 vid = adapter->hw.mng_cookie.vlan_id;
2446 u16 old_vid = adapter->mng_vlan_id;
2447
2448 if (!adapter->vlgrp)
2449 return;
2450
2451 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2452 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2453 if (adapter->hw.mng_cookie.status &
2454 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2455 e1000_vlan_rx_add_vid(netdev, vid);
2456 adapter->mng_vlan_id = vid;
2457 }
2458
2459 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2460 (vid != old_vid) &&
2461 !vlan_group_get_device(adapter->vlgrp, old_vid))
2462 e1000_vlan_rx_kill_vid(netdev, old_vid);
2463 } else {
2464 adapter->mng_vlan_id = vid;
2465 }
2466}
2467
2468
2469static void e1000_vlan_rx_register(struct net_device *netdev,
2470 struct vlan_group *grp)
2471{
2472 struct e1000_adapter *adapter = netdev_priv(netdev);
2473 struct e1000_hw *hw = &adapter->hw;
2474 u32 ctrl, rctl;
2475
74ef9c39
JB		 2476 if (!test_bit(__E1000_DOWN, &adapter->state))
2477 e1000_irq_disable(adapter);
bc7f75fa
AK		 2478 adapter->vlgrp = grp;
2479
2480 if (grp) {
2481 /* enable VLAN tag insert/strip */
2482 ctrl = er32(CTRL);
2483 ctrl |= E1000_CTRL_VME;
2484 ew32(CTRL, ctrl);
2485
2486 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2487 /* enable VLAN receive filtering */
2488 rctl = er32(RCTL);
bc7f75fa
AK		 2489 rctl &= ~E1000_RCTL_CFIEN;
2490 ew32(RCTL, rctl);
2491 e1000_update_mng_vlan(adapter);
2492 }
2493 } else {
2494 /* disable VLAN tag insert/strip */
2495 ctrl = er32(CTRL);
2496 ctrl &= ~E1000_CTRL_VME;
2497 ew32(CTRL, ctrl);
2498
2499 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2500 if (adapter->mng_vlan_id !=
2501 (u16)E1000_MNG_VLAN_NONE) {
2502 e1000_vlan_rx_kill_vid(netdev,
2503 adapter->mng_vlan_id);
2504 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2505 }
2506 }
2507 }
2508
74ef9c39
JB		 2509 if (!test_bit(__E1000_DOWN, &adapter->state))
2510 e1000_irq_enable(adapter);
bc7f75fa
AK		 2511}
2512
2513static void e1000_restore_vlan(struct e1000_adapter *adapter)
2514{
2515 u16 vid;
2516
2517 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2518
2519 if (!adapter->vlgrp)
2520 return;
2521
2522 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2523 if (!vlan_group_get_device(adapter->vlgrp, vid))
2524 continue;
2525 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2526 }
2527}
2528
2529static void e1000_init_manageability(struct e1000_adapter *adapter)
2530{
2531 struct e1000_hw *hw = &adapter->hw;
2532 u32 manc, manc2h;
2533
2534 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2535 return;
2536
2537 manc = er32(MANC);
2538
ad68076e
BA		 2539 /*
2540 * enable receiving management packets to the host. this will probably
bc7f75fa 2541 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2542 * the packets will be handled on SMBUS
2543 */
bc7f75fa
AK		 2544 manc |= E1000_MANC_EN_MNG2HOST;
2545 manc2h = er32(MANC2H);
2546#define E1000_MNG2HOST_PORT_623 (1 << 5)
2547#define E1000_MNG2HOST_PORT_664 (1 << 6)
2548 manc2h |= E1000_MNG2HOST_PORT_623;
2549 manc2h |= E1000_MNG2HOST_PORT_664;
2550 ew32(MANC2H, manc2h);
2551 ew32(MANC, manc);
2552}
2553
2554/**
2555 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2556 * @adapter: board private structure
2557 *
2558 * Configure the Tx unit of the MAC after a reset.
2559 **/
2560static void e1000_configure_tx(struct e1000_adapter *adapter)
2561{
2562 struct e1000_hw *hw = &adapter->hw;
2563 struct e1000_ring *tx_ring = adapter->tx_ring;
2564 u64 tdba;
2565 u32 tdlen, tctl, tipg, tarc;
2566 u32 ipgr1, ipgr2;
2567
2568 /* Setup the HW Tx Head and Tail descriptor pointers */
2569 tdba = tx_ring->dma;
2570 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2571 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2572 ew32(TDBAH, (tdba >> 32));
2573 ew32(TDLEN, tdlen);
2574 ew32(TDH, 0);
2575 ew32(TDT, 0);
2576 tx_ring->head = E1000_TDH;
2577 tx_ring->tail = E1000_TDT;
2578
2579 /* Set the default values for the Tx Inter Packet Gap timer */
2580 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2581 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2582 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2583
2584 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2585 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2586
2587 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2588 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2589 ew32(TIPG, tipg);
2590
2591 /* Set the Tx Interrupt Delay register */
2592 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2593 /* Tx irq moderation */
bc7f75fa
AK		 2594 ew32(TADV, adapter->tx_abs_int_delay);
2595
2596 /* Program the Transmit Control Register */
2597 tctl = er32(TCTL);
2598 tctl &= ~E1000_TCTL_CT;
2599 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2600 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2601
2602 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2603 tarc = er32(TARC(0));
ad68076e
BA		 2604 /*
2605 * set the speed mode bit, we'll clear it if we're not at
2606 * gigabit link later
2607 */
bc7f75fa
AK		 2608#define SPEED_MODE_BIT (1 << 21)
2609 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2610 ew32(TARC(0), tarc);
bc7f75fa
AK		 2611 }
2612
2613 /* errata: program both queues to unweighted RR */
2614 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2615 tarc = er32(TARC(0));
bc7f75fa 2616 tarc |= 1;
e9ec2c0f
JK		 2617 ew32(TARC(0), tarc);
2618 tarc = er32(TARC(1));
bc7f75fa 2619 tarc |= 1;
e9ec2c0f 2620 ew32(TARC(1), tarc);
bc7f75fa
AK		 2621 }
2622
bc7f75fa
AK		 2623 /* Setup Transmit Descriptor Settings for eop descriptor */
2624 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2625
2626 /* only set IDE if we are delaying interrupts using the timers */
2627 if (adapter->tx_int_delay)
2628 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2629
2630 /* enable Report Status bit */
2631 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2632
2633 ew32(TCTL, tctl);
2634
edfea6e6 2635 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2636}
2637
2638/**
2639 * e1000_setup_rctl - configure the receive control registers
2640 * @adapter: Board private structure
2641 **/
2642#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2643 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2644static void e1000_setup_rctl(struct e1000_adapter *adapter)
2645{
2646 struct e1000_hw *hw = &adapter->hw;
2647 u32 rctl, rfctl;
2648 u32 psrctl = 0;
2649 u32 pages = 0;
2650
2651 /* Program MC offset vector base */
2652 rctl = er32(RCTL);
2653 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2654 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2655 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2656 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2657
2658 /* Do not Store bad packets */
2659 rctl &= ~E1000_RCTL_SBP;
2660
2661 /* Enable Long Packet receive */
2662 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2663 rctl &= ~E1000_RCTL_LPE;
2664 else
2665 rctl |= E1000_RCTL_LPE;
2666
eb7c3adb
JK		 2667 /* Some systems expect that the CRC is included in SMBUS traffic. The
2668 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2669 * host memory when this is enabled
2670 */
2671 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2672 rctl |= E1000_RCTL_SECRC;
5918bd88 2673
a4f58f54
BA		 2674 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2675 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2676 u16 phy_data;
2677
2678 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2679 phy_data &= 0xfff8;
2680 phy_data |= (1 << 2);
2681 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2682
2683 e1e_rphy(hw, 22, &phy_data);
2684 phy_data &= 0x0fff;
2685 phy_data |= (1 << 14);
2686 e1e_wphy(hw, 0x10, 0x2823);
2687 e1e_wphy(hw, 0x11, 0x0003);
2688 e1e_wphy(hw, 22, phy_data);
2689 }
2690
bc7f75fa
AK		 2691 /* Setup buffer sizes */
2692 rctl &= ~E1000_RCTL_SZ_4096;
2693 rctl |= E1000_RCTL_BSEX;
2694 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2695 case 2048:
2696 default:
2697 rctl |= E1000_RCTL_SZ_2048;
2698 rctl &= ~E1000_RCTL_BSEX;
2699 break;
2700 case 4096:
2701 rctl |= E1000_RCTL_SZ_4096;
2702 break;
2703 case 8192:
2704 rctl |= E1000_RCTL_SZ_8192;
2705 break;
2706 case 16384:
2707 rctl |= E1000_RCTL_SZ_16384;
2708 break;
2709 }
2710
2711 /*
2712 * 82571 and greater support packet-split where the protocol
2713 * header is placed in skb->data and the packet data is
2714 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2715 * In the case of a non-split, skb->data is linearly filled,
2716 * followed by the page buffers. Therefore, skb->data is
2717 * sized to hold the largest protocol header.
2718 *
2719 * allocations using alloc_page take too long for regular MTU
2720 * so only enable packet split for jumbo frames
2721 *
2722 * Using pages when the page size is greater than 16k wastes
2723 * a lot of memory, since we allocate 3 pages at all times
2724 * per packet.
2725 */
bc7f75fa 2726 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2727 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2728 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2729 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2730 else
2731 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2732
2733 if (adapter->rx_ps_pages) {
2734 /* Configure extra packet-split registers */
2735 rfctl = er32(RFCTL);
2736 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2737 /*
2738 * disable packet split support for IPv6 extension headers,
2739 * because some malformed IPv6 headers can hang the Rx
2740 */
bc7f75fa
AK		 2741 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2742 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2743
2744 ew32(RFCTL, rfctl);
2745
140a7480
AK		 2746 /* Enable Packet split descriptors */
2747 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2748
2749 psrctl |= adapter->rx_ps_bsize0 >>
2750 E1000_PSRCTL_BSIZE0_SHIFT;
2751
2752 switch (adapter->rx_ps_pages) {
2753 case 3:
2754 psrctl |= PAGE_SIZE <<
2755 E1000_PSRCTL_BSIZE3_SHIFT;
2756 case 2:
2757 psrctl |= PAGE_SIZE <<
2758 E1000_PSRCTL_BSIZE2_SHIFT;
2759 case 1:
2760 psrctl |= PAGE_SIZE >>
2761 E1000_PSRCTL_BSIZE1_SHIFT;
2762 break;
2763 }
2764
2765 ew32(PSRCTL, psrctl);
2766 }
2767
2768 ew32(RCTL, rctl);
318a94d6
JK		 2769 /* just started the receive unit, no need to restart */
2770 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2771}
2772
2773/**
2774 * e1000_configure_rx - Configure Receive Unit after Reset
2775 * @adapter: board private structure
2776 *
2777 * Configure the Rx unit of the MAC after a reset.
2778 **/
2779static void e1000_configure_rx(struct e1000_adapter *adapter)
2780{
2781 struct e1000_hw *hw = &adapter->hw;
2782 struct e1000_ring *rx_ring = adapter->rx_ring;
2783 u64 rdba;
2784 u32 rdlen, rctl, rxcsum, ctrl_ext;
2785
2786 if (adapter->rx_ps_pages) {
2787 /* this is a 32 byte descriptor */
2788 rdlen = rx_ring->count *
2789 sizeof(union e1000_rx_desc_packet_split);
2790 adapter->clean_rx = e1000_clean_rx_irq_ps;
2791 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2792 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2793 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2794 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2795 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2796 } else {
97ac8cae 2797 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2798 adapter->clean_rx = e1000_clean_rx_irq;
2799 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2800 }
2801
2802 /* disable receives while setting up the descriptors */
2803 rctl = er32(RCTL);
2804 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2805 e1e_flush();
2806 msleep(10);
2807
2808 /* set the Receive Delay Timer Register */
2809 ew32(RDTR, adapter->rx_int_delay);
2810
2811 /* irq moderation */
2812 ew32(RADV, adapter->rx_abs_int_delay);
2813 if (adapter->itr_setting != 0)
ad68076e 2814 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2815
2816 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2817 /* Auto-Mask interrupts upon ICR access */
2818 ctrl_ext |= E1000_CTRL_EXT_IAME;
2819 ew32(IAM, 0xffffffff);
2820 ew32(CTRL_EXT, ctrl_ext);
2821 e1e_flush();
2822
ad68076e
BA		 2823 /*
2824 * Setup the HW Rx Head and Tail Descriptor Pointers and
2825 * the Base and Length of the Rx Descriptor Ring
2826 */
bc7f75fa 2827 rdba = rx_ring->dma;
284901a9 2828 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2829 ew32(RDBAH, (rdba >> 32));
2830 ew32(RDLEN, rdlen);
2831 ew32(RDH, 0);
2832 ew32(RDT, 0);
2833 rx_ring->head = E1000_RDH;
2834 rx_ring->tail = E1000_RDT;
2835
2836 /* Enable Receive Checksum Offload for TCP and UDP */
2837 rxcsum = er32(RXCSUM);
2838 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2839 rxcsum |= E1000_RXCSUM_TUOFL;
2840
ad68076e
BA		 2841 /*
2842 * IPv4 payload checksum for UDP fragments must be
2843 * used in conjunction with packet-split.
2844 */
bc7f75fa
AK		 2845 if (adapter->rx_ps_pages)
2846 rxcsum |= E1000_RXCSUM_IPPCSE;
2847 } else {
2848 rxcsum &= ~E1000_RXCSUM_TUOFL;
2849 /* no need to clear IPPCSE as it defaults to 0 */
2850 }
2851 ew32(RXCSUM, rxcsum);
2852
ad68076e
BA		 2853 /*
2854 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2855 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2856 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2857 */
53ec5498
BA		 2858 if (adapter->flags & FLAG_HAS_ERT) {
2859 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2860 u32 rxdctl = er32(RXDCTL(0));
2861 ew32(RXDCTL(0), rxdctl | 0x3);
2862 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2863 /*
2864 * With jumbo frames and early-receive enabled,
2865 * excessive C-state transition latencies result in
2866 * dropped transactions.
2867 */
2868 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2869 adapter->netdev->name, 55);
2870 } else {
2871 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2872 adapter->netdev->name,
2873 PM_QOS_DEFAULT_VALUE);
2874 }
97ac8cae 2875 }
bc7f75fa
AK		 2876
2877 /* Enable Receives */
2878 ew32(RCTL, rctl);
2879}
2880
2881/**
e2de3eb6 2882 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2883 * @hw: pointer to the HW structure
2884 * @mc_addr_list: array of multicast addresses to program
2885 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2886 *
ab8932f3 2887 * Updates the Multicast Table Array.
bc7f75fa 2888 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2889 **/
e2de3eb6 2890static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2891 u32 mc_addr_count)
bc7f75fa 2892{
ab8932f3 2893 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 2894}
2895
2896/**
2897 * e1000_set_multi - Multicast and Promiscuous mode set
2898 * @netdev: network interface device structure
2899 *
2900 * The set_multi entry point is called whenever the multicast address
2901 * list or the network interface flags are updated. This routine is
2902 * responsible for configuring the hardware for proper multicast,
2903 * promiscuous mode, and all-multi behavior.
2904 **/
2905static void e1000_set_multi(struct net_device *netdev)
2906{
2907 struct e1000_adapter *adapter = netdev_priv(netdev);
2908 struct e1000_hw *hw = &adapter->hw;
22bedad3 2909 struct netdev_hw_addr *ha;
bc7f75fa
AK		 2910 u8 *mta_list;
2911 u32 rctl;
2912 int i;
2913
2914 /* Check for Promiscuous and All Multicast modes */
2915
2916 rctl = er32(RCTL);
2917
2918 if (netdev->flags & IFF_PROMISC) {
2919 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2920 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2921 } else {
746b9f02
PM		 2922 if (netdev->flags & IFF_ALLMULTI) {
2923 rctl |= E1000_RCTL_MPE;
2924 rctl &= ~E1000_RCTL_UPE;
2925 } else {
2926 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2927 }
78ed11a5 2928 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2929 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2930 }
2931
2932 ew32(RCTL, rctl);
2933
7aeef972
JP		 2934 if (!netdev_mc_empty(netdev)) {
2935 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 2936 if (!mta_list)
2937 return;
2938
2939 /* prepare a packed array of only addresses. */
7aeef972 2940 i = 0;
22bedad3
JP		 2941 netdev_for_each_mc_addr(ha, netdev)
2942 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 2943
ab8932f3 2944 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 2945 kfree(mta_list);
2946 } else {
2947 /*
2948 * if we're called from probe, we might not have
2949 * anything to do here, so clear out the list
2950 */
ab8932f3 2951 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 2952 }
2953}
2954
2955/**
ad68076e 2956 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2957 * @adapter: private board structure
2958 **/
2959static void e1000_configure(struct e1000_adapter *adapter)
2960{
2961 e1000_set_multi(adapter->netdev);
2962
2963 e1000_restore_vlan(adapter);
2964 e1000_init_manageability(adapter);
2965
2966 e1000_configure_tx(adapter);
2967 e1000_setup_rctl(adapter);
2968 e1000_configure_rx(adapter);
ad68076e 2969 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2970}
2971
2972/**
2973 * e1000e_power_up_phy - restore link in case the phy was powered down
2974 * @adapter: address of board private structure
2975 *
2976 * The phy may be powered down to save power and turn off link when the
2977 * driver is unloaded and wake on lan is not enabled (among others)
2978 * *** this routine MUST be followed by a call to e1000e_reset ***
2979 **/
2980void e1000e_power_up_phy(struct e1000_adapter *adapter)
2981{
17f208de
BA		 2982 if (adapter->hw.phy.ops.power_up)
2983 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 2984
2985 adapter->hw.mac.ops.setup_link(&adapter->hw);
2986}
2987
2988/**
2989 * e1000_power_down_phy - Power down the PHY
2990 *
17f208de
BA		 2991 * Power down the PHY so no link is implied when interface is down.
2992 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 2993 */
2994static void e1000_power_down_phy(struct e1000_adapter *adapter)
2995{
bc7f75fa 2996 /* WoL is enabled */
23b66e2b 2997 if (adapter->wol)
bc7f75fa
AK		 2998 return;
2999
17f208de
BA		 3000 if (adapter->hw.phy.ops.power_down)
3001 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3002}
3003
3004/**
3005 * e1000e_reset - bring the hardware into a known good state
3006 *
3007 * This function boots the hardware and enables some settings that
3008 * require a configuration cycle of the hardware - those cannot be
3009 * set/changed during runtime. After reset the device needs to be
ad68076e 3010 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3011 */
3012void e1000e_reset(struct e1000_adapter *adapter)
3013{
3014 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3015 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3016 struct e1000_hw *hw = &adapter->hw;
3017 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3018 u32 pba = adapter->pba;
bc7f75fa
AK		 3019 u16 hwm;
3020
ad68076e 3021 /* reset Packet Buffer Allocation to default */
318a94d6 3022 ew32(PBA, pba);
df762464 3023
318a94d6 3024 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3025 /*
3026 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3027 * large enough to accommodate two full transmit packets,
3028 * rounded up to the next 1KB and expressed in KB. Likewise,
3029 * the Rx FIFO should be large enough to accommodate at least
3030 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3031 * expressed in KB.
3032 */
df762464 3033 pba = er32(PBA);
bc7f75fa 3034 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3035 tx_space = pba >> 16;
bc7f75fa 3036 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3037 pba &= 0xffff;
ad68076e
BA		 3038 /*
3039 * the Tx fifo also stores 16 bytes of information about the tx
3040 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3041 */
3042 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3043 sizeof(struct e1000_tx_desc) -
3044 ETH_FCS_LEN) * 2;
3045 min_tx_space = ALIGN(min_tx_space, 1024);
3046 min_tx_space >>= 10;
3047 /* software strips receive CRC, so leave room for it */
318a94d6 3048 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3049 min_rx_space = ALIGN(min_rx_space, 1024);
3050 min_rx_space >>= 10;
3051
ad68076e
BA		 3052 /*
3053 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3054 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3055 * allocation, take space away from current Rx allocation
3056 */
df762464
AK		 3057 if ((tx_space < min_tx_space) &&
3058 ((min_tx_space - tx_space) < pba)) {
3059 pba -= min_tx_space - tx_space;
bc7f75fa 3060
ad68076e
BA		 3061 /*
3062 * if short on Rx space, Rx wins and must trump tx
3063 * adjustment or use Early Receive if available
3064 */
df762464 3065 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3066 (!(adapter->flags & FLAG_HAS_ERT)))
3067 /* ERT enabled in e1000_configure_rx */
df762464 3068 pba = min_rx_space;
bc7f75fa 3069 }
df762464
AK		 3070
3071 ew32(PBA, pba);
bc7f75fa
AK		 3072 }
3073
bc7f75fa 3074
ad68076e
BA		 3075 /*
3076 * flow control settings
3077 *
38eb394e 3078 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3079 * (or the size used for early receive) above it in the Rx FIFO.
3080 * Set it to the lower of:
3081 * - 90% of the Rx FIFO size, and
3082 * - the full Rx FIFO size minus the early receive size (for parts
3083 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3084 * - the full Rx FIFO size minus one full frame
ad68076e 3085 */
38eb394e
BA		 3086 if (hw->mac.type == e1000_pchlan) {
3087 /*
3088 * Workaround PCH LOM adapter hangs with certain network
3089 * loads. If hangs persist, try disabling Tx flow control.
3090 */
3091 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3092 fc->high_water = 0x3500;
3093 fc->low_water = 0x1500;
3094 } else {
3095 fc->high_water = 0x5000;
3096 fc->low_water = 0x3000;
3097 }
3098 } else {
3099 if ((adapter->flags & FLAG_HAS_ERT) &&
3100 (adapter->netdev->mtu > ETH_DATA_LEN))
3101 hwm = min(((pba << 10) * 9 / 10),
3102 ((pba << 10) - (E1000_ERT_2048 << 3)));
3103 else
3104 hwm = min(((pba << 10) * 9 / 10),
3105 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 3106
38eb394e
BA		 3107 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3108 fc->low_water = fc->high_water - 8;
3109 }
bc7f75fa
AK		 3110
3111 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 3112 fc->pause_time = 0xFFFF;
bc7f75fa 3113 else
318a94d6
JK		 3114 fc->pause_time = E1000_FC_PAUSE_TIME;
3115 fc->send_xon = 1;
5c48ef3e 3116 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 3117
3118 /* Allow time for pending master requests to run */
3119 mac->ops.reset_hw(hw);
97ac8cae
BA		 3120
3121 /*
3122 * For parts with AMT enabled, let the firmware know
3123 * that the network interface is in control
3124 */
c43bc57e 3125 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 3126 e1000_get_hw_control(adapter);
3127
bc7f75fa 3128 ew32(WUC, 0);
a4f58f54
BA		 3129 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
3130 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK		 3131
3132 if (mac->ops.init_hw(hw))
44defeb3 3133 e_err("Hardware Error\n");
bc7f75fa 3134
38eb394e
BA		 3135 /* additional part of the flow-control workaround above */
3136 if (hw->mac.type == e1000_pchlan)
3137 ew32(FCRTV_PCH, 0x1000);
3138
bc7f75fa
AK		 3139 e1000_update_mng_vlan(adapter);
3140
3141 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3142 ew32(VET, ETH_P_8021Q);
3143
3144 e1000e_reset_adaptive(hw);
3145 e1000_get_phy_info(hw);
3146
918d7197
BA		 3147 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3148 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3149 u16 phy_data = 0;
ad68076e
BA		 3150 /*
3151 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3152 * the return value of this function because there is nothing
ad68076e
BA		 3153 * different we would do if it failed
3154 */
bc7f75fa
AK		 3155 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3156 phy_data &= ~IGP02E1000_PM_SPD;
3157 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3158 }
bc7f75fa
AK		 3159}
3160
3161int e1000e_up(struct e1000_adapter *adapter)
3162{
3163 struct e1000_hw *hw = &adapter->hw;
3164
53ec5498
BA		 3165 /* DMA latency requirement to workaround early-receive/jumbo issue */
3166 if (adapter->flags & FLAG_HAS_ERT)
3167 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
3168 adapter->netdev->name,
3169 PM_QOS_DEFAULT_VALUE);
3170
bc7f75fa
AK		 3171 /* hardware has been reset, we need to reload some things */
3172 e1000_configure(adapter);
3173
3174 clear_bit(__E1000_DOWN, &adapter->state);
3175
3176 napi_enable(&adapter->napi);
4662e82b
BA		 3177 if (adapter->msix_entries)
3178 e1000_configure_msix(adapter);
bc7f75fa
AK		 3179 e1000_irq_enable(adapter);
3180
4cb9be7a
JB		 3181 netif_wake_queue(adapter->netdev);
3182
bc7f75fa
AK		 3183 /* fire a link change interrupt to start the watchdog */
3184 ew32(ICS, E1000_ICS_LSC);
3185 return 0;
3186}
3187
3188void e1000e_down(struct e1000_adapter *adapter)
3189{
3190 struct net_device *netdev = adapter->netdev;
3191 struct e1000_hw *hw = &adapter->hw;
3192 u32 tctl, rctl;
3193
ad68076e
BA		 3194 /*
3195 * signal that we're down so the interrupt handler does not
3196 * reschedule our watchdog timer
3197 */
bc7f75fa
AK		 3198 set_bit(__E1000_DOWN, &adapter->state);
3199
3200 /* disable receives in the hardware */
3201 rctl = er32(RCTL);
3202 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3203 /* flush and sleep below */
3204
4cb9be7a 3205 netif_stop_queue(netdev);
bc7f75fa
AK		 3206
3207 /* disable transmits in the hardware */
3208 tctl = er32(TCTL);
3209 tctl &= ~E1000_TCTL_EN;
3210 ew32(TCTL, tctl);
3211 /* flush both disables and wait for them to finish */
3212 e1e_flush();
3213 msleep(10);
3214
3215 napi_disable(&adapter->napi);
3216 e1000_irq_disable(adapter);
3217
3218 del_timer_sync(&adapter->watchdog_timer);
3219 del_timer_sync(&adapter->phy_info_timer);
3220
bc7f75fa
AK		 3221 netif_carrier_off(netdev);
3222 adapter->link_speed = 0;
3223 adapter->link_duplex = 0;
3224
52cc3086
JK		 3225 if (!pci_channel_offline(adapter->pdev))
3226 e1000e_reset(adapter);
bc7f75fa
AK		 3227 e1000_clean_tx_ring(adapter);
3228 e1000_clean_rx_ring(adapter);
3229
53ec5498
BA		 3230 if (adapter->flags & FLAG_HAS_ERT)
3231 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
3232 adapter->netdev->name);
3233
bc7f75fa
AK		 3234 /*
3235 * TODO: for power management, we could drop the link and
3236 * pci_disable_device here.
3237 */
3238}
3239
3240void e1000e_reinit_locked(struct e1000_adapter *adapter)
3241{
3242 might_sleep();
3243 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3244 msleep(1);
3245 e1000e_down(adapter);
3246 e1000e_up(adapter);
3247 clear_bit(__E1000_RESETTING, &adapter->state);
3248}
3249
3250/**
3251 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3252 * @adapter: board private structure to initialize
3253 *
3254 * e1000_sw_init initializes the Adapter private data structure.
3255 * Fields are initialized based on PCI device information and
3256 * OS network device settings (MTU size).
3257 **/
3258static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3259{
bc7f75fa
AK		 3260 struct net_device *netdev = adapter->netdev;
3261
3262 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3263 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3264 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3265 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3266
4662e82b 3267 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3268
4662e82b
BA		 3269 if (e1000_alloc_queues(adapter))
3270 return -ENOMEM;
bc7f75fa 3271
bc7f75fa 3272 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3273 e1000_irq_disable(adapter);
3274
bc7f75fa
AK		 3275 set_bit(__E1000_DOWN, &adapter->state);
3276 return 0;
bc7f75fa
AK		 3277}
3278
f8d59f78
BA		 3279/**
3280 * e1000_intr_msi_test - Interrupt Handler
3281 * @irq: interrupt number
3282 * @data: pointer to a network interface device structure
3283 **/
3284static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3285{
3286 struct net_device *netdev = data;
3287 struct e1000_adapter *adapter = netdev_priv(netdev);
3288 struct e1000_hw *hw = &adapter->hw;
3289 u32 icr = er32(ICR);
3290
3bb99fe2 3291 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3292 if (icr & E1000_ICR_RXSEQ) {
3293 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3294 wmb();
3295 }
3296
3297 return IRQ_HANDLED;
3298}
3299
3300/**
3301 * e1000_test_msi_interrupt - Returns 0 for successful test
3302 * @adapter: board private struct
3303 *
3304 * code flow taken from tg3.c
3305 **/
3306static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3307{
3308 struct net_device *netdev = adapter->netdev;
3309 struct e1000_hw *hw = &adapter->hw;
3310 int err;
3311
3312 /* poll_enable hasn't been called yet, so don't need disable */
3313 /* clear any pending events */
3314 er32(ICR);
3315
3316 /* free the real vector and request a test handler */
3317 e1000_free_irq(adapter);
4662e82b 3318 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3319
3320 /* Assume that the test fails, if it succeeds then the test
3321 * MSI irq handler will unset this flag */
3322 adapter->flags |= FLAG_MSI_TEST_FAILED;
3323
3324 err = pci_enable_msi(adapter->pdev);
3325 if (err)
3326 goto msi_test_failed;
3327
a0607fd3 3328 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3329 netdev->name, netdev);
3330 if (err) {
3331 pci_disable_msi(adapter->pdev);
3332 goto msi_test_failed;
3333 }
3334
3335 wmb();
3336
3337 e1000_irq_enable(adapter);
3338
3339 /* fire an unusual interrupt on the test handler */
3340 ew32(ICS, E1000_ICS_RXSEQ);
3341 e1e_flush();
3342 msleep(50);
3343
3344 e1000_irq_disable(adapter);
3345
3346 rmb();
3347
3348 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3349 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3350 err = -EIO;
3351 e_info("MSI interrupt test failed!\n");
3352 }
3353
3354 free_irq(adapter->pdev->irq, netdev);
3355 pci_disable_msi(adapter->pdev);
3356
3357 if (err == -EIO)
3358 goto msi_test_failed;
3359
3360 /* okay so the test worked, restore settings */
3bb99fe2 3361 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3362msi_test_failed:
4662e82b 3363 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3364 e1000_request_irq(adapter);
3365 return err;
3366}
3367
3368/**
3369 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3370 * @adapter: board private struct
3371 *
3372 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3373 **/
3374static int e1000_test_msi(struct e1000_adapter *adapter)
3375{
3376 int err;
3377 u16 pci_cmd;
3378
3379 if (!(adapter->flags & FLAG_MSI_ENABLED))
3380 return 0;
3381
3382 /* disable SERR in case the MSI write causes a master abort */
3383 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3384 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3385 pci_cmd & ~PCI_COMMAND_SERR);
3386
3387 err = e1000_test_msi_interrupt(adapter);
3388
3389 /* restore previous setting of command word */
3390 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3391
3392 /* success ! */
3393 if (!err)
3394 return 0;
3395
3396 /* EIO means MSI test failed */
3397 if (err != -EIO)
3398 return err;
3399
3400 /* back to INTx mode */
3401 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3402
3403 e1000_free_irq(adapter);
3404
3405 err = e1000_request_irq(adapter);
3406
3407 return err;
3408}
3409
bc7f75fa
AK		 3410/**
3411 * e1000_open - Called when a network interface is made active
3412 * @netdev: network interface device structure
3413 *
3414 * Returns 0 on success, negative value on failure
3415 *
3416 * The open entry point is called when a network interface is made
3417 * active by the system (IFF_UP). At this point all resources needed
3418 * for transmit and receive operations are allocated, the interrupt
3419 * handler is registered with the OS, the watchdog timer is started,
3420 * and the stack is notified that the interface is ready.
3421 **/
3422static int e1000_open(struct net_device *netdev)
3423{
3424 struct e1000_adapter *adapter = netdev_priv(netdev);
3425 struct e1000_hw *hw = &adapter->hw;
23606cf5 3426 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3427 int err;
3428
3429 /* disallow open during test */
3430 if (test_bit(__E1000_TESTING, &adapter->state))
3431 return -EBUSY;
3432
23606cf5
RW		 3433 pm_runtime_get_sync(&pdev->dev);
3434
9c563d20
JB		 3435 netif_carrier_off(netdev);
3436
bc7f75fa
AK		 3437 /* allocate transmit descriptors */
3438 err = e1000e_setup_tx_resources(adapter);
3439 if (err)
3440 goto err_setup_tx;
3441
3442 /* allocate receive descriptors */
3443 err = e1000e_setup_rx_resources(adapter);
3444 if (err)
3445 goto err_setup_rx;
3446
3447 e1000e_power_up_phy(adapter);
3448
3449 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3450 if ((adapter->hw.mng_cookie.status &
3451 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3452 e1000_update_mng_vlan(adapter);
3453
ad68076e
BA		 3454 /*
3455 * If AMT is enabled, let the firmware know that the network
3456 * interface is now open
3457 */
c43bc57e 3458 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3459 e1000_get_hw_control(adapter);
3460
ad68076e
BA		 3461 /*
3462 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3463 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3464 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3465 * clean_rx handler before we do so.
3466 */
bc7f75fa
AK		 3467 e1000_configure(adapter);
3468
3469 err = e1000_request_irq(adapter);
3470 if (err)
3471 goto err_req_irq;
3472
f8d59f78
BA		 3473 /*
3474 * Work around PCIe errata with MSI interrupts causing some chipsets to
3475 * ignore e1000e MSI messages, which means we need to test our MSI
3476 * interrupt now
3477 */
4662e82b 3478 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3479 err = e1000_test_msi(adapter);
3480 if (err) {
3481 e_err("Interrupt allocation failed\n");
3482 goto err_req_irq;
3483 }
3484 }
3485
bc7f75fa
AK		 3486 /* From here on the code is the same as e1000e_up() */
3487 clear_bit(__E1000_DOWN, &adapter->state);
3488
3489 napi_enable(&adapter->napi);
3490
3491 e1000_irq_enable(adapter);
3492
4cb9be7a 3493 netif_start_queue(netdev);
d55b53ff 3494
23606cf5
RW		 3495 adapter->idle_check = true;
3496 pm_runtime_put(&pdev->dev);
3497
bc7f75fa
AK		 3498 /* fire a link status change interrupt to start the watchdog */
3499 ew32(ICS, E1000_ICS_LSC);
3500
3501 return 0;
3502
3503err_req_irq:
3504 e1000_release_hw_control(adapter);
3505 e1000_power_down_phy(adapter);
3506 e1000e_free_rx_resources(adapter);
3507err_setup_rx:
3508 e1000e_free_tx_resources(adapter);
3509err_setup_tx:
3510 e1000e_reset(adapter);
23606cf5 3511 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3512
3513 return err;
3514}
3515
3516/**
3517 * e1000_close - Disables a network interface
3518 * @netdev: network interface device structure
3519 *
3520 * Returns 0, this is not allowed to fail
3521 *
3522 * The close entry point is called when an interface is de-activated
3523 * by the OS. The hardware is still under the drivers control, but
3524 * needs to be disabled. A global MAC reset is issued to stop the
3525 * hardware, and all transmit and receive resources are freed.
3526 **/
3527static int e1000_close(struct net_device *netdev)
3528{
3529 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3530 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3531
3532 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3533
3534 pm_runtime_get_sync(&pdev->dev);
3535
3536 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3537 e1000e_down(adapter);
3538 e1000_free_irq(adapter);
3539 }
bc7f75fa 3540 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3541
3542 e1000e_free_tx_resources(adapter);
3543 e1000e_free_rx_resources(adapter);
3544
ad68076e
BA		 3545 /*
3546 * kill manageability vlan ID if supported, but not if a vlan with
3547 * the same ID is registered on the host OS (let 8021q kill it)
3548 */
bc7f75fa
AK		 3549 if ((adapter->hw.mng_cookie.status &
3550 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3551 !(adapter->vlgrp &&
3552 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3553 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3554
ad68076e
BA		 3555 /*
3556 * If AMT is enabled, let the firmware know that the network
3557 * interface is now closed
3558 */
c43bc57e 3559 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3560 e1000_release_hw_control(adapter);
3561
23606cf5
RW		 3562 pm_runtime_put_sync(&pdev->dev);
3563
bc7f75fa
AK		 3564 return 0;
3565}
3566/**
3567 * e1000_set_mac - Change the Ethernet Address of the NIC
3568 * @netdev: network interface device structure
3569 * @p: pointer to an address structure
3570 *
3571 * Returns 0 on success, negative on failure
3572 **/
3573static int e1000_set_mac(struct net_device *netdev, void *p)
3574{
3575 struct e1000_adapter *adapter = netdev_priv(netdev);
3576 struct sockaddr *addr = p;
3577
3578 if (!is_valid_ether_addr(addr->sa_data))
3579 return -EADDRNOTAVAIL;
3580
3581 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3582 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3583
3584 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3585
3586 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3587 /* activate the work around */
3588 e1000e_set_laa_state_82571(&adapter->hw, 1);
3589
ad68076e
BA		 3590 /*
3591 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3592 * between the time RAR[0] gets clobbered and the time it
3593 * gets fixed (in e1000_watchdog), the actual LAA is in one
3594 * of the RARs and no incoming packets directed to this port
3595 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3596 * RAR[14]
3597 */
bc7f75fa
AK		 3598 e1000e_rar_set(&adapter->hw,
3599 adapter->hw.mac.addr,
3600 adapter->hw.mac.rar_entry_count - 1);
3601 }
3602
3603 return 0;
3604}
3605
a8f88ff5
JB		 3606/**
3607 * e1000e_update_phy_task - work thread to update phy
3608 * @work: pointer to our work struct
3609 *
3610 * this worker thread exists because we must acquire a
3611 * semaphore to read the phy, which we could msleep while
3612 * waiting for it, and we can't msleep in a timer.
3613 **/
3614static void e1000e_update_phy_task(struct work_struct *work)
3615{
3616 struct e1000_adapter *adapter = container_of(work,
3617 struct e1000_adapter, update_phy_task);
3618 e1000_get_phy_info(&adapter->hw);
3619}
3620
ad68076e
BA		 3621/*
3622 * Need to wait a few seconds after link up to get diagnostic information from
3623 * the phy
3624 */
bc7f75fa
AK		 3625static void e1000_update_phy_info(unsigned long data)
3626{
3627 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3628 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3629}
3630
3631/**
3632 * e1000e_update_stats - Update the board statistics counters
3633 * @adapter: board private structure
3634 **/
3635void e1000e_update_stats(struct e1000_adapter *adapter)
3636{
7274c20f 3637 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3638 struct e1000_hw *hw = &adapter->hw;
3639 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3640 u16 phy_data;
bc7f75fa
AK		 3641
3642 /*
3643 * Prevent stats update while adapter is being reset, or if the pci
3644 * connection is down.
3645 */
3646 if (adapter->link_speed == 0)
3647 return;
3648 if (pci_channel_offline(pdev))
3649 return;
3650
bc7f75fa
AK		 3651 adapter->stats.crcerrs += er32(CRCERRS);
3652 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3653 adapter->stats.gorc += er32(GORCL);
3654 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3655 adapter->stats.bprc += er32(BPRC);
3656 adapter->stats.mprc += er32(MPRC);
3657 adapter->stats.roc += er32(ROC);
3658
bc7f75fa 3659 adapter->stats.mpc += er32(MPC);
a4f58f54
BA		 3660 if ((hw->phy.type == e1000_phy_82578) ||
3661 (hw->phy.type == e1000_phy_82577)) {
3662 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
29477e24
BA		 3663 if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data))
3664 adapter->stats.scc += phy_data;
a4f58f54
BA		 3665
3666 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
29477e24
BA		 3667 if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data))
3668 adapter->stats.ecol += phy_data;
a4f58f54
BA		 3669
3670 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
29477e24
BA		 3671 if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data))
3672 adapter->stats.mcc += phy_data;
a4f58f54
BA		 3673
3674 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
29477e24
BA		 3675 if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data))
3676 adapter->stats.latecol += phy_data;
a4f58f54
BA		 3677
3678 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
29477e24
BA		 3679 if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data))
3680 adapter->stats.dc += phy_data;
a4f58f54
BA		 3681 } else {
3682 adapter->stats.scc += er32(SCC);
3683 adapter->stats.ecol += er32(ECOL);
3684 adapter->stats.mcc += er32(MCC);
3685 adapter->stats.latecol += er32(LATECOL);
3686 adapter->stats.dc += er32(DC);
3687 }
bc7f75fa
AK		 3688 adapter->stats.xonrxc += er32(XONRXC);
3689 adapter->stats.xontxc += er32(XONTXC);
3690 adapter->stats.xoffrxc += er32(XOFFRXC);
3691 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3692 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3693 adapter->stats.gotc += er32(GOTCL);
3694 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3695 adapter->stats.rnbc += er32(RNBC);
3696 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3697
3698 adapter->stats.mptc += er32(MPTC);
3699 adapter->stats.bptc += er32(BPTC);
3700
3701 /* used for adaptive IFS */
3702
3703 hw->mac.tx_packet_delta = er32(TPT);
3704 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA		 3705 if ((hw->phy.type == e1000_phy_82578) ||
3706 (hw->phy.type == e1000_phy_82577)) {
3707 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
29477e24
BA		 3708 if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data))
3709 hw->mac.collision_delta = phy_data;
a4f58f54
BA		 3710 } else {
3711 hw->mac.collision_delta = er32(COLC);
3712 }
bc7f75fa
AK		 3713 adapter->stats.colc += hw->mac.collision_delta;
3714
3715 adapter->stats.algnerrc += er32(ALGNERRC);
3716 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA		 3717 if ((hw->phy.type == e1000_phy_82578) ||
3718 (hw->phy.type == e1000_phy_82577)) {
3719 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
29477e24
BA		 3720 if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data))
3721 adapter->stats.tncrs += phy_data;
a4f58f54
BA		 3722 } else {
3723 if ((hw->mac.type != e1000_82574) &&
3724 (hw->mac.type != e1000_82583))
3725 adapter->stats.tncrs += er32(TNCRS);
3726 }
bc7f75fa
AK		 3727 adapter->stats.cexterr += er32(CEXTERR);
3728 adapter->stats.tsctc += er32(TSCTC);
3729 adapter->stats.tsctfc += er32(TSCTFC);
3730
bc7f75fa 3731 /* Fill out the OS statistics structure */
7274c20f
AK		 3732 netdev->stats.multicast = adapter->stats.mprc;
3733 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3734
3735 /* Rx Errors */
3736
ad68076e
BA		 3737 /*
3738 * RLEC on some newer hardware can be incorrect so build
3739 * our own version based on RUC and ROC
3740 */
7274c20f 3741 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3742 adapter->stats.crcerrs + adapter->stats.algnerrc +
3743 adapter->stats.ruc + adapter->stats.roc +
3744 adapter->stats.cexterr;
7274c20f 3745 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3746 adapter->stats.roc;
7274c20f
AK		 3747 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3748 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3749 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3750
3751 /* Tx Errors */
7274c20f 3752 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3753 adapter->stats.latecol;
7274c20f
AK		 3754 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3755 netdev->stats.tx_window_errors = adapter->stats.latecol;
3756 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3757
3758 /* Tx Dropped needs to be maintained elsewhere */
3759
bc7f75fa
AK		 3760 /* Management Stats */
3761 adapter->stats.mgptc += er32(MGTPTC);
3762 adapter->stats.mgprc += er32(MGTPRC);
3763 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3764}
3765
7c25769f
BA		 3766/**
3767 * e1000_phy_read_status - Update the PHY register status snapshot
3768 * @adapter: board private structure
3769 **/
3770static void e1000_phy_read_status(struct e1000_adapter *adapter)
3771{
3772 struct e1000_hw *hw = &adapter->hw;
3773 struct e1000_phy_regs *phy = &adapter->phy_regs;
3774 int ret_val;
7c25769f
BA		 3775
3776 if ((er32(STATUS) & E1000_STATUS_LU) &&
3777 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3778 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3779 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3780 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3781 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3782 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3783 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3784 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3785 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3786 if (ret_val)
44defeb3 3787 e_warn("Error reading PHY register\n");
7c25769f
BA		 3788 } else {
3789 /*
3790 * Do not read PHY registers if link is not up
3791 * Set values to typical power-on defaults
3792 */
3793 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3794 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3795 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3796 BMSR_ERCAP);
3797 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3798 ADVERTISE_ALL | ADVERTISE_CSMA);
3799 phy->lpa = 0;
3800 phy->expansion = EXPANSION_ENABLENPAGE;
3801 phy->ctrl1000 = ADVERTISE_1000FULL;
3802 phy->stat1000 = 0;
3803 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3804 }
7c25769f
BA		 3805}
3806
bc7f75fa
AK		 3807static void e1000_print_link_info(struct e1000_adapter *adapter)
3808{
bc7f75fa
AK		 3809 struct e1000_hw *hw = &adapter->hw;
3810 u32 ctrl = er32(CTRL);
3811
8f12fe86
BA		 3812 /* Link status message must follow this format for user tools */
3813 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3814 "Flow Control: %s\n",
3815 adapter->netdev->name,
44defeb3
JK		 3816 adapter->link_speed,
3817 (adapter->link_duplex == FULL_DUPLEX) ?
3818 "Full Duplex" : "Half Duplex",
3819 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3820 "RX/TX" :
3821 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3822 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3823}
3824
b405e8df 3825bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3826{
3827 struct e1000_hw *hw = &adapter->hw;
3828 bool link_active = 0;
3829 s32 ret_val = 0;
3830
3831 /*
3832 * get_link_status is set on LSC (link status) interrupt or
3833 * Rx sequence error interrupt. get_link_status will stay
3834 * false until the check_for_link establishes link
3835 * for copper adapters ONLY
3836 */
3837 switch (hw->phy.media_type) {
3838 case e1000_media_type_copper:
3839 if (hw->mac.get_link_status) {
3840 ret_val = hw->mac.ops.check_for_link(hw);
3841 link_active = !hw->mac.get_link_status;
3842 } else {
3843 link_active = 1;
3844 }
3845 break;
3846 case e1000_media_type_fiber:
3847 ret_val = hw->mac.ops.check_for_link(hw);
3848 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3849 break;
3850 case e1000_media_type_internal_serdes:
3851 ret_val = hw->mac.ops.check_for_link(hw);
3852 link_active = adapter->hw.mac.serdes_has_link;
3853 break;
3854 default:
3855 case e1000_media_type_unknown:
3856 break;
3857 }
3858
3859 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3860 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3861 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3862 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3863 }
3864
3865 return link_active;
3866}
3867
3868static void e1000e_enable_receives(struct e1000_adapter *adapter)
3869{
3870 /* make sure the receive unit is started */
3871 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3872 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3873 struct e1000_hw *hw = &adapter->hw;
3874 u32 rctl = er32(RCTL);
3875 ew32(RCTL, rctl | E1000_RCTL_EN);
3876 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3877 }
3878}
3879
bc7f75fa
AK		 3880/**
3881 * e1000_watchdog - Timer Call-back
3882 * @data: pointer to adapter cast into an unsigned long
3883 **/
3884static void e1000_watchdog(unsigned long data)
3885{
3886 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3887
3888 /* Do the rest outside of interrupt context */
3889 schedule_work(&adapter->watchdog_task);
3890
3891 /* TODO: make this use queue_delayed_work() */
3892}
3893
3894static void e1000_watchdog_task(struct work_struct *work)
3895{
3896 struct e1000_adapter *adapter = container_of(work,
3897 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3898 struct net_device *netdev = adapter->netdev;
3899 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3900 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3901 struct e1000_ring *tx_ring = adapter->tx_ring;
3902 struct e1000_hw *hw = &adapter->hw;
3903 u32 link, tctl;
bc7f75fa
AK		 3904 int tx_pending = 0;
3905
b405e8df 3906 link = e1000e_has_link(adapter);
318a94d6 3907 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 3908 /* Cancel scheduled suspend requests. */
3909 pm_runtime_resume(netdev->dev.parent);
3910
318a94d6 3911 e1000e_enable_receives(adapter);
bc7f75fa 3912 goto link_up;
bc7f75fa
AK		 3913 }
3914
3915 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3916 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3917 e1000_update_mng_vlan(adapter);
3918
bc7f75fa
AK		 3919 if (link) {
3920 if (!netif_carrier_ok(netdev)) {
3921 bool txb2b = 1;
23606cf5
RW		 3922
3923 /* Cancel scheduled suspend requests. */
3924 pm_runtime_resume(netdev->dev.parent);
3925
318a94d6 3926 /* update snapshot of PHY registers on LSC */
7c25769f 3927 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3928 mac->ops.get_link_up_info(&adapter->hw,
3929 &adapter->link_speed,
3930 &adapter->link_duplex);
3931 e1000_print_link_info(adapter);
f4187b56
BA		 3932 /*
3933 * On supported PHYs, check for duplex mismatch only
3934 * if link has autonegotiated at 10/100 half
3935 */
3936 if ((hw->phy.type == e1000_phy_igp_3 ||
3937 hw->phy.type == e1000_phy_bm) &&
3938 (hw->mac.autoneg == true) &&
3939 (adapter->link_speed == SPEED_10 ||
3940 adapter->link_speed == SPEED_100) &&
3941 (adapter->link_duplex == HALF_DUPLEX)) {
3942 u16 autoneg_exp;
3943
3944 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3945
3946 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3947 e_info("Autonegotiated half duplex but"
3948 " link partner cannot autoneg. "
3949 " Try forcing full duplex if "
3950 "link gets many collisions.\n");
3951 }
3952
f49c57e1 3953 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 3954 adapter->tx_timeout_factor = 1;
3955 switch (adapter->link_speed) {
3956 case SPEED_10:
3957 txb2b = 0;
10f1b492 3958 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3959 break;
3960 case SPEED_100:
3961 txb2b = 0;
4c86e0b9 3962 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 3963 break;
3964 }
3965
ad68076e
BA		 3966 /*
3967 * workaround: re-program speed mode bit after
3968 * link-up event
3969 */
bc7f75fa
AK		 3970 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3971 !txb2b) {
3972 u32 tarc0;
e9ec2c0f 3973 tarc0 = er32(TARC(0));
bc7f75fa 3974 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3975 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3976 }
3977
ad68076e
BA		 3978 /*
3979 * disable TSO for pcie and 10/100 speeds, to avoid
3980 * some hardware issues
3981 */
bc7f75fa
AK		 3982 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3983 switch (adapter->link_speed) {
3984 case SPEED_10:
3985 case SPEED_100:
44defeb3 3986 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3987 netdev->features &= ~NETIF_F_TSO;
3988 netdev->features &= ~NETIF_F_TSO6;
3989 break;
3990 case SPEED_1000:
3991 netdev->features |= NETIF_F_TSO;
3992 netdev->features |= NETIF_F_TSO6;
3993 break;
3994 default:
3995 /* oops */
3996 break;
3997 }
3998 }
3999
ad68076e
BA		 4000 /*
4001 * enable transmits in the hardware, need to do this
4002 * after setting TARC(0)
4003 */
bc7f75fa
AK		 4004 tctl = er32(TCTL);
4005 tctl |= E1000_TCTL_EN;
4006 ew32(TCTL, tctl);
4007
75eb0fad
BA		 4008 /*
4009 * Perform any post-link-up configuration before
4010 * reporting link up.
4011 */
4012 if (phy->ops.cfg_on_link_up)
4013 phy->ops.cfg_on_link_up(hw);
4014
bc7f75fa 4015 netif_carrier_on(netdev);
bc7f75fa
AK		 4016
4017 if (!test_bit(__E1000_DOWN, &adapter->state))
4018 mod_timer(&adapter->phy_info_timer,
4019 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4020 }
4021 } else {
4022 if (netif_carrier_ok(netdev)) {
4023 adapter->link_speed = 0;
4024 adapter->link_duplex = 0;
8f12fe86
BA		 4025 /* Link status message must follow this format */
4026 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4027 adapter->netdev->name);
bc7f75fa 4028 netif_carrier_off(netdev);
bc7f75fa
AK		 4029 if (!test_bit(__E1000_DOWN, &adapter->state))
4030 mod_timer(&adapter->phy_info_timer,
4031 round_jiffies(jiffies + 2 * HZ));
4032
4033 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4034 schedule_work(&adapter->reset_task);
23606cf5
RW		 4035 else
4036 pm_schedule_suspend(netdev->dev.parent,
4037 LINK_TIMEOUT);
bc7f75fa
AK		 4038 }
4039 }
4040
4041link_up:
4042 e1000e_update_stats(adapter);
4043
4044 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4045 adapter->tpt_old = adapter->stats.tpt;
4046 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4047 adapter->colc_old = adapter->stats.colc;
4048
7c25769f
BA		 4049 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4050 adapter->gorc_old = adapter->stats.gorc;
4051 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4052 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4053
4054 e1000e_update_adaptive(&adapter->hw);
4055
4056 if (!netif_carrier_ok(netdev)) {
4057 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4058 tx_ring->count);
4059 if (tx_pending) {
ad68076e
BA		 4060 /*
4061 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4062 * but we've got queued Tx work that's never going
4063 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4064 * (Do the reset outside of interrupt context).
4065 */
bc7f75fa
AK		 4066 adapter->tx_timeout_count++;
4067 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4068 /* return immediately since reset is imminent */
4069 return;
bc7f75fa
AK		 4070 }
4071 }
4072
ad68076e 4073 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4074 if (adapter->msix_entries)
4075 ew32(ICS, adapter->rx_ring->ims_val);
4076 else
4077 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4078
4079 /* Force detection of hung controller every watchdog period */
4080 adapter->detect_tx_hung = 1;
4081
ad68076e
BA		 4082 /*
4083 * With 82571 controllers, LAA may be overwritten due to controller
4084 * reset from the other port. Set the appropriate LAA in RAR[0]
4085 */
bc7f75fa
AK		 4086 if (e1000e_get_laa_state_82571(hw))
4087 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4088
4089 /* Reset the timer */
4090 if (!test_bit(__E1000_DOWN, &adapter->state))
4091 mod_timer(&adapter->watchdog_timer,
4092 round_jiffies(jiffies + 2 * HZ));
4093}
4094
4095#define E1000_TX_FLAGS_CSUM 0x00000001
4096#define E1000_TX_FLAGS_VLAN 0x00000002
4097#define E1000_TX_FLAGS_TSO 0x00000004
4098#define E1000_TX_FLAGS_IPV4 0x00000008
4099#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4100#define E1000_TX_FLAGS_VLAN_SHIFT 16
4101
4102static int e1000_tso(struct e1000_adapter *adapter,
4103 struct sk_buff *skb)
4104{
4105 struct e1000_ring *tx_ring = adapter->tx_ring;
4106 struct e1000_context_desc *context_desc;
4107 struct e1000_buffer *buffer_info;
4108 unsigned int i;
4109 u32 cmd_length = 0;
4110 u16 ipcse = 0, tucse, mss;
4111 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4112 int err;
4113
3d5e33c9
BA		 4114 if (!skb_is_gso(skb))
4115 return 0;
bc7f75fa 4116
3d5e33c9
BA		 4117 if (skb_header_cloned(skb)) {
4118 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4119 if (err)
4120 return err;
bc7f75fa
AK		 4121 }
4122
3d5e33c9
BA		 4123 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4124 mss = skb_shinfo(skb)->gso_size;
4125 if (skb->protocol == htons(ETH_P_IP)) {
4126 struct iphdr *iph = ip_hdr(skb);
4127 iph->tot_len = 0;
4128 iph->check = 0;
4129 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4130 0, IPPROTO_TCP, 0);
4131 cmd_length = E1000_TXD_CMD_IP;
4132 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4133 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4134 ipv6_hdr(skb)->payload_len = 0;
4135 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4136 &ipv6_hdr(skb)->daddr,
4137 0, IPPROTO_TCP, 0);
4138 ipcse = 0;
4139 }
4140 ipcss = skb_network_offset(skb);
4141 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4142 tucss = skb_transport_offset(skb);
4143 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4144 tucse = 0;
4145
4146 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4147 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4148
4149 i = tx_ring->next_to_use;
4150 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4151 buffer_info = &tx_ring->buffer_info[i];
4152
4153 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4154 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4155 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4156 context_desc->upper_setup.tcp_fields.tucss = tucss;
4157 context_desc->upper_setup.tcp_fields.tucso = tucso;
4158 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4159 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4160 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4161 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4162
4163 buffer_info->time_stamp = jiffies;
4164 buffer_info->next_to_watch = i;
4165
4166 i++;
4167 if (i == tx_ring->count)
4168 i = 0;
4169 tx_ring->next_to_use = i;
4170
4171 return 1;
bc7f75fa
AK		 4172}
4173
4174static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4175{
4176 struct e1000_ring *tx_ring = adapter->tx_ring;
4177 struct e1000_context_desc *context_desc;
4178 struct e1000_buffer *buffer_info;
4179 unsigned int i;
4180 u8 css;
af807c82 4181 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4182 __be16 protocol;
bc7f75fa 4183
af807c82
DG		 4184 if (skb->ip_summed != CHECKSUM_PARTIAL)
4185 return 0;
bc7f75fa 4186
5f66f208
AJ		 4187 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4188 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4189 else
4190 protocol = skb->protocol;
4191
3f518390 4192 switch (protocol) {
09640e63 4193 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4194 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4195 cmd_len |= E1000_TXD_CMD_TCP;
4196 break;
09640e63 4197 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4198 /* XXX not handling all IPV6 headers */
4199 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4200 cmd_len |= E1000_TXD_CMD_TCP;
4201 break;
4202 default:
4203 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4204 e_warn("checksum_partial proto=%x!\n",
4205 be16_to_cpu(protocol));
af807c82 4206 break;
bc7f75fa
AK		 4207 }
4208
af807c82
DG		 4209 css = skb_transport_offset(skb);
4210
4211 i = tx_ring->next_to_use;
4212 buffer_info = &tx_ring->buffer_info[i];
4213 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4214
4215 context_desc->lower_setup.ip_config = 0;
4216 context_desc->upper_setup.tcp_fields.tucss = css;
4217 context_desc->upper_setup.tcp_fields.tucso =
4218 css + skb->csum_offset;
4219 context_desc->upper_setup.tcp_fields.tucse = 0;
4220 context_desc->tcp_seg_setup.data = 0;
4221 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4222
4223 buffer_info->time_stamp = jiffies;
4224 buffer_info->next_to_watch = i;
4225
4226 i++;
4227 if (i == tx_ring->count)
4228 i = 0;
4229 tx_ring->next_to_use = i;
4230
4231 return 1;
bc7f75fa
AK		 4232}
4233
4234#define E1000_MAX_PER_TXD 8192
4235#define E1000_MAX_TXD_PWR 12
4236
4237static int e1000_tx_map(struct e1000_adapter *adapter,
4238 struct sk_buff *skb, unsigned int first,
4239 unsigned int max_per_txd, unsigned int nr_frags,
4240 unsigned int mss)
4241{
4242 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4243 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4244 struct e1000_buffer *buffer_info;
8ddc951c 4245 unsigned int len = skb_headlen(skb);
03b1320d 4246 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4247 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4248
4249 i = tx_ring->next_to_use;
4250
4251 while (len) {
1b7719c4 4252 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4253 size = min(len, max_per_txd);
4254
bc7f75fa 4255 buffer_info->length = size;
bc7f75fa 4256 buffer_info->time_stamp = jiffies;
bc7f75fa 4257 buffer_info->next_to_watch = i;
0be3f55f
NN		 4258 buffer_info->dma = dma_map_single(&pdev->dev,
4259 skb->data + offset,
4260 size, DMA_TO_DEVICE);
03b1320d 4261 buffer_info->mapped_as_page = false;
0be3f55f 4262 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4263 goto dma_error;
bc7f75fa
AK		 4264
4265 len -= size;
4266 offset += size;
03b1320d 4267 count++;
1b7719c4
AD		 4268
4269 if (len) {
4270 i++;
4271 if (i == tx_ring->count)
4272 i = 0;
4273 }
bc7f75fa
AK		 4274 }
4275
4276 for (f = 0; f < nr_frags; f++) {
4277 struct skb_frag_struct *frag;
4278
4279 frag = &skb_shinfo(skb)->frags[f];
4280 len = frag->size;
03b1320d 4281 offset = frag->page_offset;
bc7f75fa
AK		 4282
4283 while (len) {
1b7719c4
AD		 4284 i++;
4285 if (i == tx_ring->count)
4286 i = 0;
4287
bc7f75fa
AK		 4288 buffer_info = &tx_ring->buffer_info[i];
4289 size = min(len, max_per_txd);
bc7f75fa
AK		 4290
4291 buffer_info->length = size;
4292 buffer_info->time_stamp = jiffies;
bc7f75fa 4293 buffer_info->next_to_watch = i;
0be3f55f 4294 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4295 offset, size,
0be3f55f 4296 DMA_TO_DEVICE);
03b1320d 4297 buffer_info->mapped_as_page = true;
0be3f55f 4298 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4299 goto dma_error;
bc7f75fa
AK		 4300
4301 len -= size;
4302 offset += size;
4303 count++;
bc7f75fa
AK		 4304 }
4305 }
4306
9ed318d5
TH		 4307 segs = skb_shinfo(skb)->gso_segs ?: 1;
4308 /* multiply data chunks by size of headers */
4309 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4310
bc7f75fa 4311 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4312 tx_ring->buffer_info[i].segs = segs;
4313 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4314 tx_ring->buffer_info[first].next_to_watch = i;
4315
4316 return count;
03b1320d
AD		 4317
4318dma_error:
4319 dev_err(&pdev->dev, "TX DMA map failed\n");
4320 buffer_info->dma = 0;
c1fa347f 4321 if (count)
03b1320d 4322 count--;
c1fa347f
RK		 4323
4324 while (count--) {
4325 if (i==0)
03b1320d 4326 i += tx_ring->count;
c1fa347f 4327 i--;
03b1320d
AD		 4328 buffer_info = &tx_ring->buffer_info[i];
4329 e1000_put_txbuf(adapter, buffer_info);;
4330 }
4331
4332 return 0;
bc7f75fa
AK		 4333}
4334
4335static void e1000_tx_queue(struct e1000_adapter *adapter,
4336 int tx_flags, int count)
4337{
4338 struct e1000_ring *tx_ring = adapter->tx_ring;
4339 struct e1000_tx_desc *tx_desc = NULL;
4340 struct e1000_buffer *buffer_info;
4341 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4342 unsigned int i;
4343
4344 if (tx_flags & E1000_TX_FLAGS_TSO) {
4345 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4346 E1000_TXD_CMD_TSE;
4347 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4348
4349 if (tx_flags & E1000_TX_FLAGS_IPV4)
4350 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4351 }
4352
4353 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4354 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4355 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4356 }
4357
4358 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4359 txd_lower |= E1000_TXD_CMD_VLE;
4360 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4361 }
4362
4363 i = tx_ring->next_to_use;
4364
4365 while (count--) {
4366 buffer_info = &tx_ring->buffer_info[i];
4367 tx_desc = E1000_TX_DESC(*tx_ring, i);
4368 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4369 tx_desc->lower.data =
4370 cpu_to_le32(txd_lower | buffer_info->length);
4371 tx_desc->upper.data = cpu_to_le32(txd_upper);
4372
4373 i++;
4374 if (i == tx_ring->count)
4375 i = 0;
4376 }
4377
4378 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4379
ad68076e
BA		 4380 /*
4381 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4382 * know there are new descriptors to fetch. (Only
4383 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4384 * such as IA-64).
4385 */
bc7f75fa
AK		 4386 wmb();
4387
4388 tx_ring->next_to_use = i;
4389 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4390 /*
4391 * we need this if more than one processor can write to our tail
4392 * at a time, it synchronizes IO on IA64/Altix systems
4393 */
bc7f75fa
AK		 4394 mmiowb();
4395}
4396
4397#define MINIMUM_DHCP_PACKET_SIZE 282
4398static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4399 struct sk_buff *skb)
4400{
4401 struct e1000_hw *hw = &adapter->hw;
4402 u16 length, offset;
4403
4404 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4405 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4406 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4407 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4408 return 0;
4409 }
4410
4411 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4412 return 0;
4413
4414 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4415 return 0;
4416
4417 {
4418 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4419 struct udphdr *udp;
4420
4421 if (ip->protocol != IPPROTO_UDP)
4422 return 0;
4423
4424 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4425 if (ntohs(udp->dest) != 67)
4426 return 0;
4427
4428 offset = (u8 *)udp + 8 - skb->data;
4429 length = skb->len - offset;
4430 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4431 }
4432
4433 return 0;
4434}
4435
4436static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4437{
4438 struct e1000_adapter *adapter = netdev_priv(netdev);
4439
4440 netif_stop_queue(netdev);
ad68076e
BA		 4441 /*
4442 * Herbert's original patch had:
bc7f75fa 4443 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4444 * but since that doesn't exist yet, just open code it.
4445 */
bc7f75fa
AK		 4446 smp_mb();
4447
ad68076e
BA		 4448 /*
4449 * We need to check again in a case another CPU has just
4450 * made room available.
4451 */
bc7f75fa
AK		 4452 if (e1000_desc_unused(adapter->tx_ring) < size)
4453 return -EBUSY;
4454
4455 /* A reprieve! */
4456 netif_start_queue(netdev);
4457 ++adapter->restart_queue;
4458 return 0;
4459}
4460
4461static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4462{
4463 struct e1000_adapter *adapter = netdev_priv(netdev);
4464
4465 if (e1000_desc_unused(adapter->tx_ring) >= size)
4466 return 0;
4467 return __e1000_maybe_stop_tx(netdev, size);
4468}
4469
4470#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4471static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4472 struct net_device *netdev)
bc7f75fa
AK		 4473{
4474 struct e1000_adapter *adapter = netdev_priv(netdev);
4475 struct e1000_ring *tx_ring = adapter->tx_ring;
4476 unsigned int first;
4477 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4478 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4479 unsigned int tx_flags = 0;
e743d313 4480 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4481 unsigned int nr_frags;
4482 unsigned int mss;
bc7f75fa
AK		 4483 int count = 0;
4484 int tso;
4485 unsigned int f;
bc7f75fa
AK		 4486
4487 if (test_bit(__E1000_DOWN, &adapter->state)) {
4488 dev_kfree_skb_any(skb);
4489 return NETDEV_TX_OK;
4490 }
4491
4492 if (skb->len <= 0) {
4493 dev_kfree_skb_any(skb);
4494 return NETDEV_TX_OK;
4495 }
4496
4497 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4498 /*
4499 * The controller does a simple calculation to
bc7f75fa
AK		 4500 * make sure there is enough room in the FIFO before
4501 * initiating the DMA for each buffer. The calc is:
4502 * 4 = ceil(buffer len/mss). To make sure we don't
4503 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4504 * drops.
4505 */
bc7f75fa
AK		 4506 if (mss) {
4507 u8 hdr_len;
4508 max_per_txd = min(mss << 2, max_per_txd);
4509 max_txd_pwr = fls(max_per_txd) - 1;
4510
ad68076e
BA		 4511 /*
4512 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4513 * points to just header, pull a few bytes of payload from
4514 * frags into skb->data
4515 */
bc7f75fa 4516 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4517 /*
4518 * we do this workaround for ES2LAN, but it is un-necessary,
4519 * avoiding it could save a lot of cycles
4520 */
4e6c709c 4521 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4522 unsigned int pull_size;
4523
4524 pull_size = min((unsigned int)4, skb->data_len);
4525 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4526 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4527 dev_kfree_skb_any(skb);
4528 return NETDEV_TX_OK;
4529 }
e743d313 4530 len = skb_headlen(skb);
bc7f75fa
AK		 4531 }
4532 }
4533
4534 /* reserve a descriptor for the offload context */
4535 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4536 count++;
4537 count++;
4538
4539 count += TXD_USE_COUNT(len, max_txd_pwr);
4540
4541 nr_frags = skb_shinfo(skb)->nr_frags;
4542 for (f = 0; f < nr_frags; f++)
4543 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4544 max_txd_pwr);
4545
4546 if (adapter->hw.mac.tx_pkt_filtering)
4547 e1000_transfer_dhcp_info(adapter, skb);
4548
ad68076e
BA		 4549 /*
4550 * need: count + 2 desc gap to keep tail from touching
4551 * head, otherwise try next time
4552 */
92af3e95 4553 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4554 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4555
4556 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4557 tx_flags |= E1000_TX_FLAGS_VLAN;
4558 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4559 }
4560
4561 first = tx_ring->next_to_use;
4562
4563 tso = e1000_tso(adapter, skb);
4564 if (tso < 0) {
4565 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4566 return NETDEV_TX_OK;
4567 }
4568
4569 if (tso)
4570 tx_flags |= E1000_TX_FLAGS_TSO;
4571 else if (e1000_tx_csum(adapter, skb))
4572 tx_flags |= E1000_TX_FLAGS_CSUM;
4573
ad68076e
BA		 4574 /*
4575 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4576 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4577 * no longer assume, we must.
4578 */
bc7f75fa
AK		 4579 if (skb->protocol == htons(ETH_P_IP))
4580 tx_flags |= E1000_TX_FLAGS_IPV4;
4581
1b7719c4 4582 /* if count is 0 then mapping error has occured */
bc7f75fa 4583 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4584 if (count) {
4585 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4586 /* Make sure there is space in the ring for the next send. */
4587 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4588
4589 } else {
bc7f75fa 4590 dev_kfree_skb_any(skb);
1b7719c4
AD		 4591 tx_ring->buffer_info[first].time_stamp = 0;
4592 tx_ring->next_to_use = first;
bc7f75fa
AK		 4593 }
4594
bc7f75fa
AK		 4595 return NETDEV_TX_OK;
4596}
4597
4598/**
4599 * e1000_tx_timeout - Respond to a Tx Hang
4600 * @netdev: network interface device structure
4601 **/
4602static void e1000_tx_timeout(struct net_device *netdev)
4603{
4604 struct e1000_adapter *adapter = netdev_priv(netdev);
4605
4606 /* Do the reset outside of interrupt context */
4607 adapter->tx_timeout_count++;
4608 schedule_work(&adapter->reset_task);
4609}
4610
4611static void e1000_reset_task(struct work_struct *work)
4612{
4613 struct e1000_adapter *adapter;
4614 adapter = container_of(work, struct e1000_adapter, reset_task);
4615
84f4ee90
TI		 4616 e1000e_dump(adapter);
4617 e_err("Reset adapter\n");
bc7f75fa
AK		 4618 e1000e_reinit_locked(adapter);
4619}
4620
4621/**
4622 * e1000_get_stats - Get System Network Statistics
4623 * @netdev: network interface device structure
4624 *
4625 * Returns the address of the device statistics structure.
4626 * The statistics are actually updated from the timer callback.
4627 **/
4628static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4629{
bc7f75fa 4630 /* only return the current stats */
7274c20f 4631 return &netdev->stats;
bc7f75fa
AK		 4632}
4633
4634/**
4635 * e1000_change_mtu - Change the Maximum Transfer Unit
4636 * @netdev: network interface device structure
4637 * @new_mtu: new value for maximum frame size
4638 *
4639 * Returns 0 on success, negative on failure
4640 **/
4641static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4642{
4643 struct e1000_adapter *adapter = netdev_priv(netdev);
4644 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4645
2adc55c9
BA		 4646 /* Jumbo frame support */
4647 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4648 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4649 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4650 return -EINVAL;
4651 }
4652
2adc55c9
BA		 4653 /* Supported frame sizes */
4654 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4655 (max_frame > adapter->max_hw_frame_size)) {
4656 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4657 return -EINVAL;
4658 }
4659
6f461f6c
BA		 4660 /* 82573 Errata 17 */
4661 if (((adapter->hw.mac.type == e1000_82573) ||
4662 (adapter->hw.mac.type == e1000_82574)) &&
4663 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4664 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4665 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4666 }
4667
bc7f75fa
AK		 4668 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4669 msleep(1);
610c9928 4670 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4671 adapter->max_frame_size = max_frame;
610c9928
BA		 4672 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4673 netdev->mtu = new_mtu;
bc7f75fa
AK		 4674 if (netif_running(netdev))
4675 e1000e_down(adapter);
4676
ad68076e
BA		 4677 /*
4678 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4679 * means we reserve 2 more, this pushes us to allocate from the next
4680 * larger slab size.
ad68076e 4681 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4682 * However with the new *_jumbo_rx* routines, jumbo receives will use
4683 * fragmented skbs
ad68076e 4684 */
bc7f75fa 4685
9926146b 4686 if (max_frame <= 2048)
bc7f75fa
AK		 4687 adapter->rx_buffer_len = 2048;
4688 else
4689 adapter->rx_buffer_len = 4096;
4690
4691 /* adjust allocation if LPE protects us, and we aren't using SBP */
4692 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4693 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4694 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4695 + ETH_FCS_LEN;
bc7f75fa 4696
bc7f75fa
AK		 4697 if (netif_running(netdev))
4698 e1000e_up(adapter);
4699 else
4700 e1000e_reset(adapter);
4701
4702 clear_bit(__E1000_RESETTING, &adapter->state);
4703
4704 return 0;
4705}
4706
4707static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4708 int cmd)
4709{
4710 struct e1000_adapter *adapter = netdev_priv(netdev);
4711 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4712
318a94d6 4713 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4714 return -EOPNOTSUPP;
4715
4716 switch (cmd) {
4717 case SIOCGMIIPHY:
4718 data->phy_id = adapter->hw.phy.addr;
4719 break;
4720 case SIOCGMIIREG:
b16a002e
BA		 4721 e1000_phy_read_status(adapter);
4722
7c25769f
BA		 4723 switch (data->reg_num & 0x1F) {
4724 case MII_BMCR:
4725 data->val_out = adapter->phy_regs.bmcr;
4726 break;
4727 case MII_BMSR:
4728 data->val_out = adapter->phy_regs.bmsr;
4729 break;
4730 case MII_PHYSID1:
4731 data->val_out = (adapter->hw.phy.id >> 16);
4732 break;
4733 case MII_PHYSID2:
4734 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4735 break;
4736 case MII_ADVERTISE:
4737 data->val_out = adapter->phy_regs.advertise;
4738 break;
4739 case MII_LPA:
4740 data->val_out = adapter->phy_regs.lpa;
4741 break;
4742 case MII_EXPANSION:
4743 data->val_out = adapter->phy_regs.expansion;
4744 break;
4745 case MII_CTRL1000:
4746 data->val_out = adapter->phy_regs.ctrl1000;
4747 break;
4748 case MII_STAT1000:
4749 data->val_out = adapter->phy_regs.stat1000;
4750 break;
4751 case MII_ESTATUS:
4752 data->val_out = adapter->phy_regs.estatus;
4753 break;
4754 default:
bc7f75fa
AK		 4755 return -EIO;
4756 }
bc7f75fa
AK		 4757 break;
4758 case SIOCSMIIREG:
4759 default:
4760 return -EOPNOTSUPP;
4761 }
4762 return 0;
4763}
4764
4765static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4766{
4767 switch (cmd) {
4768 case SIOCGMIIPHY:
4769 case SIOCGMIIREG:
4770 case SIOCSMIIREG:
4771 return e1000_mii_ioctl(netdev, ifr, cmd);
4772 default:
4773 return -EOPNOTSUPP;
4774 }
4775}
4776
a4f58f54
BA		 4777static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4778{
4779 struct e1000_hw *hw = &adapter->hw;
4780 u32 i, mac_reg;
4781 u16 phy_reg;
4782 int retval = 0;
4783
4784 /* copy MAC RARs to PHY RARs */
4785 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4786 mac_reg = er32(RAL(i));
4787 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4788 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4789 mac_reg = er32(RAH(i));
4790 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4791 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4792 }
4793
4794 /* copy MAC MTA to PHY MTA */
4795 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4796 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4797 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4798 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4799 }
4800
4801 /* configure PHY Rx Control register */
4802 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4803 mac_reg = er32(RCTL);
4804 if (mac_reg & E1000_RCTL_UPE)
4805 phy_reg |= BM_RCTL_UPE;
4806 if (mac_reg & E1000_RCTL_MPE)
4807 phy_reg |= BM_RCTL_MPE;
4808 phy_reg &= ~(BM_RCTL_MO_MASK);
4809 if (mac_reg & E1000_RCTL_MO_3)
4810 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4811 << BM_RCTL_MO_SHIFT);
4812 if (mac_reg & E1000_RCTL_BAM)
4813 phy_reg |= BM_RCTL_BAM;
4814 if (mac_reg & E1000_RCTL_PMCF)
4815 phy_reg |= BM_RCTL_PMCF;
4816 mac_reg = er32(CTRL);
4817 if (mac_reg & E1000_CTRL_RFCE)
4818 phy_reg |= BM_RCTL_RFCE;
4819 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4820
4821 /* enable PHY wakeup in MAC register */
4822 ew32(WUFC, wufc);
4823 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4824
4825 /* configure and enable PHY wakeup in PHY registers */
4826 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4827 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4828
4829 /* activate PHY wakeup */
94d8186a 4830 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4831 if (retval) {
4832 e_err("Could not acquire PHY\n");
4833 return retval;
4834 }
4835 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4836 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4837 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4838 if (retval) {
4839 e_err("Could not read PHY page 769\n");
4840 goto out;
4841 }
4842 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4843 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4844 if (retval)
4845 e_err("Could not set PHY Host Wakeup bit\n");
4846out:
94d8186a 4847 hw->phy.ops.release(hw);
a4f58f54
BA		 4848
4849 return retval;
4850}
4851
23606cf5
RW		 4852static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
4853 bool runtime)
bc7f75fa
AK		 4854{
4855 struct net_device *netdev = pci_get_drvdata(pdev);
4856 struct e1000_adapter *adapter = netdev_priv(netdev);
4857 struct e1000_hw *hw = &adapter->hw;
4858 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 4859 /* Runtime suspend should only enable wakeup for link changes */
4860 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 4861 int retval = 0;
4862
4863 netif_device_detach(netdev);
4864
4865 if (netif_running(netdev)) {
4866 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4867 e1000e_down(adapter);
4868 e1000_free_irq(adapter);
4869 }
4662e82b 4870 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4871
4872 retval = pci_save_state(pdev);
4873 if (retval)
4874 return retval;
4875
4876 status = er32(STATUS);
4877 if (status & E1000_STATUS_LU)
4878 wufc &= ~E1000_WUFC_LNKC;
4879
4880 if (wufc) {
4881 e1000_setup_rctl(adapter);
4882 e1000_set_multi(netdev);
4883
4884 /* turn on all-multi mode if wake on multicast is enabled */
4885 if (wufc & E1000_WUFC_MC) {
4886 rctl = er32(RCTL);
4887 rctl |= E1000_RCTL_MPE;
4888 ew32(RCTL, rctl);
4889 }
4890
4891 ctrl = er32(CTRL);
4892 /* advertise wake from D3Cold */
4893 #define E1000_CTRL_ADVD3WUC 0x00100000
4894 /* phy power management enable */
4895 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 4896 ctrl |= E1000_CTRL_ADVD3WUC;
4897 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4898 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 4899 ew32(CTRL, ctrl);
4900
318a94d6
JK		 4901 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4902 adapter->hw.phy.media_type ==
4903 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4904 /* keep the laser running in D3 */
4905 ctrl_ext = er32(CTRL_EXT);
93a23f48 4906 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 4907 ew32(CTRL_EXT, ctrl_ext);
4908 }
4909
97ac8cae
BA		 4910 if (adapter->flags & FLAG_IS_ICH)
4911 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4912
bc7f75fa
AK		 4913 /* Allow time for pending master requests to run */
4914 e1000e_disable_pcie_master(&adapter->hw);
4915
82776a4b 4916 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 4917 /* enable wakeup by the PHY */
4918 retval = e1000_init_phy_wakeup(adapter, wufc);
4919 if (retval)
4920 return retval;
4921 } else {
4922 /* enable wakeup by the MAC */
4923 ew32(WUFC, wufc);
4924 ew32(WUC, E1000_WUC_PME_EN);
4925 }
bc7f75fa
AK		 4926 } else {
4927 ew32(WUC, 0);
4928 ew32(WUFC, 0);
bc7f75fa
AK		 4929 }
4930
4f9de721
RW		 4931 *enable_wake = !!wufc;
4932
bc7f75fa 4933 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 4934 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4935 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4936 *enable_wake = true;
bc7f75fa
AK		 4937
4938 if (adapter->hw.phy.type == e1000_phy_igp_3)
4939 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4940
ad68076e
BA		 4941 /*
4942 * Release control of h/w to f/w. If f/w is AMT enabled, this
4943 * would have already happened in close and is redundant.
4944 */
bc7f75fa
AK		 4945 e1000_release_hw_control(adapter);
4946
4947 pci_disable_device(pdev);
4948
4f9de721
RW		 4949 return 0;
4950}
4951
4952static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4953{
4954 if (sleep && wake) {
4955 pci_prepare_to_sleep(pdev);
4956 return;
4957 }
4958
4959 pci_wake_from_d3(pdev, wake);
4960 pci_set_power_state(pdev, PCI_D3hot);
4961}
4962
4963static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4964 bool wake)
4965{
4966 struct net_device *netdev = pci_get_drvdata(pdev);
4967 struct e1000_adapter *adapter = netdev_priv(netdev);
4968
005cbdfc
AD		 4969 /*
4970 * The pci-e switch on some quad port adapters will report a
4971 * correctable error when the MAC transitions from D0 to D3. To
4972 * prevent this we need to mask off the correctable errors on the
4973 * downstream port of the pci-e switch.
4974 */
4975 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4976 struct pci_dev *us_dev = pdev->bus->self;
4977 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4978 u16 devctl;
4979
4980 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4981 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4982 (devctl & ~PCI_EXP_DEVCTL_CERE));
4983
4f9de721 4984 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 4985
4986 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4987 } else {
4f9de721 4988 e1000_power_off(pdev, sleep, wake);
005cbdfc 4989 }
bc7f75fa
AK		 4990}
4991
6f461f6c
BA		 4992#ifdef CONFIG_PCIEASPM
4993static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
4994{
4995 pci_disable_link_state(pdev, state);
4996}
4997#else
4998static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 4999{
5000 int pos;
6f461f6c 5001 u16 reg16;
1eae4eb2
AK		 5002
5003 /*
6f461f6c
BA		 5004 * Both device and parent should have the same ASPM setting.
5005 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5006 */
6f461f6c
BA		 5007 pos = pci_pcie_cap(pdev);
5008 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5009 reg16 &= ~state;
5010 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5011
0c75ba22
AB		 5012 if (!pdev->bus->self)
5013 return;
5014
6f461f6c
BA		 5015 pos = pci_pcie_cap(pdev->bus->self);
5016 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5017 reg16 &= ~state;
5018 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5019}
5020#endif
5021void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5022{
5023 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5024 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5025 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5026
5027 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5028}
5029
a0340162 5030#ifdef CONFIG_PM_OPS
23606cf5
RW		 5031static bool e1000e_pm_ready(struct e1000_adapter *adapter)
5032{
5033 return !!adapter->tx_ring->buffer_info;
5034}
5035
23606cf5
RW		 5036static int __e1000_resume(struct pci_dev *pdev)
5037{
5038 struct net_device *netdev = pci_get_drvdata(pdev);
5039 struct e1000_adapter *adapter = netdev_priv(netdev);
5040 struct e1000_hw *hw = &adapter->hw;
5041 u32 err;
5042
bc7f75fa
AK		 5043 pci_set_power_state(pdev, PCI_D0);
5044 pci_restore_state(pdev);
28b8f04a 5045 pci_save_state(pdev);
6f461f6c
BA		 5046 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5047 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
bc7f75fa 5048
4662e82b 5049 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5050 if (netif_running(netdev)) {
5051 err = e1000_request_irq(adapter);
5052 if (err)
5053 return err;
5054 }
5055
5056 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5057
5058 /* report the system wakeup cause from S3/S4 */
5059 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5060 u16 phy_data;
5061
5062 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5063 if (phy_data) {
5064 e_info("PHY Wakeup cause - %s\n",
5065 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5066 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5067 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5068 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5069 phy_data & E1000_WUS_LNKC ? "Link Status "
5070 " Change" : "other");
5071 }
5072 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5073 } else {
5074 u32 wus = er32(WUS);
5075 if (wus) {
5076 e_info("MAC Wakeup cause - %s\n",
5077 wus & E1000_WUS_EX ? "Unicast Packet" :
5078 wus & E1000_WUS_MC ? "Multicast Packet" :
5079 wus & E1000_WUS_BC ? "Broadcast Packet" :
5080 wus & E1000_WUS_MAG ? "Magic Packet" :
5081 wus & E1000_WUS_LNKC ? "Link Status Change" :
5082 "other");
5083 }
5084 ew32(WUS, ~0);
5085 }
5086
bc7f75fa 5087 e1000e_reset(adapter);
bc7f75fa
AK		 5088
5089 e1000_init_manageability(adapter);
5090
5091 if (netif_running(netdev))
5092 e1000e_up(adapter);
5093
5094 netif_device_attach(netdev);
5095
ad68076e
BA		 5096 /*
5097 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5098 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5099 * under the control of the driver.
5100 */
c43bc57e 5101 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5102 e1000_get_hw_control(adapter);
5103
5104 return 0;
5105}
23606cf5 5106
a0340162
RW		 5107#ifdef CONFIG_PM_SLEEP
5108static int e1000_suspend(struct device *dev)
5109{
5110 struct pci_dev *pdev = to_pci_dev(dev);
5111 int retval;
5112 bool wake;
5113
5114 retval = __e1000_shutdown(pdev, &wake, false);
5115 if (!retval)
5116 e1000_complete_shutdown(pdev, true, wake);
5117
5118 return retval;
5119}
5120
23606cf5
RW		 5121static int e1000_resume(struct device *dev)
5122{
5123 struct pci_dev *pdev = to_pci_dev(dev);
5124 struct net_device *netdev = pci_get_drvdata(pdev);
5125 struct e1000_adapter *adapter = netdev_priv(netdev);
5126
5127 if (e1000e_pm_ready(adapter))
5128 adapter->idle_check = true;
5129
5130 return __e1000_resume(pdev);
5131}
a0340162
RW		 5132#endif /* CONFIG_PM_SLEEP */
5133
5134#ifdef CONFIG_PM_RUNTIME
5135static int e1000_runtime_suspend(struct device *dev)
5136{
5137 struct pci_dev *pdev = to_pci_dev(dev);
5138 struct net_device *netdev = pci_get_drvdata(pdev);
5139 struct e1000_adapter *adapter = netdev_priv(netdev);
5140
5141 if (e1000e_pm_ready(adapter)) {
5142 bool wake;
5143
5144 __e1000_shutdown(pdev, &wake, true);
5145 }
5146
5147 return 0;
5148}
5149
5150static int e1000_idle(struct device *dev)
5151{
5152 struct pci_dev *pdev = to_pci_dev(dev);
5153 struct net_device *netdev = pci_get_drvdata(pdev);
5154 struct e1000_adapter *adapter = netdev_priv(netdev);
5155
5156 if (!e1000e_pm_ready(adapter))
5157 return 0;
5158
5159 if (adapter->idle_check) {
5160 adapter->idle_check = false;
5161 if (!e1000e_has_link(adapter))
5162 pm_schedule_suspend(dev, MSEC_PER_SEC);
5163 }
5164
5165 return -EBUSY;
5166}
23606cf5
RW		 5167
5168static int e1000_runtime_resume(struct device *dev)
5169{
5170 struct pci_dev *pdev = to_pci_dev(dev);
5171 struct net_device *netdev = pci_get_drvdata(pdev);
5172 struct e1000_adapter *adapter = netdev_priv(netdev);
5173
5174 if (!e1000e_pm_ready(adapter))
5175 return 0;
5176
5177 adapter->idle_check = !dev->power.runtime_auto;
5178 return __e1000_resume(pdev);
5179}
a0340162
RW		 5180#endif /* CONFIG_PM_RUNTIME */
5181#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5182
5183static void e1000_shutdown(struct pci_dev *pdev)
5184{
4f9de721
RW		 5185 bool wake = false;
5186
23606cf5 5187 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5188
5189 if (system_state == SYSTEM_POWER_OFF)
5190 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5191}
5192
5193#ifdef CONFIG_NET_POLL_CONTROLLER
5194/*
5195 * Polling 'interrupt' - used by things like netconsole to send skbs
5196 * without having to re-enable interrupts. It's not called while
5197 * the interrupt routine is executing.
5198 */
5199static void e1000_netpoll(struct net_device *netdev)
5200{
5201 struct e1000_adapter *adapter = netdev_priv(netdev);
5202
5203 disable_irq(adapter->pdev->irq);
5204 e1000_intr(adapter->pdev->irq, netdev);
5205
bc7f75fa
AK		 5206 enable_irq(adapter->pdev->irq);
5207}
5208#endif
5209
5210/**
5211 * e1000_io_error_detected - called when PCI error is detected
5212 * @pdev: Pointer to PCI device
5213 * @state: The current pci connection state
5214 *
5215 * This function is called after a PCI bus error affecting
5216 * this device has been detected.
5217 */
5218static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5219 pci_channel_state_t state)
5220{
5221 struct net_device *netdev = pci_get_drvdata(pdev);
5222 struct e1000_adapter *adapter = netdev_priv(netdev);
5223
5224 netif_device_detach(netdev);
5225
c93b5a76
MM		 5226 if (state == pci_channel_io_perm_failure)
5227 return PCI_ERS_RESULT_DISCONNECT;
5228
bc7f75fa
AK		 5229 if (netif_running(netdev))
5230 e1000e_down(adapter);
5231 pci_disable_device(pdev);
5232
5233 /* Request a slot slot reset. */
5234 return PCI_ERS_RESULT_NEED_RESET;
5235}
5236
5237/**
5238 * e1000_io_slot_reset - called after the pci bus has been reset.
5239 * @pdev: Pointer to PCI device
5240 *
5241 * Restart the card from scratch, as if from a cold-boot. Implementation
5242 * resembles the first-half of the e1000_resume routine.
5243 */
5244static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5245{
5246 struct net_device *netdev = pci_get_drvdata(pdev);
5247 struct e1000_adapter *adapter = netdev_priv(netdev);
5248 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5249 int err;
111b9dc5 5250 pci_ers_result_t result;
bc7f75fa 5251
6f461f6c
BA		 5252 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5253 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5254 err = pci_enable_device_mem(pdev);
6e4f6f6b 5255 if (err) {
bc7f75fa
AK		 5256 dev_err(&pdev->dev,
5257 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5258 result = PCI_ERS_RESULT_DISCONNECT;
5259 } else {
5260 pci_set_master(pdev);
23606cf5 5261 pdev->state_saved = true;
111b9dc5 5262 pci_restore_state(pdev);
bc7f75fa 5263
111b9dc5
JB		 5264 pci_enable_wake(pdev, PCI_D3hot, 0);
5265 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5266
111b9dc5
JB		 5267 e1000e_reset(adapter);
5268 ew32(WUS, ~0);
5269 result = PCI_ERS_RESULT_RECOVERED;
5270 }
bc7f75fa 5271
111b9dc5
JB		 5272 pci_cleanup_aer_uncorrect_error_status(pdev);
5273
5274 return result;
bc7f75fa
AK		 5275}
5276
5277/**
5278 * e1000_io_resume - called when traffic can start flowing again.
5279 * @pdev: Pointer to PCI device
5280 *
5281 * This callback is called when the error recovery driver tells us that
5282 * its OK to resume normal operation. Implementation resembles the
5283 * second-half of the e1000_resume routine.
5284 */
5285static void e1000_io_resume(struct pci_dev *pdev)
5286{
5287 struct net_device *netdev = pci_get_drvdata(pdev);
5288 struct e1000_adapter *adapter = netdev_priv(netdev);
5289
5290 e1000_init_manageability(adapter);
5291
5292 if (netif_running(netdev)) {
5293 if (e1000e_up(adapter)) {
5294 dev_err(&pdev->dev,
5295 "can't bring device back up after reset\n");
5296 return;
5297 }
5298 }
5299
5300 netif_device_attach(netdev);
5301
ad68076e
BA		 5302 /*
5303 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5304 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5305 * under the control of the driver.
5306 */
c43bc57e 5307 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5308 e1000_get_hw_control(adapter);
5309
5310}
5311
5312static void e1000_print_device_info(struct e1000_adapter *adapter)
5313{
5314 struct e1000_hw *hw = &adapter->hw;
5315 struct net_device *netdev = adapter->netdev;
69e3fd8c 5316 u32 pba_num;
bc7f75fa
AK		 5317
5318 /* print bus type/speed/width info */
7c510e4b 5319 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5320 /* bus width */
5321 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5322 "Width x1"),
5323 /* MAC address */
7c510e4b 5324 netdev->dev_addr);
44defeb3
JK		 5325 e_info("Intel(R) PRO/%s Network Connection\n",
5326 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 5327 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 5328 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5329 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 5330}
5331
10aa4c04
AK		 5332static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5333{
5334 struct e1000_hw *hw = &adapter->hw;
5335 int ret_val;
5336 u16 buf = 0;
5337
5338 if (hw->mac.type != e1000_82573)
5339 return;
5340
5341 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5342 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5343 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5344 dev_warn(&adapter->pdev->dev,
5345 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5346 }
10aa4c04
AK		 5347}
5348
651c2466
SH		 5349static const struct net_device_ops e1000e_netdev_ops = {
5350 .ndo_open = e1000_open,
5351 .ndo_stop = e1000_close,
00829823 5352 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 5353 .ndo_get_stats = e1000_get_stats,
5354 .ndo_set_multicast_list = e1000_set_multi,
5355 .ndo_set_mac_address = e1000_set_mac,
5356 .ndo_change_mtu = e1000_change_mtu,
5357 .ndo_do_ioctl = e1000_ioctl,
5358 .ndo_tx_timeout = e1000_tx_timeout,
5359 .ndo_validate_addr = eth_validate_addr,
5360
5361 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5362 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5363 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5364#ifdef CONFIG_NET_POLL_CONTROLLER
5365 .ndo_poll_controller = e1000_netpoll,
5366#endif
5367};
5368
bc7f75fa
AK		 5369/**
5370 * e1000_probe - Device Initialization Routine
5371 * @pdev: PCI device information struct
5372 * @ent: entry in e1000_pci_tbl
5373 *
5374 * Returns 0 on success, negative on failure
5375 *
5376 * e1000_probe initializes an adapter identified by a pci_dev structure.
5377 * The OS initialization, configuring of the adapter private structure,
5378 * and a hardware reset occur.
5379 **/
5380static int __devinit e1000_probe(struct pci_dev *pdev,
5381 const struct pci_device_id *ent)
5382{
5383 struct net_device *netdev;
5384 struct e1000_adapter *adapter;
5385 struct e1000_hw *hw;
5386 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5387 resource_size_t mmio_start, mmio_len;
5388 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5389
5390 static int cards_found;
5391 int i, err, pci_using_dac;
5392 u16 eeprom_data = 0;
5393 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5394
6f461f6c
BA		 5395 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5396 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5397
f0f422e5 5398 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5399 if (err)
5400 return err;
5401
5402 pci_using_dac = 0;
0be3f55f 5403 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5404 if (!err) {
0be3f55f 5405 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5406 if (!err)
5407 pci_using_dac = 1;
5408 } else {
0be3f55f 5409 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5410 if (err) {
0be3f55f
NN		 5411 err = dma_set_coherent_mask(&pdev->dev,
5412 DMA_BIT_MASK(32));
bc7f75fa
AK		 5413 if (err) {
5414 dev_err(&pdev->dev, "No usable DMA "
5415 "configuration, aborting\n");
5416 goto err_dma;
5417 }
5418 }
5419 }
5420
e8de1481 5421 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5422 pci_select_bars(pdev, IORESOURCE_MEM),
5423 e1000e_driver_name);
bc7f75fa
AK		 5424 if (err)
5425 goto err_pci_reg;
5426
68eac460 5427 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5428 pci_enable_pcie_error_reporting(pdev);
68eac460 5429
bc7f75fa 5430 pci_set_master(pdev);
438b365a
BA		 5431 /* PCI config space info */
5432 err = pci_save_state(pdev);
5433 if (err)
5434 goto err_alloc_etherdev;
bc7f75fa
AK		 5435
5436 err = -ENOMEM;
5437 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5438 if (!netdev)
5439 goto err_alloc_etherdev;
5440
bc7f75fa
AK		 5441 SET_NETDEV_DEV(netdev, &pdev->dev);
5442
f85e4dfa
TH		 5443 netdev->irq = pdev->irq;
5444
bc7f75fa
AK		 5445 pci_set_drvdata(pdev, netdev);
5446 adapter = netdev_priv(netdev);
5447 hw = &adapter->hw;
5448 adapter->netdev = netdev;
5449 adapter->pdev = pdev;
5450 adapter->ei = ei;
5451 adapter->pba = ei->pba;
5452 adapter->flags = ei->flags;
eb7c3adb 5453 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5454 adapter->hw.adapter = adapter;
5455 adapter->hw.mac.type = ei->mac;
2adc55c9 5456 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5457 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5458
5459 mmio_start = pci_resource_start(pdev, 0);
5460 mmio_len = pci_resource_len(pdev, 0);
5461
5462 err = -EIO;
5463 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5464 if (!adapter->hw.hw_addr)
5465 goto err_ioremap;
5466
5467 if ((adapter->flags & FLAG_HAS_FLASH) &&
5468 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5469 flash_start = pci_resource_start(pdev, 1);
5470 flash_len = pci_resource_len(pdev, 1);
5471 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5472 if (!adapter->hw.flash_address)
5473 goto err_flashmap;
5474 }
5475
5476 /* construct the net_device struct */
651c2466 5477 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5478 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5479 netdev->watchdog_timeo = 5 * HZ;
5480 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5481 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5482
5483 netdev->mem_start = mmio_start;
5484 netdev->mem_end = mmio_start + mmio_len;
5485
5486 adapter->bd_number = cards_found++;
5487
4662e82b
BA		 5488 e1000e_check_options(adapter);
5489
bc7f75fa
AK		 5490 /* setup adapter struct */
5491 err = e1000_sw_init(adapter);
5492 if (err)
5493 goto err_sw_init;
5494
5495 err = -EIO;
5496
5497 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5498 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5499 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5500
69e3fd8c 5501 err = ei->get_variants(adapter);
bc7f75fa
AK		 5502 if (err)
5503 goto err_hw_init;
5504
4a770358
BA		 5505 if ((adapter->flags & FLAG_IS_ICH) &&
5506 (adapter->flags & FLAG_READ_ONLY_NVM))
5507 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5508
bc7f75fa
AK		 5509 hw->mac.ops.get_bus_info(&adapter->hw);
5510
318a94d6 5511 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5512
5513 /* Copper options */
318a94d6 5514 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5515 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5516 adapter->hw.phy.disable_polarity_correction = 0;
5517 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5518 }
5519
5520 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5521 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5522
5523 netdev->features = NETIF_F_SG |
5524 NETIF_F_HW_CSUM |
5525 NETIF_F_HW_VLAN_TX |
5526 NETIF_F_HW_VLAN_RX;
5527
5528 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5529 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5530
5531 netdev->features |= NETIF_F_TSO;
5532 netdev->features |= NETIF_F_TSO6;
5533
a5136e23
JK		 5534 netdev->vlan_features |= NETIF_F_TSO;
5535 netdev->vlan_features |= NETIF_F_TSO6;
5536 netdev->vlan_features |= NETIF_F_HW_CSUM;
5537 netdev->vlan_features |= NETIF_F_SG;
5538
bc7f75fa
AK		 5539 if (pci_using_dac)
5540 netdev->features |= NETIF_F_HIGHDMA;
5541
bc7f75fa
AK		 5542 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5543 adapter->flags |= FLAG_MNG_PT_ENABLED;
5544
ad68076e
BA		 5545 /*
5546 * before reading the NVM, reset the controller to
5547 * put the device in a known good starting state
5548 */
bc7f75fa
AK		 5549 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5550
5551 /*
5552 * systems with ASPM and others may see the checksum fail on the first
5553 * attempt. Let's give it a few tries
5554 */
5555 for (i = 0;; i++) {
5556 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5557 break;
5558 if (i == 2) {
44defeb3 5559 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5560 err = -EIO;
5561 goto err_eeprom;
5562 }
5563 }
5564
10aa4c04
AK		 5565 e1000_eeprom_checks(adapter);
5566
608f8a0d 5567 /* copy the MAC address */
bc7f75fa 5568 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5569 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5570
5571 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5572 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5573
5574 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5575 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5576 err = -EIO;
5577 goto err_eeprom;
5578 }
5579
5580 init_timer(&adapter->watchdog_timer);
5581 adapter->watchdog_timer.function = &e1000_watchdog;
5582 adapter->watchdog_timer.data = (unsigned long) adapter;
5583
5584 init_timer(&adapter->phy_info_timer);
5585 adapter->phy_info_timer.function = &e1000_update_phy_info;
5586 adapter->phy_info_timer.data = (unsigned long) adapter;
5587
5588 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5589 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5590 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5591 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5592 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5593
bc7f75fa
AK		 5594 /* Initialize link parameters. User can change them with ethtool */
5595 adapter->hw.mac.autoneg = 1;
309af40b 5596 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5597 adapter->hw.fc.requested_mode = e1000_fc_default;
5598 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5599 adapter->hw.phy.autoneg_advertised = 0x2f;
5600
5601 /* ring size defaults */
5602 adapter->rx_ring->count = 256;
5603 adapter->tx_ring->count = 256;
5604
5605 /*
5606 * Initial Wake on LAN setting - If APM wake is enabled in
5607 * the EEPROM, enable the ACPI Magic Packet filter
5608 */
5609 if (adapter->flags & FLAG_APME_IN_WUC) {
5610 /* APME bit in EEPROM is mapped to WUC.APME */
5611 eeprom_data = er32(WUC);
5612 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5613 if (eeprom_data & E1000_WUC_PHY_WAKE)
5614 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5615 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5616 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5617 (adapter->hw.bus.func == 1))
5618 e1000_read_nvm(&adapter->hw,
5619 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5620 else
5621 e1000_read_nvm(&adapter->hw,
5622 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5623 }
5624
5625 /* fetch WoL from EEPROM */
5626 if (eeprom_data & eeprom_apme_mask)
5627 adapter->eeprom_wol |= E1000_WUFC_MAG;
5628
5629 /*
5630 * now that we have the eeprom settings, apply the special cases
5631 * where the eeprom may be wrong or the board simply won't support
5632 * wake on lan on a particular port
5633 */
5634 if (!(adapter->flags & FLAG_HAS_WOL))
5635 adapter->eeprom_wol = 0;
5636
5637 /* initialize the wol settings based on the eeprom settings */
5638 adapter->wol = adapter->eeprom_wol;
6ff68026 5639 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5640
84527590
BA		 5641 /* save off EEPROM version number */
5642 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5643
bc7f75fa
AK		 5644 /* reset the hardware with the new settings */
5645 e1000e_reset(adapter);
5646
ad68076e
BA		 5647 /*
5648 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5649 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5650 * under the control of the driver.
5651 */
c43bc57e 5652 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5653 e1000_get_hw_control(adapter);
5654
bc7f75fa
AK		 5655 strcpy(netdev->name, "eth%d");
5656 err = register_netdev(netdev);
5657 if (err)
5658 goto err_register;
5659
9c563d20
JB		 5660 /* carrier off reporting is important to ethtool even BEFORE open */
5661 netif_carrier_off(netdev);
5662
bc7f75fa
AK		 5663 e1000_print_device_info(adapter);
5664
23606cf5
RW		 5665 if (pci_dev_run_wake(pdev)) {
5666 pm_runtime_set_active(&pdev->dev);
5667 pm_runtime_enable(&pdev->dev);
5668 }
5669 pm_schedule_suspend(&pdev->dev, MSEC_PER_SEC);
5670
bc7f75fa
AK		 5671 return 0;
5672
5673err_register:
c43bc57e
JB		 5674 if (!(adapter->flags & FLAG_HAS_AMT))
5675 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5676err_eeprom:
5677 if (!e1000_check_reset_block(&adapter->hw))
5678 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5679err_hw_init:
bc7f75fa 5680
bc7f75fa
AK		 5681 kfree(adapter->tx_ring);
5682 kfree(adapter->rx_ring);
5683err_sw_init:
c43bc57e
JB		 5684 if (adapter->hw.flash_address)
5685 iounmap(adapter->hw.flash_address);
e82f54ba 5686 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5687err_flashmap:
bc7f75fa
AK		 5688 iounmap(adapter->hw.hw_addr);
5689err_ioremap:
5690 free_netdev(netdev);
5691err_alloc_etherdev:
f0f422e5
BA		 5692 pci_release_selected_regions(pdev,
5693 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5694err_pci_reg:
5695err_dma:
5696 pci_disable_device(pdev);
5697 return err;
5698}
5699
5700/**
5701 * e1000_remove - Device Removal Routine
5702 * @pdev: PCI device information struct
5703 *
5704 * e1000_remove is called by the PCI subsystem to alert the driver
5705 * that it should release a PCI device. The could be caused by a
5706 * Hot-Plug event, or because the driver is going to be removed from
5707 * memory.
5708 **/
5709static void __devexit e1000_remove(struct pci_dev *pdev)
5710{
5711 struct net_device *netdev = pci_get_drvdata(pdev);
5712 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 5713 bool down = test_bit(__E1000_DOWN, &adapter->state);
5714
5715 pm_runtime_get_sync(&pdev->dev);
bc7f75fa 5716
ad68076e
BA		 5717 /*
5718 * flush_scheduled work may reschedule our watchdog task, so
5719 * explicitly disable watchdog tasks from being rescheduled
5720 */
23606cf5
RW		 5721 if (!down)
5722 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 5723 del_timer_sync(&adapter->watchdog_timer);
5724 del_timer_sync(&adapter->phy_info_timer);
5725
41cec6f1
BA		 5726 cancel_work_sync(&adapter->reset_task);
5727 cancel_work_sync(&adapter->watchdog_task);
5728 cancel_work_sync(&adapter->downshift_task);
5729 cancel_work_sync(&adapter->update_phy_task);
5730 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5731 flush_scheduled_work();
5732
17f208de
BA		 5733 if (!(netdev->flags & IFF_UP))
5734 e1000_power_down_phy(adapter);
5735
23606cf5
RW		 5736 /* Don't lie to e1000_close() down the road. */
5737 if (!down)
5738 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 5739 unregister_netdev(netdev);
5740
23606cf5
RW		 5741 if (pci_dev_run_wake(pdev)) {
5742 pm_runtime_disable(&pdev->dev);
5743 pm_runtime_set_suspended(&pdev->dev);
5744 }
5745 pm_runtime_put_noidle(&pdev->dev);
5746
ad68076e
BA		 5747 /*
5748 * Release control of h/w to f/w. If f/w is AMT enabled, this
5749 * would have already happened in close and is redundant.
5750 */
bc7f75fa
AK		 5751 e1000_release_hw_control(adapter);
5752
4662e82b 5753 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5754 kfree(adapter->tx_ring);
5755 kfree(adapter->rx_ring);
5756
5757 iounmap(adapter->hw.hw_addr);
5758 if (adapter->hw.flash_address)
5759 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5760 pci_release_selected_regions(pdev,
5761 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5762
5763 free_netdev(netdev);
5764
111b9dc5 5765 /* AER disable */
19d5afd4 5766 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5767
bc7f75fa
AK		 5768 pci_disable_device(pdev);
5769}
5770
5771/* PCI Error Recovery (ERS) */
5772static struct pci_error_handlers e1000_err_handler = {
5773 .error_detected = e1000_io_error_detected,
5774 .slot_reset = e1000_io_slot_reset,
5775 .resume = e1000_io_resume,
5776};
5777
a3aa1884 5778static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 5779 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5780 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5781 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5782 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5783 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5784 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5785 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5786 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5787 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5788
bc7f75fa
AK		 5789 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5790 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5791 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5792 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5793
bc7f75fa
AK		 5794 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5795 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5796 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5797
4662e82b 5798 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5799 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5800 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5801
bc7f75fa
AK		 5802 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5803 board_80003es2lan },
5804 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5805 board_80003es2lan },
5806 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5807 board_80003es2lan },
5808 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5809 board_80003es2lan },
ad68076e 5810
bc7f75fa
AK		 5811 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5812 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5813 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5814 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5815 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5816 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5817 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5818 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5819
bc7f75fa
AK		 5820 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5821 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5822 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5823 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5824 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5825 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5826 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5827 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5828 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5829
5830 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5831 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5832 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5833
f4187b56
BA		 5834 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5835 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5836
a4f58f54
BA		 5837 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5838 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5839 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5840 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5841
bc7f75fa
AK		 5842 { } /* terminate list */
5843};
5844MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5845
a0340162 5846#ifdef CONFIG_PM_OPS
23606cf5 5847static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 5848 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
5849 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
5850 e1000_runtime_resume, e1000_idle)
23606cf5 5851};
e50208a0 5852#endif
23606cf5 5853
bc7f75fa
AK		 5854/* PCI Device API Driver */
5855static struct pci_driver e1000_driver = {
5856 .name = e1000e_driver_name,
5857 .id_table = e1000_pci_tbl,
5858 .probe = e1000_probe,
5859 .remove = __devexit_p(e1000_remove),
a0340162 5860#ifdef CONFIG_PM_OPS
23606cf5 5861 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 5862#endif
5863 .shutdown = e1000_shutdown,
5864 .err_handler = &e1000_err_handler
5865};
5866
5867/**
5868 * e1000_init_module - Driver Registration Routine
5869 *
5870 * e1000_init_module is the first routine called when the driver is
5871 * loaded. All it does is register with the PCI subsystem.
5872 **/
5873static int __init e1000_init_module(void)
5874{
5875 int ret;
8544b9f7
BA		 5876 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
5877 e1000e_driver_version);
5878 pr_info("Copyright (c) 1999 - 2009 Intel Corporation.\n");
bc7f75fa 5879 ret = pci_register_driver(&e1000_driver);
53ec5498 5880
bc7f75fa
AK		 5881 return ret;
5882}
5883module_init(e1000_init_module);
5884
5885/**
5886 * e1000_exit_module - Driver Exit Cleanup Routine
5887 *
5888 * e1000_exit_module is called just before the driver is removed
5889 * from memory.
5890 **/
5891static void __exit e1000_exit_module(void)
5892{
5893 pci_unregister_driver(&e1000_driver);
5894}
5895module_exit(e1000_exit_module);
5896
5897
5898MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5899MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5900MODULE_LICENSE("GPL");
5901MODULE_VERSION(DRV_VERSION);
5902
5903/* e1000_main.c */
Clone of davem's net-next-2.6 tree