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[net-next-2.6.git] / drivers / mmc / host / cb710-mmc.c
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1/*
2 * cb710/mmc.c
3 *
4 * Copyright by Michał Mirosław, 2008-2009
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/kernel.h>
11#include <linux/module.h>
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12#include <linux/pci.h>
13#include <linux/delay.h>
14#include "cb710-mmc.h"
15
16static const u8 cb710_clock_divider_log2[8] = {
17/* 1, 2, 4, 8, 16, 32, 128, 512 */
18 0, 1, 2, 3, 4, 5, 7, 9
19};
20#define CB710_MAX_DIVIDER_IDX \
21 (ARRAY_SIZE(cb710_clock_divider_log2) - 1)
22
23static const u8 cb710_src_freq_mhz[16] = {
24 33, 10, 20, 25, 30, 35, 40, 45,
25 50, 55, 60, 65, 70, 75, 80, 85
26};
27
28static void cb710_mmc_set_clock(struct mmc_host *mmc, int hz)
29{
30 struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
31 struct pci_dev *pdev = cb710_slot_to_chip(slot)->pdev;
32 u32 src_freq_idx;
33 u32 divider_idx;
34 int src_hz;
35
36 /* this is magic, unverifiable for me, unless I get
37 * MMC card with cables connected to bus signals */
38 pci_read_config_dword(pdev, 0x48, &src_freq_idx);
39 src_freq_idx = (src_freq_idx >> 16) & 0xF;
40 src_hz = cb710_src_freq_mhz[src_freq_idx] * 1000000;
41
42 for (divider_idx = 0; divider_idx < CB710_MAX_DIVIDER_IDX; ++divider_idx) {
43 if (hz >= src_hz >> cb710_clock_divider_log2[divider_idx])
44 break;
45 }
46
47 if (src_freq_idx)
48 divider_idx |= 0x8;
49
50 cb710_pci_update_config_reg(pdev, 0x40, ~0xF0000000, divider_idx << 28);
51
52 dev_dbg(cb710_slot_dev(slot),
53 "clock set to %d Hz, wanted %d Hz; flag = %d\n",
54 src_hz >> cb710_clock_divider_log2[divider_idx & 7],
55 hz, (divider_idx & 8) != 0);
56}
57
58static void __cb710_mmc_enable_irq(struct cb710_slot *slot,
59 unsigned short enable, unsigned short mask)
60{
61 /* clear global IE
62 * - it gets set later if any interrupt sources are enabled */
63 mask |= CB710_MMC_IE_IRQ_ENABLE;
64
65 /* look like interrupt is fired whenever
66 * WORD[0x0C] & WORD[0x10] != 0;
67 * -> bit 15 port 0x0C seems to be global interrupt enable
68 */
69
70 enable = (cb710_read_port_16(slot, CB710_MMC_IRQ_ENABLE_PORT)
71 & ~mask) | enable;
72
73 if (enable)
74 enable |= CB710_MMC_IE_IRQ_ENABLE;
75
76 cb710_write_port_16(slot, CB710_MMC_IRQ_ENABLE_PORT, enable);
77}
78
79static void cb710_mmc_enable_irq(struct cb710_slot *slot,
80 unsigned short enable, unsigned short mask)
81{
82 struct cb710_mmc_reader *reader = mmc_priv(cb710_slot_to_mmc(slot));
83 unsigned long flags;
84
85 spin_lock_irqsave(&reader->irq_lock, flags);
86 /* this is the only thing irq_lock protects */
87 __cb710_mmc_enable_irq(slot, enable, mask);
88 spin_unlock_irqrestore(&reader->irq_lock, flags);
89}
90
91static void cb710_mmc_reset_events(struct cb710_slot *slot)
92{
93 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, 0xFF);
94 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, 0xFF);
95 cb710_write_port_8(slot, CB710_MMC_STATUS2_PORT, 0xFF);
96}
97
98static int cb710_mmc_is_card_inserted(struct cb710_slot *slot)
99{
100 return cb710_read_port_8(slot, CB710_MMC_STATUS3_PORT)
101 & CB710_MMC_S3_CARD_DETECTED;
102}
103
104static void cb710_mmc_enable_4bit_data(struct cb710_slot *slot, int enable)
105{
106 dev_dbg(cb710_slot_dev(slot), "configuring %d-data-line%s mode\n",
107 enable ? 4 : 1, enable ? "s" : "");
108 if (enable)
109 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT,
110 CB710_MMC_C1_4BIT_DATA_BUS, 0);
111 else
112 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT,
113 0, CB710_MMC_C1_4BIT_DATA_BUS);
114}
115
116static int cb710_check_event(struct cb710_slot *slot, u8 what)
117{
118 u16 status;
119
120 status = cb710_read_port_16(slot, CB710_MMC_STATUS_PORT);
121
122 if (status & CB710_MMC_S0_FIFO_UNDERFLOW) {
123 /* it is just a guess, so log it */
124 dev_dbg(cb710_slot_dev(slot),
125 "CHECK : ignoring bit 6 in status %04X\n", status);
126 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT,
127 CB710_MMC_S0_FIFO_UNDERFLOW);
128 status &= ~CB710_MMC_S0_FIFO_UNDERFLOW;
129 }
130
131 if (status & CB710_MMC_STATUS_ERROR_EVENTS) {
132 dev_dbg(cb710_slot_dev(slot),
133 "CHECK : returning EIO on status %04X\n", status);
134 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, status & 0xFF);
135 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT,
136 CB710_MMC_S1_RESET);
137 return -EIO;
138 }
139
140 /* 'what' is a bit in MMC_STATUS1 */
141 if ((status >> 8) & what) {
142 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, what);
143 return 1;
144 }
145
146 return 0;
147}
148
149static int cb710_wait_for_event(struct cb710_slot *slot, u8 what)
150{
151 int err = 0;
152 unsigned limit = 2000000; /* FIXME: real timeout */
153
154#ifdef CONFIG_CB710_DEBUG
155 u32 e, x;
156 e = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
157#endif
158
159 while (!(err = cb710_check_event(slot, what))) {
160 if (!--limit) {
161 cb710_dump_regs(cb710_slot_to_chip(slot),
162 CB710_DUMP_REGS_MMC);
163 err = -ETIMEDOUT;
164 break;
165 }
166 udelay(1);
167 }
168
169#ifdef CONFIG_CB710_DEBUG
170 x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
171
172 limit = 2000000 - limit;
173 if (limit > 100)
174 dev_dbg(cb710_slot_dev(slot),
175 "WAIT10: waited %d loops, what %d, entry val %08X, exit val %08X\n",
176 limit, what, e, x);
177#endif
178 return err < 0 ? err : 0;
179}
180
181
182static int cb710_wait_while_busy(struct cb710_slot *slot, uint8_t mask)
183{
184 unsigned limit = 500000; /* FIXME: real timeout */
185 int err = 0;
186
187#ifdef CONFIG_CB710_DEBUG
188 u32 e, x;
189 e = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
190#endif
191
192 while (cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) & mask) {
193 if (!--limit) {
194 cb710_dump_regs(cb710_slot_to_chip(slot),
195 CB710_DUMP_REGS_MMC);
196 err = -ETIMEDOUT;
197 break;
198 }
199 udelay(1);
200 }
201
202#ifdef CONFIG_CB710_DEBUG
203 x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
204
205 limit = 500000 - limit;
206 if (limit > 100)
207 dev_dbg(cb710_slot_dev(slot),
208 "WAIT12: waited %d loops, mask %02X, entry val %08X, exit val %08X\n",
209 limit, mask, e, x);
210#endif
211 return 0;
212}
213
214static void cb710_mmc_set_transfer_size(struct cb710_slot *slot,
215 size_t count, size_t blocksize)
216{
217 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
218 cb710_write_port_32(slot, CB710_MMC_TRANSFER_SIZE_PORT,
219 ((count - 1) << 16)|(blocksize - 1));
220
09adfe45 221 dev_vdbg(cb710_slot_dev(slot), "set up for %zu block%s of %zu bytes\n",
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222 count, count == 1 ? "" : "s", blocksize);
223}
224
225static void cb710_mmc_fifo_hack(struct cb710_slot *slot)
226{
227 /* without this, received data is prepended with 8-bytes of zeroes */
228 u32 r1, r2;
229 int ok = 0;
230
231 r1 = cb710_read_port_32(slot, CB710_MMC_DATA_PORT);
232 r2 = cb710_read_port_32(slot, CB710_MMC_DATA_PORT);
233 if (cb710_read_port_8(slot, CB710_MMC_STATUS0_PORT)
234 & CB710_MMC_S0_FIFO_UNDERFLOW) {
235 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT,
236 CB710_MMC_S0_FIFO_UNDERFLOW);
237 ok = 1;
238 }
239
240 dev_dbg(cb710_slot_dev(slot),
241 "FIFO-read-hack: expected STATUS0 bit was %s\n",
242 ok ? "set." : "NOT SET!");
243 dev_dbg(cb710_slot_dev(slot),
244 "FIFO-read-hack: dwords ignored: %08X %08X - %s\n",
245 r1, r2, (r1|r2) ? "BAD (NOT ZERO)!" : "ok");
246}
247
248static int cb710_mmc_receive_pio(struct cb710_slot *slot,
249 struct sg_mapping_iter *miter, size_t dw_count)
250{
251 if (!(cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) & CB710_MMC_S2_FIFO_READY)) {
252 int err = cb710_wait_for_event(slot,
253 CB710_MMC_S1_PIO_TRANSFER_DONE);
254 if (err)
255 return err;
256 }
257
258 cb710_sg_dwiter_write_from_io(miter,
259 slot->iobase + CB710_MMC_DATA_PORT, dw_count);
260
261 return 0;
262}
263
264static bool cb710_is_transfer_size_supported(struct mmc_data *data)
265{
266 return !(data->blksz & 15 && (data->blocks != 1 || data->blksz != 8));
267}
268
269static int cb710_mmc_receive(struct cb710_slot *slot, struct mmc_data *data)
270{
271 struct sg_mapping_iter miter;
272 size_t len, blocks = data->blocks;
273 int err = 0;
274
275 /* TODO: I don't know how/if the hardware handles non-16B-boundary blocks
276 * except single 8B block */
277 if (unlikely(data->blksz & 15 && (data->blocks != 1 || data->blksz != 8)))
278 return -EINVAL;
279
4b2a108c 280 sg_miter_start(&miter, data->sg, data->sg_len, SG_MITER_TO_SG);
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281
282 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
283 15, CB710_MMC_C2_READ_PIO_SIZE_MASK);
284
285 cb710_mmc_fifo_hack(slot);
286
287 while (blocks-- > 0) {
288 len = data->blksz;
289
290 while (len >= 16) {
291 err = cb710_mmc_receive_pio(slot, &miter, 4);
292 if (err)
293 goto out;
294 len -= 16;
295 }
296
297 if (!len)
298 continue;
299
300 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
301 len - 1, CB710_MMC_C2_READ_PIO_SIZE_MASK);
302
303 len = (len >= 8) ? 4 : 2;
304 err = cb710_mmc_receive_pio(slot, &miter, len);
305 if (err)
306 goto out;
307 }
308out:
4b2a108c 309 sg_miter_stop(&miter);
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310 return err;
311}
312
313static int cb710_mmc_send(struct cb710_slot *slot, struct mmc_data *data)
314{
315 struct sg_mapping_iter miter;
316 size_t len, blocks = data->blocks;
317 int err = 0;
318
319 /* TODO: I don't know how/if the hardware handles multiple
320 * non-16B-boundary blocks */
321 if (unlikely(data->blocks > 1 && data->blksz & 15))
322 return -EINVAL;
323
4b2a108c 324 sg_miter_start(&miter, data->sg, data->sg_len, SG_MITER_FROM_SG);
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325
326 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
327 0, CB710_MMC_C2_READ_PIO_SIZE_MASK);
328
329 while (blocks-- > 0) {
330 len = (data->blksz + 15) >> 4;
331 do {
332 if (!(cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT)
333 & CB710_MMC_S2_FIFO_EMPTY)) {
334 err = cb710_wait_for_event(slot,
335 CB710_MMC_S1_PIO_TRANSFER_DONE);
336 if (err)
337 goto out;
338 }
339 cb710_sg_dwiter_read_to_io(&miter,
340 slot->iobase + CB710_MMC_DATA_PORT, 4);
341 } while (--len);
342 }
343out:
344 sg_miter_stop(&miter);
345 return err;
346}
347
348static u16 cb710_encode_cmd_flags(struct cb710_mmc_reader *reader,
349 struct mmc_command *cmd)
350{
351 unsigned int flags = cmd->flags;
352 u16 cb_flags = 0;
353
354 /* Windows driver returned 0 for commands for which no response
355 * is expected. It happened that there were only two such commands
356 * used: MMC_GO_IDLE_STATE and MMC_GO_INACTIVE_STATE so it might
357 * as well be a bug in that driver.
358 *
359 * Original driver set bit 14 for MMC/SD application
360 * commands. There's no difference 'on the wire' and
361 * it apparently works without it anyway.
362 */
363
364 switch (flags & MMC_CMD_MASK) {
365 case MMC_CMD_AC: cb_flags = CB710_MMC_CMD_AC; break;
366 case MMC_CMD_ADTC: cb_flags = CB710_MMC_CMD_ADTC; break;
367 case MMC_CMD_BC: cb_flags = CB710_MMC_CMD_BC; break;
368 case MMC_CMD_BCR: cb_flags = CB710_MMC_CMD_BCR; break;
369 }
370
371 if (flags & MMC_RSP_BUSY)
372 cb_flags |= CB710_MMC_RSP_BUSY;
373
374 cb_flags |= cmd->opcode << CB710_MMC_CMD_CODE_SHIFT;
375
376 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
377 cb_flags |= CB710_MMC_DATA_READ;
378
379 if (flags & MMC_RSP_PRESENT) {
380 /* Windows driver set 01 at bits 4,3 except for
381 * MMC_SET_BLOCKLEN where it set 10. Maybe the
382 * hardware can do something special about this
383 * command? The original driver looks buggy/incomplete
384 * anyway so we ignore this for now.
385 *
386 * I assume that 00 here means no response is expected.
387 */
388 cb_flags |= CB710_MMC_RSP_PRESENT;
389
390 if (flags & MMC_RSP_136)
391 cb_flags |= CB710_MMC_RSP_136;
392 if (!(flags & MMC_RSP_CRC))
393 cb_flags |= CB710_MMC_RSP_NO_CRC;
394 }
395
396 return cb_flags;
397}
398
399static void cb710_receive_response(struct cb710_slot *slot,
400 struct mmc_command *cmd)
401{
402 unsigned rsp_opcode, wanted_opcode;
403
404 /* Looks like final byte with CRC is always stripped (same as SDHCI) */
405 if (cmd->flags & MMC_RSP_136) {
406 u32 resp[4];
407
408 resp[0] = cb710_read_port_32(slot, CB710_MMC_RESPONSE3_PORT);
409 resp[1] = cb710_read_port_32(slot, CB710_MMC_RESPONSE2_PORT);
410 resp[2] = cb710_read_port_32(slot, CB710_MMC_RESPONSE1_PORT);
411 resp[3] = cb710_read_port_32(slot, CB710_MMC_RESPONSE0_PORT);
412 rsp_opcode = resp[0] >> 24;
413
414 cmd->resp[0] = (resp[0] << 8)|(resp[1] >> 24);
415 cmd->resp[1] = (resp[1] << 8)|(resp[2] >> 24);
416 cmd->resp[2] = (resp[2] << 8)|(resp[3] >> 24);
417 cmd->resp[3] = (resp[3] << 8);
418 } else {
419 rsp_opcode = cb710_read_port_32(slot, CB710_MMC_RESPONSE1_PORT) & 0x3F;
420 cmd->resp[0] = cb710_read_port_32(slot, CB710_MMC_RESPONSE0_PORT);
421 }
422
423 wanted_opcode = (cmd->flags & MMC_RSP_OPCODE) ? cmd->opcode : 0x3F;
424 if (rsp_opcode != wanted_opcode)
425 cmd->error = -EILSEQ;
426}
427
428static int cb710_mmc_transfer_data(struct cb710_slot *slot,
429 struct mmc_data *data)
430{
431 int error, to;
432
433 if (data->flags & MMC_DATA_READ)
434 error = cb710_mmc_receive(slot, data);
435 else
436 error = cb710_mmc_send(slot, data);
437
438 to = cb710_wait_for_event(slot, CB710_MMC_S1_DATA_TRANSFER_DONE);
439 if (!error)
440 error = to;
441
442 if (!error)
443 data->bytes_xfered = data->blksz * data->blocks;
444 return error;
445}
446
447static int cb710_mmc_command(struct mmc_host *mmc, struct mmc_command *cmd)
448{
449 struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
450 struct cb710_mmc_reader *reader = mmc_priv(mmc);
451 struct mmc_data *data = cmd->data;
452
453 u16 cb_cmd = cb710_encode_cmd_flags(reader, cmd);
454 dev_dbg(cb710_slot_dev(slot), "cmd request: 0x%04X\n", cb_cmd);
455
456 if (data) {
457 if (!cb710_is_transfer_size_supported(data)) {
458 data->error = -EINVAL;
459 return -1;
460 }
461 cb710_mmc_set_transfer_size(slot, data->blocks, data->blksz);
462 }
463
464 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20|CB710_MMC_S2_BUSY_10);
465 cb710_write_port_16(slot, CB710_MMC_CMD_TYPE_PORT, cb_cmd);
466 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
467 cb710_write_port_32(slot, CB710_MMC_CMD_PARAM_PORT, cmd->arg);
468 cb710_mmc_reset_events(slot);
469 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
470 cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x01, 0);
471
472 cmd->error = cb710_wait_for_event(slot, CB710_MMC_S1_COMMAND_SENT);
473 if (cmd->error)
474 return -1;
475
476 if (cmd->flags & MMC_RSP_PRESENT) {
477 cb710_receive_response(slot, cmd);
478 if (cmd->error)
479 return -1;
480 }
481
482 if (data)
483 data->error = cb710_mmc_transfer_data(slot, data);
484 return 0;
485}
486
487static void cb710_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
488{
489 struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
490 struct cb710_mmc_reader *reader = mmc_priv(mmc);
491
492 WARN_ON(reader->mrq != NULL);
493
494 reader->mrq = mrq;
495 cb710_mmc_enable_irq(slot, CB710_MMC_IE_TEST_MASK, 0);
496
497 if (cb710_mmc_is_card_inserted(slot)) {
498 if (!cb710_mmc_command(mmc, mrq->cmd) && mrq->stop)
499 cb710_mmc_command(mmc, mrq->stop);
500 mdelay(1);
501 } else {
502 mrq->cmd->error = -ENOMEDIUM;
503 }
504
505 tasklet_schedule(&reader->finish_req_tasklet);
506}
507
508static int cb710_mmc_powerup(struct cb710_slot *slot)
509{
510#ifdef CONFIG_CB710_DEBUG
511 struct cb710_chip *chip = cb710_slot_to_chip(slot);
512#endif
513 int err;
514
515 /* a lot of magic; see comment in cb710_mmc_set_clock() */
516 dev_dbg(cb710_slot_dev(slot), "bus powerup\n");
517 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
518 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
519 if (unlikely(err))
520 return err;
521 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x80, 0);
522 cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0x80, 0);
523 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
524 mdelay(1);
525 dev_dbg(cb710_slot_dev(slot), "after delay 1\n");
526 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
527 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
528 if (unlikely(err))
529 return err;
530 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x09, 0);
531 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
532 mdelay(1);
533 dev_dbg(cb710_slot_dev(slot), "after delay 2\n");
534 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
535 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
536 if (unlikely(err))
537 return err;
538 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0, 0x08);
539 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
540 mdelay(2);
541 dev_dbg(cb710_slot_dev(slot), "after delay 3\n");
542 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
543 cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x06, 0);
544 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x70, 0);
545 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 0x80, 0);
546 cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0x03, 0);
547 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
548 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
549 if (unlikely(err))
550 return err;
551 /* This port behaves weird: quick byte reads of 0x08,0x09 return
552 * 0xFF,0x00 after writing 0xFFFF to 0x08; it works correctly when
553 * read/written from userspace... What am I missing here?
554 * (it doesn't depend on write-to-read delay) */
555 cb710_write_port_16(slot, CB710_MMC_CONFIGB_PORT, 0xFFFF);
556 cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x06, 0);
557 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
558 dev_dbg(cb710_slot_dev(slot), "bus powerup finished\n");
559
560 return cb710_check_event(slot, 0);
561}
562
563static void cb710_mmc_powerdown(struct cb710_slot *slot)
564{
565 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0, 0x81);
566 cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0, 0x80);
567}
568
569static void cb710_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
570{
571 struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
572 struct cb710_mmc_reader *reader = mmc_priv(mmc);
573 int err;
574
575 cb710_mmc_set_clock(mmc, ios->clock);
576
577 if (!cb710_mmc_is_card_inserted(slot)) {
578 dev_dbg(cb710_slot_dev(slot),
579 "no card inserted - ignoring bus powerup request\n");
580 ios->power_mode = MMC_POWER_OFF;
581 }
582
583 if (ios->power_mode != reader->last_power_mode)
584 switch (ios->power_mode) {
585 case MMC_POWER_ON:
586 err = cb710_mmc_powerup(slot);
587 if (err) {
588 dev_warn(cb710_slot_dev(slot),
589 "powerup failed (%d)- retrying\n", err);
590 cb710_mmc_powerdown(slot);
591 udelay(1);
592 err = cb710_mmc_powerup(slot);
593 if (err)
594 dev_warn(cb710_slot_dev(slot),
595 "powerup retry failed (%d) - expect errors\n",
596 err);
597 }
598 reader->last_power_mode = MMC_POWER_ON;
599 break;
600 case MMC_POWER_OFF:
601 cb710_mmc_powerdown(slot);
602 reader->last_power_mode = MMC_POWER_OFF;
603 break;
604 case MMC_POWER_UP:
605 default:
606 /* ignore */;
607 }
608
609 cb710_mmc_enable_4bit_data(slot, ios->bus_width != MMC_BUS_WIDTH_1);
610
611 cb710_mmc_enable_irq(slot, CB710_MMC_IE_TEST_MASK, 0);
612}
613
614static int cb710_mmc_get_ro(struct mmc_host *mmc)
615{
616 struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
617
618 return cb710_read_port_8(slot, CB710_MMC_STATUS3_PORT)
619 & CB710_MMC_S3_WRITE_PROTECTED;
620}
621
622static int cb710_mmc_irq_handler(struct cb710_slot *slot)
623{
624 struct mmc_host *mmc = cb710_slot_to_mmc(slot);
625 struct cb710_mmc_reader *reader = mmc_priv(mmc);
626 u32 status, config1, config2, irqen;
627
628 status = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
629 irqen = cb710_read_port_32(slot, CB710_MMC_IRQ_ENABLE_PORT);
630 config2 = cb710_read_port_32(slot, CB710_MMC_CONFIGB_PORT);
631 config1 = cb710_read_port_32(slot, CB710_MMC_CONFIG_PORT);
632
633 dev_dbg(cb710_slot_dev(slot), "interrupt; status: %08X, "
634 "ie: %08X, c2: %08X, c1: %08X\n",
635 status, irqen, config2, config1);
636
637 if (status & (CB710_MMC_S1_CARD_CHANGED << 8)) {
638 /* ack the event */
639 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT,
640 CB710_MMC_S1_CARD_CHANGED);
641 if ((irqen & CB710_MMC_IE_CISTATUS_MASK)
642 == CB710_MMC_IE_CISTATUS_MASK)
643 mmc_detect_change(mmc, HZ/5);
644 } else {
645 dev_dbg(cb710_slot_dev(slot), "unknown interrupt (test)\n");
646 spin_lock(&reader->irq_lock);
647 __cb710_mmc_enable_irq(slot, 0, CB710_MMC_IE_TEST_MASK);
648 spin_unlock(&reader->irq_lock);
649 }
650
651 return 1;
652}
653
654static void cb710_mmc_finish_request_tasklet(unsigned long data)
655{
656 struct mmc_host *mmc = (void *)data;
657 struct cb710_mmc_reader *reader = mmc_priv(mmc);
658 struct mmc_request *mrq = reader->mrq;
659
660 reader->mrq = NULL;
661 mmc_request_done(mmc, mrq);
662}
663
664static const struct mmc_host_ops cb710_mmc_host = {
665 .request = cb710_mmc_request,
666 .set_ios = cb710_mmc_set_ios,
667 .get_ro = cb710_mmc_get_ro
668};
669
670#ifdef CONFIG_PM
671
672static int cb710_mmc_suspend(struct platform_device *pdev, pm_message_t state)
673{
674 struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
675 struct mmc_host *mmc = cb710_slot_to_mmc(slot);
676 int err;
677
1a13f8fa 678 err = mmc_suspend_host(mmc);
5f5bac82
MM
679 if (err)
680 return err;
681
682 cb710_mmc_enable_irq(slot, 0, ~0);
683 return 0;
684}
685
686static int cb710_mmc_resume(struct platform_device *pdev)
687{
688 struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
689 struct mmc_host *mmc = cb710_slot_to_mmc(slot);
690
691 cb710_mmc_enable_irq(slot, 0, ~0);
692
693 return mmc_resume_host(mmc);
694}
695
696#endif /* CONFIG_PM */
697
698static int __devinit cb710_mmc_init(struct platform_device *pdev)
699{
700 struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
701 struct cb710_chip *chip = cb710_slot_to_chip(slot);
702 struct mmc_host *mmc;
703 struct cb710_mmc_reader *reader;
704 int err;
705 u32 val;
706
707 mmc = mmc_alloc_host(sizeof(*reader), cb710_slot_dev(slot));
708 if (!mmc)
709 return -ENOMEM;
710
711 dev_set_drvdata(&pdev->dev, mmc);
712
713 /* harmless (maybe) magic */
714 pci_read_config_dword(chip->pdev, 0x48, &val);
715 val = cb710_src_freq_mhz[(val >> 16) & 0xF];
716 dev_dbg(cb710_slot_dev(slot), "source frequency: %dMHz\n", val);
717 val *= 1000000;
718
719 mmc->ops = &cb710_mmc_host;
720 mmc->f_max = val;
721 mmc->f_min = val >> cb710_clock_divider_log2[CB710_MAX_DIVIDER_IDX];
722 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
723 mmc->caps = MMC_CAP_4_BIT_DATA;
724
725 reader = mmc_priv(mmc);
726
727 tasklet_init(&reader->finish_req_tasklet,
728 cb710_mmc_finish_request_tasklet, (unsigned long)mmc);
729 spin_lock_init(&reader->irq_lock);
730 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
731
732 cb710_mmc_enable_irq(slot, 0, ~0);
733 cb710_set_irq_handler(slot, cb710_mmc_irq_handler);
734
735 err = mmc_add_host(mmc);
736 if (unlikely(err))
737 goto err_free_mmc;
738
739 dev_dbg(cb710_slot_dev(slot), "mmc_hostname is %s\n",
740 mmc_hostname(mmc));
741
742 cb710_mmc_enable_irq(slot, CB710_MMC_IE_CARD_INSERTION_STATUS, 0);
743
744 return 0;
745
746err_free_mmc:
747 dev_dbg(cb710_slot_dev(slot), "mmc_add_host() failed: %d\n", err);
748
749 mmc_free_host(mmc);
750 return err;
751}
752
753static int __devexit cb710_mmc_exit(struct platform_device *pdev)
754{
755 struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
756 struct mmc_host *mmc = cb710_slot_to_mmc(slot);
757 struct cb710_mmc_reader *reader = mmc_priv(mmc);
758
759 cb710_mmc_enable_irq(slot, 0, CB710_MMC_IE_CARD_INSERTION_STATUS);
760
761 mmc_remove_host(mmc);
762
763 /* IRQs should be disabled now, but let's stay on the safe side */
764 cb710_mmc_enable_irq(slot, 0, ~0);
765 cb710_set_irq_handler(slot, NULL);
766
767 /* clear config ports - just in case */
768 cb710_write_port_32(slot, CB710_MMC_CONFIG_PORT, 0);
769 cb710_write_port_16(slot, CB710_MMC_CONFIGB_PORT, 0);
770
771 tasklet_kill(&reader->finish_req_tasklet);
772
773 mmc_free_host(mmc);
774 return 0;
775}
776
777static struct platform_driver cb710_mmc_driver = {
778 .driver.name = "cb710-mmc",
779 .probe = cb710_mmc_init,
780 .remove = __devexit_p(cb710_mmc_exit),
781#ifdef CONFIG_PM
782 .suspend = cb710_mmc_suspend,
783 .resume = cb710_mmc_resume,
784#endif
785};
786
787static int __init cb710_mmc_init_module(void)
788{
789 return platform_driver_register(&cb710_mmc_driver);
790}
791
792static void __exit cb710_mmc_cleanup_module(void)
793{
794 platform_driver_unregister(&cb710_mmc_driver);
795}
796
797module_init(cb710_mmc_init_module);
798module_exit(cb710_mmc_cleanup_module);
799
800MODULE_AUTHOR("Michał Mirosław <mirq-linux@rere.qmqm.pl>");
801MODULE_DESCRIPTION("ENE CB710 memory card reader driver - MMC/SD part");
802MODULE_LICENSE("GPL");
803MODULE_ALIAS("platform:cb710-mmc");