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1965aae3 PA |
1 | #ifndef _ASM_X86_IO_32_H |
2 | #define _ASM_X86_IO_32_H | |
1da177e4 | 3 | |
1da177e4 LT |
4 | #include <linux/string.h> |
5 | #include <linux/compiler.h> | |
6 | ||
7 | /* | |
8 | * This file contains the definitions for the x86 IO instructions | |
9 | * inb/inw/inl/outb/outw/outl and the "string versions" of the same | |
10 | * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" | |
11 | * versions of the single-IO instructions (inb_p/inw_p/..). | |
12 | * | |
13 | * This file is not meant to be obfuscating: it's just complicated | |
14 | * to (a) handle it all in a way that makes gcc able to optimize it | |
15 | * as well as possible and (b) trying to avoid writing the same thing | |
16 | * over and over again with slight variations and possibly making a | |
17 | * mistake somewhere. | |
18 | */ | |
19 | ||
20 | /* | |
21 | * Thanks to James van Artsdalen for a better timing-fix than | |
22 | * the two short jumps: using outb's to a nonexistent port seems | |
23 | * to guarantee better timings even on fast machines. | |
24 | * | |
25 | * On the other hand, I'd like to be sure of a non-existent port: | |
26 | * I feel a bit unsafe about using 0x80 (should be safe, though) | |
27 | * | |
28 | * Linus | |
29 | */ | |
30 | ||
31 | /* | |
32 | * Bit simplified and optimized by Jan Hubicka | |
33 | * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999. | |
34 | * | |
35 | * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added, | |
36 | * isa_read[wl] and isa_write[wl] fixed | |
37 | * - Arnaldo Carvalho de Melo <acme@conectiva.com.br> | |
38 | */ | |
39 | ||
1da177e4 LT |
40 | #ifdef __KERNEL__ |
41 | ||
42 | #include <asm-generic/iomap.h> | |
43 | ||
44 | #include <linux/vmalloc.h> | |
45 | ||
1da177e4 LT |
46 | /* |
47 | * Convert a virtual cached pointer to an uncached pointer | |
48 | */ | |
49 | #define xlate_dev_kmem_ptr(p) p | |
50 | ||
3c215b66 | 51 | static inline void |
6175ddf0 | 52 | memset_io(volatile void __iomem *addr, unsigned char val, size_t count) |
1da177e4 | 53 | { |
3c215b66 | 54 | memset((void __force *)addr, val, count); |
1da177e4 | 55 | } |
3c215b66 AM |
56 | |
57 | static inline void | |
6175ddf0 | 58 | memcpy_fromio(void *dst, const volatile void __iomem *src, size_t count) |
1da177e4 | 59 | { |
6175ddf0 | 60 | memcpy(dst, (const void __force *)src, count); |
1da177e4 | 61 | } |
3c215b66 AM |
62 | |
63 | static inline void | |
6175ddf0 | 64 | memcpy_toio(volatile void __iomem *dst, const void *src, size_t count) |
1da177e4 | 65 | { |
6175ddf0 | 66 | memcpy((void __force *)dst, src, count); |
1da177e4 LT |
67 | } |
68 | ||
69 | /* | |
70 | * ISA space is 'always mapped' on a typical x86 system, no need to | |
71 | * explicitly ioremap() it. The fact that the ISA IO space is mapped | |
72 | * to PAGE_OFFSET is pure coincidence - it does not mean ISA values | |
73 | * are physical addresses. The following constant pointer can be | |
74 | * used as the IO-area pointer (it can be iounmapped as well, so the | |
75 | * analogy with PCI is quite large): | |
76 | */ | |
77 | #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET)) | |
78 | ||
1da177e4 LT |
79 | /* |
80 | * Cache management | |
81 | * | |
82 | * This needed for two cases | |
83 | * 1. Out of order aware processors | |
84 | * 2. Accidentally out of order processors (PPro errata #51) | |
85 | */ | |
dcd215c9 | 86 | |
1da177e4 LT |
87 | #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE) |
88 | ||
89 | static inline void flush_write_buffers(void) | |
90 | { | |
dcd215c9 | 91 | asm volatile("lock; addl $0,0(%%esp)": : :"memory"); |
1da177e4 LT |
92 | } |
93 | ||
1da177e4 LT |
94 | #else |
95 | ||
622a9edd | 96 | #define flush_write_buffers() do { } while (0) |
1da177e4 LT |
97 | |
98 | #endif | |
99 | ||
100 | #endif /* __KERNEL__ */ | |
101 | ||
b02aae9c | 102 | extern void native_io_delay(void); |
90a0a06a | 103 | |
6e7c4025 IM |
104 | extern int io_delay_type; |
105 | extern void io_delay_init(void); | |
106 | ||
d3561b7f RR |
107 | #if defined(CONFIG_PARAVIRT) |
108 | #include <asm/paravirt.h> | |
1da177e4 | 109 | #else |
d3561b7f | 110 | |
dcd215c9 JP |
111 | static inline void slow_down_io(void) |
112 | { | |
90a0a06a | 113 | native_io_delay(); |
1da177e4 | 114 | #ifdef REALLY_SLOW_IO |
90a0a06a RR |
115 | native_io_delay(); |
116 | native_io_delay(); | |
117 | native_io_delay(); | |
1da177e4 | 118 | #endif |
1da177e4 LT |
119 | } |
120 | ||
d3561b7f RR |
121 | #endif |
122 | ||
dcd215c9 | 123 | #define BUILDIO(bwl, bw, type) \ |
bd2984e9 | 124 | static inline void out##bwl(unsigned type value, int port) \ |
dcd215c9 | 125 | { \ |
bd2984e9 | 126 | asm volatile("out" #bwl " %" #bw "0, %w1" \ |
dcd215c9 JP |
127 | : : "a"(value), "Nd"(port)); \ |
128 | } \ | |
129 | \ | |
bd2984e9 | 130 | static inline unsigned type in##bwl(int port) \ |
dcd215c9 JP |
131 | { \ |
132 | unsigned type value; \ | |
bd2984e9 | 133 | asm volatile("in" #bwl " %w1, %" #bw "0" \ |
dcd215c9 JP |
134 | : "=a"(value) : "Nd"(port)); \ |
135 | return value; \ | |
136 | } \ | |
137 | \ | |
dcd215c9 JP |
138 | static inline void out##bwl##_p(unsigned type value, int port) \ |
139 | { \ | |
140 | out##bwl(value, port); \ | |
141 | slow_down_io(); \ | |
142 | } \ | |
143 | \ | |
144 | static inline unsigned type in##bwl##_p(int port) \ | |
145 | { \ | |
146 | unsigned type value = in##bwl(port); \ | |
147 | slow_down_io(); \ | |
148 | return value; \ | |
149 | } \ | |
150 | \ | |
151 | static inline void outs##bwl(int port, const void *addr, unsigned long count) \ | |
152 | { \ | |
153 | asm volatile("rep; outs" #bwl \ | |
154 | : "+S"(addr), "+c"(count) : "d"(port)); \ | |
155 | } \ | |
156 | \ | |
157 | static inline void ins##bwl(int port, void *addr, unsigned long count) \ | |
158 | { \ | |
159 | asm volatile("rep; ins" #bwl \ | |
160 | : "+D"(addr), "+c"(count) : "d"(port)); \ | |
1da177e4 LT |
161 | } |
162 | ||
dcd215c9 JP |
163 | BUILDIO(b, b, char) |
164 | BUILDIO(w, w, short) | |
165 | BUILDIO(l, , int) | |
1da177e4 | 166 | |
1965aae3 | 167 | #endif /* _ASM_X86_IO_32_H */ |