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Commit | Line | Data |
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1394f032 | 1 | /* |
96f1050d | 2 | * Blackfin architecture-dependent process handling |
1394f032 | 3 | * |
96f1050d | 4 | * Copyright 2004-2009 Analog Devices Inc. |
1394f032 | 5 | * |
96f1050d | 6 | * Licensed under the GPL-2 or later |
1394f032 BW |
7 | */ |
8 | ||
9 | #include <linux/module.h> | |
10 | #include <linux/smp_lock.h> | |
11 | #include <linux/unistd.h> | |
12 | #include <linux/user.h> | |
1f83b8f1 | 13 | #include <linux/uaccess.h> |
5a0e3ad6 | 14 | #include <linux/slab.h> |
8b5f79f9 VM |
15 | #include <linux/sched.h> |
16 | #include <linux/tick.h> | |
d31c5ab1 BW |
17 | #include <linux/fs.h> |
18 | #include <linux/err.h> | |
1394f032 BW |
19 | |
20 | #include <asm/blackfin.h> | |
7adfb58f | 21 | #include <asm/fixed_code.h> |
dbc895f9 | 22 | #include <asm/mem_map.h> |
1394f032 | 23 | |
1394f032 BW |
24 | asmlinkage void ret_from_fork(void); |
25 | ||
26 | /* Points to the SDRAM backup memory for the stack that is currently in | |
27 | * L1 scratchpad memory. | |
28 | */ | |
29 | void *current_l1_stack_save; | |
30 | ||
31 | /* The number of tasks currently using a L1 stack area. The SRAM is | |
32 | * allocated/deallocated whenever this changes from/to zero. | |
33 | */ | |
34 | int nr_l1stack_tasks; | |
35 | ||
36 | /* Start and length of the area in L1 scratchpad memory which we've allocated | |
37 | * for process stacks. | |
38 | */ | |
39 | void *l1_stack_base; | |
40 | unsigned long l1_stack_len; | |
41 | ||
42 | /* | |
43 | * Powermanagement idle function, if any.. | |
44 | */ | |
45 | void (*pm_idle)(void) = NULL; | |
46 | EXPORT_SYMBOL(pm_idle); | |
47 | ||
48 | void (*pm_power_off)(void) = NULL; | |
49 | EXPORT_SYMBOL(pm_power_off); | |
50 | ||
1394f032 BW |
51 | /* |
52 | * The idle loop on BFIN | |
53 | */ | |
54 | #ifdef CONFIG_IDLE_L1 | |
8b5f79f9 | 55 | static void default_idle(void)__attribute__((l1_text)); |
1394f032 BW |
56 | void cpu_idle(void)__attribute__((l1_text)); |
57 | #endif | |
58 | ||
8b5f79f9 VM |
59 | /* |
60 | * This is our default idle handler. We need to disable | |
61 | * interrupts here to ensure we don't miss a wakeup call. | |
62 | */ | |
63 | static void default_idle(void) | |
1394f032 | 64 | { |
6a01f230 YL |
65 | #ifdef CONFIG_IPIPE |
66 | ipipe_suspend_domain(); | |
67 | #endif | |
68 | local_irq_disable_hw(); | |
8b5f79f9 VM |
69 | if (!need_resched()) |
70 | idle_with_irq_disabled(); | |
1394f032 | 71 | |
6a01f230 | 72 | local_irq_enable_hw(); |
8b5f79f9 | 73 | } |
1394f032 BW |
74 | |
75 | /* | |
8b5f79f9 VM |
76 | * The idle thread. We try to conserve power, while trying to keep |
77 | * overall latency low. The architecture specific idle is passed | |
78 | * a value to indicate the level of "idleness" of the system. | |
1394f032 BW |
79 | */ |
80 | void cpu_idle(void) | |
81 | { | |
82 | /* endless idle loop with no priority at all */ | |
83 | while (1) { | |
8b5f79f9 VM |
84 | void (*idle)(void) = pm_idle; |
85 | ||
86 | #ifdef CONFIG_HOTPLUG_CPU | |
87 | if (cpu_is_offline(smp_processor_id())) | |
88 | cpu_die(); | |
89 | #endif | |
90 | if (!idle) | |
91 | idle = default_idle; | |
b8f8c3cf | 92 | tick_nohz_stop_sched_tick(1); |
8b5f79f9 VM |
93 | while (!need_resched()) |
94 | idle(); | |
95 | tick_nohz_restart_sched_tick(); | |
1394f032 BW |
96 | preempt_enable_no_resched(); |
97 | schedule(); | |
98 | preempt_disable(); | |
99 | } | |
100 | } | |
101 | ||
1394f032 BW |
102 | /* |
103 | * This gets run with P1 containing the | |
104 | * function to call, and R1 containing | |
105 | * the "args". Note P0 is clobbered on the way here. | |
106 | */ | |
107 | void kernel_thread_helper(void); | |
108 | __asm__(".section .text\n" | |
109 | ".align 4\n" | |
110 | "_kernel_thread_helper:\n\t" | |
111 | "\tsp += -12;\n\t" | |
112 | "\tr0 = r1;\n\t" "\tcall (p1);\n\t" "\tcall _do_exit;\n" ".previous"); | |
113 | ||
114 | /* | |
115 | * Create a kernel thread. | |
116 | */ | |
117 | pid_t kernel_thread(int (*fn) (void *), void *arg, unsigned long flags) | |
118 | { | |
119 | struct pt_regs regs; | |
120 | ||
121 | memset(®s, 0, sizeof(regs)); | |
122 | ||
123 | regs.r1 = (unsigned long)arg; | |
124 | regs.p1 = (unsigned long)fn; | |
125 | regs.pc = (unsigned long)kernel_thread_helper; | |
126 | regs.orig_p0 = -1; | |
127 | /* Set bit 2 to tell ret_from_fork we should be returning to kernel | |
128 | mode. */ | |
129 | regs.ipend = 0x8002; | |
130 | __asm__ __volatile__("%0 = syscfg;":"=da"(regs.syscfg):); | |
131 | return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, | |
132 | NULL); | |
133 | } | |
fe8015ce | 134 | EXPORT_SYMBOL(kernel_thread); |
1394f032 | 135 | |
d5ce528c MF |
136 | /* |
137 | * Do necessary setup to start up a newly executed thread. | |
138 | * | |
139 | * pass the data segment into user programs if it exists, | |
140 | * it can't hurt anything as far as I can tell | |
141 | */ | |
142 | void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) | |
143 | { | |
144 | set_fs(USER_DS); | |
145 | regs->pc = new_ip; | |
146 | if (current->mm) | |
147 | regs->p5 = current->mm->start_data; | |
aa23531c | 148 | #ifndef CONFIG_SMP |
d5ce528c MF |
149 | task_thread_info(current)->l1_task_info.stack_start = |
150 | (void *)current->mm->context.stack_start; | |
151 | task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp; | |
152 | memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info, | |
153 | sizeof(*L1_SCRATCH_TASK_INFO)); | |
154 | #endif | |
155 | wrusp(new_sp); | |
156 | } | |
157 | EXPORT_SYMBOL_GPL(start_thread); | |
158 | ||
1394f032 BW |
159 | void flush_thread(void) |
160 | { | |
161 | } | |
162 | ||
163 | asmlinkage int bfin_vfork(struct pt_regs *regs) | |
164 | { | |
165 | return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL, | |
166 | NULL); | |
167 | } | |
168 | ||
169 | asmlinkage int bfin_clone(struct pt_regs *regs) | |
170 | { | |
171 | unsigned long clone_flags; | |
172 | unsigned long newsp; | |
173 | ||
8f65873e GY |
174 | #ifdef __ARCH_SYNC_CORE_DCACHE |
175 | if (current->rt.nr_cpus_allowed == num_possible_cpus()) { | |
176 | current->cpus_allowed = cpumask_of_cpu(smp_processor_id()); | |
177 | current->rt.nr_cpus_allowed = 1; | |
178 | } | |
179 | #endif | |
180 | ||
1394f032 BW |
181 | /* syscall2 puts clone_flags in r0 and usp in r1 */ |
182 | clone_flags = regs->r0; | |
183 | newsp = regs->r1; | |
184 | if (!newsp) | |
185 | newsp = rdusp(); | |
186 | else | |
187 | newsp -= 12; | |
188 | return do_fork(clone_flags, newsp, regs, 0, NULL, NULL); | |
189 | } | |
190 | ||
191 | int | |
6f2c55b8 | 192 | copy_thread(unsigned long clone_flags, |
1394f032 BW |
193 | unsigned long usp, unsigned long topstk, |
194 | struct task_struct *p, struct pt_regs *regs) | |
195 | { | |
196 | struct pt_regs *childregs; | |
197 | ||
198 | childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1; | |
199 | *childregs = *regs; | |
200 | childregs->r0 = 0; | |
201 | ||
202 | p->thread.usp = usp; | |
203 | p->thread.ksp = (unsigned long)childregs; | |
204 | p->thread.pc = (unsigned long)ret_from_fork; | |
205 | ||
206 | return 0; | |
207 | } | |
208 | ||
1394f032 BW |
209 | /* |
210 | * sys_execve() executes a new program. | |
211 | */ | |
d7627467 DH |
212 | asmlinkage int sys_execve(const char __user *name, |
213 | const char __user *const __user *argv, | |
214 | const char __user *const __user *envp) | |
1394f032 BW |
215 | { |
216 | int error; | |
217 | char *filename; | |
218 | struct pt_regs *regs = (struct pt_regs *)((&name) + 6); | |
219 | ||
1394f032 BW |
220 | filename = getname(name); |
221 | error = PTR_ERR(filename); | |
222 | if (IS_ERR(filename)) | |
25708a5f | 223 | return error; |
1394f032 BW |
224 | error = do_execve(filename, argv, envp, regs); |
225 | putname(filename); | |
1394f032 BW |
226 | return error; |
227 | } | |
228 | ||
229 | unsigned long get_wchan(struct task_struct *p) | |
230 | { | |
231 | unsigned long fp, pc; | |
232 | unsigned long stack_page; | |
233 | int count = 0; | |
234 | if (!p || p == current || p->state == TASK_RUNNING) | |
235 | return 0; | |
236 | ||
237 | stack_page = (unsigned long)p; | |
238 | fp = p->thread.usp; | |
239 | do { | |
240 | if (fp < stack_page + sizeof(struct thread_info) || | |
241 | fp >= 8184 + stack_page) | |
242 | return 0; | |
243 | pc = ((unsigned long *)fp)[1]; | |
244 | if (!in_sched_functions(pc)) | |
245 | return pc; | |
246 | fp = *(unsigned long *)fp; | |
247 | } | |
248 | while (count++ < 16); | |
249 | return 0; | |
250 | } | |
251 | ||
7adfb58f BS |
252 | void finish_atomic_sections (struct pt_regs *regs) |
253 | { | |
19d6d7d5 | 254 | int __user *up0 = (int __user *)regs->p0; |
0ddeeca2 | 255 | |
7adfb58f | 256 | switch (regs->pc) { |
2f5a0864 MF |
257 | default: |
258 | /* not in middle of an atomic step, so resume like normal */ | |
259 | return; | |
260 | ||
7adfb58f | 261 | case ATOMIC_XCHG32 + 2: |
0ddeeca2 | 262 | put_user(regs->r1, up0); |
7adfb58f BS |
263 | break; |
264 | ||
265 | case ATOMIC_CAS32 + 2: | |
266 | case ATOMIC_CAS32 + 4: | |
267 | if (regs->r0 == regs->r1) | |
92649494 | 268 | case ATOMIC_CAS32 + 6: |
0ddeeca2 | 269 | put_user(regs->r2, up0); |
7adfb58f | 270 | break; |
7adfb58f BS |
271 | |
272 | case ATOMIC_ADD32 + 2: | |
273 | regs->r0 = regs->r1 + regs->r0; | |
274 | /* fall through */ | |
275 | case ATOMIC_ADD32 + 4: | |
0ddeeca2 | 276 | put_user(regs->r0, up0); |
7adfb58f BS |
277 | break; |
278 | ||
279 | case ATOMIC_SUB32 + 2: | |
280 | regs->r0 = regs->r1 - regs->r0; | |
281 | /* fall through */ | |
282 | case ATOMIC_SUB32 + 4: | |
0ddeeca2 | 283 | put_user(regs->r0, up0); |
7adfb58f BS |
284 | break; |
285 | ||
286 | case ATOMIC_IOR32 + 2: | |
287 | regs->r0 = regs->r1 | regs->r0; | |
288 | /* fall through */ | |
289 | case ATOMIC_IOR32 + 4: | |
0ddeeca2 | 290 | put_user(regs->r0, up0); |
7adfb58f BS |
291 | break; |
292 | ||
293 | case ATOMIC_AND32 + 2: | |
294 | regs->r0 = regs->r1 & regs->r0; | |
295 | /* fall through */ | |
296 | case ATOMIC_AND32 + 4: | |
0ddeeca2 | 297 | put_user(regs->r0, up0); |
7adfb58f BS |
298 | break; |
299 | ||
300 | case ATOMIC_XOR32 + 2: | |
301 | regs->r0 = regs->r1 ^ regs->r0; | |
302 | /* fall through */ | |
303 | case ATOMIC_XOR32 + 4: | |
0ddeeca2 | 304 | put_user(regs->r0, up0); |
7adfb58f BS |
305 | break; |
306 | } | |
2f5a0864 MF |
307 | |
308 | /* | |
309 | * We've finished the atomic section, and the only thing left for | |
310 | * userspace is to do a RTS, so we might as well handle that too | |
311 | * since we need to update the PC anyways. | |
312 | */ | |
313 | regs->pc = regs->rets; | |
7adfb58f BS |
314 | } |
315 | ||
e56e03b0 MF |
316 | static inline |
317 | int in_mem(unsigned long addr, unsigned long size, | |
318 | unsigned long start, unsigned long end) | |
319 | { | |
320 | return addr >= start && addr + size <= end; | |
321 | } | |
322 | static inline | |
323 | int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off, | |
324 | unsigned long const_addr, unsigned long const_size) | |
325 | { | |
326 | return const_size && | |
327 | in_mem(addr, size, const_addr + off, const_addr + const_size); | |
328 | } | |
329 | static inline | |
330 | int in_mem_const(unsigned long addr, unsigned long size, | |
331 | unsigned long const_addr, unsigned long const_size) | |
332 | { | |
fb4b5d3a | 333 | return in_mem_const_off(addr, size, 0, const_addr, const_size); |
e56e03b0 | 334 | } |
13048f88 | 335 | #define ASYNC_ENABLED(bnum, bctlnum) \ |
e56e03b0 | 336 | ({ \ |
13048f88 BS |
337 | (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? 0 : \ |
338 | bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? 0 : \ | |
339 | 1; \ | |
e56e03b0 | 340 | }) |
13048f88 BS |
341 | /* |
342 | * We can't read EBIU banks that aren't enabled or we end up hanging | |
343 | * on the access to the async space. Make sure we validate accesses | |
344 | * that cross async banks too. | |
345 | * 0 - found, but unusable | |
346 | * 1 - found & usable | |
347 | * 2 - not found | |
348 | */ | |
349 | static | |
350 | int in_async(unsigned long addr, unsigned long size) | |
351 | { | |
352 | if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) { | |
353 | if (!ASYNC_ENABLED(0, 0)) | |
354 | return 0; | |
355 | if (addr + size <= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) | |
356 | return 1; | |
357 | size -= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE - addr; | |
358 | addr = ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE; | |
359 | } | |
360 | if (addr >= ASYNC_BANK1_BASE && addr < ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) { | |
361 | if (!ASYNC_ENABLED(1, 0)) | |
362 | return 0; | |
363 | if (addr + size <= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) | |
364 | return 1; | |
365 | size -= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE - addr; | |
366 | addr = ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE; | |
367 | } | |
368 | if (addr >= ASYNC_BANK2_BASE && addr < ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) { | |
369 | if (!ASYNC_ENABLED(2, 1)) | |
370 | return 0; | |
371 | if (addr + size <= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) | |
372 | return 1; | |
373 | size -= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE - addr; | |
374 | addr = ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE; | |
375 | } | |
376 | if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) { | |
377 | if (ASYNC_ENABLED(3, 1)) | |
378 | return 0; | |
379 | if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) | |
380 | return 1; | |
381 | return 0; | |
382 | } | |
383 | ||
384 | /* not within async bounds */ | |
385 | return 2; | |
386 | } | |
e56e03b0 MF |
387 | |
388 | int bfin_mem_access_type(unsigned long addr, unsigned long size) | |
389 | { | |
390 | int cpu = raw_smp_processor_id(); | |
391 | ||
392 | /* Check that things do not wrap around */ | |
393 | if (addr > ULONG_MAX - size) | |
394 | return -EFAULT; | |
395 | ||
396 | if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end)) | |
397 | return BFIN_MEM_ACCESS_CORE; | |
398 | ||
399 | if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH)) | |
400 | return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA; | |
401 | if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH)) | |
402 | return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT; | |
403 | if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH)) | |
404 | return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; | |
405 | if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH)) | |
406 | return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; | |
407 | #ifdef COREB_L1_CODE_START | |
fb4b5d3a | 408 | if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH)) |
e56e03b0 MF |
409 | return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA; |
410 | if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH)) | |
411 | return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT; | |
fb4b5d3a | 412 | if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH)) |
e56e03b0 | 413 | return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; |
fb4b5d3a | 414 | if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH)) |
e56e03b0 MF |
415 | return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; |
416 | #endif | |
417 | if (in_mem_const(addr, size, L2_START, L2_LENGTH)) | |
418 | return BFIN_MEM_ACCESS_CORE; | |
419 | ||
420 | if (addr >= SYSMMR_BASE) | |
421 | return BFIN_MEM_ACCESS_CORE_ONLY; | |
422 | ||
13048f88 BS |
423 | switch (in_async(addr, size)) { |
424 | case 0: return -EFAULT; | |
425 | case 1: return BFIN_MEM_ACCESS_CORE; | |
426 | case 2: /* fall through */; | |
427 | } | |
e56e03b0 MF |
428 | |
429 | if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH)) | |
430 | return BFIN_MEM_ACCESS_CORE; | |
431 | if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH)) | |
432 | return BFIN_MEM_ACCESS_DMA; | |
433 | ||
434 | return -EFAULT; | |
435 | } | |
436 | ||
1394f032 | 437 | #if defined(CONFIG_ACCESS_CHECK) |
a43b739f MF |
438 | #ifdef CONFIG_ACCESS_OK_L1 |
439 | __attribute__((l1_text)) | |
440 | #endif | |
b03b08ba | 441 | /* Return 1 if access to memory range is OK, 0 otherwise */ |
1394f032 BW |
442 | int _access_ok(unsigned long addr, unsigned long size) |
443 | { | |
13048f88 BS |
444 | int aret; |
445 | ||
bc41bb11 BS |
446 | if (size == 0) |
447 | return 1; | |
e56e03b0 MF |
448 | /* Check that things do not wrap around */ |
449 | if (addr > ULONG_MAX - size) | |
1394f032 | 450 | return 0; |
1f83b8f1 | 451 | if (segment_eq(get_fs(), KERNEL_DS)) |
1394f032 BW |
452 | return 1; |
453 | #ifdef CONFIG_MTD_UCLINUX | |
e56e03b0 MF |
454 | if (1) |
455 | #else | |
456 | if (0) | |
457 | #endif | |
458 | { | |
459 | if (in_mem(addr, size, memory_start, memory_end)) | |
460 | return 1; | |
461 | if (in_mem(addr, size, memory_mtd_end, physical_mem_end)) | |
462 | return 1; | |
463 | # ifndef CONFIG_ROMFS_ON_MTD | |
464 | if (0) | |
465 | # endif | |
466 | /* For XIP, allow user space to use pointers within the ROMFS. */ | |
467 | if (in_mem(addr, size, memory_mtd_start, memory_mtd_end)) | |
468 | return 1; | |
469 | } else { | |
470 | if (in_mem(addr, size, memory_start, physical_mem_end)) | |
471 | return 1; | |
472 | } | |
473 | ||
474 | if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end)) | |
1394f032 | 475 | return 1; |
d5adb029 | 476 | |
e56e03b0 | 477 | if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH)) |
d5adb029 | 478 | return 1; |
e56e03b0 | 479 | if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH)) |
1394f032 | 480 | return 1; |
e56e03b0 | 481 | if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH)) |
1394f032 | 482 | return 1; |
e56e03b0 | 483 | if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH)) |
1394f032 | 484 | return 1; |
e56e03b0 | 485 | #ifdef COREB_L1_CODE_START |
fb4b5d3a | 486 | if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH)) |
1394f032 | 487 | return 1; |
e56e03b0 | 488 | if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH)) |
1394f032 | 489 | return 1; |
fb4b5d3a | 490 | if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH)) |
1394f032 | 491 | return 1; |
fb4b5d3a | 492 | if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH)) |
b2c2f303 | 493 | return 1; |
1394f032 | 494 | #endif |
13048f88 BS |
495 | |
496 | aret = in_async(addr, size); | |
497 | if (aret < 2) | |
498 | return aret; | |
499 | ||
e56e03b0 MF |
500 | if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH)) |
501 | return 1; | |
502 | ||
503 | if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH)) | |
504 | return 1; | |
505 | if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH)) | |
506 | return 1; | |
507 | ||
1394f032 BW |
508 | return 0; |
509 | } | |
510 | EXPORT_SYMBOL(_access_ok); | |
511 | #endif /* CONFIG_ACCESS_CHECK */ |