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1394f032 | 1 | /* |
96f1050d RG |
2 | * Copyright 2004-2009 Analog Devices Inc. |
3 | * | |
4 | * Licensed under the GPL-2 or later. | |
1394f032 | 5 | */ |
96f1050d | 6 | |
1394f032 BW |
7 | #ifndef __ARCH_BLACKFIN_CACHE_H |
8 | #define __ARCH_BLACKFIN_CACHE_H | |
9 | ||
10 | /* | |
11 | * Bytes per L1 cache line | |
12 | * Blackfin loads 32 bytes for cache | |
13 | */ | |
14 | #define L1_CACHE_SHIFT 5 | |
15 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | |
16 | #define SMP_CACHE_BYTES L1_CACHE_BYTES | |
17 | ||
a6eb9fe1 | 18 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES |
76b99699 | 19 | |
6b3087c6 GY |
20 | #ifdef CONFIG_SMP |
21 | #define __cacheline_aligned | |
22 | #else | |
23 | #define ____cacheline_aligned | |
24 | ||
1394f032 BW |
25 | /* |
26 | * Put cacheline_aliged data to L1 data memory | |
27 | */ | |
28 | #ifdef CONFIG_CACHELINE_ALIGNED_L1 | |
29 | #define __cacheline_aligned \ | |
30 | __attribute__((__aligned__(L1_CACHE_BYTES), \ | |
31 | __section__(".data_l1.cacheline_aligned"))) | |
32 | #endif | |
33 | ||
6b3087c6 GY |
34 | #endif |
35 | ||
1394f032 BW |
36 | /* |
37 | * largest L1 which this arch supports | |
38 | */ | |
39 | #define L1_CACHE_SHIFT_MAX 5 | |
40 | ||
6b3087c6 | 41 | #if defined(CONFIG_SMP) && \ |
47e9dedb | 42 | !defined(CONFIG_BFIN_CACHE_COHERENT) |
19a3b603 | 43 | # if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) || defined(CONFIG_BFIN_L2_ICACHEABLE) |
47e9dedb SZ |
44 | # define __ARCH_SYNC_CORE_ICACHE |
45 | # endif | |
19a3b603 | 46 | # if defined(CONFIG_BFIN_EXTMEM_DCACHEABLE) || defined(CONFIG_BFIN_L2_DCACHEABLE) |
47e9dedb SZ |
47 | # define __ARCH_SYNC_CORE_DCACHE |
48 | # endif | |
6b3087c6 GY |
49 | #ifndef __ASSEMBLY__ |
50 | asmlinkage void __raw_smp_mark_barrier_asm(void); | |
51 | asmlinkage void __raw_smp_check_barrier_asm(void); | |
52 | ||
53 | static inline void smp_mark_barrier(void) | |
54 | { | |
55 | __raw_smp_mark_barrier_asm(); | |
56 | } | |
57 | static inline void smp_check_barrier(void) | |
58 | { | |
59 | __raw_smp_check_barrier_asm(); | |
60 | } | |
61 | ||
62 | void resync_core_dcache(void); | |
47e9dedb | 63 | void resync_core_icache(void); |
6b3087c6 GY |
64 | #endif |
65 | #endif | |
66 | ||
67 | ||
1394f032 | 68 | #endif |