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1da177e4 LT |
1 | /* linux/arch/arm/mach-s3c2410/mach-h1940.c |
2 | * | |
3 | * Copyright (c) 2003-2005 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * http://www.handhelds.org/projects/h1940.html | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
1da177e4 LT |
12 | */ |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/list.h> | |
8d717a52 | 18 | #include <linux/memblock.h> |
1da177e4 LT |
19 | #include <linux/timer.h> |
20 | #include <linux/init.h> | |
333a42e1 | 21 | #include <linux/sysdev.h> |
b6d1f542 | 22 | #include <linux/serial_core.h> |
d052d1be | 23 | #include <linux/platform_device.h> |
fced80c7 | 24 | #include <linux/io.h> |
3909b9f7 | 25 | #include <linux/gpio.h> |
22e649ff | 26 | #include <linux/pwm_backlight.h> |
68730b45 | 27 | #include <linux/i2c.h> |
22e649ff | 28 | #include <video/platform_lcd.h> |
3909b9f7 AP |
29 | |
30 | #include <linux/mmc/host.h> | |
1da177e4 LT |
31 | |
32 | #include <asm/mach/arch.h> | |
33 | #include <asm/mach/map.h> | |
34 | #include <asm/mach/irq.h> | |
35 | ||
a09e64fb | 36 | #include <mach/hardware.h> |
1da177e4 LT |
37 | #include <asm/irq.h> |
38 | #include <asm/mach-types.h> | |
39 | ||
a2b7ba9c | 40 | #include <plat/regs-serial.h> |
a09e64fb | 41 | #include <mach/regs-lcd.h> |
a09e64fb | 42 | #include <mach/regs-clock.h> |
f92273c1 | 43 | |
3909b9f7 AP |
44 | #include <mach/regs-gpio.h> |
45 | #include <mach/gpio-fns.h> | |
46 | #include <mach/gpio-nrs.h> | |
47 | ||
a09e64fb RK |
48 | #include <mach/h1940.h> |
49 | #include <mach/h1940-latch.h> | |
50 | #include <mach/fb.h> | |
57bd4b91 | 51 | #include <plat/udc.h> |
3e1b776c | 52 | #include <plat/iic.h> |
1da177e4 | 53 | |
40b956f0 | 54 | #include <plat/gpio-cfg.h> |
d5120ae7 | 55 | #include <plat/clock.h> |
a2b7ba9c BD |
56 | #include <plat/devs.h> |
57 | #include <plat/cpu.h> | |
e24b864a | 58 | #include <plat/pll.h> |
a2b7ba9c | 59 | #include <plat/pm.h> |
3909b9f7 | 60 | #include <plat/mci.h> |
73e59b1d | 61 | #include <plat/ts.h> |
1da177e4 | 62 | |
68730b45 VK |
63 | #include <sound/uda1380.h> |
64 | ||
14477095 VK |
65 | #define H1940_LATCH ((void __force __iomem *)0xF8000000) |
66 | ||
67 | #define H1940_PA_LATCH S3C2410_CS2 | |
68 | ||
69 | #define H1940_LATCH_BIT(x) (1 << ((x) + 16 - S3C_GPIO_END)) | |
70 | ||
1da177e4 | 71 | static struct map_desc h1940_iodesc[] __initdata = { |
e1981680 BD |
72 | [0] = { |
73 | .virtual = (unsigned long)H1940_LATCH, | |
74 | .pfn = __phys_to_pfn(H1940_PA_LATCH), | |
75 | .length = SZ_16K, | |
76 | .type = MT_DEVICE | |
77 | }, | |
1da177e4 LT |
78 | }; |
79 | ||
80 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | |
81 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | |
82 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | |
83 | ||
66a9b49a | 84 | static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = { |
1da177e4 LT |
85 | [0] = { |
86 | .hwport = 0, | |
87 | .flags = 0, | |
88 | .ucon = 0x3c5, | |
89 | .ulcon = 0x03, | |
90 | .ufcon = 0x51, | |
91 | }, | |
92 | [1] = { | |
93 | .hwport = 1, | |
94 | .flags = 0, | |
95 | .ucon = 0x245, | |
96 | .ulcon = 0x03, | |
97 | .ufcon = 0x00, | |
98 | }, | |
99 | /* IR port */ | |
100 | [2] = { | |
101 | .hwport = 2, | |
102 | .flags = 0, | |
103 | .uart_flags = UPF_CONS_FLOW, | |
104 | .ucon = 0x3c5, | |
105 | .ulcon = 0x43, | |
106 | .ufcon = 0x51, | |
107 | } | |
108 | }; | |
109 | ||
e1981680 BD |
110 | /* Board control latch control */ |
111 | ||
53193dd3 | 112 | static unsigned int latch_state; |
e1981680 | 113 | |
14477095 | 114 | static void h1940_latch_control(unsigned int clear, unsigned int set) |
e1981680 BD |
115 | { |
116 | unsigned long flags; | |
117 | ||
118 | local_irq_save(flags); | |
119 | ||
120 | latch_state &= ~clear; | |
121 | latch_state |= set; | |
122 | ||
123 | __raw_writel(latch_state, H1940_LATCH); | |
124 | ||
125 | local_irq_restore(flags); | |
126 | } | |
127 | ||
14477095 VK |
128 | static inline int h1940_gpiolib_to_latch(int offset) |
129 | { | |
130 | return 1 << (offset + 16); | |
131 | } | |
132 | ||
133 | static void h1940_gpiolib_latch_set(struct gpio_chip *chip, | |
134 | unsigned offset, int value) | |
135 | { | |
136 | int latch_bit = h1940_gpiolib_to_latch(offset); | |
137 | ||
138 | h1940_latch_control(value ? 0 : latch_bit, | |
139 | value ? latch_bit : 0); | |
140 | } | |
141 | ||
142 | static int h1940_gpiolib_latch_output(struct gpio_chip *chip, | |
143 | unsigned offset, int value) | |
144 | { | |
145 | h1940_gpiolib_latch_set(chip, offset, value); | |
146 | return 0; | |
147 | } | |
148 | ||
149 | static int h1940_gpiolib_latch_get(struct gpio_chip *chip, | |
150 | unsigned offset) | |
151 | { | |
152 | return (latch_state >> (offset + 16)) & 1; | |
153 | } | |
154 | ||
155 | struct gpio_chip h1940_latch_gpiochip = { | |
156 | .base = H1940_LATCH_GPIO(0), | |
157 | .owner = THIS_MODULE, | |
158 | .label = "H1940_LATCH", | |
159 | .ngpio = 16, | |
160 | .direction_output = h1940_gpiolib_latch_output, | |
161 | .set = h1940_gpiolib_latch_set, | |
162 | .get = h1940_gpiolib_latch_get, | |
163 | }; | |
1da177e4 | 164 | |
71a9c424 AP |
165 | static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd) |
166 | { | |
167 | printk(KERN_DEBUG "udc: pullup(%d)\n",cmd); | |
168 | ||
169 | switch (cmd) | |
170 | { | |
171 | case S3C2410_UDC_P_ENABLE : | |
14477095 | 172 | gpio_set_value(H1940_LATCH_USB_DP, 1); |
71a9c424 AP |
173 | break; |
174 | case S3C2410_UDC_P_DISABLE : | |
14477095 | 175 | gpio_set_value(H1940_LATCH_USB_DP, 0); |
71a9c424 AP |
176 | break; |
177 | case S3C2410_UDC_P_RESET : | |
178 | break; | |
179 | default: | |
180 | break; | |
181 | } | |
182 | } | |
183 | ||
184 | static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { | |
185 | .udc_command = h1940_udc_pullup, | |
070276d5 | 186 | .vbus_pin = S3C2410_GPG(5), |
71a9c424 AP |
187 | .vbus_pin_inverted = 1, |
188 | }; | |
189 | ||
ce8877b5 AP |
190 | static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = { |
191 | .delay = 10000, | |
192 | .presc = 49, | |
193 | .oversampling_shift = 2, | |
5bfdca14 | 194 | .cfg_gpio = s3c24xx_ts_cfg_gpio, |
ce8877b5 | 195 | }; |
71a9c424 | 196 | |
f92273c1 AP |
197 | /** |
198 | * Set lcd on or off | |
199 | **/ | |
09fe75f6 | 200 | static struct s3c2410fb_display h1940_lcd __initdata = { |
f28ef573 KH |
201 | .lcdcon5= S3C2410_LCDCON5_FRM565 | \ |
202 | S3C2410_LCDCON5_INVVLINE | \ | |
203 | S3C2410_LCDCON5_HWSWP, | |
09fe75f6 | 204 | |
1f411537 | 205 | .type = S3C2410_LCDCON1_TFT, |
09fe75f6 KH |
206 | .width = 240, |
207 | .height = 320, | |
69816699 | 208 | .pixclock = 260000, |
09fe75f6 KH |
209 | .xres = 240, |
210 | .yres = 320, | |
211 | .bpp = 16, | |
26be1b7b MS |
212 | .left_margin = 8, |
213 | .right_margin = 20, | |
93d11f5a | 214 | .hsync_len = 4, |
5f20f69b KH |
215 | .upper_margin = 8, |
216 | .lower_margin = 7, | |
93d11f5a | 217 | .vsync_len = 1, |
09fe75f6 KH |
218 | }; |
219 | ||
220 | static struct s3c2410fb_mach_info h1940_fb_info __initdata = { | |
09fe75f6 KH |
221 | .displays = &h1940_lcd, |
222 | .num_displays = 1, | |
223 | .default_display = 0, | |
224 | ||
f92273c1 AP |
225 | .lpcsel= 0x02, |
226 | .gpccon= 0xaa940659, | |
227 | .gpccon_mask= 0xffffffff, | |
228 | .gpcup= 0x0000ffff, | |
229 | .gpcup_mask= 0xffffffff, | |
230 | .gpdcon= 0xaa84aaa0, | |
231 | .gpdcon_mask= 0xffffffff, | |
232 | .gpdup= 0x0000faff, | |
233 | .gpdup_mask= 0xffffffff, | |
f92273c1 | 234 | }; |
1da177e4 | 235 | |
ff34aaa9 | 236 | static struct platform_device h1940_device_leds = { |
d2a76020 AP |
237 | .name = "h1940-leds", |
238 | .id = -1, | |
239 | }; | |
240 | ||
ff34aaa9 | 241 | static struct platform_device h1940_device_bluetooth = { |
7fdc7849 AP |
242 | .name = "h1940-bt", |
243 | .id = -1, | |
244 | }; | |
245 | ||
48cd65a6 VK |
246 | static void h1940_set_mmc_power(unsigned char power_mode, unsigned short vdd) |
247 | { | |
248 | switch (power_mode) { | |
249 | case MMC_POWER_OFF: | |
250 | gpio_set_value(H1940_LATCH_SD_POWER, 0); | |
251 | break; | |
252 | case MMC_POWER_UP: | |
253 | case MMC_POWER_ON: | |
254 | gpio_set_value(H1940_LATCH_SD_POWER, 1); | |
255 | break; | |
256 | default: | |
257 | break; | |
258 | }; | |
259 | } | |
260 | ||
22c810ab | 261 | static struct s3c24xx_mci_pdata h1940_mmc_cfg __initdata = { |
3909b9f7 AP |
262 | .gpio_detect = S3C2410_GPF(5), |
263 | .gpio_wprotect = S3C2410_GPH(8), | |
48cd65a6 | 264 | .set_power = h1940_set_mmc_power, |
3909b9f7 AP |
265 | .ocr_avail = MMC_VDD_32_33, |
266 | }; | |
267 | ||
22e649ff AP |
268 | static int h1940_backlight_init(struct device *dev) |
269 | { | |
270 | gpio_request(S3C2410_GPB(0), "Backlight"); | |
271 | ||
db61ac54 | 272 | gpio_direction_output(S3C2410_GPB(0), 0); |
fb378747 | 273 | s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE); |
40b956f0 | 274 | s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); |
53193dd3 | 275 | gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 1); |
22e649ff AP |
276 | |
277 | return 0; | |
278 | } | |
279 | ||
53193dd3 VK |
280 | static int h1940_backlight_notify(struct device *dev, int brightness) |
281 | { | |
282 | if (!brightness) { | |
283 | gpio_direction_output(S3C2410_GPB(0), 1); | |
284 | gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 0); | |
285 | } else { | |
286 | gpio_direction_output(S3C2410_GPB(0), 0); | |
287 | s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE); | |
288 | s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); | |
289 | gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 1); | |
290 | } | |
291 | return brightness; | |
292 | } | |
293 | ||
22e649ff AP |
294 | static void h1940_backlight_exit(struct device *dev) |
295 | { | |
db61ac54 | 296 | gpio_direction_output(S3C2410_GPB(0), 1); |
53193dd3 | 297 | gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 0); |
22e649ff AP |
298 | } |
299 | ||
53193dd3 | 300 | |
22e649ff AP |
301 | static struct platform_pwm_backlight_data backlight_data = { |
302 | .pwm_id = 0, | |
303 | .max_brightness = 100, | |
304 | .dft_brightness = 50, | |
305 | /* tcnt = 0x31 */ | |
306 | .pwm_period_ns = 36296, | |
307 | .init = h1940_backlight_init, | |
53193dd3 | 308 | .notify = h1940_backlight_notify, |
22e649ff AP |
309 | .exit = h1940_backlight_exit, |
310 | }; | |
311 | ||
312 | static struct platform_device h1940_backlight = { | |
313 | .name = "pwm-backlight", | |
314 | .dev = { | |
315 | .parent = &s3c_device_timer[0].dev, | |
316 | .platform_data = &backlight_data, | |
317 | }, | |
318 | .id = -1, | |
319 | }; | |
320 | ||
321 | static void h1940_lcd_power_set(struct plat_lcd_data *pd, | |
322 | unsigned int power) | |
323 | { | |
324 | int value; | |
325 | ||
326 | if (!power) { | |
53193dd3 | 327 | gpio_set_value(S3C2410_GPC(0), 0); |
22e649ff AP |
328 | /* wait for 3ac */ |
329 | do { | |
db61ac54 | 330 | value = gpio_get_value(S3C2410_GPC(6)); |
22e649ff | 331 | } while (value); |
53193dd3 VK |
332 | |
333 | gpio_set_value(H1940_LATCH_LCD_P2, 0); | |
334 | gpio_set_value(H1940_LATCH_LCD_P3, 0); | |
335 | gpio_set_value(H1940_LATCH_LCD_P4, 0); | |
336 | ||
337 | gpio_direction_output(S3C2410_GPC(1), 0); | |
338 | gpio_direction_output(S3C2410_GPC(4), 0); | |
339 | ||
340 | gpio_set_value(H1940_LATCH_LCD_P1, 0); | |
341 | gpio_set_value(H1940_LATCH_LCD_P0, 0); | |
342 | ||
343 | gpio_set_value(S3C2410_GPC(5), 0); | |
344 | ||
22e649ff | 345 | } else { |
53193dd3 VK |
346 | gpio_set_value(H1940_LATCH_LCD_P0, 1); |
347 | gpio_set_value(H1940_LATCH_LCD_P1, 1); | |
348 | ||
349 | s3c_gpio_cfgpin(S3C2410_GPC(1), S3C_GPIO_SFN(2)); | |
350 | s3c_gpio_cfgpin(S3C2410_GPC(4), S3C_GPIO_SFN(2)); | |
351 | ||
352 | gpio_set_value(S3C2410_GPC(5), 1); | |
353 | gpio_set_value(S3C2410_GPC(0), 1); | |
354 | ||
355 | gpio_set_value(H1940_LATCH_LCD_P3, 1); | |
356 | gpio_set_value(H1940_LATCH_LCD_P2, 1); | |
357 | gpio_set_value(H1940_LATCH_LCD_P4, 1); | |
22e649ff AP |
358 | } |
359 | } | |
360 | ||
361 | static struct plat_lcd_data h1940_lcd_power_data = { | |
362 | .set_power = h1940_lcd_power_set, | |
363 | }; | |
364 | ||
365 | static struct platform_device h1940_lcd_powerdev = { | |
366 | .name = "platform-lcd", | |
367 | .dev.parent = &s3c_device_lcd.dev, | |
368 | .dev.platform_data = &h1940_lcd_power_data, | |
369 | }; | |
370 | ||
68730b45 VK |
371 | static struct uda1380_platform_data uda1380_info = { |
372 | .gpio_power = H1940_LATCH_UDA_POWER, | |
373 | .gpio_reset = S3C2410_GPA(12), | |
374 | .dac_clk = UDA1380_DAC_CLK_SYSCLK, | |
375 | }; | |
376 | ||
377 | static struct i2c_board_info h1940_i2c_devices[] = { | |
378 | { | |
379 | I2C_BOARD_INFO("uda1380", 0x1a), | |
380 | .platform_data = &uda1380_info, | |
381 | }, | |
382 | }; | |
383 | ||
1da177e4 | 384 | static struct platform_device *h1940_devices[] __initdata = { |
b813248c | 385 | &s3c_device_ohci, |
1da177e4 LT |
386 | &s3c_device_lcd, |
387 | &s3c_device_wdt, | |
3e1b776c | 388 | &s3c_device_i2c0, |
1da177e4 | 389 | &s3c_device_iis, |
68730b45 | 390 | &s3c_device_pcm, |
71a9c424 | 391 | &s3c_device_usbgadget, |
ff34aaa9 BD |
392 | &h1940_device_leds, |
393 | &h1940_device_bluetooth, | |
3909b9f7 | 394 | &s3c_device_sdi, |
13733d52 | 395 | &s3c_device_rtc, |
22e649ff AP |
396 | &s3c_device_timer[0], |
397 | &h1940_backlight, | |
398 | &h1940_lcd_powerdev, | |
17dcd13a AP |
399 | &s3c_device_adc, |
400 | &s3c_device_ts, | |
1da177e4 LT |
401 | }; |
402 | ||
5fe10ab1 | 403 | static void __init h1940_map_io(void) |
1da177e4 LT |
404 | { |
405 | s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); | |
406 | s3c24xx_init_clocks(0); | |
407 | s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); | |
9073341c BD |
408 | |
409 | /* setup PM */ | |
410 | ||
b1dfe1f1 | 411 | #ifdef CONFIG_PM_H1940 |
9073341c | 412 | memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); |
b1dfe1f1 | 413 | #endif |
4e59c25d | 414 | s3c_pm_init(); |
14477095 | 415 | |
53193dd3 VK |
416 | /* Add latch gpio chip, set latch initial value */ |
417 | h1940_latch_control(0, 0); | |
14477095 | 418 | WARN_ON(gpiochip_add(&h1940_latch_gpiochip)); |
1da177e4 LT |
419 | } |
420 | ||
98c672cf RK |
421 | /* H1940 and RX3715 need to reserve this for suspend */ |
422 | static void __init h1940_reserve(void) | |
423 | { | |
8d717a52 RK |
424 | memblock_reserve(0x30003000, 0x1000); |
425 | memblock_reserve(0x30081000, 0x1000); | |
98c672cf RK |
426 | } |
427 | ||
5fe10ab1 | 428 | static void __init h1940_init_irq(void) |
1da177e4 LT |
429 | { |
430 | s3c24xx_init_irq(); | |
1da177e4 LT |
431 | } |
432 | ||
5fe10ab1 | 433 | static void __init h1940_init(void) |
f92273c1 | 434 | { |
71a9c424 AP |
435 | u32 tmp; |
436 | ||
09fe75f6 | 437 | s3c24xx_fb_set_platdata(&h1940_fb_info); |
22c810ab | 438 | s3c24xx_mci_set_platdata(&h1940_mmc_cfg); |
71a9c424 | 439 | s3c24xx_udc_set_platdata(&h1940_udc_cfg); |
ce8877b5 | 440 | s3c24xx_ts_set_platdata(&h1940_ts_cfg); |
3e1b776c | 441 | s3c_i2c0_set_platdata(NULL); |
71a9c424 AP |
442 | |
443 | /* Turn off suspend on both USB ports, and switch the | |
444 | * selectable USB port to USB device mode. */ | |
445 | ||
446 | s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | | |
447 | S3C2410_MISCCR_USBSUSPND0 | | |
448 | S3C2410_MISCCR_USBSUSPND1, 0x0); | |
449 | ||
e24b864a BD |
450 | tmp = (0x78 << S3C24XX_PLLCON_MDIVSHIFT) |
451 | | (0x02 << S3C24XX_PLLCON_PDIVSHIFT) | |
452 | | (0x03 << S3C24XX_PLLCON_SDIVSHIFT); | |
71a9c424 | 453 | writel(tmp, S3C2410_UPLLCON); |
57e5171c | 454 | |
22e649ff | 455 | gpio_request(S3C2410_GPC(0), "LCD power"); |
53193dd3 VK |
456 | gpio_request(S3C2410_GPC(1), "LCD power"); |
457 | gpio_request(S3C2410_GPC(4), "LCD power"); | |
22e649ff AP |
458 | gpio_request(S3C2410_GPC(5), "LCD power"); |
459 | gpio_request(S3C2410_GPC(6), "LCD power"); | |
53193dd3 VK |
460 | gpio_request(H1940_LATCH_LCD_P0, "LCD power"); |
461 | gpio_request(H1940_LATCH_LCD_P1, "LCD power"); | |
462 | gpio_request(H1940_LATCH_LCD_P2, "LCD power"); | |
463 | gpio_request(H1940_LATCH_LCD_P3, "LCD power"); | |
464 | gpio_request(H1940_LATCH_LCD_P4, "LCD power"); | |
465 | gpio_request(H1940_LATCH_MAX1698_nSHUTDOWN, "LCD power"); | |
466 | gpio_direction_output(S3C2410_GPC(0), 0); | |
467 | gpio_direction_output(S3C2410_GPC(1), 0); | |
468 | gpio_direction_output(S3C2410_GPC(4), 0); | |
469 | gpio_direction_output(S3C2410_GPC(5), 0); | |
db61ac54 | 470 | gpio_direction_input(S3C2410_GPC(6)); |
53193dd3 VK |
471 | gpio_direction_output(H1940_LATCH_LCD_P0, 0); |
472 | gpio_direction_output(H1940_LATCH_LCD_P1, 0); | |
473 | gpio_direction_output(H1940_LATCH_LCD_P2, 0); | |
474 | gpio_direction_output(H1940_LATCH_LCD_P3, 0); | |
475 | gpio_direction_output(H1940_LATCH_LCD_P4, 0); | |
476 | gpio_direction_output(H1940_LATCH_MAX1698_nSHUTDOWN, 0); | |
22e649ff | 477 | |
14477095 VK |
478 | gpio_request(H1940_LATCH_USB_DP, "USB pullup"); |
479 | gpio_direction_output(H1940_LATCH_USB_DP, 0); | |
480 | ||
48cd65a6 VK |
481 | gpio_request(H1940_LATCH_SD_POWER, "SD power"); |
482 | gpio_direction_output(H1940_LATCH_SD_POWER, 0); | |
483 | ||
57e5171c | 484 | platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); |
68730b45 VK |
485 | |
486 | i2c_register_board_info(0, h1940_i2c_devices, | |
487 | ARRAY_SIZE(h1940_i2c_devices)); | |
f92273c1 AP |
488 | } |
489 | ||
1da177e4 | 490 | MACHINE_START(H1940, "IPAQ-H1940") |
afdd225d | 491 | /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ |
e9dea0c6 RK |
492 | .phys_io = S3C2410_PA_UART, |
493 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | |
494 | .boot_params = S3C2410_SDRAM_PA + 0x100, | |
495 | .map_io = h1940_map_io, | |
98c672cf | 496 | .reserve = h1940_reserve, |
e9dea0c6 | 497 | .init_irq = h1940_init_irq, |
71a9c424 | 498 | .init_machine = h1940_init, |
1da177e4 LT |
499 | .timer = &s3c24xx_timer, |
500 | MACHINE_END |