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a09e64fb | 1 | /* arch/arm/mach-s3c2410/include/mach/debug-macro.S |
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2 | * |
3 | * Debugging macro include header | |
4 | * | |
5 | * Copyright (C) 1994-1999 Russell King | |
6 | * Copyright (C) 2005 Simtec Electronics | |
7 | * | |
8 | * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
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13 | */ |
14 | ||
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15 | #include <mach/map.h> |
16 | #include <mach/regs-gpio.h> | |
a2b7ba9c | 17 | #include <plat/regs-serial.h> |
498e03b6 | 18 | |
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19 | #define S3C2410_UART1_OFF (0x4000) |
20 | #define SHIFT_2440TXF (14-9) | |
21 | ||
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22 | .macro addruart, rp, rv |
23 | ldr \rp, = S3C24XX_PA_UART | |
24 | ldr \rv, = S3C24XX_VA_UART | |
3ec20520 | 25 | #if CONFIG_DEBUG_S3C_UART != 0 |
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26 | add \rp, \rp, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) |
27 | add \rv, \rv, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) | |
1da177e4 | 28 | #endif |
498e03b6 | 29 | .endm |
1da177e4 | 30 | |
cbc4dbff | 31 | .macro fifo_full_s3c24xx rd, rx |
68d9ab39 BD |
32 | @ check for arm920 vs arm926. currently assume all arm926 |
33 | @ devices have an 64 byte FIFO identical to the s3c2440 | |
34 | mrc p15, 0, \rd, c0, c0 | |
35 | and \rd, \rd, #0xff0 | |
36 | teq \rd, #0x260 | |
37 | beq 1004f | |
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38 | mrc p15, 0, \rd, c1, c0 |
39 | tst \rd, #1 | |
0367a8d3 | 40 | addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART) |
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41 | addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART) |
42 | bic \rd, \rd, #0xff000 | |
43 | ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ] | |
44 | and \rd, \rd, #0x00ff0000 | |
45 | teq \rd, #0x00440000 @ is it 2440? | |
68d9ab39 | 46 | 1004: |
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47 | ldr \rd, [ \rx, # S3C2410_UFSTAT ] |
48 | moveq \rd, \rd, lsr #SHIFT_2440TXF | |
49 | tst \rd, #S3C2410_UFSTAT_TXFULL | |
498e03b6 | 50 | .endm |
1da177e4 | 51 | |
cbc4dbff BD |
52 | .macro fifo_full_s3c2410 rd, rx |
53 | ldr \rd, [ \rx, # S3C2410_UFSTAT ] | |
54 | tst \rd, #S3C2410_UFSTAT_TXFULL | |
55 | .endm | |
56 | ||
57 | /* fifo level reading */ | |
58 | ||
59 | .macro fifo_level_s3c24xx rd, rx | |
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60 | @ check for arm920 vs arm926. currently assume all arm926 |
61 | @ devices have an 64 byte FIFO identical to the s3c2440 | |
62 | mrc p15, 0, \rd, c0, c0 | |
63 | and \rd, \rd, #0xff0 | |
64 | teq \rd, #0x260 | |
65 | beq 10000f | |
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66 | mrc p15, 0, \rd, c1, c0 |
67 | tst \rd, #1 | |
0367a8d3 | 68 | addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART) |
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69 | addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART) |
70 | bic \rd, \rd, #0xff000 | |
71 | ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ] | |
72 | and \rd, \rd, #0x00ff0000 | |
73 | teq \rd, #0x00440000 @ is it 2440? | |
74 | ||
1197b4cd | 75 | 10000: |
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76 | ldr \rd, [ \rx, # S3C2410_UFSTAT ] |
77 | andne \rd, \rd, #S3C2410_UFSTAT_TXMASK | |
78 | andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK | |
498e03b6 | 79 | .endm |
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80 | |
81 | .macro fifo_level_s3c2410 rd, rx | |
82 | ldr \rd, [ \rx, # S3C2410_UFSTAT ] | |
83 | and \rd, \rd, #S3C2410_UFSTAT_TXMASK | |
84 | .endm | |
85 | ||
86 | /* Select the correct implementation depending on the configuration. The | |
87 | * S3C2440 will get selected by default, as these are the most widely | |
88 | * used variants of these | |
89 | */ | |
90 | ||
91 | #if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY) | |
92 | #define fifo_full fifo_full_s3c2410 | |
93 | #define fifo_level fifo_level_s3c2410 | |
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94 | #elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY) |
95 | #define fifo_full fifo_full_s3c24xx | |
96 | #define fifo_level fifo_level_s3c24xx | |
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97 | #endif |
98 | ||
99 | /* include the reset of the code which will do the work */ | |
100 | ||
a2b7ba9c | 101 | #include <plat/debug-macro.S> |