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aca59b89 | 1 | /* arch/arm/mach-omap1/include/mach/debug-macro.S |
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2 | * |
3 | * Debugging macro include header | |
4 | * | |
5 | * Copyright (C) 1994-1999 Russell King | |
6 | * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | */ | |
13 | ||
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14 | #include <linux/serial_reg.h> |
15 | ||
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16 | #include <asm/memory.h> |
17 | ||
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18 | #include <plat/serial.h> |
19 | ||
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20 | .pushsection .data |
21 | omap_uart_phys: .word 0x0 | |
22 | omap_uart_virt: .word 0x0 | |
23 | .popsection | |
24 | ||
25 | /* | |
26 | * Note that this code won't work if the bootloader passes | |
27 | * a wrong machine ID number in r1. To debug, just hardcode | |
28 | * the desired UART phys and virt addresses temporarily into | |
29 | * the omap_uart_phys and omap_uart_virt above. | |
30 | */ | |
0ea12930 | 31 | .macro addruart, rp, rv |
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32 | |
33 | /* Use omap_uart_phys/virt if already configured */ | |
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34 | 9: mrc p15, 0, \rp, c1, c0 |
35 | tst \rp, #1 @ MMU enabled? | |
36 | ldreq \rp, =__virt_to_phys(omap_uart_phys) @ MMU not enabled | |
37 | ldrne \rp, =omap_uart_phys @ MMU enabled | |
38 | add \rv, \rp, #4 @ omap_uart_virt | |
39 | ldr \rp, [\rp, #0] | |
40 | ldr \rv, [\rv, #0] | |
41 | cmp \rp, #0 @ is port configured? | |
42 | cmpne \rv, #0 | |
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43 | bne 99f @ already configured |
44 | ||
96554d70 | 45 | /* Check the debug UART configuration set in uncompress.h */ |
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46 | mrc p15, 0, \rp, c1, c0 |
47 | tst \rp, #1 @ MMU enabled? | |
48 | ldreq \rp, =OMAP_UART_INFO @ MMU not enabled | |
49 | ldrne \rp, =__phys_to_virt(OMAP_UART_INFO) @ MMU enabled | |
50 | ldr \rp, [\rp, #0] | |
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51 | |
52 | /* Select the UART to use based on the UART1 scratchpad value */ | |
0ea12930 | 53 | 10: cmp \rp, #0 @ no port configured? |
0c8219f0 | 54 | beq 11f @ if none, try to use UART1 |
0ea12930 | 55 | cmp \rp, #OMAP1UART1 |
0c8219f0 | 56 | beq 11f @ configure OMAP1UART1 |
0ea12930 | 57 | cmp \rp, #OMAP1UART2 |
0c8219f0 | 58 | beq 12f @ configure OMAP1UART2 |
0ea12930 | 59 | cmp \rp, #OMAP1UART3 |
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60 | beq 13f @ configure OMAP2UART3 |
61 | ||
62 | /* Configure the UART offset from the phys/virt base */ | |
0ea12930 | 63 | 11: mov \rp, #0x00fb0000 @ OMAP1UART1 |
0c8219f0 | 64 | b 98f |
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65 | 12: mov \rp, #0x00fb0000 @ OMAP1UART1 |
66 | orr \rp, \rp, #0x00000800 @ OMAP1UART2 | |
0c8219f0 | 67 | b 98f |
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68 | 13: mov \rp, #0x00fb0000 @ OMAP1UART1 |
69 | orr \rp, \rp, #0x00000800 @ OMAP1UART2 | |
70 | orr \rp, \rp, #0x00009000 @ OMAP1UART3 | |
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71 | |
72 | /* Store both phys and virt address for the uart */ | |
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73 | 98: add \rp, \rp, #0xff000000 @ phys base |
74 | mrc p15, 0, \rv, c1, c0 | |
75 | tst \rv, #1 @ MMU enabled? | |
76 | ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled | |
77 | ldrne \rv, =omap_uart_phys @ MMU enabled | |
78 | str \rp, [\rv, #0] | |
79 | sub \rp, \rp, #0xff000000 @ phys base | |
80 | add \rp, \rp, #0xfe000000 @ virt base | |
81 | add \rv, \rv, #4 @ omap_uart_lsr | |
82 | str \rp, [\rv, #0] | |
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83 | b 9b |
84 | 99: | |
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85 | .endm |
86 | ||
87 | .macro senduart,rd,rx | |
88 | strb \rd, [\rx] | |
89 | .endm | |
90 | ||
91 | .macro busyuart,rd,rx | |
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92 | 1001: ldrb \rd, [\rx, #(UART_LSR << OMAP_PORT_SHIFT)] |
93 | and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) | |
94 | teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) | |
1da177e4 | 95 | beq 1002f |
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96 | ldrb \rd, [\rx, #(UART_LSR << OMAP7XX_PORT_SHIFT)] |
97 | and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) | |
98 | teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) | |
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99 | bne 1001b |
100 | 1002: | |
101 | .endm | |
102 | ||
103 | .macro waituart,rd,rx | |
104 | .endm |