[net-next-2.6.git] / arch / arm / mach-imx / mach-cpuimx27.c

/*
 * Copyright (C) 2009 Eric Benard - eric@eukrea.com
 *
 * Based on pcm038.c which is :
 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/i2c.h>
#include <linux/io.h>
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/fsl_devices.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>

#include <mach/eukrea-baseboards.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/iomux-mx27.h>
#include <mach/mxc_nand.h>
#include <mach/mxc_ehci.h>
#include <mach/ulpi.h>

#include "devices-imx27.h"
#include "devices.h"

static int eukrea_cpuimx27_pins[] = {
	/* UART1 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* UART4 */
#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
	PB26_AF_UART4_RTS,
	PB28_AF_UART4_TXD,
	PB29_AF_UART4_CTS,
	PB31_AF_UART4_RXD,
#endif
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* I2C1 */
	PD17_PF_I2C_DATA,
	PD18_PF_I2C_CLK,
	/* SDHC2 */
#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
	PB4_PF_SD2_D0,
	PB5_PF_SD2_D1,
	PB6_PF_SD2_D2,
	PB7_PF_SD2_D3,
	PB8_PF_SD2_CMD,
	PB9_PF_SD2_CLK,
#endif
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	/* Quad UART's IRQ */
	GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
	GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
	GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
	GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
#endif
	/* OTG */
	PC7_PF_USBOTG_DATA5,
	PC8_PF_USBOTG_DATA6,
	PC9_PF_USBOTG_DATA0,
	PC10_PF_USBOTG_DATA2,
	PC11_PF_USBOTG_DATA1,
	PC12_PF_USBOTG_DATA4,
	PC13_PF_USBOTG_DATA3,
	PE0_PF_USBOTG_NXT,
	PE1_PF_USBOTG_STP,
	PE2_PF_USBOTG_DIR,
	PE24_PF_USBOTG_CLK,
	PE25_PF_USBOTG_DATA7,
	/* USBH2 */
	PA0_PF_USBH2_CLK,
	PA1_PF_USBH2_DIR,
	PA2_PF_USBH2_DATA7,
	PA3_PF_USBH2_NXT,
	PA4_PF_USBH2_STP,
	PD19_AF_USBH2_DATA4,
	PD20_AF_USBH2_DATA3,
	PD21_AF_USBH2_DATA6,
	PD22_AF_USBH2_DATA0,
	PD23_AF_USBH2_DATA2,
	PD24_AF_USBH2_DATA1,
	PD26_AF_USBH2_DATA5,
};

static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
	.width = 2,
};

static struct resource eukrea_cpuimx27_flash_resource = {
	.start = 0xc0000000,
	.end   = 0xc3ffffff,
	.flags = IORESOURCE_MEM,
};

static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &eukrea_cpuimx27_flash_data,
	},
	.num_resources = 1,
	.resource = &eukrea_cpuimx27_flash_resource,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static const struct mxc_nand_platform_data
cpuimx27_nand_board_info __initconst = {
	.width = 1,
	.hw_ecc = 1,
};

static struct platform_device *platform_devices[] __initdata = {
	&eukrea_cpuimx27_nor_mtd_device,
	&mxc_fec_device,
	&mxc_wdt,
	&mxc_w1_master_device,
};

static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
	.bitrate = 100000,
};

static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
	{
		I2C_BOARD_INFO("pcf8563", 0x51),
	},
};

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
static struct plat_serial8250_port serial_platform_data[] = {
	{
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
		.irq = IRQ_GPIOB(23),
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
		.irq = IRQ_GPIOB(22),
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
		.irq = IRQ_GPIOB(27),
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
		.irq = IRQ_GPIOB(30),
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
	}
};

static struct platform_device serial_device = {
	.name = "serial8250",
	.id = 0,
	.dev = {
		.platform_data = serial_platform_data,
	},
};
#endif

#if defined(CONFIG_USB_ULPI)
static struct mxc_usbh_platform_data otg_pdata = {
	.portsc	= MXC_EHCI_MODE_ULPI,
	.flags	= MXC_EHCI_INTERFACE_DIFF_UNI,
};

static struct mxc_usbh_platform_data usbh2_pdata = {
	.portsc	= MXC_EHCI_MODE_ULPI,
	.flags	= MXC_EHCI_INTERFACE_DIFF_UNI,
};
#endif

static struct fsl_usb2_platform_data otg_device_pdata = {
	.operating_mode = FSL_USB2_DR_DEVICE,
	.phy_mode       = FSL_USB2_PHY_ULPI,
};

static int otg_mode_host;

static int __init eukrea_cpuimx27_otg_mode(char *options)
{
	if (!strcmp(options, "host"))
		otg_mode_host = 1;
	else if (!strcmp(options, "device"))
		otg_mode_host = 0;
	else
		pr_info("otg_mode neither \"host\" nor \"device\". "
			"Defaulting to device\n");
	return 0;
}
__setup("otg_mode=", eukrea_cpuimx27_otg_mode);

static void __init eukrea_cpuimx27_init(void)
{
	mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
		ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");

	imx27_add_imx_uart0(&uart_pdata);

	imx27_add_mxc_nand(&cpuimx27_nand_board_info);

	i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
				ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));

	imx27_add_i2c_imx0(&cpuimx27_i2c1_data);

	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));

#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
	/* SDHC2 can be used for Wifi */
	mxc_register_device(&mxc_sdhc_device1, NULL);
#endif
#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
	/* in which case UART4 is also used for Bluetooth */
	imx27_add_imx_uart3(&uart_pdata);
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	platform_device_register(&serial_device);
#endif

#if defined(CONFIG_USB_ULPI)
	if (otg_mode_host) {
		otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
				USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);

		mxc_register_device(&mxc_otg_host, &otg_pdata);
	}

	usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
				USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);

	mxc_register_device(&mxc_usbh2, &usbh2_pdata);
#endif
	if (!otg_mode_host)
		mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);

#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
	eukrea_mbimx27_baseboard_init();
#endif
}

static void __init eukrea_cpuimx27_timer_init(void)
{
	mx27_clocks_init(26000000);
}

static struct sys_timer eukrea_cpuimx27_timer = {
	.init = eukrea_cpuimx27_timer_init,
};

MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
	.phys_io        = MX27_AIPI_BASE_ADDR,
	.io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
	.boot_params    = MX27_PHYS_OFFSET + 0x100,
	.map_io         = mx27_map_io,
	.init_irq       = mx27_init_irq,
	.init_machine   = eukrea_cpuimx27_init,
	.timer          = &eukrea_cpuimx27_timer,
MACHINE_END
Commit	Line	Data
af5b1df7 EB	1	/*
	2	* Copyright (C) 2009 Eric Benard - eric@eukrea.com
	3	*
	4	* Based on pcm038.c which is :
	5	* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
	6	* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* as published by the Free Software Foundation; either version 2
	11	* of the License, or (at your option) any later version.
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	20	* MA 02110-1301, USA.
	21	*/
	22
	23	#include <linux/i2c.h>
	24	#include <linux/io.h>
	25	#include <linux/mtd/plat-ram.h>
	26	#include <linux/mtd/physmap.h>
	27	#include <linux/platform_device.h>
	28	#include <linux/serial_8250.h>
9f2270da EB	29	#include <linux/usb/otg.h>
	30	#include <linux/usb/ulpi.h>
	31	#include <linux/fsl_devices.h>
af5b1df7 EB	32
	33	#include <asm/mach-types.h>
	34	#include <asm/mach/arch.h>
	35	#include <asm/mach/time.h>
	36	#include <asm/mach/map.h>
	37
95afd090	38	#include <mach/eukrea-baseboards.h>
af5b1df7 EB	39	#include <mach/common.h>
af5b1df7 EB	40	#include <mach/hardware.h>
e835d88e	41	#include <mach/iomux-mx27.h>
af5b1df7	42	#include <mach/mxc_nand.h>
9f2270da EB	43	#include <mach/mxc_ehci.h>
9f2270da EB	44	#include <mach/ulpi.h>
af5b1df7	45
0e7a29a8	46	#include "devices-imx27.h"
af5b1df7 EB	47	#include "devices.h"
	48
	49	static int eukrea_cpuimx27_pins[] = {
	50	/* UART1 */
	51	PE12_PF_UART1_TXD,
	52	PE13_PF_UART1_RXD,
	53	PE14_PF_UART1_CTS,
	54	PE15_PF_UART1_RTS,
	55	/* UART4 */
2d66c780	56	#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
af5b1df7 EB	57	PB26_AF_UART4_RTS,
	58	PB28_AF_UART4_TXD,
	59	PB29_AF_UART4_CTS,
	60	PB31_AF_UART4_RXD,
2d66c780	61	#endif
af5b1df7 EB	62	/* FEC */
	63	PD0_AIN_FEC_TXD0,
	64	PD1_AIN_FEC_TXD1,
	65	PD2_AIN_FEC_TXD2,
	66	PD3_AIN_FEC_TXD3,
	67	PD4_AOUT_FEC_RX_ER,
	68	PD5_AOUT_FEC_RXD1,
	69	PD6_AOUT_FEC_RXD2,
	70	PD7_AOUT_FEC_RXD3,
	71	PD8_AF_FEC_MDIO,
	72	PD9_AIN_FEC_MDC,
	73	PD10_AOUT_FEC_CRS,
	74	PD11_AOUT_FEC_TX_CLK,
	75	PD12_AOUT_FEC_RXD0,
	76	PD13_AOUT_FEC_RX_DV,
	77	PD14_AOUT_FEC_RX_CLK,
	78	PD15_AOUT_FEC_COL,
	79	PD16_AIN_FEC_TX_ER,
	80	PF23_AIN_FEC_TX_EN,
	81	/* I2C1 */
	82	PD17_PF_I2C_DATA,
	83	PD18_PF_I2C_CLK,
	84	/* SDHC2 */
2d66c780	85	#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
af5b1df7 EB	86	PB4_PF_SD2_D0,
	87	PB5_PF_SD2_D1,
	88	PB6_PF_SD2_D2,
	89	PB7_PF_SD2_D3,
	90	PB8_PF_SD2_CMD,
	91	PB9_PF_SD2_CLK,
2d66c780	92	#endif
af5b1df7 EB	93	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
af5b1df7 EB	94	/* Quad UART's IRQ */
ebb4fc82 EB	95	GPIO_PORTB \| 22 \| GPIO_GPIO \| GPIO_IN,
	96	GPIO_PORTB \| 23 \| GPIO_GPIO \| GPIO_IN,
	97	GPIO_PORTB \| 27 \| GPIO_GPIO \| GPIO_IN,
	98	GPIO_PORTB \| 30 \| GPIO_GPIO \| GPIO_IN,
af5b1df7	99	#endif
9f2270da EB	100	/* OTG */
	101	PC7_PF_USBOTG_DATA5,
	102	PC8_PF_USBOTG_DATA6,
	103	PC9_PF_USBOTG_DATA0,
	104	PC10_PF_USBOTG_DATA2,
	105	PC11_PF_USBOTG_DATA1,
	106	PC12_PF_USBOTG_DATA4,
	107	PC13_PF_USBOTG_DATA3,
	108	PE0_PF_USBOTG_NXT,
	109	PE1_PF_USBOTG_STP,
	110	PE2_PF_USBOTG_DIR,
	111	PE24_PF_USBOTG_CLK,
	112	PE25_PF_USBOTG_DATA7,
	113	/* USBH2 */
	114	PA0_PF_USBH2_CLK,
	115	PA1_PF_USBH2_DIR,
	116	PA2_PF_USBH2_DATA7,
	117	PA3_PF_USBH2_NXT,
	118	PA4_PF_USBH2_STP,
	119	PD19_AF_USBH2_DATA4,
	120	PD20_AF_USBH2_DATA3,
	121	PD21_AF_USBH2_DATA6,
	122	PD22_AF_USBH2_DATA0,
	123	PD23_AF_USBH2_DATA2,
	124	PD24_AF_USBH2_DATA1,
	125	PD26_AF_USBH2_DATA5,
af5b1df7 EB	126	};
	127
	128	static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
	129	.width = 2,
	130	};
	131
	132	static struct resource eukrea_cpuimx27_flash_resource = {
	133	.start = 0xc0000000,
	134	.end = 0xc3ffffff,
	135	.flags = IORESOURCE_MEM,
	136	};
	137
	138	static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
	139	.name = "physmap-flash",
	140	.id = 0,
	141	.dev = {
	142	.platform_data = &eukrea_cpuimx27_flash_data,
	143	},
	144	.num_resources = 1,
	145	.resource = &eukrea_cpuimx27_flash_resource,
	146	};
	147
d5dac4a6 UKK	148	static const struct imxuart_platform_data uart_pdata __initconst = {
d5dac4a6 UKK	149	.flags = IMXUART_HAVE_RTSCTS,
af5b1df7 EB	150	};
af5b1df7 EB	151
0e7a29a8 UKK	152	static const struct mxc_nand_platform_data
0e7a29a8 UKK	153	cpuimx27_nand_board_info __initconst = {
af5b1df7 EB	154	.width = 1,
	155	.hw_ecc = 1,
	156	};
	157
	158	static struct platform_device *platform_devices[] __initdata = {
	159	&eukrea_cpuimx27_nor_mtd_device,
	160	&mxc_fec_device,
ebfc7e6e EB	161	&mxc_wdt,
ebfc7e6e EB	162	&mxc_w1_master_device,
af5b1df7 EB	163	};
af5b1df7 EB	164
c6987159	165	static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
af5b1df7 EB	166	.bitrate = 100000,
	167	};
	168
	169	static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
	170	{
cf87a6e2	171	I2C_BOARD_INFO("pcf8563", 0x51),
af5b1df7 EB	172	},
	173	};
	174
	175	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	176	static struct plat_serial8250_port serial_platform_data[] = {
	177	{
3f35d1f5	178	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
af5b1df7 EB	179	.irq = IRQ_GPIOB(23),
	180	.uartclk = 14745600,
	181	.regshift = 1,
	182	.iotype = UPIO_MEM,
	183	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	184	}, {
3f35d1f5	185	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
af5b1df7 EB	186	.irq = IRQ_GPIOB(22),
	187	.uartclk = 14745600,
	188	.regshift = 1,
	189	.iotype = UPIO_MEM,
	190	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	191	}, {
3f35d1f5	192	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
af5b1df7 EB	193	.irq = IRQ_GPIOB(27),
	194	.uartclk = 14745600,
	195	.regshift = 1,
	196	.iotype = UPIO_MEM,
	197	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	198	}, {
3f35d1f5	199	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
af5b1df7 EB	200	.irq = IRQ_GPIOB(30),
	201	.uartclk = 14745600,
	202	.regshift = 1,
	203	.iotype = UPIO_MEM,
	204	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	205	}, {
	206	}
	207	};
	208
	209	static struct platform_device serial_device = {
	210	.name = "serial8250",
	211	.id = 0,
	212	.dev = {
	213	.platform_data = serial_platform_data,
	214	},
	215	};
	216	#endif
	217
cbb052c9	218	#if defined(CONFIG_USB_ULPI)
9f2270da EB	219	static struct mxc_usbh_platform_data otg_pdata = {
	220	.portsc = MXC_EHCI_MODE_ULPI,
	221	.flags = MXC_EHCI_INTERFACE_DIFF_UNI,
	222	};
	223
	224	static struct mxc_usbh_platform_data usbh2_pdata = {
	225	.portsc = MXC_EHCI_MODE_ULPI,
	226	.flags = MXC_EHCI_INTERFACE_DIFF_UNI,
	227	};
cbb052c9	228	#endif
9f2270da EB	229
	230	static struct fsl_usb2_platform_data otg_device_pdata = {
	231	.operating_mode = FSL_USB2_DR_DEVICE,
	232	.phy_mode = FSL_USB2_PHY_ULPI,
	233	};
	234
	235	static int otg_mode_host;
	236
	237	static int __init eukrea_cpuimx27_otg_mode(char *options)
	238	{
	239	if (!strcmp(options, "host"))
	240	otg_mode_host = 1;
	241	else if (!strcmp(options, "device"))
	242	otg_mode_host = 0;
	243	else
	244	pr_info("otg_mode neither \"host\" nor \"device\". "
	245	"Defaulting to device\n");
	246	return 0;
	247	}
	248	__setup("otg_mode=", eukrea_cpuimx27_otg_mode);
	249
af5b1df7 EB	250	static void __init eukrea_cpuimx27_init(void)
	251	{
	252	mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
	253	ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
	254
d5dac4a6	255	imx27_add_imx_uart0(&uart_pdata);
af5b1df7	256
0e7a29a8	257	imx27_add_mxc_nand(&cpuimx27_nand_board_info);
af5b1df7 EB	258
	259	i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
	260	ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
	261
4793ca40	262	imx27_add_i2c_imx0(&cpuimx27_i2c1_data);
af5b1df7 EB	263
	264	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
	265
	266	#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
	267	/* SDHC2 can be used for Wifi */
	268	mxc_register_device(&mxc_sdhc_device1, NULL);
2d66c780 EB	269	#endif
2d66c780 EB	270	#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
af5b1df7	271	/* in which case UART4 is also used for Bluetooth */
d5dac4a6	272	imx27_add_imx_uart3(&uart_pdata);
af5b1df7 EB	273	#endif
	274
	275	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	276	platform_device_register(&serial_device);
	277	#endif
	278
9f2270da EB	279	#if defined(CONFIG_USB_ULPI)
	280	if (otg_mode_host) {
	281	otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
	282	USB_OTG_DRV_VBUS \| USB_OTG_DRV_VBUS_EXT);
	283
	284	mxc_register_device(&mxc_otg_host, &otg_pdata);
	285	}
	286
	287	usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
	288	USB_OTG_DRV_VBUS \| USB_OTG_DRV_VBUS_EXT);
	289
	290	mxc_register_device(&mxc_usbh2, &usbh2_pdata);
	291	#endif
	292	if (!otg_mode_host)
	293	mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
	294
af5b1df7 EB	295	#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
	296	eukrea_mbimx27_baseboard_init();
	297	#endif
	298	}
	299
	300	static void __init eukrea_cpuimx27_timer_init(void)
	301	{
	302	mx27_clocks_init(26000000);
	303	}
	304
	305	static struct sys_timer eukrea_cpuimx27_timer = {
	306	.init = eukrea_cpuimx27_timer_init,
	307	};
	308
	309	MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
3f35d1f5 UKK	310	.phys_io = MX27_AIPI_BASE_ADDR,
3f35d1f5 UKK	311	.io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
34101237	312	.boot_params = MX27_PHYS_OFFSET + 0x100,
af5b1df7 EB	313	.map_io = mx27_map_io,
	314	.init_irq = mx27_init_irq,
	315	.init_machine = eukrea_cpuimx27_init,
	316	.timer = &eukrea_cpuimx27_timer,
	317	MACHINE_END