]> bbs.cooldavid.org Git - jme.git/commitdiff
Import jme 1.0.3 source jme-1.0.3
authorGuo-Fu Tseng <cooldavid@cooldavid.org>
Tue, 3 Aug 2010 09:17:50 +0000 (17:17 +0800)
committerGuo-Fu Tseng <cooldavid@cooldavid.org>
Tue, 3 Aug 2010 09:17:50 +0000 (17:17 +0800)
jme.c
jme.h

diff --git a/jme.c b/jme.c
index f292df55754468b1fbb56d8f451dd939f627ca20..5f9a1313fa3e3cd13b64f37c21373ce0cb3e6a5a 100644 (file)
--- a/jme.c
+++ b/jme.c
@@ -190,7 +190,7 @@ jme_reset_mac_processor(struct jme_adapter *jme)
        else
                gpreg0 = GPREG0_DEFAULT;
        jwrite32(jme, JME_GPREG0, gpreg0);
-       jwrite32(jme, JME_GPREG1, 0);
+       jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
 }
 
 static inline void
@@ -365,7 +365,7 @@ static int
 jme_check_link(struct net_device *netdev, int testonly)
 {
        struct jme_adapter *jme = netdev_priv(netdev);
-       u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr;
+       u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
        char linkmsg[64];
        int rc = 0;
 
@@ -437,37 +437,22 @@ jme_check_link(struct net_device *netdev, int testonly)
                case PHY_LINK_SPEED_10M:
                        ghc |= GHC_SPEED_10M;
                        strcat(linkmsg, "10 Mbps, ");
-                       if (is_buggy250(jme->pdev->device, jme->chiprev))
-                               jme_set_phyfifoa(jme);
                        break;
                case PHY_LINK_SPEED_100M:
                        ghc |= GHC_SPEED_100M;
                        strcat(linkmsg, "100 Mbps, ");
-                       if (is_buggy250(jme->pdev->device, jme->chiprev))
-                               jme_set_phyfifob(jme);
                        break;
                case PHY_LINK_SPEED_1000M:
                        ghc |= GHC_SPEED_1000M;
                        strcat(linkmsg, "1000 Mbps, ");
-                       if (is_buggy250(jme->pdev->device, jme->chiprev))
-                               jme_set_phyfifoa(jme);
                        break;
                default:
                        break;
                }
-               ghc |= (phylink & PHY_LINK_DUPLEX) ? GHC_DPX : 0;
-
-               strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
-                                       "Full-Duplex, " :
-                                       "Half-Duplex, ");
-
-               if (phylink & PHY_LINK_MDI_STAT)
-                       strcat(linkmsg, "MDI-X");
-               else
-                       strcat(linkmsg, "MDI");
 
                if (phylink & PHY_LINK_DUPLEX) {
                        jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
+                       ghc |= GHC_DPX;
                } else {
                        jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
                                                TXMCS_BACKOFF |
@@ -478,6 +463,36 @@ jme_check_link(struct net_device *netdev, int testonly)
                                TXTRHD_TXREN |
                                ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
                }
+               strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
+                                       "Full-Duplex, " :
+                                       "Half-Duplex, ");
+
+               if (phylink & PHY_LINK_MDI_STAT)
+                       strcat(linkmsg, "MDI-X");
+               else
+                       strcat(linkmsg, "MDI");
+
+               gpreg1 = GPREG1_DEFAULT;
+               if (is_buggy250(jme->pdev->device, jme->chiprev)) {
+                       if (!(phylink & PHY_LINK_DUPLEX))
+                               gpreg1 |= GPREG1_HALFMODEPATCH;
+                       switch (phylink & PHY_LINK_SPEED_MASK) {
+                       case PHY_LINK_SPEED_10M:
+                               jme_set_phyfifoa(jme);
+                               gpreg1 |= GPREG1_RSSPATCH;
+                               break;
+                       case PHY_LINK_SPEED_100M:
+                               jme_set_phyfifob(jme);
+                               gpreg1 |= GPREG1_RSSPATCH;
+                               break;
+                       case PHY_LINK_SPEED_1000M:
+                               jme_set_phyfifoa(jme);
+                               break;
+                       default:
+                               break;
+                       }
+               }
+               jwrite32(jme, JME_GPREG1, gpreg1);
 
                jme->reg_ghc = ghc;
                jwrite32(jme, JME_GHC, ghc);
@@ -1448,7 +1463,7 @@ jme_intr(int irq, void *dev_id)
        /*
         * Check if it's really an interrupt for us
         */
-       if (unlikely(intrstat == 0))
+       if (unlikely((intrstat & INTR_ENABLE) == 0))
                return IRQ_NONE;
 
        /*
@@ -1578,6 +1593,7 @@ err_out:
        return rc;
 }
 
+#ifdef CONFIG_PM
 static void
 jme_set_100m_half(struct jme_adapter *jme)
 {
@@ -1610,6 +1626,7 @@ jme_wait_link(struct jme_adapter *jme)
                phylink = jme_linkstat_from_phy(jme);
        }
 }
+#endif
 
 static inline void
 jme_phy_off(struct jme_adapter *jme)
@@ -2897,6 +2914,7 @@ jme_remove_one(struct pci_dev *pdev)
 
 }
 
+#ifdef CONFIG_PM
 static int
 jme_suspend(struct pci_dev *pdev, pm_message_t state)
 {
@@ -2976,6 +2994,7 @@ jme_resume(struct pci_dev *pdev)
 
        return 0;
 }
+#endif
 
 static struct pci_device_id jme_pci_tbl[] = {
        { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
diff --git a/jme.h b/jme.h
index 6783e58455145440741efeec2d520a69f0f6ef0f..f863aee6648b49b0db38d2cdc077640669a2a424 100644 (file)
--- a/jme.h
+++ b/jme.h
@@ -25,7 +25,7 @@
 #define __JME_H_INCLUDEE__
 
 #define DRV_NAME       "jme"
-#define DRV_VERSION    "1.0.2"
+#define DRV_VERSION    "1.0.3"
 #define PFX            DRV_NAME ": "
 
 #define PCI_DEVICE_ID_JMICRON_JMC250   0x0250
@@ -963,6 +963,36 @@ enum jme_gpreg0_vals {
                                  GPREG0_PHYADDR_1,
 };
 
+/*
+ * General Purpose REG-1
+ * Note: All theses bits defined here are for
+ *       Chip mode revision 0x11 only
+ */
+enum jme_gpreg1_masks {
+       GPREG1_INTRDELAYUNIT    = 0x00000018,
+       GPREG1_INTRDELAYENABLE  = 0x00000007,
+};
+
+enum jme_gpreg1_vals {
+       GPREG1_RSSPATCH         = 0x00000040,
+       GPREG1_HALFMODEPATCH    = 0x00000020,
+
+       GPREG1_INTDLYUNIT_16NS  = 0x00000000,
+       GPREG1_INTDLYUNIT_256NS = 0x00000008,
+       GPREG1_INTDLYUNIT_1US   = 0x00000010,
+       GPREG1_INTDLYUNIT_16US  = 0x00000018,
+
+       GPREG1_INTDLYEN_1U      = 0x00000001,
+       GPREG1_INTDLYEN_2U      = 0x00000002,
+       GPREG1_INTDLYEN_3U      = 0x00000003,
+       GPREG1_INTDLYEN_4U      = 0x00000004,
+       GPREG1_INTDLYEN_5U      = 0x00000005,
+       GPREG1_INTDLYEN_6U      = 0x00000006,
+       GPREG1_INTDLYEN_7U      = 0x00000007,
+
+       GPREG1_DEFAULT          = 0x00000000,
+};
+
 /*
  * Interrupt Status Bits
  */
@@ -1092,12 +1122,14 @@ static char *MAC_REG_NAME[] = {
        "JME_RXMCHT_LO", "JME_RXMCHT_HI", "JME_WFODP",    "JME_WFOI",
        "JME_SMI",       "JME_GHC",       "UNKNOWN",      "UNKNOWN",
        "JME_PMCS"};
+
 static char *PE_REG_NAME[] = {
        "UNKNOWN",      "UNKNOWN",     "UNKNOWN",    "UNKNOWN",
        "UNKNOWN",      "UNKNOWN",     "UNKNOWN",    "UNKNOWN",
        "UNKNOWN",      "UNKNOWN",     "JME_PHY_CS", "UNKNOWN",
        "JME_PHY_LINK", "UNKNOWN",     "UNKNOWN",    "UNKNOWN",
        "JME_SMBCSR",   "JME_SMBINTF"};
+
 static char *MISC_REG_NAME[] = {
        "JME_TMCSR",  "JME_GPIO",     "JME_GPREG0",  "JME_GPREG1",
        "JME_IEVE",   "JME_IREQ",     "JME_IENS",    "JME_IENC",
@@ -1108,6 +1140,7 @@ static char *MISC_REG_NAME[] = {
        "UNKNOWN",    "UNKNOWN",      "UNKNOWN",     "UNKNOWN",
        "JME_TIMER1", "JME_TIMER2",   "UNKNOWN",     "JME_APMC",
        "JME_PCCSRX0"};
+
 static inline void reg_dbg(const struct jme_adapter *jme,
                const char *msg, u32 val, u32 reg)
 {