X-Git-Url: http://bbs.cooldavid.org/git/?p=jme.git;a=blobdiff_plain;f=jme.h;h=82f4cc6efdc5f2ef96b9ed8d30d4026b1169b4ee;hp=18358d0a659094a6a90d4dbde082404a1c0cfc64;hb=192570e059855213a9e0010227fc6d1768be4a38;hpb=79ce639c9d90abc4d30d749af2d135c20a8c419e diff --git a/jme.h b/jme.h index 18358d0..82f4cc6 100644 --- a/jme.h +++ b/jme.h @@ -24,7 +24,7 @@ #include #define DRV_NAME "jme" -#define DRV_VERSION "0.6" +#define DRV_VERSION "0.9a" #define PFX DRV_NAME ": " #ifdef DEBUG @@ -46,12 +46,24 @@ #define rx_dbg(args...) #endif +#ifdef QUEUE_DEBUG +#define queue_dbg(devname, fmt, args...) dprintk(devname, fmt, ## args) +#else +#define queue_dbg(args...) +#endif + #ifdef CSUM_DEBUG #define csum_dbg(devname, fmt, args...) dprintk(devname, fmt, ## args) #else #define csum_dbg(args...) #endif +#ifdef VLAN_DEBUG +#define vlan_dbg(devname, fmt, args...) dprintk(devname, fmt, ## args) +#else +#define vlan_dbg(args...) +#endif + #define jprintk(devname, fmt, args...) \ printk(KERN_INFO "%s: " fmt, devname, ## args) @@ -81,17 +93,20 @@ enum pci_conf_dcsr_mrrs_vals { #define MIN_ETHERNET_PACKET_SIZE 60 enum dynamic_pcc_values { + PCC_OFF = 0, PCC_P1 = 1, PCC_P2 = 2, PCC_P3 = 3, + PCC_OFF_TO = 0, PCC_P1_TO = 1, - PCC_P2_TO = 250, - PCC_P3_TO = 1000, + PCC_P2_TO = 64, + PCC_P3_TO = 128, + PCC_OFF_CNT = 0, PCC_P1_CNT = 1, - PCC_P2_CNT = 64, - PCC_P3_CNT = 255, + PCC_P2_CNT = 16, + PCC_P3_CNT = 32, }; struct dynpcc_info { unsigned long last_bytes; @@ -106,8 +121,8 @@ struct dynpcc_info { #define PCC_P3_THRESHOLD 3*1024*1024 #define PCC_P2_THRESHOLD 800 #define PCC_INTR_THRESHOLD 800 -#define PCC_TX_TO 100 -#define PCC_TX_CNT 16 +#define PCC_TX_TO 333 +#define PCC_TX_CNT 8 /* * TX/RX Descriptors @@ -115,13 +130,11 @@ struct dynpcc_info { * TX/RX Ring DESC Count Must be multiple of 16 * RX Ring DESC Count Must be <= 1024 */ -#define RING_DESC_NR 512 /* Must be power of 2 */ #define RING_DESC_ALIGN 16 /* Descriptor alignment */ #define TX_DESC_SIZE 16 #define TX_RING_NR 8 -#define TX_RING_ALLOC_SIZE (RING_DESC_NR * TX_DESC_SIZE) + TX_DESC_SIZE -#define TX_RING_SIZE (RING_DESC_NR * TX_DESC_SIZE) +#define TX_RING_ALLOC_SIZE(s) (s * TX_DESC_SIZE) + RING_DESC_ALIGN struct txdesc { union { @@ -190,6 +203,7 @@ enum jme_txdesc_flags_bits { TXFLAG_LSEN = 0x02, TXFLAG_TAGON = 0x01, }; +#define TXDESC_MSS_SHIFT 2 enum jme_rxdescwb_flags_bits { TXWBFLAG_OWN = 0x80, TXWBFLAG_INT = 0x40, @@ -205,8 +219,7 @@ enum jme_rxdescwb_flags_bits { #define RX_DESC_SIZE 16 #define RX_RING_NR 4 -#define RX_RING_ALLOC_SIZE (RING_DESC_NR * RX_DESC_SIZE) + RX_DESC_SIZE -#define RX_RING_SIZE (RING_DESC_NR * RX_DESC_SIZE) +#define RX_RING_ALLOC_SIZE(s) (s * RX_DESC_SIZE) + RING_DESC_ALIGN #define RX_BUF_DMA_ALIGN 8 #define RX_PREPAD_SIZE 10 @@ -307,6 +320,7 @@ struct jme_buffer_info { int nr_desc; }; +#define MAX_RING_DESC_NR 1024 struct jme_ring { void* alloc; /* pointer to allocated memory */ volatile void* desc; /* pointer to ring memory */ @@ -314,10 +328,10 @@ struct jme_ring { dma_addr_t dma; /* phys address for ring dma */ /* Buffer information corresponding to each descriptor */ - struct jme_buffer_info bufinf[RING_DESC_NR]; + struct jme_buffer_info bufinf[MAX_RING_DESC_NR]; - u16 next_to_use; - u16 next_to_clean; + int next_to_use; + int next_to_clean; atomic_t nr_free; }; @@ -360,14 +374,24 @@ struct jme_adapter { __u32 reg_rxcs; __u32 reg_rxmcs; __u32 reg_ghc; + __u32 reg_pmcs; __u32 phylink; + __u32 tx_ring_size; + __u32 tx_ring_mask; + __u32 tx_wake_threshold; + __u32 rx_ring_size; + __u32 rx_ring_mask; __u8 mrrs; - unsigned int oldmtu; + struct ethtool_cmd old_ecmd; + unsigned int old_mtu; + struct vlan_group* vlgrp; struct dynpcc_info dpi; atomic_t intr_sem; atomic_t link_changing; atomic_t tx_cleaning; atomic_t rx_cleaning; + atomic_t rx_empty; + struct napi_struct napi; DECLARE_NET_DEVICE_STATS }; enum shadow_reg_val { @@ -375,6 +399,10 @@ enum shadow_reg_val { }; enum jme_flags_bits { JME_FLAG_MSI = 0x00000001, + JME_FLAG_SSET = 0x00000002, + JME_FLAG_TXCSUM = 0x00000004, + JME_FLAG_TSO = 0x00000008, + JME_FLAG_POLL = 0x00000010, }; #define WAIT_TASKLET_TIMEOUT 500 /* 500 ms */ #define TX_TIMEOUT (5*HZ) @@ -484,7 +512,7 @@ enum jme_txcs_value { TXCS_DEFAULT = TXCS_FIFOTH_4QW | TXCS_BURST, }; -#define JME_TX_DISABLE_TIMEOUT 5 /* 5 msec */ +#define JME_TX_DISABLE_TIMEOUT 10 /* 10 msec */ /* * TX MAC Control/Status Bits @@ -617,7 +645,7 @@ enum jme_rxcs_values { RXCS_RETRYGAP_256ns | RXCS_RETRYCNT_32, }; -#define JME_RX_DISABLE_TIMEOUT 5 /* 5 msec */ +#define JME_RX_DISABLE_TIMEOUT 10 /* 10 msec */ /* * RX MAC Control/Status Bits @@ -634,13 +662,27 @@ enum jme_rxmcs_bits { RXMCS_VTAGRM = 0x00000004, RXMCS_PREPAD = 0x00000002, RXMCS_CHECKSUM = 0x00000001, - + RXMCS_DEFAULT = RXMCS_VTAGRM | RXMCS_PREPAD | RXMCS_FLOWCTRL | RXMCS_CHECKSUM, }; +/* + * Wakeup Frame setup interface registers + */ +#define WAKEUP_FRAME_NR 8 +#define WAKEUP_FRAME_MASK_DWNR 4 +enum jme_wfoi_bit_masks { + WFOI_MASK_SEL = 0x00000070, + WFOI_CRC_SEL = 0x00000008, + WFOI_FRAME_SEL = 0x00000007, +}; +enum jme_wfoi_shifts { + WFOI_MASK_SHIFT = 4, +}; + /* * SMI Related definitions */ @@ -688,6 +730,34 @@ enum jme_ghc_speed_val { GHC_SPEED_1000M = 0x00000030, }; +/* + * Power management control and status register + */ +enum jme_pmcs_bit_masks { + PMCS_WF7DET = 0x80000000, + PMCS_WF6DET = 0x40000000, + PMCS_WF5DET = 0x20000000, + PMCS_WF4DET = 0x10000000, + PMCS_WF3DET = 0x08000000, + PMCS_WF2DET = 0x04000000, + PMCS_WF1DET = 0x02000000, + PMCS_WF0DET = 0x01000000, + PMCS_LFDET = 0x00040000, + PMCS_LRDET = 0x00020000, + PMCS_MFDET = 0x00010000, + PMCS_WF7EN = 0x00008000, + PMCS_WF6EN = 0x00004000, + PMCS_WF5EN = 0x00002000, + PMCS_WF4EN = 0x00001000, + PMCS_WF3EN = 0x00000800, + PMCS_WF2EN = 0x00000400, + PMCS_WF1EN = 0x00000200, + PMCS_WF0EN = 0x00000100, + PMCS_LFEN = 0x00000004, + PMCS_LREN = 0x00000002, + PMCS_MFEN = 0x00000001, +}; + /* * Giga PHY Status Registers */