X-Git-Url: http://bbs.cooldavid.org/git/?p=jme.git;a=blobdiff_plain;f=jme.h;h=7eb2d978349d50306eddba63298b4badc443726a;hp=317a28e7a02548a02b51a2e7a4191c553ce92a83;hb=3b70a6fa8a0860c52fc4cdc74c5006dba2eac82c;hpb=cd0ff491e3c0fdb01fb189987c4d822b1113cc53

diff --git a/jme.h b/jme.h
index 317a28e..7eb2d97 100644
--- a/jme.h
+++ b/jme.h
@@ -22,10 +22,10 @@
  */
 
 #ifndef __JME_H_INCLUDED__
-#define __JME_H_INCLUDEE__
+#define __JME_H_INCLUDED__
 
 #define DRV_NAME	"jme"
-#define DRV_VERSION	"1.0"
+#define DRV_VERSION	"1.0.4"
 #define PFX		DRV_NAME ": "
 
 #define PCI_DEVICE_ID_JMICRON_JMC250	0x0250
@@ -372,7 +372,13 @@ struct jme_buffer_info {
 /*
  * The structure holding buffer information and ring descriptors all together.
  */
+#include <linux/version.h>
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
+#define MAX_RING_DESC_NR	512
+#else
 #define MAX_RING_DESC_NR	1024
+#endif
+
 struct jme_ring {
 	void *alloc;		/* pointer to allocated memory */
 	void *desc;		/* pointer to ring memory  */
@@ -387,10 +393,80 @@ struct jme_ring {
 	atomic_t nr_free;
 };
 
-#define NET_STAT(priv) (priv->dev->stats)
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
+#define false 0
+#define true 0
+#define netdev_alloc_skb(dev, len) dev_alloc_skb(len)
+#define PCI_VENDOR_ID_JMICRON           0x197B
+#endif
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,19)
+#define PCI_VDEVICE(vendor, device)             \
+        PCI_VENDOR_ID_##vendor, (device),       \
+        PCI_ANY_ID, PCI_ANY_ID, 0, 0
+#endif
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
+#define NET_STAT(priv) priv->stats
+#define NETDEV_GET_STATS(netdev, fun_ptr) \
+	netdev->get_stats = fun_ptr
+#define DECLARE_NET_DEVICE_STATS struct net_device_stats stats;
+static inline struct iphdr *ip_hdr(const struct sk_buff *skb)
+{
+	return skb->nh.iph;
+}
+
+static inline struct ipv6hdr *ipv6_hdr(const struct sk_buff *skb)
+{
+	return skb->nh.ipv6h;
+}
+
+static inline struct tcphdr *tcp_hdr(const struct sk_buff *skb)
+{
+	return skb->h.th;
+}
+#else
+#define NET_STAT(priv) priv->dev->stats
 #define NETDEV_GET_STATS(netdev, fun_ptr)
 #define DECLARE_NET_DEVICE_STATS
+#endif
 
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,23)
+#define DECLARE_NAPI_STRUCT
+#define NETIF_NAPI_SET(dev, napis, pollfn, q) \
+	dev->poll = pollfn; \
+	dev->weight = q;
+#define JME_NAPI_HOLDER(holder) struct net_device *holder
+#define JME_NAPI_WEIGHT(w) int *w
+#define JME_NAPI_WEIGHT_VAL(w) *w
+#define JME_NAPI_WEIGHT_SET(w, r) *w = r
+#define DECLARE_NETDEV struct net_device *netdev = jme->dev;
+#define JME_RX_COMPLETE(dev, napis) netif_rx_complete(dev)
+#define JME_NAPI_ENABLE(priv) netif_poll_enable(priv->dev);
+#define JME_NAPI_DISABLE(priv) netif_poll_disable(priv->dev);
+#define JME_RX_SCHEDULE_PREP(priv) \
+	netif_rx_schedule_prep(priv->dev)
+#define JME_RX_SCHEDULE(priv) \
+	__netif_rx_schedule(priv->dev);
+#elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,28)
+#define DECLARE_NAPI_STRUCT struct napi_struct napi;
+#define NETIF_NAPI_SET(dev, napis, pollfn, q) \
+	netif_napi_add(dev, napis, pollfn, q);
+#define JME_NAPI_HOLDER(holder) struct napi_struct *holder
+#define JME_NAPI_WEIGHT(w) int w
+#define JME_NAPI_WEIGHT_VAL(w) w
+#define JME_NAPI_WEIGHT_SET(w, r)
+#define DECLARE_NETDEV
+#define JME_RX_COMPLETE(dev, napis) napi_complete(napis)
+#define JME_NAPI_ENABLE(priv) napi_enable(&priv->napi);
+#define JME_NAPI_DISABLE(priv) \
+	if (!napi_disable_pending(&priv->napi)) \
+		napi_disable(&priv->napi);
+#define JME_RX_SCHEDULE_PREP(priv) \
+	napi_schedule_prep(&priv->napi)
+#define JME_RX_SCHEDULE(priv) \
+	__napi_schedule(&priv->napi);
+#else
 #define DECLARE_NAPI_STRUCT struct napi_struct napi;
 #define NETIF_NAPI_SET(dev, napis, pollfn, q) \
 	netif_napi_add(dev, napis, pollfn, q);
@@ -398,6 +474,7 @@ struct jme_ring {
 #define JME_NAPI_WEIGHT(w) int w
 #define JME_NAPI_WEIGHT_VAL(w) w
 #define JME_NAPI_WEIGHT_SET(w, r)
+#define DECLARE_NETDEV struct net_device *netdev = jme->dev;
 #define JME_RX_COMPLETE(dev, napis) netif_rx_complete(dev, napis)
 #define JME_NAPI_ENABLE(priv) napi_enable(&priv->napi);
 #define JME_NAPI_DISABLE(priv) \
@@ -407,6 +484,7 @@ struct jme_ring {
 	netif_rx_schedule_prep(priv->dev, &priv->napi)
 #define JME_RX_SCHEDULE(priv) \
 	__netif_rx_schedule(priv->dev, &priv->napi);
+#endif
 
 /*
  * Jmac Adapter Private data
@@ -444,7 +522,7 @@ struct jme_adapter {
 	u32			rx_ring_mask;
 	u8			mrrs;
 	unsigned int		fpgaver;
-	unsigned int		chipver;
+	unsigned int		chiprev;
 	u8			rev;
 	u32			msg_enable;
 	struct ethtool_cmd	old_ecmd;
@@ -464,6 +542,15 @@ struct jme_adapter {
 	DECLARE_NET_DEVICE_STATS
 };
 
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
+static struct net_device_stats *
+jme_get_stats(struct net_device *netdev)
+{
+	struct jme_adapter *jme = netdev_priv(netdev);
+	return &jme->stats;
+}
+#endif
+
 enum shadow_reg_val {
 	SHADOW_IEVE = 0,
 };
@@ -481,6 +568,15 @@ enum jme_flags_bits {
 #define JME_REG_LEN		0x500
 #define MAX_ETHERNET_JUMBO_PACKET_SIZE 9216
 
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,23)
+static inline struct jme_adapter*
+jme_napi_priv(struct net_device *holder)
+{
+	struct jme_adapter *jme;
+	jme = netdev_priv(holder);
+	return jme;
+}
+#else
 static inline struct jme_adapter*
 jme_napi_priv(struct napi_struct *napi)
 {
@@ -488,6 +584,7 @@ jme_napi_priv(struct napi_struct *napi)
 	jme = container_of(napi, struct jme_adapter, napi);
 	return jme;
 }
+#endif
 
 /*
  * MMaped I/O Resters
@@ -815,16 +912,30 @@ static inline u32 smi_phy_addr(int x)
  * Global Host Control
  */
 enum jme_ghc_bit_mask {
-	GHC_SWRST	= 0x40000000,
-	GHC_DPX		= 0x00000040,
-	GHC_SPEED	= 0x00000030,
-	GHC_LINK_POLL	= 0x00000001,
+	GHC_SWRST		= 0x40000000,
+	GHC_DPX			= 0x00000040,
+	GHC_SPEED		= 0x00000030,
+	GHC_LINK_POLL		= 0x00000001,
 };
 
 enum jme_ghc_speed_val {
-	GHC_SPEED_10M	= 0x00000010,
-	GHC_SPEED_100M	= 0x00000020,
-	GHC_SPEED_1000M	= 0x00000030,
+	GHC_SPEED_10M		= 0x00000010,
+	GHC_SPEED_100M		= 0x00000020,
+	GHC_SPEED_1000M		= 0x00000030,
+};
+
+enum jme_ghc_to_clk {
+	GHC_TO_CLK_OFF		= 0x00000000,
+	GHC_TO_CLK_GPHY		= 0x00400000,
+	GHC_TO_CLK_PCIE		= 0x00800000,
+	GHC_TO_CLK_INVALID	= 0x00C00000,
+};
+
+enum jme_ghc_txmac_clk {
+	GHC_TXMAC_CLK_OFF	= 0x00000000,
+	GHC_TXMAC_CLK_GPHY	= 0x00100000,
+	GHC_TXMAC_CLK_PCIE	= 0x00200000,
+	GHC_TXMAC_CLK_INVALID	= 0x00300000,
 };
 
 /*
@@ -963,6 +1074,36 @@ enum jme_gpreg0_vals {
 				  GPREG0_PHYADDR_1,
 };
 
+/*
+ * General Purpose REG-1
+ * Note: All theses bits defined here are for
+ *       Chip mode revision 0x11 only
+ */
+enum jme_gpreg1_masks {
+	GPREG1_INTRDELAYUNIT	= 0x00000018,
+	GPREG1_INTRDELAYENABLE	= 0x00000007,
+};
+
+enum jme_gpreg1_vals {
+	GPREG1_RSSPATCH		= 0x00000040,
+	GPREG1_HALFMODEPATCH	= 0x00000020,
+
+	GPREG1_INTDLYUNIT_16NS	= 0x00000000,
+	GPREG1_INTDLYUNIT_256NS	= 0x00000008,
+	GPREG1_INTDLYUNIT_1US	= 0x00000010,
+	GPREG1_INTDLYUNIT_16US	= 0x00000018,
+
+	GPREG1_INTDLYEN_1U	= 0x00000001,
+	GPREG1_INTDLYEN_2U	= 0x00000002,
+	GPREG1_INTDLYEN_3U	= 0x00000003,
+	GPREG1_INTDLYEN_4U	= 0x00000004,
+	GPREG1_INTDLYEN_5U	= 0x00000005,
+	GPREG1_INTDLYEN_6U	= 0x00000006,
+	GPREG1_INTDLYEN_7U	= 0x00000007,
+
+	GPREG1_DEFAULT		= 0x00000000,
+};
+
 /*
  * Interrupt Status Bits
  */
@@ -1050,13 +1191,13 @@ enum jme_pcctx_bits {
  */
 enum jme_chipmode_bit_masks {
 	CM_FPGAVER_MASK		= 0xFFFF0000,
-	CM_CHIPVER_MASK		= 0x0000FF00,
+	CM_CHIPREV_MASK		= 0x0000FF00,
 	CM_CHIPMODE_MASK	= 0x0000000F,
 };
 
 enum jme_chipmode_shifts {
 	CM_FPGAVER_SHIFT	= 16,
-	CM_CHIPVER_SHIFT	= 8,
+	CM_CHIPREV_SHIFT	= 8,
 };
 
 /*
@@ -1092,12 +1233,14 @@ static char *MAC_REG_NAME[] = {
 	"JME_RXMCHT_LO", "JME_RXMCHT_HI", "JME_WFODP",    "JME_WFOI",
 	"JME_SMI",       "JME_GHC",       "UNKNOWN",      "UNKNOWN",
 	"JME_PMCS"};
+
 static char *PE_REG_NAME[] = {
 	"UNKNOWN",      "UNKNOWN",     "UNKNOWN",    "UNKNOWN",
 	"UNKNOWN",      "UNKNOWN",     "UNKNOWN",    "UNKNOWN",
 	"UNKNOWN",      "UNKNOWN",     "JME_PHY_CS", "UNKNOWN",
 	"JME_PHY_LINK", "UNKNOWN",     "UNKNOWN",    "UNKNOWN",
 	"JME_SMBCSR",   "JME_SMBINTF"};
+
 static char *MISC_REG_NAME[] = {
 	"JME_TMCSR",  "JME_GPIO",     "JME_GPREG0",  "JME_GPREG1",
 	"JME_IEVE",   "JME_IREQ",     "JME_IENS",    "JME_IENC",
@@ -1108,11 +1251,12 @@ static char *MISC_REG_NAME[] = {
 	"UNKNOWN",    "UNKNOWN",      "UNKNOWN",     "UNKNOWN",
 	"JME_TIMER1", "JME_TIMER2",   "UNKNOWN",     "JME_APMC",
 	"JME_PCCSRX0"};
+
 static inline void reg_dbg(const struct jme_adapter *jme,
 		const char *msg, u32 val, u32 reg)
 {
 	const char *regname;
-	switch(reg & 0xF00) {
+	switch (reg & 0xF00) {
 	case 0x000:
 		regname = MAC_REG_NAME[(reg & 0xFF) >> 2];
 		break;
@@ -1120,7 +1264,7 @@ static inline void reg_dbg(const struct jme_adapter *jme,
 		regname = PE_REG_NAME[(reg & 0xFF) >> 2];
 		break;
 	case 0x800:
-		regname = MISC_REG_NAME[(reg & 0xFF) >>2];
+		regname = MISC_REG_NAME[(reg & 0xFF) >> 2];
 		break;
 	default:
 		regname = PE_REG_NAME[0];
@@ -1178,6 +1322,14 @@ enum jme_phy_reg17_vals {
 
 #define BMSR_ANCOMP               0x0020
 
+/*
+ * Workaround
+ */
+static inline int is_buggy250(unsigned short device, unsigned int chiprev)
+{
+	return device == PCI_DEVICE_ID_JMICRON_JMC250 && chiprev == 0x11;
+}
+
 /*
  * Function prototypes
  */