X-Git-Url: http://bbs.cooldavid.org/git/?p=jme.git;a=blobdiff_plain;f=jme.h;h=18358d0a659094a6a90d4dbde082404a1c0cfc64;hp=2b12f0412891d8244f77d448dcd24a42551e6a51;hb=79ce639c9d90abc4d30d749af2d135c20a8c419e;hpb=fcf45b4ca68badd804155c5a14e4105bda8a7668

diff --git a/jme.h b/jme.h
index 2b12f04..18358d0 100644
--- a/jme.h
+++ b/jme.h
@@ -24,12 +24,12 @@
 #include <linux/version.h>
 
 #define DRV_NAME	"jme"
-#define DRV_VERSION	"0.4"
+#define DRV_VERSION	"0.6"
 #define PFX DRV_NAME	": "
 
 #ifdef DEBUG
 #define dprintk(devname, fmt, args...) \
-        printk(KERN_DEBUG PFX "%s: " fmt, devname, ## args)
+        printk(KERN_DEBUG "%s: " fmt, devname, ## args)
 #else
 #define dprintk(devname, fmt, args...)
 #endif
@@ -46,13 +46,17 @@
 #define rx_dbg(args...)
 #endif
 
+#ifdef CSUM_DEBUG
+#define	csum_dbg(devname, fmt, args...) dprintk(devname, fmt, ## args)
+#else
+#define csum_dbg(args...)
+#endif
+
 #define jprintk(devname, fmt, args...) \
-        printk(KERN_INFO PFX "%s: " fmt, devname, ## args)
+        printk(KERN_INFO "%s: " fmt, devname, ## args)
 
 #define jeprintk(devname, fmt, args...) \
-        printk(KERN_ERR PFX "%s: " fmt, devname, ## args)
-
-#define USE_IEVE_SHADOW 0
+        printk(KERN_ERR "%s: " fmt, devname, ## args)
 
 #define DEFAULT_MSG_ENABLE        \
 	(NETIF_MSG_DRV          | \
@@ -73,6 +77,9 @@ enum pci_conf_dcsr_mrrs_vals {
 	MRRS_4096B	= 0x50,
 };
 
+#define MAX_ETHERNET_JUMBO_PACKET_SIZE 9216
+#define MIN_ETHERNET_PACKET_SIZE 60
+
 enum dynamic_pcc_values {
 	PCC_P1		= 1,
 	PCC_P2		= 2,
@@ -87,16 +94,20 @@ enum dynamic_pcc_values {
 	PCC_P3_CNT	= 255,
 };
 struct dynpcc_info {
-	unsigned long	check_point;
 	unsigned long	last_bytes;
 	unsigned long	last_pkts;
+	unsigned long	intr_cnt;
 	unsigned char	cur;
 	unsigned char	attempt;
 	unsigned char	cnt;
 };
-#define PCC_INTERVAL (HZ / 10)
+#define PCC_INTERVAL_US	100000
+#define PCC_INTERVAL (HZ / (1000000/PCC_INTERVAL_US))
 #define PCC_P3_THRESHOLD 3*1024*1024
-#define PCC_P2_THRESHOLD 1000
+#define PCC_P2_THRESHOLD 800
+#define PCC_INTR_THRESHOLD 800
+#define PCC_TX_TO 100
+#define PCC_TX_CNT 16
 
 /*
  * TX/RX Descriptors
@@ -149,9 +160,27 @@ struct txdesc {
 			/* DW3 */
 			__u32 bufaddrl;
 		} desc2;
+		struct {
+			/* DW0 */
+			__u8 ehdrsz;
+			__u8 rsv1;
+			__u8 rsv2;
+			__u8 flags;
+
+			/* DW1 */
+			__u16 trycnt;
+			__u16 segcnt;
+
+			/* DW2 */
+			__u16 pktsz;
+			__u16 rsv3;
+
+			/* DW3 */
+			__u32 bufaddrl;
+		} descwb;
 	};
 };
-enum jme_txdesc_flag_bits {
+enum jme_txdesc_flags_bits {
 	TXFLAG_OWN	= 0x80,
 	TXFLAG_INT	= 0x40,
 	TXFLAG_64BIT	= 0x20,
@@ -161,6 +190,17 @@ enum jme_txdesc_flag_bits {
 	TXFLAG_LSEN	= 0x02,
 	TXFLAG_TAGON	= 0x01,
 };
+enum jme_rxdescwb_flags_bits {
+	TXWBFLAG_OWN	= 0x80,
+	TXWBFLAG_INT	= 0x40,
+	TXWBFLAG_TMOUT	= 0x20,
+	TXWBFLAG_TRYOUT	= 0x10,
+	TXWBFLAG_COL	= 0x08,
+
+	TXWBFLAG_ALLERR	= TXWBFLAG_TMOUT |
+			  TXWBFLAG_TRYOUT |
+			  TXWBFLAG_COL,
+};
 
 
 #define RX_DESC_SIZE		16
@@ -169,15 +209,14 @@ enum jme_txdesc_flag_bits {
 #define RX_RING_SIZE		(RING_DESC_NR * RX_DESC_SIZE)
 
 #define RX_BUF_DMA_ALIGN	8
-//#define RX_BUF_SIZE		1600
-#define RX_BUF_SIZE		9200
-//#define RX_BUF_SIZE		4000
 #define RX_PREPAD_SIZE		10
-
-/*
- * Will use mtu in the future
- */
-#define RX_BUF_ALLOC_SIZE	RX_BUF_SIZE + RX_BUF_DMA_ALIGN
+#define ETH_CRC_LEN		2
+#define RX_VLANHDR_LEN		2
+#define RX_EXTRA_LEN		(RX_PREPAD_SIZE + \
+				ETH_HLEN + \
+				ETH_CRC_LEN + \
+				RX_VLANHDR_LEN + \
+				RX_BUF_DMA_ALIGN)
 
 struct rxdesc {
 	union {
@@ -280,7 +319,7 @@ struct jme_ring {
         u16 next_to_use;
         u16 next_to_clean;
 
-	u16 nr_free;
+	atomic_t nr_free;
 };
 
 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
@@ -307,18 +346,23 @@ struct jme_adapter {
 	struct mii_if_info	mii_if;
 	struct jme_ring		rxring[RX_RING_NR];
 	struct jme_ring		txring[TX_RING_NR];
-	spinlock_t		tx_lock;
 	spinlock_t		phy_lock;
 	spinlock_t		macaddr_lock;
+	spinlock_t		rxmcs_lock;
 	struct tasklet_struct	rxempty_task;
 	struct tasklet_struct	rxclean_task;
 	struct tasklet_struct	txclean_task;
 	struct tasklet_struct	linkch_task;
+	struct tasklet_struct	pcc_task;
+	__u32			flags;
 	__u32			reg_txcs;
+	__u32			reg_txpfc;
+	__u32			reg_rxcs;
 	__u32			reg_rxmcs;
 	__u32			reg_ghc;
 	__u32			phylink;
 	__u8			mrrs;
+	unsigned int		oldmtu;
 	struct dynpcc_info	dpi;
 	atomic_t		intr_sem;
 	atomic_t		link_changing;
@@ -329,7 +373,12 @@ struct jme_adapter {
 enum shadow_reg_val {
 	SHADOW_IEVE = 0,
 };
+enum jme_flags_bits {
+	JME_FLAG_MSI		= 0x00000001,
+};
 #define WAIT_TASKLET_TIMEOUT	500 /* 500 ms */
+#define TX_TIMEOUT		(5*HZ)
+
 
 /*
  * MMaped I/O Resters
@@ -341,6 +390,13 @@ enum jme_iomap_offsets {
 	JME_RSS		= 0x0C00,
 };
 
+enum jme_iomap_lens {
+	JME_MAC_LEN	= 0x80,
+	JME_PHY_LEN	= 0x58,
+	JME_MISC_LEN	= 0x98,
+	JME_RSS_LEN	= 0xFF,
+};
+
 enum jme_iomap_regs {
 	JME_TXCS	= JME_MAC | 0x00, /* Transmit Control and Status */
 	JME_TXDBA_LO	= JME_MAC | 0x04, /* Transmit Queue Desc Base Addr */
@@ -374,6 +430,7 @@ enum jme_iomap_regs {
 	JME_SMBCSR	= JME_PHY | 0x40, /* SMB Control and Status */
 
 
+	JME_TMCSR	= JME_MISC| 0x00, /* Timer Control/Status Register */
 	JME_GPREG0	= JME_MISC| 0x08, /* General purpose REG-0 */
 	JME_GPREG1	= JME_MISC| 0x0C, /* General purpose REG-1 */
 	JME_IEVE	= JME_MISC| 0x20, /* Interrupt Event Status */
@@ -427,7 +484,7 @@ enum jme_txcs_value {
 	TXCS_DEFAULT		= TXCS_FIFOTH_4QW |
 				  TXCS_BURST,
 };
-#define JME_TX_DISABLE_TIMEOUT 100 /* 100 msec */
+#define JME_TX_DISABLE_TIMEOUT 5 /* 5 msec */
 
 /*
  * TX MAC Control/Status Bits
@@ -469,6 +526,23 @@ enum jme_txmcs_values {
 				  TXMCS_PADDING,
 };
 
+enum jme_txpfc_bits_masks {
+	TXPFC_VLAN_TAG		= 0xFFFF0000,
+	TXPFC_VLAN_EN		= 0x00008000,
+	TXPFC_PF_EN		= 0x00000001,
+};
+
+enum jme_txtrhd_bits_masks {
+	TXTRHD_TXPEN		= 0x80000000,
+	TXTRHD_TXP		= 0x7FFFFF00,
+	TXTRHD_TXREN		= 0x00000080,
+	TXTRHD_TXRL		= 0x0000007F,
+};
+enum jme_txtrhd_shifts {
+	TXTRHD_TXP_SHIFT	= 8,
+	TXTRHD_TXRL_SHIFT	= 0,
+};
+
 
 /*
  * RX Control/Status Bits
@@ -543,7 +617,7 @@ enum jme_rxcs_values {
 				  RXCS_RETRYGAP_256ns |
 				  RXCS_RETRYCNT_32,
 };
-#define JME_RX_DISABLE_TIMEOUT 100 /* 100 msec */
+#define JME_RX_DISABLE_TIMEOUT 5 /* 5 msec */
 
 /*
  * RX MAC Control/Status Bits
@@ -560,6 +634,11 @@ enum jme_rxmcs_bits {
 	RXMCS_VTAGRM		= 0x00000004,
 	RXMCS_PREPAD		= 0x00000002,
 	RXMCS_CHECKSUM		= 0x00000001,
+	
+	RXMCS_DEFAULT		= RXMCS_VTAGRM |
+				  RXMCS_PREPAD |
+				  RXMCS_FLOWCTRL |
+				  RXMCS_CHECKSUM,
 };
 
 /*
@@ -630,14 +709,22 @@ enum jme_phy_link_speed_val {
 /*
  * SMB Control and Status
  */
-enum jme_smbcsr_bit_mask
-{
+enum jme_smbcsr_bit_mask {
 	SMBCSR_CNACK	= 0x00020000,
 	SMBCSR_RELOAD	= 0x00010000,
 	SMBCSR_EEPROMD	= 0x00000020,
 };
 #define JME_SMB_TIMEOUT 10 /* 10 msec */
 
+/*
+ * Timer Control/Status Register
+ */
+enum jme_tmcsr_bit_masks {
+	TMCSR_SWIT	= 0x80000000,
+	TMCSR_EN	= 0x01000000,
+	TMCSR_CNT	= 0x00FFFFFF,
+};
+
 
 /*
  * General Purpost REG-0
@@ -716,7 +803,9 @@ enum jme_interrupt_bits
 	INTR_TX1	= 0x00000002,
 	INTR_TX0	= 0x00000001,
 };
-static const __u32 INTR_ENABLE = INTR_LINKCH |
+static const __u32 INTR_ENABLE = INTR_SWINTR |
+				 INTR_TMINTR |
+				 INTR_LINKCH |
 				 INTR_RX0EMP |
 				 INTR_PCCRX0TO |
 				 INTR_PCCRX0 |
@@ -767,19 +856,19 @@ enum jme_shadow_base_address_bits {
  */
 __always_inline __u32 jread32(struct jme_adapter *jme, __u32 reg)
 {
-	return le32_to_cpu(readl(jme->regs + reg));
+	return le32_to_cpu(readl((__u8*)jme->regs + reg));
 }
 __always_inline void jwrite32(struct jme_adapter *jme, __u32 reg, __u32 val)
 {
-	writel(cpu_to_le32(val), jme->regs + reg);
+	writel(cpu_to_le32(val), (__u8*)jme->regs + reg);
 }
 __always_inline void jwrite32f(struct jme_adapter *jme, __u32 reg, __u32 val)
 {
 	/*
 	 * Read after write should cause flush
 	 */
-	writel(cpu_to_le32(val), jme->regs + reg);
-	readl(jme->regs + reg);
+	writel(cpu_to_le32(val), (__u8*)jme->regs + reg);
+	readl((__u8*)jme->regs + reg);
 }
 
 /*