X-Git-Url: http://bbs.cooldavid.org/git/?p=jme.git;a=blobdiff_plain;f=jme.c;h=b79913e815802b0c70c068991482864226531022;hp=3b84cb3a05a7fc50d7ff79dd6edef7181cd1ff84;hb=refs%2Fheads%2Fautodown;hpb=937ef75a6619ef5bb22423fe331b9ee8a4fd0926 diff --git a/jme.c b/jme.c index 3b84cb3..b79913e 100644 --- a/jme.c +++ b/jme.c @@ -3,6 +3,7 @@ * * Copyright 2008 JMicron Technology Corporation * http://www.jmicron.com/ + * Copyright (c) 2009 - 2010 Guo-Fu Tseng * * Author: Guo-Fu Tseng * @@ -49,6 +50,7 @@ static int force_pseudohp = -1; static int no_pseudohp = -1; static int no_extplug = -1; +static int delay_time = 11; module_param(force_pseudohp, int, 0); MODULE_PARM_DESC(force_pseudohp, "Enable pseudo hot-plug feature manually by driver instead of BIOS."); @@ -57,7 +59,10 @@ MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); module_param(no_extplug, int, 0); MODULE_PARM_DESC(no_extplug, "Do not use external plug signal for pseudo hot-plug."); - +module_param(delay_time, uint, 0); +MODULE_PARM_DESC(delay_time, + "Seconds to delay before switching lower speed; default = 11 seconds(3 trials)"); + static int jme_mdio_read(struct net_device *netdev, int phy, int reg) { @@ -137,7 +142,7 @@ jme_reset_phy_processor(struct jme_adapter *jme) static void jme_setup_wakeup_frame(struct jme_adapter *jme, - u32 *mask, u32 crc, int fnr) + const u32 *mask, u32 crc, int fnr) { int i; @@ -162,17 +167,93 @@ jme_setup_wakeup_frame(struct jme_adapter *jme, } } +static inline void +jme_mac_rxclk_off(struct jme_adapter *jme) +{ + jme->reg_gpreg1 |= GPREG1_RXCLKOFF; + jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); +} + +static inline void +jme_mac_rxclk_on(struct jme_adapter *jme) +{ + jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF; + jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); +} + +static inline void +jme_mac_txclk_off(struct jme_adapter *jme) +{ + jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC); + jwrite32f(jme, JME_GHC, jme->reg_ghc); +} + +static inline void +jme_mac_txclk_on(struct jme_adapter *jme) +{ + u32 speed = jme->reg_ghc & GHC_SPEED; + if (speed == GHC_SPEED_1000M) + jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY; + else + jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; + jwrite32f(jme, JME_GHC, jme->reg_ghc); +} + +static inline void +jme_reset_ghc_speed(struct jme_adapter *jme) +{ + jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX); + jwrite32f(jme, JME_GHC, jme->reg_ghc); +} + +static inline void +jme_reset_250A2_workaround(struct jme_adapter *jme) +{ + jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | + GPREG1_RSSPATCH); + jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); +} + +static inline void +jme_assert_ghc_reset(struct jme_adapter *jme) +{ + jme->reg_ghc |= GHC_SWRST; + jwrite32f(jme, JME_GHC, jme->reg_ghc); +} + +static inline void +jme_clear_ghc_reset(struct jme_adapter *jme) +{ + jme->reg_ghc &= ~GHC_SWRST; + jwrite32f(jme, JME_GHC, jme->reg_ghc); +} + static inline void jme_reset_mac_processor(struct jme_adapter *jme) { - u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; + static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; u32 crc = 0xCDCDCDCD; u32 gpreg0; int i; - jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST); - udelay(2); - jwrite32(jme, JME_GHC, jme->reg_ghc); + jme_reset_ghc_speed(jme); + jme_reset_250A2_workaround(jme); + + jme_mac_rxclk_on(jme); + jme_mac_txclk_on(jme); + udelay(1); + jme_assert_ghc_reset(jme); + udelay(1); + jme_mac_rxclk_off(jme); + jme_mac_txclk_off(jme); + udelay(1); + jme_clear_ghc_reset(jme); + udelay(1); + jme_mac_rxclk_on(jme); + jme_mac_txclk_on(jme); + udelay(1); + jme_mac_rxclk_off(jme); + jme_mac_txclk_off(jme); jwrite32(jme, JME_RXDBA_LO, 0x00000000); jwrite32(jme, JME_RXDBA_HI, 0x00000000); @@ -192,14 +273,6 @@ jme_reset_mac_processor(struct jme_adapter *jme) else gpreg0 = GPREG0_DEFAULT; jwrite32(jme, JME_GPREG0, gpreg0); - jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT); -} - -static inline void -jme_reset_ghc_speed(struct jme_adapter *jme) -{ - jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX); - jwrite32(jme, JME_GHC, jme->reg_ghc); } static inline void @@ -337,14 +410,16 @@ jme_linkstat_from_phy(struct jme_adapter *jme) return phylink; } +/* setting as RMII mode ??*/ static inline void -jme_set_phyfifoa(struct jme_adapter *jme) +jme_set_phyfifo_5level(struct jme_adapter *jme) { jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); } +/* setting MII mode ??*/ static inline void -jme_set_phyfifob(struct jme_adapter *jme) +jme_set_phyfifo_8level(struct jme_adapter *jme) { jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); } @@ -353,7 +428,7 @@ static int jme_check_link(struct net_device *netdev, int testonly) { struct jme_adapter *jme = netdev_priv(netdev); - u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1; + u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr; char linkmsg[64]; int rc = 0; @@ -416,23 +491,21 @@ jme_check_link(struct net_device *netdev, int testonly) jme->phylink = phylink; - ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX | - GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE | - GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY); + /* + * The speed/duplex setting of jme->reg_ghc already cleared + * by jme_reset_mac_processor() + */ switch (phylink & PHY_LINK_SPEED_MASK) { case PHY_LINK_SPEED_10M: - ghc |= GHC_SPEED_10M | - GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; + jme->reg_ghc |= GHC_SPEED_10M; strcat(linkmsg, "10 Mbps, "); break; case PHY_LINK_SPEED_100M: - ghc |= GHC_SPEED_100M | - GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; + jme->reg_ghc |= GHC_SPEED_100M; strcat(linkmsg, "100 Mbps, "); break; case PHY_LINK_SPEED_1000M: - ghc |= GHC_SPEED_1000M | - GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY; + jme->reg_ghc |= GHC_SPEED_1000M; strcat(linkmsg, "1000 Mbps, "); break; default: @@ -441,42 +514,40 @@ jme_check_link(struct net_device *netdev, int testonly) if (phylink & PHY_LINK_DUPLEX) { jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); - ghc |= GHC_DPX; + jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX); + jme->reg_ghc |= GHC_DPX; } else { jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | TXMCS_BACKOFF | TXMCS_CARRIERSENSE | TXMCS_COLLISION); - jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN | - ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) | - TXTRHD_TXREN | - ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL)); + jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX); } - gpreg1 = GPREG1_DEFAULT; + jwrite32(jme, JME_GHC, jme->reg_ghc); + if (is_buggy250(jme->pdev->device, jme->chiprev)) { + jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | + GPREG1_RSSPATCH); if (!(phylink & PHY_LINK_DUPLEX)) - gpreg1 |= GPREG1_HALFMODEPATCH; + jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH; switch (phylink & PHY_LINK_SPEED_MASK) { case PHY_LINK_SPEED_10M: - jme_set_phyfifoa(jme); - gpreg1 |= GPREG1_RSSPATCH; + jme_set_phyfifo_8level(jme); + jme->reg_gpreg1 |= GPREG1_RSSPATCH; break; case PHY_LINK_SPEED_100M: - jme_set_phyfifob(jme); - gpreg1 |= GPREG1_RSSPATCH; + jme_set_phyfifo_5level(jme); + jme->reg_gpreg1 |= GPREG1_RSSPATCH; break; case PHY_LINK_SPEED_1000M: - jme_set_phyfifoa(jme); + jme_set_phyfifo_8level(jme); break; default: break; } } - - jwrite32(jme, JME_GPREG1, gpreg1); - jwrite32(jme, JME_GHC, ghc); - jme->reg_ghc = ghc; + jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? "Full-Duplex, " : @@ -615,10 +686,14 @@ jme_enable_tx_engine(struct jme_adapter *jme) * Enable TX Engine */ wmb(); - jwrite32(jme, JME_TXCS, jme->reg_txcs | + jwrite32f(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0 | TXCS_ENABLE); + /* + * Start clock for TX MAC Processor + */ + jme_mac_txclk_on(jme); } static inline void @@ -653,6 +728,11 @@ jme_disable_tx_engine(struct jme_adapter *jme) if (!i) pr_err("Disable TX engine timeout\n"); + + /* + * Stop clock for TX MAC Processor + */ + jme_mac_txclk_off(jme); } static void @@ -830,16 +910,22 @@ jme_enable_rx_engine(struct jme_adapter *jme) /* * Setup Unicast Filter */ + jme_set_unicastaddr(jme->dev); jme_set_multi(jme->dev); /* * Enable RX Engine */ wmb(); - jwrite32(jme, JME_RXCS, jme->reg_rxcs | + jwrite32f(jme, JME_RXCS, jme->reg_rxcs | RXCS_QUEUESEL_Q0 | RXCS_ENABLE | RXCS_QST); + + /* + * Start clock for RX MAC Processor + */ + jme_mac_rxclk_on(jme); } static inline void @@ -876,10 +962,40 @@ jme_disable_rx_engine(struct jme_adapter *jme) if (!i) pr_err("Disable RX engine timeout\n"); + /* + * Stop clock for RX MAC Processor + */ + jme_mac_rxclk_off(jme); +} + +static u16 +jme_udpsum(struct sk_buff *skb) +{ + u16 csum = 0xFFFFu; + + if (skb->len < (ETH_HLEN + sizeof(struct iphdr))) + return csum; + if (skb->protocol != htons(ETH_P_IP)) + return csum; + skb_set_network_header(skb, ETH_HLEN); + if ((ip_hdr(skb)->protocol != IPPROTO_UDP) || + (skb->len < (ETH_HLEN + + (ip_hdr(skb)->ihl << 2) + + sizeof(struct udphdr)))) { + skb_reset_network_header(skb); + return csum; + } + skb_set_transport_header(skb, + ETH_HLEN + (ip_hdr(skb)->ihl << 2)); + csum = udp_hdr(skb)->check; + skb_reset_transport_header(skb); + skb_reset_network_header(skb); + + return csum; } static int -jme_rxsum_ok(struct jme_adapter *jme, u16 flags) +jme_rxsum_ok(struct jme_adapter *jme, u16 flags, struct sk_buff *skb) { if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) return false; @@ -892,7 +1008,7 @@ jme_rxsum_ok(struct jme_adapter *jme, u16 flags) } if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS)) - == RXWBFLAG_UDPON)) { + == RXWBFLAG_UDPON) && jme_udpsum(skb)) { if (flags & RXWBFLAG_IPV4) netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n"); return false; @@ -940,7 +1056,7 @@ jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) skb_put(skb, framesize); skb->protocol = eth_type_trans(skb, jme->dev); - if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags))) + if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags), skb)) skb->ip_summed = CHECKSUM_UNNECESSARY; else #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35) @@ -999,6 +1115,7 @@ jme_process_receive(struct jme_adapter *jme, int limit) goto out; --limit; + rmb(); desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; if (unlikely(desccnt > 1 || @@ -1187,6 +1304,122 @@ jme_stop_shutdown_timer(struct jme_adapter *jme) jwrite32f(jme, JME_APMC, apmc); } + +static void +jme_set_physpeed_capability(struct jme_adapter *jme,u16 speed) +{ + u32 advert, advert2; + + spin_lock_bh(&jme->phy_lock); + if (speed == SPEED_1000){ + advert2 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000); + advert2 = (advert2|ADVERTISE_1000HALF|ADVERTISE_1000FULL); + jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, advert2); + advert = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); + advert = (advert|ADVERTISE_100HALF|ADVERTISE_100FULL); + jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE, advert); + }else if (speed == SPEED_100){ + advert2 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000); + advert2 = advert2 & ~(ADVERTISE_1000HALF|ADVERTISE_1000FULL); + jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, advert2); + advert = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); + advert = (advert|ADVERTISE_100HALF|ADVERTISE_100FULL); + jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE, advert); + }else{ + advert2 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000); + advert2 = advert2 & ~(ADVERTISE_1000HALF|ADVERTISE_1000FULL); + jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, advert2); + advert = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); + advert = advert & ~(ADVERTISE_100HALF|ADVERTISE_100FULL); + jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE, advert); + } + spin_unlock_bh(&jme->phy_lock); + return; +} + +/* PHY reg: MII_FCSCOUNTER is read and clear, we have to continuing read until RJ45 is attached, then cache this result. */ +static int +jme_check_ANcomplete(struct jme_adapter *jme) +{ + u32 val; + + val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_FCSCOUNTER); + return ((val&(PHY_SPEC_STATUS_AN_FAIL|PHY_SPEC_STATUS_AN_COMPLETE))==PHY_SPEC_STATUS_AN_COMPLETE) ? true : false; +} + +static int +jme_media_connected(struct jme_adapter *jme) +{ + if (jme->flag_media_connected == true) + return true; + + jme->flag_media_connected = jme_check_ANcomplete(jme); + + return jme->flag_media_connected; +} + +static void +asd_polling_func(unsigned long data) +{ + struct jme_adapter *jme = (struct jme_adapter *)data; + + /* + check condition term by term. + 1. link is up() ==> reset all thing, exit the process. + 2. there is no RJ45 cable attached. ==> do nothing but polling. + 3. RJ45 cable attached. but link is down ==> downspeed if the timeing is over 3.5 second. + */ + if (jme->flag_run_asd == true){ + printk("%s: run polling \n", __FUNCTION__ ); + if (jme_media_connected(jme)){ + jme->mc_count++; + printk("%s: pos1 mc_count=%d flag_media_connected=%d \n", \ + __FUNCTION__, jme->mc_count , jme->flag_media_connected); + if (jme->mc_count == (delay_time*3-5)){ + /* RJ45 is attached but unable to link anyway, it CANT + be resolved by speed, restore the capability */ + jme_set_physpeed_capability(jme,SPEED_1000); + jme->flag_media_connected = false; + jme->mc_count = 0; + }else if (jme->mc_count == (delay_time*2-5)){ + if (jme_check_ANcomplete(jme)) + jme_set_physpeed_capability(jme,SPEED_10); + else{ + jme->flag_media_connected = false; + jme->mc_count = 0; + } + }else if (jme->mc_count == delay_time-5){ + if (jme_check_ANcomplete(jme)) + jme_set_physpeed_capability(jme,SPEED_100); + else{ + jme->flag_media_connected = false; + jme->mc_count = 0; + } + } + } + mod_timer(&jme->asd_timer, jiffies+HZ); + return ; + } + +//out: + printk("%s stop polling \n", __FUNCTION__); + jme->flag_media_connected = false; + jme->mc_count = 0; + return; +} + +static int jme_check_linkup(struct jme_adapter *jme) +{ + u32 phylink; + + if (jme->fpgaver) + phylink = jme_linkstat_from_phy(jme); + else + phylink = jread32(jme, JME_PHY_LINK); + + return (phylink & PHY_LINK_UP)? true : false; +} + static void jme_link_change_tasklet(unsigned long arg) { @@ -1200,7 +1433,32 @@ jme_link_change_tasklet(unsigned long arg) while (atomic_read(&jme->link_changing) != 1) netif_info(jme, intr, jme->dev, "Waiting link change lock\n"); } - + printk("====== change_tasklet()=%d =======\n",jme->flag_run_asd); +// if (jme->chip_main_rev < 4 ){ + if (jme_check_linkup(jme)){ + if (jme->flag_run_asd){ + /* stop asd_polling_timer(); */ + printk("===stop asd_polling_timer()==\n"); + jme->flag_run_asd = false; + del_timer_sync(&jme->asd_timer); + } + } + else{ + if (!jme->flag_run_asd){ + printk("===start asd_polling_timer()==\n"); + /* start asd_polling_timer(); */ + jme_set_physpeed_capability(jme,SPEED_1000); + jme_check_ANcomplete(jme); /* clear PHY 0x13*/ + jme->flag_media_connected = false; + jme->flag_run_asd = true; + jme->mc_count = 0; + jme->asd_timer.expires = jiffies + 4*HZ; + jme->asd_timer.function = &asd_polling_func; + jme->asd_timer.data = (unsigned long)jme; + add_timer(&jme->asd_timer); + } + } +// } if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) goto out; @@ -1214,8 +1472,7 @@ jme_link_change_tasklet(unsigned long arg) tasklet_disable(&jme->rxclean_task); tasklet_disable(&jme->rxempty_task); - if (netif_carrier_ok(netdev)) { - jme_reset_ghc_speed(jme); + if (netif_carrier_ok(netdev)) { jme_disable_rx_engine(jme); jme_disable_tx_engine(jme); jme_reset_mac_processor(jme); @@ -1429,7 +1686,7 @@ jme_intr_msi(struct jme_adapter *jme, u32 intrstat) * Disable interrupt */ jwrite32f(jme, JME_IENC, INTR_ENABLE); - + if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { /* * Link change event is critical @@ -1600,6 +1857,64 @@ jme_free_irq(struct jme_adapter *jme) } } +static inline void +jme_new_phy_on(struct jme_adapter *jme) +{ + u32 reg; + + reg = jread32(jme, JME_PHY_PWR); + reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | + PHY_PWR_DWN2 | PHY_PWR_CLKSEL); + jwrite32(jme, JME_PHY_PWR, reg); + + pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); + reg &= ~PE1_GPREG0_PBG; + reg |= PE1_GPREG0_ENBG; + pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); +} + +static inline void +jme_new_phy_off(struct jme_adapter *jme) +{ + u32 reg; + + reg = jread32(jme, JME_PHY_PWR); + reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | + PHY_PWR_DWN2 | PHY_PWR_CLKSEL; + jwrite32(jme, JME_PHY_PWR, reg); + + pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); + reg &= ~PE1_GPREG0_PBG; + reg |= PE1_GPREG0_PDD3COLD; + pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); +} + +static inline void +jme_phy_on(struct jme_adapter *jme) +{ + u32 bmcr; + + bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); + bmcr &= ~BMCR_PDOWN; + jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); + + if (new_phy_power_ctrl(jme->chip_main_rev)) + jme_new_phy_on(jme); +} + +static inline void +jme_phy_off(struct jme_adapter *jme) +{ + u32 bmcr; + + bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); + bmcr |= BMCR_PDOWN; + jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); + + if (new_phy_power_ctrl(jme->chip_main_rev)) + jme_new_phy_off(jme); +} + static int jme_open(struct net_device *netdev) { @@ -1619,7 +1934,8 @@ jme_open(struct net_device *netdev) goto err_out; jme_start_irq(jme); - + + jme_phy_on(jme); if (test_bit(JME_FLAG_SSET, &jme->flags)) jme_set_settings(netdev, &jme->old_ecmd); else @@ -1635,12 +1951,12 @@ err_out: return rc; } -#ifdef CONFIG_PM static void jme_set_100m_half(struct jme_adapter *jme) { u32 bmcr, tmp; + jme_phy_on(jme); bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_FULLDPLX); @@ -1668,12 +1984,20 @@ jme_wait_link(struct jme_adapter *jme) phylink = jme_linkstat_from_phy(jme); } } -#endif -static inline void -jme_phy_off(struct jme_adapter *jme) +static void +jme_powersave_phy(struct jme_adapter *jme) { - jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN); + if (jme->reg_pmcs) { + jme_set_100m_half(jme); + + if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) + jme_wait_link(jme); + + jwrite32(jme, JME_PMCS, jme->reg_pmcs); + } else { + jme_phy_off(jme); + } } static int @@ -1694,7 +2018,6 @@ jme_close(struct net_device *netdev) tasklet_disable(&jme->rxclean_task); tasklet_disable(&jme->rxempty_task); - jme_reset_ghc_speed(jme); jme_disable_rx_engine(jme); jme_disable_tx_engine(jme); jme_reset_mac_processor(jme); @@ -2020,27 +2343,34 @@ jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) return NETDEV_TX_OK; } +static void +jme_set_unicastaddr(struct net_device *netdev) +{ + struct jme_adapter *jme = netdev_priv(netdev); + u32 val; + + val = (netdev->dev_addr[3] & 0xff) << 24 | + (netdev->dev_addr[2] & 0xff) << 16 | + (netdev->dev_addr[1] & 0xff) << 8 | + (netdev->dev_addr[0] & 0xff); + jwrite32(jme, JME_RXUMA_LO, val); + val = (netdev->dev_addr[5] & 0xff) << 8 | + (netdev->dev_addr[4] & 0xff); + jwrite32(jme, JME_RXUMA_HI, val); +} + static int jme_set_macaddr(struct net_device *netdev, void *p) { struct jme_adapter *jme = netdev_priv(netdev); struct sockaddr *addr = p; - u32 val; if (netif_running(netdev)) return -EBUSY; spin_lock_bh(&jme->macaddr_lock); memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); - - val = (addr->sa_data[3] & 0xff) << 24 | - (addr->sa_data[2] & 0xff) << 16 | - (addr->sa_data[1] & 0xff) << 8 | - (addr->sa_data[0] & 0xff); - jwrite32(jme, JME_RXUMA_LO, val); - val = (addr->sa_data[5] & 0xff) << 8 | - (addr->sa_data[4] & 0xff); - jwrite32(jme, JME_RXUMA_HI, val); + jme_set_unicastaddr(netdev); spin_unlock_bh(&jme->macaddr_lock); return 0; @@ -2122,21 +2452,13 @@ jme_change_mtu(struct net_device *netdev, int new_mtu) } if (new_mtu > 1900) { - netdev->features &= ~(NETIF_F_HW_CSUM | - NETIF_F_TSO -#ifdef NETIF_F_TSO6 - | NETIF_F_TSO6 -#endif - ); + netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | + NETIF_F_TSO | NETIF_F_TSO6); } else { if (test_bit(JME_FLAG_TXCSUM, &jme->flags)) - netdev->features |= NETIF_F_HW_CSUM; + netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; if (test_bit(JME_FLAG_TSO, &jme->flags)) - netdev->features |= NETIF_F_TSO -#ifdef NETIF_F_TSO6 - | NETIF_F_TSO6 -#endif - ; + netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; } netdev->mtu = new_mtu; @@ -2481,6 +2803,10 @@ jme_set_settings(struct net_device *netdev, if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE) return -EINVAL; + /* + * Check If user changed duplex only while force_media. + * Hardware would not generate link change interrupt. + */ if (jme->mii_if.force_media && ecmd->autoneg != AUTONEG_ENABLE && (jme->mii_if.full_duplex != ecmd->duplex)) @@ -2490,12 +2816,41 @@ jme_set_settings(struct net_device *netdev, rc = mii_ethtool_sset(&(jme->mii_if), ecmd); spin_unlock_bh(&jme->phy_lock); - if (!rc && fdc) - jme_reset_link(jme); - if (!rc) { - set_bit(JME_FLAG_SSET, &jme->flags); + if (fdc) + jme_reset_link(jme); jme->old_ecmd = *ecmd; + set_bit(JME_FLAG_SSET, &jme->flags); + } + + return rc; +} + +static int +jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) +{ + int rc; + struct jme_adapter *jme = netdev_priv(netdev); + struct mii_ioctl_data *mii_data = if_mii(rq); + unsigned int duplex_chg; + u16 val ; + + if (cmd == SIOCSMIIREG) { + val = mii_data->val_in; + if (!(val & (BMCR_RESET|BMCR_ANENABLE)) && + (val & BMCR_SPEED1000)) + return -EINVAL; + } + + spin_lock_bh(&jme->phy_lock); + rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg); + spin_unlock_bh(&jme->phy_lock); + + if (!rc && (cmd == SIOCSMIIREG)) { + if (duplex_chg) + jme_reset_link(jme); + jme_get_settings(netdev, &jme->old_ecmd); + set_bit(JME_FLAG_SSET, &jme->flags); } return rc; @@ -2553,10 +2908,12 @@ jme_set_tx_csum(struct net_device *netdev, u32 on) if (on) { set_bit(JME_FLAG_TXCSUM, &jme->flags); if (netdev->mtu <= 1900) - netdev->features |= NETIF_F_HW_CSUM; + netdev->features |= + NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; } else { clear_bit(JME_FLAG_TXCSUM, &jme->flags); - netdev->features &= ~NETIF_F_HW_CSUM; + netdev->features &= + ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); } return 0; @@ -2570,18 +2927,10 @@ jme_set_tso(struct net_device *netdev, u32 on) if (on) { set_bit(JME_FLAG_TSO, &jme->flags); if (netdev->mtu <= 1900) - netdev->features |= NETIF_F_TSO -#ifdef NETIF_F_TSO6 - | NETIF_F_TSO6 -#endif - ; + netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; } else { clear_bit(JME_FLAG_TSO, &jme->flags); - netdev->features &= ~(NETIF_F_TSO -#ifdef NETIF_F_TSO6 - | NETIF_F_TSO6 -#endif - ); + netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); } return 0; @@ -2804,6 +3153,8 @@ jme_check_hw_ver(struct jme_adapter *jme) jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT; jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT; + jme->chip_main_rev = jme->chiprev & 0xF; + jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF; } #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) @@ -2811,6 +3162,7 @@ static const struct net_device_ops jme_netdev_ops = { .ndo_open = jme_open, .ndo_stop = jme_close, .ndo_validate_addr = eth_validate_addr, + .ndo_do_ioctl = jme_ioctl, .ndo_start_xmit = jme_start_xmit, .ndo_set_mac_address = jme_set_macaddr, .ndo_set_multicast_list = jme_set_multi, @@ -2829,7 +3181,7 @@ jme_init_one(struct pci_dev *pdev, struct jme_adapter *jme; u16 bmcr, bmsr; u32 apmc; - + /* * set up PCI device basics */ @@ -2874,6 +3226,7 @@ jme_init_one(struct pci_dev *pdev, #else netdev->open = jme_open; netdev->stop = jme_close; + netdev->do_ioctl = jme_ioctl; netdev->hard_start_xmit = jme_start_xmit; netdev->set_mac_address = jme_set_macaddr; netdev->set_multicast_list = jme_set_multi; @@ -2887,12 +3240,11 @@ jme_init_one(struct pci_dev *pdev, #endif netdev->ethtool_ops = &jme_ethtool_ops; netdev->watchdog_timeo = TX_TIMEOUT; - netdev->features = NETIF_F_HW_CSUM | + netdev->features = NETIF_F_IP_CSUM | + NETIF_F_IPV6_CSUM | NETIF_F_SG | NETIF_F_TSO | -#ifdef NETIF_F_TSO6 NETIF_F_TSO6 | -#endif NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; if (using_dac) @@ -2919,6 +3271,8 @@ jme_init_one(struct pci_dev *pdev, jme->msg_enable = JME_DEF_MSG_ENABLE; jme->regs = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); + + if (!(jme->regs)) { pr_err("Mapping PCI resource region error\n"); rc = -ENOMEM; @@ -2962,7 +3316,8 @@ jme_init_one(struct pci_dev *pdev, tasklet_disable_nosync(&jme->linkch_task); tasklet_disable_nosync(&jme->txclean_task); tasklet_disable_nosync(&jme->rxclean_task); - tasklet_disable_nosync(&jme->rxempty_task); + tasklet_disable_nosync(&jme->rxempty_task); + jme->dpi.cur = PCC_P1; jme->reg_ghc = 0; @@ -2970,6 +3325,7 @@ jme_init_one(struct pci_dev *pdev, jme->reg_rxmcs = RXMCS_DEFAULT; jme->reg_txpfc = 0; jme->reg_pmcs = PMCS_MFEN; + jme->reg_gpreg1 = GPREG1_DEFAULT; set_bit(JME_FLAG_TXCSUM, &jme->flags); set_bit(JME_FLAG_TSO, &jme->flags); @@ -3020,12 +3376,13 @@ jme_init_one(struct pci_dev *pdev, jme->mii_if.supports_gmii = true; else jme->mii_if.supports_gmii = false; + jme->mii_if.phy_id_mask = 0x1F; + jme->mii_if.reg_num_mask = 0x1F; jme->mii_if.mdio_read = jme_mdio_read; jme->mii_if.mdio_write = jme_mdio_write; - jme_clear_pm(jme); - jme_set_phyfifoa(jme); - pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev); + jme_set_phyfifo_5level(jme); + pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev); if (!jme->fpgaver) jme_phy_init(jme); jme_phy_off(jme); @@ -3040,23 +3397,23 @@ jme_init_one(struct pci_dev *pdev, goto err_out_unmap; } jme_load_macaddr(netdev); - + /* * Tell stack that we are not ready to work until open() */ netif_carrier_off(netdev); - netif_stop_queue(netdev); - - /* - * Register netdev - */ rc = register_netdev(netdev); if (rc) { pr_err("Cannot register net device\n"); goto err_out_unmap; } - - netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x " + + init_timer(&(jme->asd_timer)); + jme->mc_count = 0; + jme->flag_run_asd = false; + jme->flag_media_connected = false; + + netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x " "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n", (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ? "JMC250 Gigabit Ethernet" : @@ -3064,7 +3421,7 @@ jme_init_one(struct pci_dev *pdev, "JMC260 Fast Ethernet" : "Unknown", (jme->fpgaver != 0) ? " (FPGA)" : "", (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev, - jme->rev, + jme->pcirev, netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2], @@ -3093,6 +3450,7 @@ jme_remove_one(struct pci_dev *pdev) struct net_device *netdev = pci_get_drvdata(pdev); struct jme_adapter *jme = netdev_priv(netdev); + del_timer_sync(&jme->asd_timer); /* Kill if running */ unregister_netdev(netdev); iounmap(jme->regs); pci_set_drvdata(pdev, NULL); @@ -3102,6 +3460,20 @@ jme_remove_one(struct pci_dev *pdev) } +static void +jme_shutdown(struct pci_dev *pdev) +{ + struct net_device *netdev = pci_get_drvdata(pdev); + struct jme_adapter *jme = netdev_priv(netdev); + + jme_powersave_phy(jme); +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27) + pci_enable_wake(pdev, PCI_D3hot, true); +#else + pci_pme_active(pdev, true); +#endif +} + #ifdef CONFIG_PM static int jme_suspend(struct pci_dev *pdev, pm_message_t state) @@ -3115,6 +3487,8 @@ jme_suspend(struct pci_dev *pdev, pm_message_t state) netif_stop_queue(netdev); jme_stop_irq(jme); +// del_timer_sync(&jme->asd_timer); /* Kill if running */ + tasklet_disable(&jme->txclean_task); tasklet_disable(&jme->rxclean_task); tasklet_disable(&jme->rxempty_task); @@ -3124,7 +3498,6 @@ jme_suspend(struct pci_dev *pdev, pm_message_t state) jme_polling_mode(jme); jme_stop_pcc_timer(jme); - jme_reset_ghc_speed(jme); jme_disable_rx_engine(jme); jme_disable_tx_engine(jme); jme_reset_mac_processor(jme); @@ -3139,20 +3512,16 @@ jme_suspend(struct pci_dev *pdev, pm_message_t state) tasklet_hi_enable(&jme->rxempty_task); pci_save_state(pdev); - if (jme->reg_pmcs) { - jme_set_100m_half(jme); - - if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) - jme_wait_link(jme); - - jwrite32(jme, JME_PMCS, jme->reg_pmcs); - - pci_enable_wake(pdev, PCI_D3cold, true); - } else { - jme_phy_off(jme); - } - pci_set_power_state(pdev, PCI_D3cold); + jme_powersave_phy(jme); +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27) + pci_enable_wake(pdev, PCI_D3hot, true); +#else + pci_pme_active(pdev, true); +#endif + pci_set_power_state(pdev, PCI_D3hot); + jme->mc_count = 0; + jme->flag_media_connected = false; return 0; } @@ -3165,6 +3534,7 @@ jme_resume(struct pci_dev *pdev) jme_clear_pm(jme); pci_restore_state(pdev); + jme_phy_on(jme); if (test_bit(JME_FLAG_SSET, &jme->flags)) jme_set_settings(netdev, &jme->old_ecmd); else @@ -3200,6 +3570,7 @@ static struct pci_driver jme_driver = { .suspend = jme_suspend, .resume = jme_resume, #endif /* CONFIG_PM */ + .shutdown = jme_shutdown, }; static int __init