X-Git-Url: http://bbs.cooldavid.org/git/?p=jme.git;a=blobdiff_plain;f=jme.c;h=986db28b1cba3d5de79c558fe1c8b5ed97b78ba2;hp=aa43bb02b0ca9c3b466cae07d8d519c2245f5865;hb=42b1055e2e1ef3ceba54535a95780dd90b8ddf5c;hpb=3bf61c55fb82b9c312d3ccf77c83eb23e4cdf437

diff --git a/jme.c b/jme.c
index aa43bb0..986db28 100644
--- a/jme.c
+++ b/jme.c
@@ -23,43 +23,36 @@
 
 /*
  * Note:
- * 	Watchdog:
- * 		check if rx queue stoped.
- * 		And restart it after rx ring cleaned.
+ * 	Backdoor for changing "FIFO Threshold for processing next packet"
+ * 	   Using:
+ *		ethtool -C eth1 adaptive-rx on adaptive-tx on \
+ *		rx-usecs 250 rx-frames-low N
+ *	   N := 16 | 32 | 64 | 128
  */
 
 /*
  * Timeline before release:
- * 	Stage 2: Error handling.
- * 	-  Wathch dog
- * 	-  Transmit timeout
- *
- * 	Stage 3: Basic offloading support.
- *      -  Use pci_map_page on scattered sk_buff for HIGHMEM support
- *      -  Implement scatter-gather offloading.
- *         A system page per RX (buffer|descriptor)?
- *	   Handle fraged sk_buff to TX descriptors.
- * 	-  Implement tx/rx ipv6/ip/tcp/udp checksum offloading
- *
- * 	Stage 4: Basic feature support.
- * 	-  Implement Power Managemt related functions.
- * 	-  Implement Jumboframe.
- * 	-  Implement MSI.
- *
  * 	Stage 5: Advanced offloading support.
- * 	-  Implement VLAN offloading.
+ * 	0.9:
+ *	-  Implement scatter-gather offloading.
+ *	   Use pci_map_page on scattered sk_buff for HIGHMEM support
  * 	-  Implement TCP Segement offloading.
+ * 		Due to TX FIFO size, we should turn off tso when mtu > 1500.
  *
  * 	Stage 6: CPU Load balancing.
+ * 	1.0:
  * 	-  Implement MSI-X.
  * 	   Along with multiple RX queue, for CPU load balancing.
  *
  * 	Stage 7:
- * 	-  Use NAPI instead of rx_tasklet?
- * 		PCC Support Both Packet Counter and Timeout Interrupt for
- * 		receive and transmit complete, does NAPI really needed?
  * 	-  Cleanup/re-orginize code, performence tuneing(alignment etc...).
  * 	-  Test and Release 1.0
+ *
+ * 	Non-Critical:
+ *  	-  Use NAPI instead of rx_tasklet?
+ * 		PCC Support Both Packet Counter and Timeout Interrupt for
+ * 		receive and transmit complete, does NAPI really needed?
+ *	-  Decode register dump for ethtool.
  */
 
 #include <linux/version.h>
@@ -72,6 +65,13 @@
 #include <linux/mii.h>
 #include <linux/crc32.h>
 #include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/in.h>
+#include <linux/ip.h>
+#include <linux/ipv6.h>
+#include <linux/tcp.h>
+#include <linux/udp.h>
+#include <linux/if_vlan.h>
 #include "jme.h"
 
 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
@@ -94,7 +94,7 @@ jme_mdio_read(struct net_device *netdev, int phy, int reg)
 				smi_reg_addr(reg));
 
 	wmb();
-        for (i = JME_PHY_TIMEOUT; i > 0; --i) {
+        for (i = JME_PHY_TIMEOUT ; i > 0 ; --i) {
 		udelay(1);
 		if (((val = jread32(jme, JME_SMI)) & SMI_OP_REQ) == 0)
 			break;
@@ -135,36 +135,25 @@ jme_mdio_write(struct net_device *netdev,
 __always_inline static void
 jme_reset_phy_processor(struct jme_adapter *jme)
 {
-	int i, val;
-
-	val = jme_mdio_read(jme->dev,
-				jme->mii_if.phy_id,
-				MII_BMCR);
+	__u32 val;
 
 	jme_mdio_write(jme->dev,
 			jme->mii_if.phy_id,
-			MII_BMCR, val | BMCR_RESET);
-
-	for(i = JME_PHY_RST_TIMEOUT ; i > 0 ; --i) {
-		udelay(1);
-		val = jme_mdio_read(jme->dev,
-					jme->mii_if.phy_id,
-					MII_BMCR);
-		if(!(val & BMCR_RESET))
-			break;
-	}
-
-	if (i == 0)
-		jeprintk(jme->dev->name, "phy reset timeout\n");
+			MII_ADVERTISE, ADVERTISE_ALL |
+			ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 
 	jme_mdio_write(jme->dev,
 			jme->mii_if.phy_id,
-			MII_ADVERTISE, ADVERTISE_ALL);
+			MII_CTRL1000,
+			ADVERTISE_1000FULL | ADVERTISE_1000HALF);
+
+	val = jme_mdio_read(jme->dev,
+				jme->mii_if.phy_id,
+				MII_BMCR);
 
 	jme_mdio_write(jme->dev,
 			jme->mii_if.phy_id,
-			MII_CTRL1000,
-			ADVERTISE_1000FULL | ADVERTISE_1000HALF);
+			MII_BMCR, val | BMCR_RESET);
 
 	return;
 }
@@ -187,8 +176,9 @@ jme_reset_mac_processor(struct jme_adapter *jme)
 __always_inline static void
 jme_clear_pm(struct jme_adapter *jme)
 {
-	jwrite32(jme, JME_PMCS, 0xFFFF0000);
+	jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
 	pci_set_power_state(jme->pdev, PCI_D0);
+	pci_enable_wake(jme->pdev, PCI_D0, false);
 }
 
 static int
@@ -232,7 +222,7 @@ jme_load_macaddr(struct net_device *netdev)
 	unsigned char macaddr[6];
 	__u32 val;
 
-	spin_lock(&jme->phy_lock);
+	spin_lock(&jme->macaddr_lock);
 	val = jread32(jme, JME_RXUMA_LO);
 	macaddr[0] = (val >>  0) & 0xFF;
 	macaddr[1] = (val >>  8) & 0xFF;
@@ -242,10 +232,10 @@ jme_load_macaddr(struct net_device *netdev)
 	macaddr[4] = (val >>  0) & 0xFF;
 	macaddr[5] = (val >>  8) & 0xFF;
         memcpy(netdev->dev_addr, macaddr, 6);
-	spin_unlock(&jme->phy_lock);
+	spin_unlock(&jme->macaddr_lock);
 }
 
-static void
+__always_inline static void
 jme_set_rx_pcc(struct jme_adapter *jme, int p)
 {
 	switch(p) {
@@ -271,30 +261,25 @@ jme_set_rx_pcc(struct jme_adapter *jme, int p)
 	dprintk(jme->dev->name, "Switched to PCC_P%d\n", p);
 }
 
-__always_inline static void
+static void
 jme_start_irq(struct jme_adapter *jme)
 {
 	register struct dynpcc_info *dpi = &(jme->dpi);
 
 	jme_set_rx_pcc(jme, PCC_P1);
-
-	dpi->check_point	= jiffies + PCC_INTERVAL;
-	dpi->last_bytes		= NET_STAT(jme).rx_bytes;
-	dpi->last_pkts		= NET_STAT(jme).rx_packets;
 	dpi->cur		= PCC_P1;
 	dpi->attempt		= PCC_P1;
 	dpi->cnt		= 0;
 
 	jwrite32(jme, JME_PCCTX,
-			((60000 << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
-			((8 << PCCTX_SHIFT) & PCCTX_MASK) |
+			((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
+			((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
 			PCCTXQ0_EN
 		);
 
 	/*
 	 * Enable Interrupts
 	 */
-	atomic_set(&jme->intr_sem, 1);
 	jwrite32(jme, JME_IENS, INTR_ENABLE);
 }
 
@@ -322,27 +307,68 @@ jme_disable_shadow(struct jme_adapter *jme)
 	jwrite32(jme, JME_SHBA_LO, 0x0);
 }
 
-static void
-jme_check_link(struct net_device *netdev)
+static int
+jme_check_link(struct net_device *netdev, int testonly)
 {
 	struct jme_adapter *jme = netdev_priv(netdev);
-	__u32 phylink, ghc, cnt = JME_AUTONEG_TIMEOUT;
-	char linkmsg[32];
+	__u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr;
+	char linkmsg[64];
+	int rc = 0;
 
-	spin_lock(&jme->phy_lock);
 	phylink = jread32(jme, JME_PHY_LINK);
 
         if (phylink & PHY_LINK_UP) {
-		/*
-		 * Keep polling for autoneg complete
-		 */
-		while(!(phylink & PHY_LINK_AUTONEG_COMPLETE) && --cnt > 0) {
-			mdelay(1);
-			phylink = jread32(jme, JME_PHY_LINK);
+		if(!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
+			/*
+			 * If we did not enable AN
+			 * Speed/Duplex Info should be obtained from SMI
+			 */
+			phylink = PHY_LINK_UP;
+
+			bmcr = jme_mdio_read(jme->dev,
+						jme->mii_if.phy_id,
+						MII_BMCR);
+
+
+			phylink |= ((bmcr & BMCR_SPEED1000) &&
+					(bmcr & BMCR_SPEED100) == 0) ?
+					PHY_LINK_SPEED_1000M :
+					(bmcr & BMCR_SPEED100) ?
+					PHY_LINK_SPEED_100M :
+					PHY_LINK_SPEED_10M;
+
+			phylink |= (bmcr & BMCR_FULLDPLX) ?
+					 PHY_LINK_DUPLEX : 0;
+
+			strcpy(linkmsg, "Forced: ");
+		}
+		else {
+			/*
+			 * Keep polling for speed/duplex resolve complete
+			 */
+			while(!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
+				--cnt) {
+
+				udelay(1);
+				phylink = jread32(jme, JME_PHY_LINK);
+
+			}
+
+			if(!cnt)
+				jeprintk(netdev->name,
+					"Waiting speed resolve timeout.\n");
+
+			strcpy(linkmsg, "ANed: ");
+		}
+
+		if(jme->phylink == phylink) {
+			rc = 1;
+			goto out;
 		}
+		if(testonly)
+			goto out;
 
-		if(!cnt)
-			jeprintk(netdev->name, "Waiting autoneg timeout.\n");
+		jme->phylink = phylink;
 
 		switch(phylink & PHY_LINK_SPEED_MASK) {
 			case PHY_LINK_SPEED_10M:
@@ -362,28 +388,46 @@ jme_check_link(struct net_device *netdev)
 				break;
 		}
                 ghc |= (phylink & PHY_LINK_DUPLEX) ? GHC_DPX : 0;
-		jme->reg_ghc = ghc;
-		jwrite32(jme, JME_GHC, ghc);
+
 		strcat(linkmsg, (phylink &PHY_LINK_DUPLEX) ?
-					"Full-Duplex" :
-					"Half-Duplex");
+					"Full-Duplex, " :
+					"Half-Duplex, ");
+
+		if(phylink & PHY_LINK_MDI_STAT)
+			strcat(linkmsg, "MDI-X");
+		else
+			strcat(linkmsg, "MDI");
 
 		if(phylink & PHY_LINK_DUPLEX)
 			jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
-		else
+		else {
 			jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
 						TXMCS_BACKOFF |
 						TXMCS_CARRIERSENSE |
 						TXMCS_COLLISION);
+			jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
+				((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
+				TXTRHD_TXREN |
+				((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
+		}
+
+		jme->reg_ghc = ghc;
+		jwrite32(jme, JME_GHC, ghc);
 
 		jprintk(netdev->name, "Link is up at %s.\n", linkmsg);
                 netif_carrier_on(netdev);
 	}
         else {
+		if(testonly)
+			goto out;
+
 		jprintk(netdev->name, "Link is down.\n");
+		jme->phylink = 0;
                 netif_carrier_off(netdev);
 	}
-	spin_unlock(&jme->phy_lock);
+
+out:
+	return rc;
 }
 
 
@@ -396,19 +440,59 @@ jme_alloc_txdesc(struct jme_adapter *jme,
 
 	idx = txring->next_to_use;
 
-	if(unlikely(txring->nr_free < nr_alloc))
+	if(unlikely(atomic_read(&txring->nr_free) < nr_alloc))
 		return -1;
 
-	spin_lock(&jme->tx_lock);
-	txring->nr_free -= nr_alloc;
+	atomic_sub(nr_alloc, &txring->nr_free);
 
 	if((txring->next_to_use += nr_alloc) >= RING_DESC_NR)
 		txring->next_to_use -= RING_DESC_NR;
-	spin_unlock(&jme->tx_lock);
 
 	return idx;
 }
 
+static void
+jme_tx_csum(struct sk_buff *skb, unsigned mtu, __u8 *flags)
+{
+	if(skb->ip_summed == CHECKSUM_PARTIAL) {
+		__u8 ip_proto;
+
+		switch (skb->protocol) {
+		case __constant_htons(ETH_P_IP):
+			ip_proto = ip_hdr(skb)->protocol;
+			break;
+		case __constant_htons(ETH_P_IPV6):
+			ip_proto = ipv6_hdr(skb)->nexthdr;
+			break;
+		default:
+			ip_proto = 0;
+			break;
+		}
+
+
+		switch(ip_proto) {
+		case IPPROTO_TCP:
+			*flags |= TXFLAG_TCPCS;
+			break;
+		case IPPROTO_UDP:
+			*flags |= TXFLAG_UDPCS;
+			break;
+		default:
+			jeprintk("jme", "Error upper layer protocol.\n");
+			break;
+		}
+	}
+}
+
+__always_inline static void
+jme_tx_vlan(struct sk_buff *skb, volatile __u16 *vlan, __u8 *flags)
+{
+	if(vlan_tx_tag_present(skb)) {
+		*flags |= TXFLAG_TAGON;
+		*vlan = vlan_tx_tag_get(skb);
+	}
+}
+
 static int
 jme_set_new_txdesc(struct jme_adapter *jme,
 			struct sk_buff *skb)
@@ -418,6 +502,7 @@ jme_set_new_txdesc(struct jme_adapter *jme,
 	struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
 	dma_addr_t dmaaddr;
 	int i, idx, nr_desc;
+	__u8 flags;
 
 	nr_desc = 2;
 	idx = jme_alloc_txdesc(jme, nr_desc);
@@ -446,7 +531,8 @@ jme_set_new_txdesc(struct jme_adapter *jme,
 			ctxdesc->desc2.flags |= TXFLAG_64BIT;
 		ctxdesc->desc2.datalen	= cpu_to_le16(skb->len);
 		ctxdesc->desc2.bufaddrh	= cpu_to_le32((__u64)dmaaddr >> 32);
-		ctxdesc->desc2.bufaddrl	= cpu_to_le32(dmaaddr & 0xFFFFFFFF);
+		ctxdesc->desc2.bufaddrl	= cpu_to_le32(
+						(__u64)dmaaddr & 0xFFFFFFFFUL);
 
 		ctxbi->mapping = dmaaddr;
 		ctxbi->len = skb->len;
@@ -468,7 +554,10 @@ jme_set_new_txdesc(struct jme_adapter *jme,
 	 * Other fields are already filled correctly.
 	 */
 	wmb();
-	ctxdesc->desc1.flags = TXFLAG_OWN | TXFLAG_INT;
+	flags = TXFLAG_OWN | TXFLAG_INT; 
+	jme_tx_csum(skb, jme->dev->mtu, &flags);
+	jme_tx_vlan(skb, &(ctxdesc->desc1.vlan), &flags);
+	ctxdesc->desc1.flags = flags;
 	/*
 	 * Set tx buffer info after telling NIC to send
 	 * For better tx_clean timing
@@ -491,7 +580,8 @@ jme_setup_tx_resources(struct jme_adapter *jme)
 	txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 					   TX_RING_ALLOC_SIZE,
 					   &(txring->dmaalloc),
-					   GFP_KERNEL);
+					   GFP_ATOMIC);
+
 	if(!txring->alloc) {
 		txring->desc = NULL;
 		txring->dmaalloc = 0;
@@ -507,7 +597,7 @@ jme_setup_tx_resources(struct jme_adapter *jme)
 	txring->dma		= ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
 	txring->next_to_use	= 0;
 	txring->next_to_clean	= 0;
-	txring->nr_free		= RING_DESC_NR;
+	atomic_set(&txring->nr_free, RING_DESC_NR);
 
 	/*
 	 * Initiallize Transmit Descriptors
@@ -550,15 +640,13 @@ jme_free_tx_resources(struct jme_adapter *jme)
 	}
 	txring->next_to_use	= 0;
 	txring->next_to_clean	= 0;
-	txring->nr_free		= 0;
+	atomic_set(&txring->nr_free, 0);
 
 }
 
 __always_inline static void
 jme_enable_tx_engine(struct jme_adapter *jme)
 {
-	__u8 mrrs;
-
 	/*
 	 * Select Queue 0
 	 */
@@ -567,31 +655,15 @@ jme_enable_tx_engine(struct jme_adapter *jme)
 	/*
 	 * Setup TX Queue 0 DMA Bass Address
 	 */
-	jwrite32(jme, JME_TXDBA_LO, jme->txring[0].dma);
+	jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 	jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
-	jwrite32(jme, JME_TXNDA, jme->txring[0].dma);
+	jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 
 	/*
 	 * Setup TX Descptor Count
 	 */
 	jwrite32(jme, JME_TXQDC, RING_DESC_NR);
 
-	/*
-	 * Get Max Read Req Size from PCI Config Space
-	 */
-	pci_read_config_byte(jme->pdev, PCI_CONF_DCSR_MRRS, &mrrs);
-	switch(mrrs) {
-		case MRRS_128B:
-			jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
-			break;
-		case MRRS_256B:
-			jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
-			break;
-		default:
-			jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
-			break;
-	};
-
 	/*
 	 * Enable TX Engine
 	 */
@@ -602,6 +674,17 @@ jme_enable_tx_engine(struct jme_adapter *jme)
 
 }
 
+__always_inline static void
+jme_restart_tx_engine(struct jme_adapter *jme)
+{
+	/*
+	 * Restart TX Engine
+	 */
+	jwrite32(jme, JME_TXCS, jme->reg_txcs |
+				TXCS_SELECT_QUEUE0 |
+				TXCS_ENABLE);
+}
+
 __always_inline static void
 jme_disable_tx_engine(struct jme_adapter *jme)
 {
@@ -611,17 +694,19 @@ jme_disable_tx_engine(struct jme_adapter *jme)
 	/*
 	 * Disable TX Engine
 	 */
-	jwrite32(jme, JME_TXCS, jme->reg_txcs);
+	jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
 
 	val = jread32(jme, JME_TXCS);
 	for(i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i)
 	{
-		udelay(1);
+		mdelay(1);
 		val = jread32(jme, JME_TXCS);
 	}
 
-	if(!i)
+	if(!i) {
 		jeprintk(jme->dev->name, "Disable TX engine timeout.\n");
+		jme_reset_mac_processor(jme);
+	}
 
 
 }
@@ -638,7 +723,8 @@ jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
 	rxdesc->dw[0] = 0;
 	rxdesc->dw[1] = 0;
 	rxdesc->desc1.bufaddrh	= cpu_to_le32((__u64)rxbi->mapping >> 32);
-	rxdesc->desc1.bufaddrl	= cpu_to_le32(rxbi->mapping & 0xFFFFFFFF);
+	rxdesc->desc1.bufaddrl	= cpu_to_le32(
+					(__u64)rxbi->mapping & 0xFFFFFFFFUL);
 	rxdesc->desc1.datalen	= cpu_to_le16(rxbi->len);
 	if(jme->dev->features & NETIF_F_HIGHDMA)
 		rxdesc->desc1.flags = RXFLAG_64BIT;
@@ -654,7 +740,8 @@ jme_make_new_rx_buf(struct jme_adapter *jme, int i)
 	unsigned long offset;
 	struct sk_buff* skb;
 
-	skb = netdev_alloc_skb(jme->dev, RX_BUF_ALLOC_SIZE);
+	skb = netdev_alloc_skb(jme->dev,
+		jme->dev->mtu + RX_EXTRA_LEN);
 	if(unlikely(!skb))
 		return -ENOMEM;
 
@@ -668,7 +755,7 @@ jme_make_new_rx_buf(struct jme_adapter *jme, int i)
 
 	if(unlikely(offset =
 			(unsigned long)(skb->data)
-			& (unsigned long)(RX_BUF_DMA_ALIGN - 1)))
+			& ((unsigned long)RX_BUF_DMA_ALIGN - 1)))
 		skb_reserve(skb, RX_BUF_DMA_ALIGN - offset);
 
 	rxbi += i;
@@ -733,7 +820,7 @@ jme_setup_rx_resources(struct jme_adapter *jme)
 	rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 					   RX_RING_ALLOC_SIZE,
 					   &(rxring->dmaalloc),
-					   GFP_KERNEL);
+					   GFP_ATOMIC);
 	if(!rxring->alloc) {
 		rxring->desc = NULL;
 		rxring->dmaalloc = 0;
@@ -771,9 +858,9 @@ jme_enable_rx_engine(struct jme_adapter *jme)
 	/*
 	 * Setup RX DMA Bass Address
 	 */
-	jwrite32(jme, JME_RXDBA_LO, jme->rxring[0].dma);
+	jwrite32(jme, JME_RXDBA_LO, (__u64)jme->rxring[0].dma & 0xFFFFFFFFUL);
 	jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
-	jwrite32(jme, JME_RXNDA, jme->rxring[0].dma);
+	jwrite32(jme, JME_RXNDA, (__u64)jme->rxring[0].dma & 0xFFFFFFFFUL);
 
 	/*
 	 * Setup RX Descptor Count
@@ -783,14 +870,13 @@ jme_enable_rx_engine(struct jme_adapter *jme)
 	/*
 	 * Setup Unicast Filter
 	 */
-	jme->reg_rxmcs = RXMCS_VTAGRM | RXMCS_PREPAD;
 	jme_set_multi(jme->dev);
 
 	/*
 	 * Enable RX Engine
 	 */
 	wmb();
-	jwrite32(jme, JME_RXCS, RXCS_DEFAULT |
+	jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 				RXCS_QUEUESEL_Q0 |
 				RXCS_ENABLE |
 				RXCS_QST);
@@ -802,7 +888,7 @@ jme_restart_rx_engine(struct jme_adapter *jme)
 	/*
 	 * Start RX Engine
 	 */
-	jwrite32(jme, JME_RXCS, RXCS_DEFAULT |
+	jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 				RXCS_QUEUESEL_Q0 |
 				RXCS_ENABLE |
 				RXCS_QST);
@@ -818,14 +904,12 @@ jme_disable_rx_engine(struct jme_adapter *jme)
 	/*
 	 * Disable RX Engine
 	 */
-	val = jread32(jme, JME_RXCS);
-	val &= ~RXCS_ENABLE;
-	jwrite32(jme, JME_RXCS, val);
+	jwrite32(jme, JME_RXCS, jme->reg_rxcs);
 
 	val = jread32(jme, JME_RXCS);
 	for(i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i)
 	{
-		udelay(1);
+		mdelay(1);
 		val = jread32(jme, JME_RXCS);
 	}
 
@@ -834,50 +918,6 @@ jme_disable_rx_engine(struct jme_adapter *jme)
 
 }
 
-static void
-jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
-{
-	if(dpi->attempt == atmp) {
-		++(dpi->cnt);
-	}
-	else {
-		dpi->attempt = atmp;
-		dpi->cnt = 0;
-	}
-}
-
-static void
-jme_dynamic_pcc(struct jme_adapter *jme)
-{
-	register struct dynpcc_info *dpi = &(jme->dpi);
-
-	if(jiffies >= dpi->check_point) {
-		if(jiffies > (dpi->check_point + PCC_INTERVAL)) {
-			jme_attempt_pcc(dpi, PCC_P1);
-		}
-		else {
-			if((NET_STAT(jme).rx_bytes - dpi->last_bytes) >
-					PCC_P3_THRESHOLD)
-				jme_attempt_pcc(dpi, PCC_P3);
-			else if((NET_STAT(jme).rx_bytes - dpi->last_bytes) >
-					PCC_P2_THRESHOLD)
-				jme_attempt_pcc(dpi, PCC_P2);
-			else
-				jme_attempt_pcc(dpi, PCC_P1);
-		}
-
-		if(unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
-			jme_set_rx_pcc(jme, dpi->attempt);
-			dpi->cur = dpi->attempt;
-			dpi->cnt = 0;
-		}
-
-		dpi->last_bytes	= NET_STAT(jme).rx_bytes;
-		dpi->last_pkts	= NET_STAT(jme).rx_packets;
-		dpi->check_point = jiffies + PCC_INTERVAL;
-	}
-}
-
 static void
 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
 {
@@ -912,7 +952,19 @@ jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
 		skb_put(skb, framesize);
 		skb->protocol = eth_type_trans(skb, jme->dev);
 
-		netif_rx(skb);
+		if((rxdesc->descwb.flags &
+					(RXWBFLAG_TCPON |
+					RXWBFLAG_UDPON |
+					RXWBFLAG_IPV4)))
+			skb->ip_summed = CHECKSUM_UNNECESSARY;
+		else
+			skb->ip_summed = CHECKSUM_NONE;
+
+		if(jme->vlgrp && (rxdesc->descwb.flags & RXWBFLAG_TAGON))
+			vlan_hwaccel_rx(skb, jme->vlgrp,
+					le32_to_cpu(rxdesc->descwb.vlan));
+		else
+			netif_rx(skb);
 
 		if(le16_to_cpu(rxdesc->descwb.flags) & RXWBFLAG_DEST_MUL)
 			++(NET_STAT(jme).multicast);
@@ -926,6 +978,29 @@ jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
 
 }
 
+static int
+jme_rxsum_bad(struct jme_adapter *jme, __u16 flags)
+{
+	if(unlikely((flags & RXWBFLAG_TCPON) &&
+	!(flags & RXWBFLAG_TCPCS))) {
+		csum_dbg(jme->dev->name, "TCP Checksum error.\n");
+		return 1;
+	}
+	else if(unlikely((flags & RXWBFLAG_UDPON) &&
+	!(flags & RXWBFLAG_UDPCS))) {
+		csum_dbg(jme->dev->name, "UDP Checksum error.\n");
+		return 1;
+	}
+	else if(unlikely((flags & RXWBFLAG_IPV4) &&
+	!(flags & RXWBFLAG_IPCS))) {
+		csum_dbg(jme->dev->name, "IPV4 Checksum error.\n");
+		return 1;
+	}
+	else {
+		return 0;
+	}
+}
+
 static int
 jme_process_receive(struct jme_adapter *jme, int limit)
 {
@@ -947,8 +1022,9 @@ jme_process_receive(struct jme_adapter *jme, int limit)
 
 		rx_dbg(jme->dev->name, "RX: Cleaning %d\n", i);
 
-		if(desccnt > 1 ||
-		rxdesc->descwb.errstat & RXWBERR_ALLERR) {
+		if(unlikely(desccnt > 1 ||
+		rxdesc->descwb.errstat & RXWBERR_ALLERR ||
+		jme_rxsum_bad(jme, rxdesc->descwb.flags))) {
 
 			if(rxdesc->descwb.errstat & RXWBERR_CRCERR)
 				++(NET_STAT(jme).rx_crc_errors);
@@ -957,8 +1033,13 @@ jme_process_receive(struct jme_adapter *jme, int limit)
 			else
 				++(NET_STAT(jme).rx_errors);
 
-			if(desccnt > 1)
+			if(desccnt > 1) {
+				rx_dbg(jme->dev->name,
+					"RX: More than one(%d) descriptor, "
+					"framelen=%d\n",
+					desccnt, le16_to_cpu(rxdesc->descwb.framesize));
 				limit -= desccnt - 1;
+			}
 
 			for(j = i, ccnt = desccnt ; ccnt-- ; ) {
 				jme_set_clean_rxdesc(jme, j);
@@ -972,7 +1053,6 @@ jme_process_receive(struct jme_adapter *jme, int limit)
 			jme_alloc_and_feed_skb(jme, i);
 		}
 
-
 		if((i += desccnt) >= RING_DESC_NR)
 			i -= RING_DESC_NR;
 	}
@@ -983,7 +1063,6 @@ out:
 		(jread32(jme, JME_RXNDA) - jread32(jme, JME_RXDBA_LO))
 			>> 4);
 
-	jme_dynamic_pcc(jme);
 	rxring->next_to_clean = i;
 
 	return limit > 0 ? limit : 0;
@@ -991,158 +1070,297 @@ out:
 }
 
 static void
-jme_link_change_tasklet(unsigned long arg)
+jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
 {
-	struct jme_adapter *jme = (struct jme_adapter*)arg;
-	jme_check_link(jme->dev);
+	if(likely(atmp == dpi->cur))
+		return;
+
+	if(dpi->attempt == atmp) {
+		++(dpi->cnt);
+	}
+	else {
+		dpi->attempt = atmp;
+		dpi->cnt = 0;
+	}
+
 }
 
 static void
-jme_rx_clean_tasklet(unsigned long arg)
+jme_dynamic_pcc(struct jme_adapter *jme)
 {
-	struct jme_adapter *jme = (struct jme_adapter*)arg;
+	register struct dynpcc_info *dpi = &(jme->dpi);
 
-	spin_lock(&jme->rx_lock);
-	jme_process_receive(jme, RING_DESC_NR);
-	spin_unlock(&jme->rx_lock);
-	if(jme->flags & JME_FLAG_RXQ0_EMPTY) {
-		jme->flags &= ~JME_FLAG_RXQ0_EMPTY;
-		jme_restart_rx_engine(jme);
+	if((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
+		jme_attempt_pcc(dpi, PCC_P3);
+	else if((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P2_THRESHOLD
+	|| dpi->intr_cnt > PCC_INTR_THRESHOLD)
+		jme_attempt_pcc(dpi, PCC_P2);
+	else
+		jme_attempt_pcc(dpi, PCC_P1);
+
+	if(unlikely(dpi->attempt != dpi->cur && dpi->cnt > 20)) {
+		jme_set_rx_pcc(jme, dpi->attempt);
+		dpi->cur = dpi->attempt;
+		dpi->cnt = 0;
 	}
 }
 
 static void
-jme_tx_clean_tasklet(unsigned long arg)
+jme_start_pcc_timer(struct jme_adapter *jme)
 {
-	struct jme_adapter *jme = (struct jme_adapter*)arg;
-	struct jme_ring *txring = &(jme->txring[0]);
-	volatile struct txdesc *txdesc = txring->desc;
-	struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
-	int i, j, cnt = 0, max;
+	struct dynpcc_info *dpi = &(jme->dpi);
+	dpi->last_bytes		= NET_STAT(jme).rx_bytes;
+	dpi->last_pkts		= NET_STAT(jme).rx_packets;
+	dpi->intr_cnt		= 0;
+	jwrite32(jme, JME_TMCSR,
+		TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
+}
 
-	spin_lock(&jme->tx_lock);
-	max = RING_DESC_NR - txring->nr_free;
-	spin_unlock(&jme->tx_lock);
+static void
+jme_stop_pcc_timer(struct jme_adapter *jme)
+{
+	jwrite32(jme, JME_TMCSR, 0);
+}
 
-	tx_dbg(jme->dev->name, "Tx Tasklet: In\n");
+static void
+jme_pcc_tasklet(unsigned long arg)
+{
+	struct jme_adapter *jme = (struct jme_adapter*)arg;
+	struct net_device *netdev = jme->dev;
 
-	for(i = txring->next_to_clean ; cnt < max ; ) {
 
-		ctxbi = txbi + i;
+	if(unlikely(netif_queue_stopped(netdev) ||
+		(atomic_read(&jme->link_changing) != 1)
+	)) {
+		jme_stop_pcc_timer(jme);
+		return;
+	}
 
-		if(ctxbi->skb && !(txdesc[i].desc1.flags & TXFLAG_OWN)) {
+	jme_dynamic_pcc(jme);
+	jme_start_pcc_timer(jme);
+}
 
-			tx_dbg(jme->dev->name,
-				"Tx Tasklet: Clean %d+%d\n",
-				i, ctxbi->nr_desc);
+static void
+jme_link_change_tasklet(unsigned long arg)
+{
+	struct jme_adapter *jme = (struct jme_adapter*)arg;
+	struct net_device *netdev = jme->dev;
+	int timeout = WAIT_TASKLET_TIMEOUT;
+	int rc;
 
-			for(j = 1 ; j < ctxbi->nr_desc ; ++j) {
-				ttxbi = txbi + ((i + j) & (RING_DESC_NR - 1));
-				txdesc[(i+j)&(RING_DESC_NR-1)].dw[0] = 0;
+	if(!atomic_dec_and_test(&jme->link_changing))
+		goto out;
 
-				pci_unmap_single(jme->pdev,
-						 ttxbi->mapping,
-						 ttxbi->len,
-						 PCI_DMA_TODEVICE);
+	if(jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
+		goto out;
 
-				NET_STAT(jme).tx_bytes += ttxbi->len;
-				ttxbi->mapping = 0;
-				ttxbi->len = 0;
-			}
+	jme->old_mtu = netdev->mtu;
+	netif_stop_queue(netdev);
 
-			dev_kfree_skb(ctxbi->skb);
-			ctxbi->skb = NULL;
+	while(--timeout > 0 &&
+		(
+		atomic_read(&jme->rx_cleaning) != 1 ||
+		atomic_read(&jme->tx_cleaning) != 1
+		)) {
 
-			cnt += ctxbi->nr_desc;
+		mdelay(1);
+	}
 
-			++(NET_STAT(jme).tx_packets);
+	if(netif_carrier_ok(netdev)) {
+		jme_stop_pcc_timer(jme);
+		jme_reset_mac_processor(jme);
+		jme_free_rx_resources(jme);
+		jme_free_tx_resources(jme);
+	}
+
+	jme_check_link(netdev, 0);
+	if(netif_carrier_ok(netdev)) {
+		rc = jme_setup_rx_resources(jme);
+		if(rc) {
+			jeprintk(netdev->name,
+				"Allocating resources for RX error"
+				", Device STOPPED!\n");
+			goto out;
 		}
-		else {
-			if(!ctxbi->skb)
-				tx_dbg(jme->dev->name,
-					"Tx Tasklet:"
-					" Stoped due to no skb.\n");
-			else
-				tx_dbg(jme->dev->name,
-					"Tx Tasklet:"
-					"Stoped due to not done.\n");
-			break;
+
+
+		rc = jme_setup_tx_resources(jme);
+		if(rc) {
+			jeprintk(netdev->name,
+				"Allocating resources for TX error"
+				", Device STOPPED!\n");
+			goto err_out_free_rx_resources;
 		}
 
-		if(unlikely((i += ctxbi->nr_desc) >= RING_DESC_NR))
-			i -= RING_DESC_NR;
+		jme_enable_rx_engine(jme);
+		jme_enable_tx_engine(jme);
 
-		ctxbi->nr_desc = 0;
+		netif_start_queue(netdev);
+		jme_start_pcc_timer(jme);
 	}
 
-	tx_dbg(jme->dev->name,
-		"Tx Tasklet: Stop %d Jiffies %lu\n",
-		i, jiffies);
-	txring->next_to_clean = i;
+	goto out;
+
+err_out_free_rx_resources:
+	jme_free_rx_resources(jme);
+out:
+	atomic_inc(&jme->link_changing);
+}
+
+static void
+jme_rx_clean_tasklet(unsigned long arg)
+{
+	struct jme_adapter *jme = (struct jme_adapter*)arg;
+	struct dynpcc_info *dpi = &(jme->dpi);
 
-	spin_lock(&jme->tx_lock);
-	txring->nr_free += cnt;
-	spin_unlock(&jme->tx_lock);
+	if(unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
+		goto out;
+
+	if(unlikely(atomic_read(&jme->link_changing) != 1))
+		goto out;
 
+	if(unlikely(netif_queue_stopped(jme->dev)))
+		goto out;
+
+	jme_process_receive(jme, RING_DESC_NR);
+	++(dpi->intr_cnt);
+
+out:
+	atomic_inc(&jme->rx_cleaning);
 }
 
-static irqreturn_t
-jme_intr(int irq, void *dev_id)
+static void
+jme_rx_empty_tasklet(unsigned long arg)
 {
-        struct net_device *netdev = dev_id;
-        struct jme_adapter *jme = netdev_priv(netdev);
-	irqreturn_t rc = IRQ_HANDLED;
-	__u32 intrstat;
+	struct jme_adapter *jme = (struct jme_adapter*)arg;
 
-#if USE_IEVE_SHADOW
-	pci_dma_sync_single_for_cpu(jme->pdev,
-				    jme->shadow_dma,
-				    sizeof(__u32) * SHADOW_REG_NR,
-				    PCI_DMA_FROMDEVICE);
-	intrstat = jme->shadow_regs[SHADOW_IEVE];
-	jme->shadow_regs[SHADOW_IEVE] = 0;
-#else
-	intrstat = jread32(jme, JME_IEVE);
-#endif
+	if(unlikely(atomic_read(&jme->link_changing) != 1))
+		return;
 
-	/*
-	 * Check if it's really an interrupt for us
-	 */
-        if(intrstat == 0) {
-		rc = IRQ_NONE;
+	if(unlikely(netif_queue_stopped(jme->dev)))
+		return;
+
+	queue_dbg(jme->dev->name, "RX Queue empty!\n");
+
+	jme_rx_clean_tasklet(arg);
+	jme_restart_rx_engine(jme);
+}
+
+static void
+jme_tx_clean_tasklet(unsigned long arg)
+{
+	struct jme_adapter *jme = (struct jme_adapter*)arg;
+	struct jme_ring *txring = &(jme->txring[0]);
+	volatile struct txdesc *txdesc = txring->desc;
+	struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
+	int i, j, cnt = 0, max, err;
+
+	if(unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
 		goto out;
-	}
 
-	/*
-	 * Check if the device still exist
-	 */
-	if(unlikely(intrstat == ~((typeof(intrstat))0))) {
-                rc = IRQ_NONE;
+	if(unlikely(atomic_read(&jme->link_changing) != 1))
 		goto out;
-	}
 
-	/*
-	 * Allow one interrupt handling at a time
-	 */
-        if(unlikely(!atomic_dec_and_test(&jme->intr_sem)))
+	if(unlikely(netif_queue_stopped(jme->dev)))
 		goto out;
 
+	max = RING_DESC_NR - atomic_read(&txring->nr_free);
+
+	tx_dbg(jme->dev->name, "Tx Tasklet: In\n");
+
+	for(i = txring->next_to_clean ; cnt < max ; ) {
+
+		ctxbi = txbi + i;
+
+		if(ctxbi->skb && !(txdesc[i].descwb.flags & TXWBFLAG_OWN)) {
+
+			err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
+
+			tx_dbg(jme->dev->name,
+				"Tx Tasklet: Clean %d+%d\n",
+				i, ctxbi->nr_desc);
+
+			for(j = 1 ; j < ctxbi->nr_desc ; ++j) {
+				ttxbi = txbi + ((i + j) & (RING_DESC_NR - 1));
+				txdesc[(i+j)&(RING_DESC_NR-1)].dw[0] = 0;
+
+				pci_unmap_single(jme->pdev,
+						 ttxbi->mapping,
+						 ttxbi->len,
+						 PCI_DMA_TODEVICE);
+
+				if(likely(!err))
+					NET_STAT(jme).tx_bytes += ttxbi->len;
+
+				ttxbi->mapping = 0;
+				ttxbi->len = 0;
+			}
+
+			dev_kfree_skb(ctxbi->skb);
+			ctxbi->skb = NULL;
+
+			cnt += ctxbi->nr_desc;
+
+			if(unlikely(err))
+				++(NET_STAT(jme).tx_carrier_errors);
+			else
+				++(NET_STAT(jme).tx_packets);
+		}
+		else {
+			if(!ctxbi->skb)
+				tx_dbg(jme->dev->name,
+					"Tx Tasklet:"
+					" Stoped due to no skb.\n");
+			else
+				tx_dbg(jme->dev->name,
+					"Tx Tasklet:"
+					"Stoped due to not done.\n");
+			break;
+		}
+
+		if(unlikely((i += ctxbi->nr_desc) >= RING_DESC_NR))
+			i -= RING_DESC_NR;
+
+		ctxbi->nr_desc = 0;
+	}
+
+	tx_dbg(jme->dev->name,
+		"Tx Tasklet: Stop %d Jiffies %lu\n",
+		i, jiffies);
+	txring->next_to_clean = i;
+
+	atomic_add(cnt, &txring->nr_free);
+
+out:
+	atomic_inc(&jme->tx_cleaning);
+}
+
+static void
+jme_intr_msi(struct jme_adapter *jme, __u32 intrstat)
+{
 	/*
 	 * Disable interrupt
 	 */
 	jwrite32f(jme, JME_IENC, INTR_ENABLE);
 
-	if(intrstat & INTR_LINKCH)
+	/*
+	 * Write 1 clear interrupt status
+	 */
+	jwrite32f(jme, JME_IEVE, intrstat);
+
+	if(intrstat & (INTR_LINKCH | INTR_SWINTR)) {
 		tasklet_schedule(&jme->linkch_task);
+		goto out_reenable;
+	}
 
-	if(intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP)) {
-		if(intrstat & INTR_RX0EMP) {
-			jme->flags |= JME_FLAG_RXQ0_EMPTY;
-			jeprintk(netdev->name, "Ranout of Receive Queue 0.\n");
-		}
+	if(intrstat & INTR_TMINTR)
+		tasklet_schedule(&jme->pcc_task);
+
+	if(intrstat & INTR_RX0EMP)
+		tasklet_schedule(&jme->rxempty_task);
 
+	if(intrstat & (INTR_PCCRX0TO | INTR_PCCRX0))
 		tasklet_schedule(&jme->rxclean_task);
-	}
 
 	if(intrstat & (INTR_PCCTXTO | INTR_PCCTX))
 		tasklet_schedule(&jme->txclean_task);
@@ -1154,71 +1372,193 @@ jme_intr(int irq, void *dev_id)
 		 */
 	}
 
+out_reenable:
 	/*
-	 * Deassert interrupts
+	 * Re-enable interrupt
 	 */
-	jwrite32f(jme, JME_IEVE, intrstat);
+	jwrite32f(jme, JME_IENS, INTR_ENABLE);
+
+
+}
+
+static irqreturn_t
+jme_intr(int irq, void *dev_id)
+{
+        struct net_device *netdev = dev_id;
+        struct jme_adapter *jme = netdev_priv(netdev);
+	__u32 intrstat;
+
+	intrstat = jread32(jme, JME_IEVE);
 
 	/*
-	 * Enable next interrupt handling
+	 * Check if it's really an interrupt for us
 	 */
-	atomic_set(&jme->intr_sem, 1);
+        if(unlikely(intrstat == 0))
+		return IRQ_NONE;
 
 	/*
-	 * Re-enable interrupt
+	 * Check if the device still exist
 	 */
-	jwrite32f(jme, JME_IENS, INTR_ENABLE);
+	if(unlikely(intrstat == ~((typeof(intrstat))0)))
+                return IRQ_NONE;
 
-out:
-        return rc;
+	jme_intr_msi(jme, intrstat);
+
+        return IRQ_HANDLED;
+}
+
+static irqreturn_t
+jme_msi(int irq, void *dev_id)
+{
+        struct net_device *netdev = dev_id;
+        struct jme_adapter *jme = netdev_priv(netdev);
+	__u32 intrstat;
+
+	pci_dma_sync_single_for_cpu(jme->pdev,
+				    jme->shadow_dma,
+				    sizeof(__u32) * SHADOW_REG_NR,
+				    PCI_DMA_FROMDEVICE);
+	intrstat = jme->shadow_regs[SHADOW_IEVE];
+	jme->shadow_regs[SHADOW_IEVE] = 0;
+
+	jme_intr_msi(jme, intrstat);
+
+        return IRQ_HANDLED;
+}
+
+
+static void
+jme_reset_link(struct jme_adapter *jme)
+{
+	jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
+}
+
+static void
+jme_restart_an(struct jme_adapter *jme)
+{
+	__u32 bmcr;
+	unsigned long flags;
+
+	spin_lock_irqsave(&jme->phy_lock, flags);
+	bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
+	bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
+	jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
+	spin_unlock_irqrestore(&jme->phy_lock, flags);
 }
 
 static int
-jme_open(struct net_device *netdev)
+jme_request_irq(struct jme_adapter *jme)
 {
-	struct jme_adapter *jme = netdev_priv(netdev);
 	int rc;
+        struct net_device *netdev = jme->dev;
+        irq_handler_t handler = jme_intr;
+        int irq_flags = IRQF_SHARED;
+
+        if (!pci_enable_msi(jme->pdev)) {
+                jme->flags |= JME_FLAG_MSI;
+                handler = jme_msi;
+                irq_flags = 0;
+        }
 
-	rc = request_irq(jme->pdev->irq, jme_intr,
-			 IRQF_SHARED, netdev->name, netdev);
-	if(rc) {
-		printk(KERN_ERR PFX "Requesting IRQ error.\n");
-		goto err_out;
-	}
+        rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
+                          netdev);
+        if(rc) {
+                jeprintk(netdev->name,
+			"Unable to allocate %s interrupt (return: %d)\n",
+			jme->flags & JME_FLAG_MSI ? "MSI":"INTx", rc);
 
-	rc = jme_setup_rx_resources(jme);
-	if(rc) {
-		printk(KERN_ERR PFX "Allocating resources for RX error.\n");
-		goto err_out_free_irq;
+                if(jme->flags & JME_FLAG_MSI) {
+                        pci_disable_msi(jme->pdev);
+			jme->flags &= ~JME_FLAG_MSI;
+		}
+        }
+	else {
+		netdev->irq = jme->pdev->irq;
 	}
 
+        return rc;
+}
 
-	rc = jme_setup_tx_resources(jme);
-	if(rc) {
-		printk(KERN_ERR PFX "Allocating resources for TX error.\n");
-		goto err_out_free_rx_resources;
+static void
+jme_free_irq(struct jme_adapter *jme)
+{
+        free_irq(jme->pdev->irq, jme->dev);
+        if (jme->flags & JME_FLAG_MSI) {
+                pci_disable_msi(jme->pdev);
+		jme->flags &= ~JME_FLAG_MSI;
+		jme->dev->irq = jme->pdev->irq;
+        }
+}
+
+static int
+jme_open(struct net_device *netdev)
+{
+	struct jme_adapter *jme = netdev_priv(netdev);
+	int rc, timeout = 100;
+
+	while(
+		--timeout > 0 &&
+		(
+		atomic_read(&jme->link_changing) != 1 ||
+		atomic_read(&jme->rx_cleaning) != 1 ||
+		atomic_read(&jme->tx_cleaning) != 1
+		)
+	)
+		msleep(10);
+
+	if(!timeout) {
+		rc = -EBUSY;
+		goto err_out;
 	}
 
+	jme_clear_pm(jme);
 	jme_reset_mac_processor(jme);
-	jme_check_link(netdev);
+
+	rc = jme_request_irq(jme);
+	if(rc)
+		goto err_out;
+
 	jme_enable_shadow(jme);
 	jme_start_irq(jme);
-	jme_enable_rx_engine(jme);
-	jme_enable_tx_engine(jme);
-	netif_start_queue(netdev);
+
+	if(jme->flags & JME_FLAG_SSET)
+		jme_set_settings(netdev, &jme->old_ecmd);
+	else
+		jme_reset_phy_processor(jme);
+
+	jme_reset_link(jme);
 
 	return 0;
 
-err_out_free_rx_resources:
-	jme_free_rx_resources(jme);
-err_out_free_irq:
-	free_irq(jme->pdev->irq, jme->dev);
 err_out:
 	netif_stop_queue(netdev);
 	netif_carrier_off(netdev);
 	return rc;
 }
 
+static void
+jme_set_100m_half(struct jme_adapter *jme)
+{
+	__u32 bmcr, tmp;
+
+	bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
+	tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
+		       BMCR_SPEED1000 | BMCR_FULLDPLX);
+	tmp |= BMCR_SPEED100;
+
+	if (bmcr != tmp)
+		jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
+
+	jwrite32(jme, JME_GHC, GHC_SPEED_100M);
+}
+
+static void
+jme_phy_off(struct jme_adapter *jme)
+{
+	jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
+}
+
+
 static int
 jme_close(struct net_device *netdev)
 {
@@ -1229,15 +1569,28 @@ jme_close(struct net_device *netdev)
 
 	jme_stop_irq(jme);
 	jme_disable_shadow(jme);
-	free_irq(jme->pdev->irq, jme->dev);
+	jme_free_irq(jme);
 
 	tasklet_kill(&jme->linkch_task);
 	tasklet_kill(&jme->txclean_task);
 	tasklet_kill(&jme->rxclean_task);
-	jme_disable_rx_engine(jme);
-	jme_disable_tx_engine(jme);
+	tasklet_kill(&jme->rxempty_task);
+
+	jme_reset_mac_processor(jme);
 	jme_free_rx_resources(jme);
 	jme_free_tx_resources(jme);
+	jme->phylink = 0;
+
+	if(jme->reg_pmcs) {
+		jme_set_100m_half(jme);
+		pci_enable_wake(jme->pdev, PCI_D0, true);
+		pci_enable_wake(jme->pdev, PCI_D3hot, true);
+		pci_enable_wake(jme->pdev, PCI_D3cold, true);
+		jwrite32(jme, JME_PMCS, jme->reg_pmcs);
+	}
+	else {
+		jme_phy_off(jme);
+	}
 
 	return 0;
 }
@@ -1251,6 +1604,19 @@ jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
         struct jme_adapter *jme = netdev_priv(netdev);
 	int rc;
 
+	if(unlikely(netif_queue_stopped(jme->dev)))
+		return NETDEV_TX_BUSY;
+
+#if 0
+/*Testing*/
+	("jme", "Frags: %d Headlen: %d Len: %d Sum:%d\n", 
+		skb_shinfo(skb)->nr_frags,
+		skb_headlen(skb),
+		skb->len,
+		skb->ip_summed);
+/*********/
+#endif
+
 	rc = jme_set_new_txdesc(jme, skb);
 
 	if(unlikely(rc != NETDEV_TX_OK))
@@ -1275,7 +1641,7 @@ jme_set_macaddr(struct net_device *netdev, void *p)
 	if(netif_running(netdev))
 		return -EBUSY;
 
-	spin_lock(&jme->phy_lock);
+	spin_lock(&jme->macaddr_lock);
 	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
 
 	val = addr->sa_data[3] << 24 |
@@ -1286,7 +1652,7 @@ jme_set_macaddr(struct net_device *netdev, void *p)
 	val = addr->sa_data[5] << 8 |
 	      addr->sa_data[4];
 	jwrite32(jme, JME_RXUMA_HI, val);
-	spin_unlock(&jme->phy_lock);
+	spin_unlock(&jme->macaddr_lock);
 
 	return 0;
 }
@@ -1296,23 +1662,24 @@ jme_set_multi(struct net_device *netdev)
 {
 	struct jme_adapter *jme = netdev_priv(netdev);
 	u32 mc_hash[2] = {};
-	__u32 val;
 	int i;
+	unsigned long flags;
+
+	spin_lock_irqsave(&jme->rxmcs_lock, flags);
 
-	spin_lock(&jme->phy_lock);
-	val = jme->reg_rxmcs | RXMCS_BRDFRAME | RXMCS_UNIFRAME;
+	jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
 
         if (netdev->flags & IFF_PROMISC) {
-		val |= RXMCS_ALLFRAME;
+		jme->reg_rxmcs |= RXMCS_ALLFRAME;
 	}
         else if (netdev->flags & IFF_ALLMULTI) {
-		val |= RXMCS_ALLMULFRAME;
+		jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
 	}
 	else if(netdev->flags & IFF_MULTICAST) {
 		struct dev_mc_list *mclist;
 		int bit_nr;
 
-		val |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
+		jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
 		for (i = 0, mclist = netdev->mc_list;
 			mclist && i < netdev->mc_count;
 			++i, mclist = mclist->next) {
@@ -1325,19 +1692,67 @@ jme_set_multi(struct net_device *netdev)
 		jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
 	}
 
-
 	wmb();
-	jwrite32(jme, JME_RXMCS, val);
-	spin_unlock(&jme->phy_lock);
+	jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
+
+	spin_unlock_irqrestore(&jme->rxmcs_lock, flags);
 }
 
 static int
-jme_change_mtu(struct net_device *dev, int new_mtu)
+jme_change_mtu(struct net_device *netdev, int new_mtu)
+{
+        struct jme_adapter *jme = netdev_priv(netdev);
+
+	if(new_mtu == jme->old_mtu)
+		return 0;
+
+        if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
+                ((new_mtu) < IPV6_MIN_MTU))
+                return -EINVAL;
+
+	if(new_mtu > 4000) {
+		jme->reg_rxcs &= ~RXCS_FIFOTHNP;
+		jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
+		jme_restart_rx_engine(jme);
+	}
+	else {
+		jme->reg_rxcs &= ~RXCS_FIFOTHNP;
+		jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
+		jme_restart_rx_engine(jme);
+	}
+
+	if(new_mtu > 1900) {
+		netdev->features &= ~NETIF_F_HW_CSUM;
+	}
+	else {
+		netdev->features |= NETIF_F_HW_CSUM;
+	}
+
+        netdev->mtu = new_mtu;
+        jme_reset_link(jme);
+
+	return 0;
+}
+
+static void
+jme_tx_timeout(struct net_device *netdev)
 {
+        struct jme_adapter *jme = netdev_priv(netdev);
+
 	/*
-	 * Not supporting MTU change for now.
+	 * Reset the link
+	 * And the link change will reinitiallize all RX/TX resources
 	 */
-	return -EINVAL;
+	jme->phylink = 0;
+	jme_reset_link(jme);
+}
+
+static void
+jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
+{
+	struct jme_adapter *jme = netdev_priv(netdev);
+
+	jme->vlgrp = grp;
 }
 
 static void
@@ -1351,15 +1766,233 @@ jme_get_drvinfo(struct net_device *netdev,
         strcpy(info->bus_info, pci_name(jme->pdev));
 }
 
+static int
+jme_get_regs_len(struct net_device *netdev)
+{
+	return 0x400;
+}
+
+static void
+mmapio_memcpy(struct jme_adapter *jme, __u32 *p, __u32 reg, int len)
+{
+	int i;
+
+	for(i = 0 ; i < len ; i += 4)
+		p[i >> 2] = jread32(jme, reg + i);
+
+}
+
+static void
+jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
+{
+        struct jme_adapter *jme = netdev_priv(netdev);
+	__u32 *p32 = (__u32*)p;
+
+	memset(p, 0, 0x400);
+
+	regs->version = 1;
+	mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
+
+	p32 += 0x100 >> 2;
+	mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
+
+	p32 += 0x100 >> 2;
+	mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
+
+	p32 += 0x100 >> 2;
+	mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
+
+}
+
+static int
+jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
+{
+	struct jme_adapter *jme = netdev_priv(netdev);
+
+	ecmd->use_adaptive_rx_coalesce = true;
+	ecmd->tx_coalesce_usecs = PCC_TX_TO;
+	ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
+
+	switch(jme->dpi.cur) {
+	case PCC_P1:
+		ecmd->rx_coalesce_usecs = PCC_P1_TO;
+		ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
+		break;
+	case PCC_P2:
+		ecmd->rx_coalesce_usecs = PCC_P2_TO;
+		ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
+		break;
+	case PCC_P3:
+		ecmd->rx_coalesce_usecs = PCC_P3_TO;
+		ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+/*
+ * It's not actually for coalesce.
+ * It changes internell FIFO related setting for testing.
+ */
+static int
+jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
+{
+	struct jme_adapter *jme = netdev_priv(netdev);
+
+	if(ecmd->use_adaptive_rx_coalesce &&
+	ecmd->use_adaptive_tx_coalesce &&
+	ecmd->rx_coalesce_usecs == 250 &&
+	(ecmd->rx_max_coalesced_frames_low == 16 ||
+	ecmd->rx_max_coalesced_frames_low == 32 ||
+	ecmd->rx_max_coalesced_frames_low == 64 ||
+	ecmd->rx_max_coalesced_frames_low == 128)) {
+		jme->reg_rxcs &= ~RXCS_FIFOTHNP;
+		switch(ecmd->rx_max_coalesced_frames_low) {
+		case 16:
+			jme->reg_rxcs |= RXCS_FIFOTHNP_16QW;
+			break;
+		case 32:
+			jme->reg_rxcs |= RXCS_FIFOTHNP_32QW;
+			break;
+		case 64:
+			jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
+			break;
+		case 128:
+		default:
+			jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
+		}
+		jme_restart_rx_engine(jme);
+	}
+	else {
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static void
+jme_get_pauseparam(struct net_device *netdev,
+			struct ethtool_pauseparam *ecmd)
+{
+	struct jme_adapter *jme = netdev_priv(netdev);
+	unsigned long flags;
+	__u32 val;
+
+	ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
+	ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
+
+	spin_lock_irqsave(&jme->phy_lock, flags);
+        val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
+	spin_unlock_irqrestore(&jme->phy_lock, flags);
+	ecmd->autoneg = (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
+}
+
+static int
+jme_set_pauseparam(struct net_device *netdev,
+			struct ethtool_pauseparam *ecmd)
+{
+	struct jme_adapter *jme = netdev_priv(netdev);
+	unsigned long flags;
+	__u32 val;
+
+	if( ((jme->reg_txpfc & TXPFC_PF_EN) != 0) !=
+		(ecmd->tx_pause != 0)) {
+
+		if(ecmd->tx_pause)
+			jme->reg_txpfc |= TXPFC_PF_EN;
+		else
+			jme->reg_txpfc &= ~TXPFC_PF_EN;
+
+		jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
+	}
+
+	spin_lock_irqsave(&jme->rxmcs_lock, flags);
+	if( ((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) !=
+		(ecmd->rx_pause != 0)) {
+
+		if(ecmd->rx_pause)
+			jme->reg_rxmcs |= RXMCS_FLOWCTRL;
+		else
+			jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
+
+		jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
+	}
+	spin_unlock_irqrestore(&jme->rxmcs_lock, flags);
+
+	spin_lock_irqsave(&jme->phy_lock, flags);
+        val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
+	if( ((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) != 
+		(ecmd->autoneg != 0)) {
+
+		if(ecmd->autoneg)
+			val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
+		else
+			val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
+
+		jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE, val);
+	}
+	spin_unlock_irqrestore(&jme->phy_lock, flags);
+
+	return 0;
+}
+
+static void
+jme_get_wol(struct net_device *netdev,
+		struct ethtool_wolinfo *wol)
+{
+	struct jme_adapter *jme = netdev_priv(netdev);
+
+	wol->supported = WAKE_MAGIC | WAKE_PHY;
+
+	wol->wolopts = 0;
+
+	if(jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
+		wol->wolopts |= WAKE_PHY;
+
+	if(jme->reg_pmcs & PMCS_MFEN)
+		wol->wolopts |= WAKE_MAGIC;
+
+}
+
+static int
+jme_set_wol(struct net_device *netdev,
+		struct ethtool_wolinfo *wol)
+{
+	struct jme_adapter *jme = netdev_priv(netdev);
+
+	if(wol->wolopts & (WAKE_MAGICSECURE |
+				WAKE_UCAST |
+				WAKE_MCAST |
+				WAKE_BCAST |
+				WAKE_ARP))
+		return -EOPNOTSUPP;
+
+	jme->reg_pmcs = 0;
+
+	if(wol->wolopts & WAKE_PHY)
+		jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
+
+	if(wol->wolopts & WAKE_MAGIC)
+		jme->reg_pmcs |= PMCS_MFEN;
+
+
+	return 0;
+}
+ 
 static int
 jme_get_settings(struct net_device *netdev,
 		     struct ethtool_cmd *ecmd)
 {
 	struct jme_adapter *jme = netdev_priv(netdev);
 	int rc;
-	spin_lock(&jme->phy_lock);
+	unsigned long flags;
+
+	spin_lock_irqsave(&jme->phy_lock, flags);
 	rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
-	spin_unlock(&jme->phy_lock);
+	spin_unlock_irqrestore(&jme->phy_lock, flags);
 	return rc;
 }
 
@@ -1368,10 +2001,29 @@ jme_set_settings(struct net_device *netdev,
 		     struct ethtool_cmd *ecmd)
 {
 	struct jme_adapter *jme = netdev_priv(netdev);
-	int rc;
-	spin_lock(&jme->phy_lock);
+	int rc, fdc=0;
+	unsigned long flags;
+
+	if(ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
+		return -EINVAL;
+
+	if(jme->mii_if.force_media &&
+	ecmd->autoneg != AUTONEG_ENABLE &&
+	(jme->mii_if.full_duplex != ecmd->duplex))
+		fdc = 1;
+
+	spin_lock_irqsave(&jme->phy_lock, flags);
 	rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
-	spin_unlock(&jme->phy_lock);
+	spin_unlock_irqrestore(&jme->phy_lock, flags);
+
+	if(!rc && fdc)
+		jme_reset_link(jme);
+
+	if(!rc) {
+		jme->flags |= JME_FLAG_SSET;
+		jme->old_ecmd = *ecmd;
+	}
+
 	return rc;
 }
 
@@ -1382,27 +2034,99 @@ jme_get_link(struct net_device *netdev)
 	return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
 }
 
+static u32
+jme_get_rx_csum(struct net_device *netdev)
+{
+        struct jme_adapter *jme = netdev_priv(netdev);
+
+	return jme->reg_rxmcs & RXMCS_CHECKSUM;
+}
+
+static int
+jme_set_rx_csum(struct net_device *netdev, u32 on)
+{
+        struct jme_adapter *jme = netdev_priv(netdev);
+	unsigned long flags;
+	
+	spin_lock_irqsave(&jme->rxmcs_lock, flags);
+	if(on)
+		jme->reg_rxmcs |= RXMCS_CHECKSUM;
+	else
+		jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
+	jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
+	spin_unlock_irqrestore(&jme->rxmcs_lock, flags);
+
+	return 0;
+}
+
+static int
+jme_set_tx_csum(struct net_device *netdev, u32 on)
+{
+	if(on && netdev->mtu <= 1900)
+		netdev->features |= NETIF_F_HW_CSUM;
+	else
+		netdev->features &= ~NETIF_F_HW_CSUM;
+
+	return 0;
+}
+
+static int
+jme_nway_reset(struct net_device *netdev)
+{
+        struct jme_adapter *jme = netdev_priv(netdev);
+	jme_restart_an(jme);
+	return 0;
+}
+
 static const struct ethtool_ops jme_ethtool_ops = {
         .get_drvinfo            = jme_get_drvinfo,
+	.get_regs_len		= jme_get_regs_len,
+	.get_regs		= jme_get_regs,
+	.get_coalesce		= jme_get_coalesce,
+	.set_coalesce		= jme_set_coalesce,
+        .get_pauseparam		= jme_get_pauseparam,
+        .set_pauseparam		= jme_set_pauseparam,
+	.get_wol		= jme_get_wol,
+	.set_wol		= jme_set_wol,
 	.get_settings		= jme_get_settings,
 	.set_settings		= jme_set_settings,
 	.get_link		= jme_get_link,
+	.get_rx_csum		= jme_get_rx_csum,
+	.set_rx_csum		= jme_set_rx_csum,
+	.set_tx_csum		= jme_set_tx_csum,
+	.nway_reset             = jme_nway_reset,
 };
 
 static int
 jme_pci_dma64(struct pci_dev *pdev)
 {
         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK))
-                if(!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
+                if(!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
+		    	dprintk("jme", "64Bit DMA Selected.\n");
+			return 1;
+		}
+
+        if (!pci_set_dma_mask(pdev, DMA_40BIT_MASK))
+                if(!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK)) {
+		    	dprintk("jme", "40Bit DMA Selected.\n");
 			return 1;
+		}
 
         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
-                if(!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
+                if(!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
+		    	dprintk("jme", "32Bit DMA Selected.\n");
 			return 0;
+		}
 
 	return -1;
 }
 
+__always_inline static void
+jme_set_phy_ps(struct jme_adapter *jme)
+{
+	jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, 0x00001000);
+}
+
 static int __devinit
 jme_init_one(struct pci_dev *pdev,
 	     const struct pci_device_id *ent)
@@ -1446,21 +2170,26 @@ jme_init_one(struct pci_dev *pdev,
 	 */
 	netdev = alloc_etherdev(sizeof(*jme));
 	if(!netdev) {
+		printk(KERN_ERR PFX "Cannot allocate netdev structure.\n");
 		rc = -ENOMEM;
 		goto err_out_release_regions;
 	}
 	netdev->open			= jme_open;
 	netdev->stop			= jme_close;
 	netdev->hard_start_xmit		= jme_start_xmit;
-	netdev->irq			= pdev->irq;
 	netdev->set_mac_address		= jme_set_macaddr;
 	netdev->set_multicast_list	= jme_set_multi;
 	netdev->change_mtu		= jme_change_mtu;
 	netdev->ethtool_ops		= &jme_ethtool_ops;
+	netdev->tx_timeout		= jme_tx_timeout;
+	netdev->watchdog_timeo		= TX_TIMEOUT;
+	netdev->vlan_rx_register	= jme_vlan_rx_register;
 	NETDEV_GET_STATS(netdev, &jme_get_stats);
-
+	netdev->features		=	NETIF_F_HW_CSUM |
+						NETIF_F_HW_VLAN_TX |
+						NETIF_F_HW_VLAN_RX;
 	if(using_dac)
-		netdev->features	= NETIF_F_HIGHDMA;
+		netdev->features	|=	NETIF_F_HIGHDMA;
 
 	SET_NETDEV_DEV(netdev, &pdev->dev);
 	pci_set_drvdata(pdev, netdev);
@@ -1471,10 +2200,12 @@ jme_init_one(struct pci_dev *pdev,
 	jme = netdev_priv(netdev);
 	jme->pdev = pdev;
 	jme->dev = netdev;
-	jme->reg_ghc = GHC_DPX | GHC_SPEED_1000M;
+	jme->old_mtu = netdev->mtu = 1500;
+	jme->phylink = 0;
 	jme->regs = ioremap(pci_resource_start(pdev, 0),
 			     pci_resource_len(pdev, 0));
 	if (!(jme->regs)) {
+		printk(KERN_ERR PFX "Mapping PCI resource region error.\n");
 		rc = -ENOMEM;
 		goto err_out_free_netdev;
 	}
@@ -1482,13 +2213,22 @@ jme_init_one(struct pci_dev *pdev,
 					        sizeof(__u32) * SHADOW_REG_NR,
 					        &(jme->shadow_dma));
 	if (!(jme->shadow_regs)) {
+		printk(KERN_ERR PFX "Allocating shadow register mapping error.\n");
 		rc = -ENOMEM;
 		goto err_out_unmap;
 	}
 
-	spin_lock_init(&jme->rx_lock);
-	spin_lock_init(&jme->tx_lock);
 	spin_lock_init(&jme->phy_lock);
+	spin_lock_init(&jme->macaddr_lock);
+	spin_lock_init(&jme->rxmcs_lock);
+
+	atomic_set(&jme->link_changing, 1);
+	atomic_set(&jme->rx_cleaning, 1);
+	atomic_set(&jme->tx_cleaning, 1);
+
+	tasklet_init(&jme->pcc_task,
+		     &jme_pcc_tasklet,
+		     (unsigned long) jme);
 	tasklet_init(&jme->linkch_task,
 		     &jme_link_change_tasklet,
 		     (unsigned long) jme);
@@ -1498,17 +2238,45 @@ jme_init_one(struct pci_dev *pdev,
 	tasklet_init(&jme->rxclean_task,
 		     &jme_rx_clean_tasklet,
 		     (unsigned long) jme);
+	tasklet_init(&jme->rxempty_task,
+		     &jme_rx_empty_tasklet,
+		     (unsigned long) jme);
 	jme->mii_if.dev = netdev;
 	jme->mii_if.phy_id = 1;
 	jme->mii_if.supports_gmii = 1;
 	jme->mii_if.mdio_read = jme_mdio_read;
 	jme->mii_if.mdio_write = jme_mdio_write;
 
+	jme->dpi.cur = PCC_P1;
+
+	jme->reg_ghc = GHC_DPX | GHC_SPEED_1000M;
+	jme->reg_rxcs = RXCS_DEFAULT;
+	jme->reg_rxmcs = RXMCS_DEFAULT;
+	jme->reg_txpfc = 0;
+	jme->reg_pmcs = 0;
+	/*
+	 * Get Max Read Req Size from PCI Config Space
+	 */
+	pci_read_config_byte(pdev, PCI_CONF_DCSR_MRRS, &jme->mrrs);
+	switch(jme->mrrs) {
+		case MRRS_128B:
+			jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
+			break;
+		case MRRS_256B:
+			jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
+			break;
+		default:
+			jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
+			break;
+	};
+
+
 	/*
 	 * Reset MAC processor and reload EEPROM for MAC Address
 	 */
 	jme_clear_pm(jme);
-	jme_reset_phy_processor(jme);
+	jme_set_phy_ps(jme);
+	jme_phy_off(jme);
 	jme_reset_mac_processor(jme);
 	rc = jme_reload_eeprom(jme);
 	if(rc) {
@@ -1535,16 +2303,13 @@ jme_init_one(struct pci_dev *pdev,
 	}
 
 	jprintk(netdev->name,
-		"JMC250 gigabit eth at %llx, "
-		"%02x:%02x:%02x:%02x:%02x:%02x, IRQ %d\n",
-	        (unsigned long long) pci_resource_start(pdev, 0),
+		"JMC250 gigabit eth %02x:%02x:%02x:%02x:%02x:%02x\n",
 	        netdev->dev_addr[0],
 	        netdev->dev_addr[1],
 	        netdev->dev_addr[2],
 	        netdev->dev_addr[3],
 	        netdev->dev_addr[4],
-	        netdev->dev_addr[5],
-	        pdev->irq);
+	        netdev->dev_addr[5]);
 
 	return 0;
 
@@ -1585,6 +2350,87 @@ jme_remove_one(struct pci_dev *pdev)
 
 }
 
+static int
+jme_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+	struct net_device *netdev = pci_get_drvdata(pdev);
+	struct jme_adapter *jme = netdev_priv(netdev);
+	int timeout = 100;
+
+	atomic_dec(&jme->link_changing);
+
+	netif_device_detach(netdev);
+	netif_stop_queue(netdev);
+	jme_stop_irq(jme);
+	jme_free_irq(jme);
+
+	while(--timeout > 0 &&
+	(
+		atomic_read(&jme->rx_cleaning) != 1 ||
+		atomic_read(&jme->tx_cleaning) != 1
+	)) {
+		mdelay(1);
+	}
+	if(!timeout) {
+		jeprintk(netdev->name, "Waiting tasklets timeout.\n");
+		return -EBUSY;
+	}
+	jme_disable_shadow(jme);
+
+	if(netif_carrier_ok(netdev)) {
+		jme_stop_pcc_timer(jme);
+		jme_reset_mac_processor(jme);
+		jme_free_rx_resources(jme);
+		jme_free_tx_resources(jme);
+		netif_carrier_off(netdev);
+		jme->phylink = 0;
+	}
+
+
+	pci_save_state(pdev);
+	if(jme->reg_pmcs) {
+		jme_set_100m_half(jme);
+		jwrite32(jme, JME_PMCS, jme->reg_pmcs);
+		pci_enable_wake(pdev, PCI_D3hot, true);
+		pci_enable_wake(pdev, PCI_D3cold, true);
+	}
+	else {
+		jme_phy_off(jme);
+		pci_enable_wake(pdev, PCI_D3hot, false);
+		pci_enable_wake(pdev, PCI_D3cold, false);
+	}
+	pci_set_power_state(pdev, pci_choose_state(pdev, state));
+
+	return 0;
+}
+
+static int
+jme_resume(struct pci_dev *pdev)
+{
+	struct net_device *netdev = pci_get_drvdata(pdev);
+	struct jme_adapter *jme = netdev_priv(netdev);
+
+	jme_clear_pm(jme);
+	pci_restore_state(pdev);
+
+	if(jme->flags & JME_FLAG_SSET)
+		jme_set_settings(netdev, &jme->old_ecmd);
+	else
+		jme_reset_phy_processor(jme);
+
+	jme_reset_mac_processor(jme);
+	jme_enable_shadow(jme);
+	jme_request_irq(jme);
+	jme_start_irq(jme);
+	netif_device_attach(netdev);
+
+	atomic_inc(&jme->link_changing);
+
+	jme_reset_link(jme);
+
+	return 0;
+}
+
 static struct pci_device_id jme_pci_tbl[] = {
 	{ PCI_VDEVICE(JMICRON, 0x250) },
 	{ }
@@ -1595,12 +2441,10 @@ static struct pci_driver jme_driver = {
         .id_table       = jme_pci_tbl,
         .probe          = jme_init_one,
         .remove         = __devexit_p(jme_remove_one),
-#if 0
 #ifdef CONFIG_PM
         .suspend        = jme_suspend,
         .resume         = jme_resume,
 #endif /* CONFIG_PM */
-#endif
 };
 
 static int __init
@@ -1626,4 +2470,3 @@ MODULE_LICENSE("GPL");
 MODULE_VERSION(DRV_VERSION);
 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
 
-