return;
}
-static void
-jme_spi_start(struct pci_dev *pdev, struct jme_spi_op *spiop)
-{
- spiop->sr |= SPI_EN;
- pci_write_config_byte(pdev, PCI_SPI, spiop->sr);
- ndelay(spiop->halfclk << 2);
- if (spiop->mode & SPI_MODE_CPOL) {
- spiop->sr |= SPI_SCLK;
- pci_write_config_byte(pdev, PCI_SPI, spiop->sr);
- ndelay(spiop->halfclk << 2);
- }
- spiop->sr &= ~SPI_CS;
- pci_write_config_byte(pdev, PCI_SPI, spiop->sr);
- ndelay(spiop->halfclk);
-}
-
-static void
-jme_spi_write(struct pci_dev *pdev, struct jme_spi_op *spiop, u8 byte)
-{
- int bit;
-
- for (bit = 0 ; bit < 8 ; ++bit) {
- if (byte & 0x80)
- spiop->sr |= SPI_MOSI;
- else
- spiop->sr &= ~SPI_MOSI;
- pci_write_config_byte(pdev, PCI_SPI, spiop->sr);
-
- byte <<= 1;
- ndelay(spiop->halfclk);
- spiop->sr ^= SPI_SCLK;
- pci_write_config_byte(pdev, PCI_SPI, spiop->sr);
-
- ndelay(spiop->halfclk);
- spiop->sr ^= SPI_SCLK;
- pci_write_config_byte(pdev, PCI_SPI, spiop->sr);
- }
-}
-
-static void
-jme_spi_read(struct pci_dev *pdev, struct jme_spi_op *spiop, u8 *byte)
-{
- int bit;
- u8 b;
-
- spiop->sr &= ~SPI_MOSI;
- for (bit = 0 ; bit < 8 ; ++bit) {
- *byte <<= 1;
- ndelay(spiop->halfclk);
- spiop->sr ^= SPI_SCLK;
- pci_write_config_byte(pdev, PCI_SPI, spiop->sr);
-
- ndelay(spiop->halfclk);
- pci_read_config_byte(pdev, PCI_SPI, &b);
- *byte |= !!(b & SPI_MISO);
- spiop->sr ^= SPI_SCLK;
- pci_write_config_byte(pdev, PCI_SPI, spiop->sr);
- }
-}
-
-static void
-jme_spi_stop(struct pci_dev *pdev, struct jme_spi_op *spiop)
-{
- spiop->sr &= ~SPI_EN;
- spiop->sr |= SPI_CS;
- pci_write_config_byte(pdev, PCI_SPI, spiop->sr);
-}
-
-/**
- * jme_spi_io - SPI Access helper function.
- * @jme: Adapter informations
- * @spiop: SPI operation.
- *
- * We have a SPI SW Access register in PCI configuration space,
- * which directly connect to flash controller with SPI interface.
- * This function is used to communicate with it in SPI protocol.
- */
-static int
-jme_spi_op(struct jme_adapter *jme, struct jme_spi_op *spiop)
-{
- int i;
-
- /*
- * Only support 8 bits for now
- */
- if (spiop->bitn != 8)
- return -EINVAL;
-
- /*
- * Only support half-duplex for now
- */
- if (spiop->mode & SPI_MODE_DUP)
- return -EINVAL;
-
- spiop->halfclk = HALF_US / spiop->spd;
- spiop->sr = SPI_CS;
- jme_spi_start(jme->pdev, spiop);
-
- for (i = 0 ; i < spiop->wn ; ++i)
- jme_spi_write(jme->pdev, spiop, spiop->kwbuf[i]);
-
- for (i = 0 ; i < spiop->rn ; ++i)
- jme_spi_read(jme->pdev, spiop, spiop->krbuf + i);
-
- jme_spi_stop(jme->pdev, spiop);
-
- return 0;
-}
-
static inline void
jme_reset_phy_processor(struct jme_adapter *jme)
{
}
static inline void
-jme_set_gmii(struct jme_adapter *jme)
+jme_set_phyfifoa(struct jme_adapter *jme)
{
jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
}
static inline void
-jme_set_rgmii(struct jme_adapter *jme)
+jme_set_phyfifob(struct jme_adapter *jme)
{
jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
}
case PHY_LINK_SPEED_10M:
ghc |= GHC_SPEED_10M;
strcat(linkmsg, "10 Mbps, ");
- if (jme->rev == 0x11)
- jme_set_gmii(jme);
+ if (is_buggy250(jme->pdev->device, jme->chiprev))
+ jme_set_phyfifoa(jme);
break;
case PHY_LINK_SPEED_100M:
ghc |= GHC_SPEED_100M;
strcat(linkmsg, "100 Mbps, ");
- if (jme->rev == 0x11)
- jme_set_rgmii(jme);
+ if (is_buggy250(jme->pdev->device, jme->chiprev))
+ jme_set_phyfifob(jme);
break;
case PHY_LINK_SPEED_1000M:
ghc |= GHC_SPEED_1000M;
strcat(linkmsg, "1000 Mbps, ");
- if (jme->rev == 0x11)
- jme_set_gmii(jme);
+ if (is_buggy250(jme->pdev->device, jme->chiprev))
+ jme_set_phyfifoa(jme);
break;
default:
break;
while (!atomic_dec_and_test(&jme->link_changing)) {
atomic_inc(&jme->link_changing);
msg_intr(jme, "Get link change lock failed.\n");
- while(atomic_read(&jme->link_changing) != 1)
+ while (atomic_read(&jme->link_changing) != 1)
msg_intr(jme, "Waiting link change lock.\n");
}
return 0;
}
-static int
-jme_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
-{
- struct jme_adapter *jme = netdev_priv(netdev);
- struct jme_spi_op spiop;
- int rc;
-
- switch (cmd) {
- case JMESPIIOCTL:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
-
- copy_from_user(&spiop, ifr->ifr_data,
- sizeof(struct jme_spi_op));
- spiop.kwbuf = kmalloc(spiop.wn, GFP_KERNEL);
- if (!spiop.kwbuf) {
- rc = -ENOMEM;
- goto out;
- }
- spiop.krbuf = kmalloc(spiop.rn, GFP_KERNEL);
- if (!spiop.krbuf) {
- rc = -ENOMEM;
- goto out_free1;
- }
- copy_from_user(spiop.kwbuf, spiop.uwbuf, spiop.wn);
- rc = jme_spi_op(jme, &spiop);
- if (rc)
- goto out_free;
- copy_to_user(spiop.urbuf, spiop.krbuf, spiop.rn);
-out_free:
- kfree(spiop.krbuf);
-out_free1:
- kfree(spiop.kwbuf);
-out:
- return rc;
- default:
- break;
- }
-
- return -EOPNOTSUPP;
-}
-
static void
jme_tx_timeout(struct net_device *netdev)
{
chipmode = jread32(jme, JME_CHIPMODE);
jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
- jme->chipver = (chipmode & CM_CHIPVER_MASK) >> CM_CHIPVER_SHIFT;
+ jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
}
static int __devinit
netdev->set_mac_address = jme_set_macaddr;
netdev->set_multicast_list = jme_set_multi;
netdev->change_mtu = jme_change_mtu;
- netdev->do_ioctl = jme_ioctl;
netdev->ethtool_ops = &jme_ethtool_ops;
netdev->tx_timeout = jme_tx_timeout;
netdev->watchdog_timeo = TX_TIMEOUT;
jme->mii_if.mdio_write = jme_mdio_write;
jme_clear_pm(jme);
- jme_set_gmii(jme);
+ jme_set_phyfifoa(jme);
pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
if (!jme->fpgaver)
jme_phy_init(jme);
}
msg_probe(jme,
- "JMC250 gigabit%s ver:%u rev:%1x.%1x "
+ "JMC250 gigabit%s ver:%x rev:%x "
"macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
(jme->fpgaver != 0) ? " (FPGA)" : "",
- (jme->fpgaver != 0) ? jme->fpgaver : jme->chipver,
- jme->rev & 0xf, (jme->rev >> 4) & 0xf,
+ (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
+ jme->rev,
netdev->dev_addr[0],
netdev->dev_addr[1],
netdev->dev_addr[2],
git://bbs.cooldavid.org / jme.git / blobdiff