jme: Fix hardware action of full-duplex

[jme.git] / jme.c

diff --git a/jme.c b/jme.c
index f9183027313a08cbcac9859cf0e377f44f8d5ab7..ee39a05d848d384bbfedf939de675033811dc933 100644 (file)
--- a/jme.c
+++ b/jme.c
@@ -339,13 +339,13 @@ jme_linkstat_from_phy(struct jme_adapter *jme)
 }
 
 static inline void
-jme_set_phyfifoa(struct jme_adapter *jme)
+jme_set_phyfifo_5level(struct jme_adapter *jme)
 {
        jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
 }
 
 static inline void
-jme_set_phyfifob(struct jme_adapter *jme)
+jme_set_phyfifo_8level(struct jme_adapter *jme)
 {
        jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
 }
@@ -442,16 +442,14 @@ jme_check_link(struct net_device *netdev, int testonly)
 
                if (phylink & PHY_LINK_DUPLEX) {
                        jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
+                       jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX);
                        ghc |= GHC_DPX;
                } else {
                        jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
                                                TXMCS_BACKOFF |
                                                TXMCS_CARRIERSENSE |
                                                TXMCS_COLLISION);
-                       jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
-                               ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
-                               TXTRHD_TXREN |
-                               ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
+                       jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX);
                }
 
                gpreg1 = GPREG1_DEFAULT;
@@ -460,15 +458,15 @@ jme_check_link(struct net_device *netdev, int testonly)
                                gpreg1 |= GPREG1_HALFMODEPATCH;
                        switch (phylink & PHY_LINK_SPEED_MASK) {
                        case PHY_LINK_SPEED_10M:
-                               jme_set_phyfifoa(jme);
+                               jme_set_phyfifo_8level(jme);
                                gpreg1 |= GPREG1_RSSPATCH;
                                break;
                        case PHY_LINK_SPEED_100M:
-                               jme_set_phyfifob(jme);
+                               jme_set_phyfifo_5level(jme);
                                gpreg1 |= GPREG1_RSSPATCH;
                                break;
                        case PHY_LINK_SPEED_1000M:
-                               jme_set_phyfifoa(jme);
+                               jme_set_phyfifo_8level(jme);
                                break;
                        default:
                                break;
@@ -3116,7 +3114,7 @@ jme_init_one(struct pci_dev *pdev,
        jme->mii_if.mdio_write = jme_mdio_write;
 
        jme_clear_pm(jme);
-       jme_set_phyfifoa(jme);
+       jme_set_phyfifo_5level(jme);
        pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev);
        if (!jme->fpgaver)
                jme_phy_init(jme);