jme: Refill receive unicase MAC addr after resume
[jme.git] / jme.c
diff --git a/jme.c b/jme.c
index c34c70f..ed35e17 100644 (file)
--- a/jme.c
+++ b/jme.c
@@ -3,6 +3,7 @@
  *
  * Copyright 2008 JMicron Technology Corporation
  * http://www.jmicron.com/
+ * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org>
  *
  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
  *
@@ -134,7 +135,7 @@ jme_reset_phy_processor(struct jme_adapter *jme)
 
 static void
 jme_setup_wakeup_frame(struct jme_adapter *jme,
-               u32 *mask, u32 crc, int fnr)
+                      const u32 *mask, u32 crc, int fnr)
 {
        int i;
 
@@ -160,16 +161,92 @@ jme_setup_wakeup_frame(struct jme_adapter *jme,
 }
 
 static inline void
+jme_mac_rxclk_off(struct jme_adapter *jme)
+{
+       jme->reg_gpreg1 |= GPREG1_RXCLKOFF;
+       jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
+}
+
+static inline void
+jme_mac_rxclk_on(struct jme_adapter *jme)
+{
+       jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF;
+       jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
+}
+
+static inline void
+jme_mac_txclk_off(struct jme_adapter *jme)
+{
+       jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC);
+       jwrite32f(jme, JME_GHC, jme->reg_ghc);
+}
+
+static inline void
+jme_mac_txclk_on(struct jme_adapter *jme)
+{
+       u32 speed = jme->reg_ghc & GHC_SPEED;
+       if (speed == GHC_SPEED_1000M)
+               jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
+       else
+               jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
+       jwrite32f(jme, JME_GHC, jme->reg_ghc);
+}
+
+static inline void
+jme_reset_ghc_speed(struct jme_adapter *jme)
+{
+       jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX);
+       jwrite32f(jme, JME_GHC, jme->reg_ghc);
+}
+
+static inline void
+jme_reset_250A2_workaround(struct jme_adapter *jme)
+{
+       jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
+                            GPREG1_RSSPATCH);
+       jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
+}
+
+static inline void
+jme_assert_ghc_reset(struct jme_adapter *jme)
+{
+       jme->reg_ghc |= GHC_SWRST;
+       jwrite32f(jme, JME_GHC, jme->reg_ghc);
+}
+
+static inline void
+jme_clear_ghc_reset(struct jme_adapter *jme)
+{
+       jme->reg_ghc &= ~GHC_SWRST;
+       jwrite32f(jme, JME_GHC, jme->reg_ghc);
+}
+
+static inline void
 jme_reset_mac_processor(struct jme_adapter *jme)
 {
-       u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
+       static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
        u32 crc = 0xCDCDCDCD;
        u32 gpreg0;
        int i;
 
-       jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
-       udelay(2);
-       jwrite32(jme, JME_GHC, jme->reg_ghc);
+       jme_reset_ghc_speed(jme);
+       jme_reset_250A2_workaround(jme);
+
+       jme_mac_rxclk_on(jme);
+       jme_mac_txclk_on(jme);
+       udelay(1);
+       jme_assert_ghc_reset(jme);
+       udelay(1);
+       jme_mac_rxclk_off(jme);
+       jme_mac_txclk_off(jme);
+       udelay(1);
+       jme_clear_ghc_reset(jme);
+       udelay(1);
+       jme_mac_rxclk_on(jme);
+       jme_mac_txclk_on(jme);
+       udelay(1);
+       jme_mac_rxclk_off(jme);
+       jme_mac_txclk_off(jme);
 
        jwrite32(jme, JME_RXDBA_LO, 0x00000000);
        jwrite32(jme, JME_RXDBA_HI, 0x00000000);
@@ -189,14 +266,6 @@ jme_reset_mac_processor(struct jme_adapter *jme)
        else
                gpreg0 = GPREG0_DEFAULT;
        jwrite32(jme, JME_GPREG0, gpreg0);
-       jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
-}
-
-static inline void
-jme_reset_ghc_speed(struct jme_adapter *jme)
-{
-       jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX);
-       jwrite32(jme, JME_GHC, jme->reg_ghc);
 }
 
 static inline void
@@ -335,13 +404,13 @@ jme_linkstat_from_phy(struct jme_adapter *jme)
 }
 
 static inline void
-jme_set_phyfifoa(struct jme_adapter *jme)
+jme_set_phyfifo_5level(struct jme_adapter *jme)
 {
        jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
 }
 
 static inline void
-jme_set_phyfifob(struct jme_adapter *jme)
+jme_set_phyfifo_8level(struct jme_adapter *jme)
 {
        jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
 }
@@ -350,7 +419,7 @@ static int
 jme_check_link(struct net_device *netdev, int testonly)
 {
        struct jme_adapter *jme = netdev_priv(netdev);
-       u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
+       u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr;
        char linkmsg[64];
        int rc = 0;
 
@@ -413,23 +482,21 @@ jme_check_link(struct net_device *netdev, int testonly)
 
                jme->phylink = phylink;
 
-               ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX |
-                               GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE |
-                               GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY);
+               /*
+                * The speed/duplex setting of jme->reg_ghc already cleared
+                * by jme_reset_mac_processor()
+                */
                switch (phylink & PHY_LINK_SPEED_MASK) {
                case PHY_LINK_SPEED_10M:
-                       ghc |= GHC_SPEED_10M |
-                               GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
+                       jme->reg_ghc |= GHC_SPEED_10M;
                        strcat(linkmsg, "10 Mbps, ");
                        break;
                case PHY_LINK_SPEED_100M:
-                       ghc |= GHC_SPEED_100M |
-                               GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
+                       jme->reg_ghc |= GHC_SPEED_100M;
                        strcat(linkmsg, "100 Mbps, ");
                        break;
                case PHY_LINK_SPEED_1000M:
-                       ghc |= GHC_SPEED_1000M |
-                               GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
+                       jme->reg_ghc |= GHC_SPEED_1000M;
                        strcat(linkmsg, "1000 Mbps, ");
                        break;
                default:
@@ -438,42 +505,40 @@ jme_check_link(struct net_device *netdev, int testonly)
 
                if (phylink & PHY_LINK_DUPLEX) {
                        jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
-                       ghc |= GHC_DPX;
+                       jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX);
+                       jme->reg_ghc |= GHC_DPX;
                } else {
                        jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
                                                TXMCS_BACKOFF |
                                                TXMCS_CARRIERSENSE |
                                                TXMCS_COLLISION);
-                       jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
-                               ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
-                               TXTRHD_TXREN |
-                               ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
+                       jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX);
                }
 
-               gpreg1 = GPREG1_DEFAULT;
+               jwrite32(jme, JME_GHC, jme->reg_ghc);
+
                if (is_buggy250(jme->pdev->device, jme->chiprev)) {
+                       jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
+                                            GPREG1_RSSPATCH);
                        if (!(phylink & PHY_LINK_DUPLEX))
-                               gpreg1 |= GPREG1_HALFMODEPATCH;
+                               jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH;
                        switch (phylink & PHY_LINK_SPEED_MASK) {
                        case PHY_LINK_SPEED_10M:
-                               jme_set_phyfifoa(jme);
-                               gpreg1 |= GPREG1_RSSPATCH;
+                               jme_set_phyfifo_8level(jme);
+                               jme->reg_gpreg1 |= GPREG1_RSSPATCH;
                                break;
                        case PHY_LINK_SPEED_100M:
-                               jme_set_phyfifob(jme);
-                               gpreg1 |= GPREG1_RSSPATCH;
+                               jme_set_phyfifo_5level(jme);
+                               jme->reg_gpreg1 |= GPREG1_RSSPATCH;
                                break;
                        case PHY_LINK_SPEED_1000M:
-                               jme_set_phyfifoa(jme);
+                               jme_set_phyfifo_8level(jme);
                                break;
                        default:
                                break;
                        }
                }
-
-               jwrite32(jme, JME_GPREG1, gpreg1);
-               jwrite32(jme, JME_GHC, ghc);
-               jme->reg_ghc = ghc;
+               jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 
                strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
                                        "Full-Duplex, " :
@@ -612,10 +677,14 @@ jme_enable_tx_engine(struct jme_adapter *jme)
         * Enable TX Engine
         */
        wmb();
-       jwrite32(jme, JME_TXCS, jme->reg_txcs |
+       jwrite32f(jme, JME_TXCS, jme->reg_txcs |
                                TXCS_SELECT_QUEUE0 |
                                TXCS_ENABLE);
 
+       /*
+        * Start clock for TX MAC Processor
+        */
+       jme_mac_txclk_on(jme);
 }
 
 static inline void
@@ -650,6 +719,11 @@ jme_disable_tx_engine(struct jme_adapter *jme)
 
        if (!i)
                pr_err("Disable TX engine timeout\n");
+
+       /*
+        * Stop clock for TX MAC Processor
+        */
+       jme_mac_txclk_off(jme);
 }
 
 static void
@@ -824,16 +898,22 @@ jme_enable_rx_engine(struct jme_adapter *jme)
        /*
         * Setup Unicast Filter
         */
+       jme_set_unicastaddr(jme->dev);
        jme_set_multi(jme->dev);
 
        /*
         * Enable RX Engine
         */
        wmb();
-       jwrite32(jme, JME_RXCS, jme->reg_rxcs |
+       jwrite32f(jme, JME_RXCS, jme->reg_rxcs |
                                RXCS_QUEUESEL_Q0 |
                                RXCS_ENABLE |
                                RXCS_QST);
+
+       /*
+        * Start clock for RX MAC Processor
+        */
+       jme_mac_rxclk_on(jme);
 }
 
 static inline void
@@ -870,6 +950,10 @@ jme_disable_rx_engine(struct jme_adapter *jme)
        if (!i)
                pr_err("Disable RX engine timeout\n");
 
+       /*
+        * Stop clock for RX MAC Processor
+        */
+       jme_mac_rxclk_off(jme);
 }
 
 static int
@@ -1206,7 +1290,6 @@ jme_link_change_tasklet(unsigned long arg)
        tasklet_disable(&jme->rxempty_task);
 
        if (netif_carrier_ok(netdev)) {
-               jme_reset_ghc_speed(jme);
                jme_disable_rx_engine(jme);
                jme_disable_tx_engine(jme);
                jme_reset_mac_processor(jme);
@@ -1576,6 +1659,38 @@ jme_free_irq(struct jme_adapter *jme)
 }
 
 static inline void
+jme_new_phy_on(struct jme_adapter *jme)
+{
+       u32 reg;
+
+       reg = jread32(jme, JME_PHY_PWR);
+       reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
+                PHY_PWR_DWN2 | PHY_PWR_CLKSEL);
+       jwrite32(jme, JME_PHY_PWR, reg);
+
+       pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
+       reg &= ~PE1_GPREG0_PBG;
+       reg |= PE1_GPREG0_ENBG;
+       pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
+}
+
+static inline void
+jme_new_phy_off(struct jme_adapter *jme)
+{
+       u32 reg;
+
+       reg = jread32(jme, JME_PHY_PWR);
+       reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
+              PHY_PWR_DWN2 | PHY_PWR_CLKSEL;
+       jwrite32(jme, JME_PHY_PWR, reg);
+
+       pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
+       reg &= ~PE1_GPREG0_PBG;
+       reg |= PE1_GPREG0_PDD3COLD;
+       pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
+}
+
+static inline void
 jme_phy_on(struct jme_adapter *jme)
 {
        u32 bmcr;
@@ -1583,6 +1698,22 @@ jme_phy_on(struct jme_adapter *jme)
        bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
        bmcr &= ~BMCR_PDOWN;
        jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
+
+       if (new_phy_power_ctrl(jme->chip_main_rev))
+               jme_new_phy_on(jme);
+}
+
+static inline void
+jme_phy_off(struct jme_adapter *jme)
+{
+       u32 bmcr;
+
+       bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
+       bmcr |= BMCR_PDOWN;
+       jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
+
+       if (new_phy_power_ctrl(jme->chip_main_rev))
+               jme_new_phy_off(jme);
 }
 
 static int
@@ -1605,12 +1736,11 @@ jme_open(struct net_device *netdev)
 
        jme_start_irq(jme);
 
-       if (test_bit(JME_FLAG_SSET, &jme->flags)) {
-               jme_phy_on(jme);
+       jme_phy_on(jme);
+       if (test_bit(JME_FLAG_SSET, &jme->flags))
                jme_set_settings(netdev, &jme->old_ecmd);
-       } else {
+       else
                jme_reset_phy_processor(jme);
-       }
 
        jme_reset_link(jme);
 
@@ -1622,12 +1752,12 @@ err_out:
        return rc;
 }
 
-#ifdef CONFIG_PM
 static void
 jme_set_100m_half(struct jme_adapter *jme)
 {
        u32 bmcr, tmp;
 
+       jme_phy_on(jme);
        bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
        tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
                       BMCR_SPEED1000 | BMCR_FULLDPLX);
@@ -1655,12 +1785,20 @@ jme_wait_link(struct jme_adapter *jme)
                phylink = jme_linkstat_from_phy(jme);
        }
 }
-#endif
 
-static inline void
-jme_phy_off(struct jme_adapter *jme)
+static void
+jme_powersave_phy(struct jme_adapter *jme)
 {
-       jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
+       if (jme->reg_pmcs) {
+               jme_set_100m_half(jme);
+
+               if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
+                       jme_wait_link(jme);
+
+               jwrite32(jme, JME_PMCS, jme->reg_pmcs);
+       } else {
+               jme_phy_off(jme);
+       }
 }
 
 static int
@@ -1681,7 +1819,6 @@ jme_close(struct net_device *netdev)
        tasklet_disable(&jme->rxclean_task);
        tasklet_disable(&jme->rxempty_task);
 
-       jme_reset_ghc_speed(jme);
        jme_disable_rx_engine(jme);
        jme_disable_tx_engine(jme);
        jme_reset_mac_processor(jme);
@@ -1978,27 +2115,34 @@ jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
        return NETDEV_TX_OK;
 }
 
+static void
+jme_set_unicastaddr(struct net_device *netdev)
+{
+       struct jme_adapter *jme = netdev_priv(netdev);
+       u32 val;
+
+       val = (netdev->dev_addr[3] & 0xff) << 24 |
+             (netdev->dev_addr[2] & 0xff) << 16 |
+             (netdev->dev_addr[1] & 0xff) <<  8 |
+             (netdev->dev_addr[0] & 0xff);
+       jwrite32(jme, JME_RXUMA_LO, val);
+       val = (netdev->dev_addr[5] & 0xff) << 8 |
+             (netdev->dev_addr[4] & 0xff);
+       jwrite32(jme, JME_RXUMA_HI, val);
+}
+
 static int
 jme_set_macaddr(struct net_device *netdev, void *p)
 {
        struct jme_adapter *jme = netdev_priv(netdev);
        struct sockaddr *addr = p;
-       u32 val;
 
        if (netif_running(netdev))
                return -EBUSY;
 
        spin_lock_bh(&jme->macaddr_lock);
        memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
-
-       val = (addr->sa_data[3] & 0xff) << 24 |
-             (addr->sa_data[2] & 0xff) << 16 |
-             (addr->sa_data[1] & 0xff) <<  8 |
-             (addr->sa_data[0] & 0xff);
-       jwrite32(jme, JME_RXUMA_LO, val);
-       val = (addr->sa_data[5] & 0xff) << 8 |
-             (addr->sa_data[4] & 0xff);
-       jwrite32(jme, JME_RXUMA_HI, val);
+       jme_set_unicastaddr(netdev);
        spin_unlock_bh(&jme->macaddr_lock);
 
        return 0;
@@ -2061,12 +2205,11 @@ jme_change_mtu(struct net_device *netdev, int new_mtu)
        }
 
        if (new_mtu > 1900) {
-               netdev->features &= ~(NETIF_F_HW_CSUM |
-                               NETIF_F_TSO |
-                               NETIF_F_TSO6);
+               netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
+                               NETIF_F_TSO | NETIF_F_TSO6);
        } else {
                if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
-                       netdev->features |= NETIF_F_HW_CSUM;
+                       netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
                if (test_bit(JME_FLAG_TSO, &jme->flags))
                        netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
        }
@@ -2499,10 +2642,12 @@ jme_set_tx_csum(struct net_device *netdev, u32 on)
        if (on) {
                set_bit(JME_FLAG_TXCSUM, &jme->flags);
                if (netdev->mtu <= 1900)
-                       netdev->features |= NETIF_F_HW_CSUM;
+                       netdev->features |=
+                               NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
        } else {
                clear_bit(JME_FLAG_TXCSUM, &jme->flags);
-               netdev->features &= ~NETIF_F_HW_CSUM;
+               netdev->features &=
+                               ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
        }
 
        return 0;
@@ -2715,6 +2860,8 @@ jme_check_hw_ver(struct jme_adapter *jme)
 
        jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
        jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
+       jme->chip_main_rev = jme->chiprev & 0xF;
+       jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF;
 }
 
 static const struct net_device_ops jme_netdev_ops = {
@@ -2782,7 +2929,8 @@ jme_init_one(struct pci_dev *pdev,
        netdev->netdev_ops = &jme_netdev_ops;
        netdev->ethtool_ops             = &jme_ethtool_ops;
        netdev->watchdog_timeo          = TX_TIMEOUT;
-       netdev->features                =       NETIF_F_HW_CSUM |
+       netdev->features                =       NETIF_F_IP_CSUM |
+                                               NETIF_F_IPV6_CSUM |
                                                NETIF_F_SG |
                                                NETIF_F_TSO |
                                                NETIF_F_TSO6 |
@@ -2863,6 +3011,7 @@ jme_init_one(struct pci_dev *pdev,
        jme->reg_rxmcs = RXMCS_DEFAULT;
        jme->reg_txpfc = 0;
        jme->reg_pmcs = PMCS_MFEN;
+       jme->reg_gpreg1 = GPREG1_DEFAULT;
        set_bit(JME_FLAG_TXCSUM, &jme->flags);
        set_bit(JME_FLAG_TSO, &jme->flags);
 
@@ -2919,8 +3068,8 @@ jme_init_one(struct pci_dev *pdev,
        jme->mii_if.mdio_write = jme_mdio_write;
 
        jme_clear_pm(jme);
-       jme_set_phyfifoa(jme);
-       pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
+       jme_set_phyfifo_5level(jme);
+       pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev);
        if (!jme->fpgaver)
                jme_phy_init(jme);
        jme_phy_off(jme);
@@ -2940,25 +3089,21 @@ jme_init_one(struct pci_dev *pdev,
         * Tell stack that we are not ready to work until open()
         */
        netif_carrier_off(netdev);
-       netif_stop_queue(netdev);
 
-       /*
-        * Register netdev
-        */
        rc = register_netdev(netdev);
        if (rc) {
                pr_err("Cannot register net device\n");
                goto err_out_unmap;
        }
 
-       netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x macaddr:%pM\n",
+       netif_info(jme, probe, jme->dev, "%s%s chiprev:%x pcirev:%x macaddr:%pM\n",
                   (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
                   "JMC250 Gigabit Ethernet" :
                   (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
                   "JMC260 Fast Ethernet" : "Unknown",
                   (jme->fpgaver != 0) ? " (FPGA)" : "",
                   (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
-                  jme->rev, netdev->dev_addr);
+                  jme->pcirev, netdev->dev_addr);
 
        return 0;
 
@@ -2990,6 +3135,16 @@ jme_remove_one(struct pci_dev *pdev)
 
 }
 
+static void
+jme_shutdown(struct pci_dev *pdev)
+{
+       struct net_device *netdev = pci_get_drvdata(pdev);
+       struct jme_adapter *jme = netdev_priv(netdev);
+
+       jme_powersave_phy(jme);
+       pci_pme_active(pdev, true);
+}
+
 #ifdef CONFIG_PM
 static int
 jme_suspend(struct pci_dev *pdev, pm_message_t state)
@@ -3012,7 +3167,6 @@ jme_suspend(struct pci_dev *pdev, pm_message_t state)
                        jme_polling_mode(jme);
 
                jme_stop_pcc_timer(jme);
-               jme_reset_ghc_speed(jme);
                jme_disable_rx_engine(jme);
                jme_disable_tx_engine(jme);
                jme_reset_mac_processor(jme);
@@ -3027,19 +3181,9 @@ jme_suspend(struct pci_dev *pdev, pm_message_t state)
        tasklet_hi_enable(&jme->rxempty_task);
 
        pci_save_state(pdev);
-       if (jme->reg_pmcs) {
-               jme_set_100m_half(jme);
-
-               if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
-                       jme_wait_link(jme);
-
-               jwrite32(jme, JME_PMCS, jme->reg_pmcs);
-
-               pci_enable_wake(pdev, PCI_D3cold, true);
-       } else {
-               jme_phy_off(jme);
-       }
-       pci_set_power_state(pdev, PCI_D3cold);
+       jme_powersave_phy(jme);
+       pci_enable_wake(jme->pdev, PCI_D3hot, true);
+       pci_set_power_state(pdev, PCI_D3hot);
 
        return 0;
 }
@@ -3053,12 +3197,11 @@ jme_resume(struct pci_dev *pdev)
        jme_clear_pm(jme);
        pci_restore_state(pdev);
 
-       if (test_bit(JME_FLAG_SSET, &jme->flags)) {
-               jme_phy_on(jme);
+       jme_phy_on(jme);
+       if (test_bit(JME_FLAG_SSET, &jme->flags))
                jme_set_settings(netdev, &jme->old_ecmd);
-       } else {
+       else
                jme_reset_phy_processor(jme);
-       }
 
        jme_start_irq(jme);
        netif_device_attach(netdev);
@@ -3086,6 +3229,7 @@ static struct pci_driver jme_driver = {
        .suspend        = jme_suspend,
        .resume         = jme_resume,
 #endif /* CONFIG_PM */
+       .shutdown       = jme_shutdown,
 };
 
 static int __init