jme: Rename phyfifo function for easier understand

[jme.git] / jme.c

diff --git a/jme.c b/jme.c
index 2dd1ac7ba34a5ea797cfba23d0a817a72734218a..89c1ab7dd6f71df41b154ff65d44f2a2c22068d2 100644 (file)
--- a/jme.c
+++ b/jme.c
@@ -138,7 +138,7 @@ jme_reset_phy_processor(struct jme_adapter *jme)
 
 static void
 jme_setup_wakeup_frame(struct jme_adapter *jme,
-               u32 *mask, u32 crc, int fnr)
+                      const u32 *mask, u32 crc, int fnr)
 {
        int i;
 
@@ -166,7 +166,7 @@ jme_setup_wakeup_frame(struct jme_adapter *jme,
 static inline void
 jme_reset_mac_processor(struct jme_adapter *jme)
 {
-       u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
+       static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
        u32 crc = 0xCDCDCDCD;
        u32 gpreg0;
        int i;
@@ -339,13 +339,13 @@ jme_linkstat_from_phy(struct jme_adapter *jme)
 }
 
 static inline void
-jme_set_phyfifoa(struct jme_adapter *jme)
+jme_set_phyfifo_5level(struct jme_adapter *jme)
 {
        jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
 }
 
 static inline void
-jme_set_phyfifob(struct jme_adapter *jme)
+jme_set_phyfifo_8level(struct jme_adapter *jme)
 {
        jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
 }
@@ -460,15 +460,15 @@ jme_check_link(struct net_device *netdev, int testonly)
                                gpreg1 |= GPREG1_HALFMODEPATCH;
                        switch (phylink & PHY_LINK_SPEED_MASK) {
                        case PHY_LINK_SPEED_10M:
-                               jme_set_phyfifoa(jme);
+                               jme_set_phyfifo_8level(jme);
                                gpreg1 |= GPREG1_RSSPATCH;
                                break;
                        case PHY_LINK_SPEED_100M:
-                               jme_set_phyfifob(jme);
+                               jme_set_phyfifo_5level(jme);
                                gpreg1 |= GPREG1_RSSPATCH;
                                break;
                        case PHY_LINK_SPEED_1000M:
-                               jme_set_phyfifoa(jme);
+                               jme_set_phyfifo_8level(jme);
                                break;
                        default:
                                break;
@@ -1602,6 +1602,38 @@ jme_free_irq(struct jme_adapter *jme)
        }
 }
 
+static inline void
+jme_new_phy_on(struct jme_adapter *jme)
+{
+       u32 reg;
+
+       reg = jread32(jme, JME_PHY_PWR);
+       reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
+                PHY_PWR_DWN2 | PHY_PWR_CLKSEL);
+       jwrite32(jme, JME_PHY_PWR, reg);
+
+       pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
+       reg &= ~PE1_GPREG0_PBG;
+       reg |= PE1_GPREG0_ENBG;
+       pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
+}
+
+static inline void
+jme_new_phy_off(struct jme_adapter *jme)
+{
+       u32 reg;
+
+       reg = jread32(jme, JME_PHY_PWR);
+       reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
+              PHY_PWR_DWN2 | PHY_PWR_CLKSEL;
+       jwrite32(jme, JME_PHY_PWR, reg);
+
+       pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
+       reg &= ~PE1_GPREG0_PBG;
+       reg |= PE1_GPREG0_PDD3COLD;
+       pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
+}
+
 static inline void
 jme_phy_on(struct jme_adapter *jme)
 {
@@ -1610,6 +1642,22 @@ jme_phy_on(struct jme_adapter *jme)
        bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
        bmcr &= ~BMCR_PDOWN;
        jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
+
+       if (new_phy_power_ctrl(jme->chip_main_rev))
+               jme_new_phy_on(jme);
+}
+
+static inline void
+jme_phy_off(struct jme_adapter *jme)
+{
+       u32 bmcr;
+
+       bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
+       bmcr |= BMCR_PDOWN;
+       jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
+
+       if (new_phy_power_ctrl(jme->chip_main_rev))
+               jme_new_phy_off(jme);
 }
 
 static int
@@ -1632,12 +1680,11 @@ jme_open(struct net_device *netdev)
 
        jme_start_irq(jme);
 
-       if (test_bit(JME_FLAG_SSET, &jme->flags)) {
-               jme_phy_on(jme);
+       jme_phy_on(jme);
+       if (test_bit(JME_FLAG_SSET, &jme->flags))
                jme_set_settings(netdev, &jme->old_ecmd);
-       } else {
+       else
                jme_reset_phy_processor(jme);
-       }
 
        jme_reset_link(jme);
 
@@ -1683,12 +1730,6 @@ jme_wait_link(struct jme_adapter *jme)
        }
 }
 
-static inline void
-jme_phy_off(struct jme_adapter *jme)
-{
-       jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
-}
-
 static void
 jme_powersave_phy(struct jme_adapter *jme)
 {
@@ -2850,6 +2891,8 @@ jme_check_hw_ver(struct jme_adapter *jme)
 
        jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
        jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
+       jme->chip_main_rev = jme->chiprev & 0xF;
+       jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF;
 }
 
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
@@ -3073,8 +3116,8 @@ jme_init_one(struct pci_dev *pdev,
        jme->mii_if.mdio_write = jme_mdio_write;
 
        jme_clear_pm(jme);
-       jme_set_phyfifoa(jme);
-       pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
+       jme_set_phyfifo_5level(jme);
+       pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev);
        if (!jme->fpgaver)
                jme_phy_init(jme);
        jme_phy_off(jme);
@@ -3101,7 +3144,7 @@ jme_init_one(struct pci_dev *pdev,
                goto err_out_unmap;
        }
 
-       netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x "
+       netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x "
                   "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
                   (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
                   "JMC250 Gigabit Ethernet" :
@@ -3109,7 +3152,7 @@ jme_init_one(struct pci_dev *pdev,
                   "JMC260 Fast Ethernet" : "Unknown",
                   (jme->fpgaver != 0) ? " (FPGA)" : "",
                   (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
-                  jme->rev,
+                  jme->pcirev,
                   netdev->dev_addr[0],
                   netdev->dev_addr[1],
                   netdev->dev_addr[2],
@@ -3214,12 +3257,11 @@ jme_resume(struct pci_dev *pdev)
        jme_clear_pm(jme);
        pci_restore_state(pdev);
 
-       if (test_bit(JME_FLAG_SSET, &jme->flags)) {
-               jme_phy_on(jme);
+       jme_phy_on(jme);
+       if (test_bit(JME_FLAG_SSET, &jme->flags))
                jme_set_settings(netdev, &jme->old_ecmd);
-       } else {
+       else
                jme_reset_phy_processor(jme);
-       }
 
        jme_start_irq(jme);
        netif_device_attach(netdev);