phyext testing

[jme.git] / jme.c

diff --git a/jme.c b/jme.c
index 2852ba56fb33696f70a1c8771fa7e9634b85eb2b..6020ecf7a5895c58bbeae5921df6e0d2c18473cb 100644 (file)
--- a/jme.c
+++ b/jme.c
@@ -137,7 +137,7 @@ jme_phyext_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
        int i;
        u16 *p16 = (u16 *)p;
 
-       for (i = 0 ; i < reg_nr ; ++i)
+       for (i = 0; i < reg_nr; ++i)
                p16[i] = jme_phyext_read(jme, i);
 }
 
@@ -1772,17 +1772,73 @@ jme_new_phy_off(struct jme_adapter *jme)
        pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
 }
 
+static inline void
+jme_recal_phy(struct jme_adapter *jme)
+{
+       u32 miictl1000, comm2;
+
+       miictl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
+       miictl1000 &= ~JME_PHY_GCTRL_TESTMASK;
+       miictl1000 |= JME_PHY_GCTRL_TESTMODE1;
+       jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, miictl1000);
+
+       comm2 = jme_phyext_read(jme, JME_PHYEXT_COMM2);
+       comm2 &= ~(0x0001u);
+       comm2 |= 0x0011u;
+       jme_phyext_write(jme, JME_PHYEXT_COMM2, comm2);
+
+       mdelay(20);
+
+       comm2 = jme_phyext_read(jme, JME_PHYEXT_COMM2);
+       comm2 &= ~(0x0013u);
+       jme_phyext_write(jme, JME_PHYEXT_COMM2, comm2);
+
+       miictl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
+       miictl1000 &= ~JME_PHY_GCTRL_TESTMASK;
+       jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, miictl1000);
+}
+
+static inline void
+jme_refill_phyparm(struct jme_adapter *jme)
+{
+       if (jme->chip_main_rev >= 6 ||
+           (jme->chip_main_rev == 5 &&
+            (jme->chip_sub_rev == 0 ||
+             jme->chip_sub_rev == 1 ||
+             jme->chip_sub_rev == 3))) {
+               jme_phyext_write(jme, JME_PHYEXT_COMM0, 0x008Au);
+               jme_phyext_write(jme, JME_PHYEXT_COMM1, 0x4109u);
+       } else if (jme->chip_main_rev == 3 &&
+                  (jme->chip_sub_rev == 1 ||
+                   jme->chip_sub_rev == 2)) {
+               jme_phyext_write(jme, JME_PHYEXT_COMM0, 0xE088u);
+//             jme_phyext_write(jme, JME_PHYEXT_COMM1, 0x4108u);
+       } else if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260 &&
+                  jme->chip_main_rev == 2) {
+               if (jme->chip_sub_rev == 0) {
+                       jme_phyext_write(jme, JME_PHYEXT_COMM0, 0x608Au);
+//                     jme_phyext_write(jme, JME_PHYEXT_COMM1, 0x4108u);
+               } else if (jme->chip_sub_rev == 2) {
+                       jme_phyext_write(jme, JME_PHYEXT_COMM0, 0x408Au);
+//                     jme_phyext_write(jme, JME_PHYEXT_COMM1, 0x4108u);
+               }
+       }
+}
+
 static inline void
 jme_phy_on(struct jme_adapter *jme)
 {
        u32 bmcr;
 
+       if (new_phy_power_ctrl(jme->chip_main_rev))
+               jme_new_phy_on(jme);
+
        bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
        bmcr &= ~BMCR_PDOWN;
        jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
 
-       if (new_phy_power_ctrl(jme->chip_main_rev))
-               jme_new_phy_on(jme);
+       jme_recal_phy(jme);
+       jme_refill_phyparm(jme);
 }
 
 static inline void