jme.c

   1 /*
   2  * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
   3  *
   4  * Copyright 2008 JMicron Technology Corporation
   5  * http://www.jmicron.com/
   6  * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org>
   7  *
   8  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  */
  24
  25 #include <linux/version.h>
  26 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
  27 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  28 #endif
  29
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/pci.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/etherdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/mii.h>
  37 #include <linux/crc32.h>
  38 #include <linux/delay.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/in.h>
  41 #include <linux/ip.h>
  42 #include <linux/ipv6.h>
  43 #include <linux/tcp.h>
  44 #include <linux/udp.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/slab.h>
  47 #include <net/ip6_checksum.h>
  48 #include "jme.h"
  49
  50 static int force_pseudohp = -1;
  51 static int no_pseudohp = -1;
  52 static int no_extplug = -1;
  53 module_param(force_pseudohp, int, 0);
  54 MODULE_PARM_DESC(force_pseudohp,
  55         "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
  56 module_param(no_pseudohp, int, 0);
  57 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
  58 module_param(no_extplug, int, 0);
  59 MODULE_PARM_DESC(no_extplug,
  60         "Do not use external plug signal for pseudo hot-plug.");
  61
  62 static int
  63 jme_mdio_read(struct net_device *netdev, int phy, int reg)
  64 {
  65         struct jme_adapter *jme = netdev_priv(netdev);
  66         int i, val, again = (reg == MII_BMSR) ? 1 : 0;
  67
  68 read_again:
  69         jwrite32(jme, JME_SMI, SMI_OP_REQ |
  70                                 smi_phy_addr(phy) |
  71                                 smi_reg_addr(reg));
  72
  73         wmb();
  74         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
  75                 udelay(20);
  76                 val = jread32(jme, JME_SMI);
  77                 if ((val & SMI_OP_REQ) == 0)
  78                         break;
  79         }
  80
  81         if (i == 0) {
  82                 pr_err("phy(%d) read timeout : %d\n", phy, reg);
  83                 return 0;
  84         }
  85
  86         if (again--)
  87                 goto read_again;
  88
  89         return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
  90 }
  91
  92 static void
  93 jme_mdio_write(struct net_device *netdev,
  94                                 int phy, int reg, int val)
  95 {
  96         struct jme_adapter *jme = netdev_priv(netdev);
  97         int i;
  98
  99         jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
 100                 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
 101                 smi_phy_addr(phy) | smi_reg_addr(reg));
 102
 103         wmb();
 104         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
 105                 udelay(20);
 106                 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
 107                         break;
 108         }
 109
 110         if (i == 0)
 111                 pr_err("phy(%d) write timeout : %d\n", phy, reg);
 112 }
 113
 114 static inline void
 115 jme_reset_phy_processor(struct jme_adapter *jme)
 116 {
 117         u32 val;
 118
 119         jme_mdio_write(jme->dev,
 120                         jme->mii_if.phy_id,
 121                         MII_ADVERTISE, ADVERTISE_ALL |
 122                         ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 123
 124         if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
 125                 jme_mdio_write(jme->dev,
 126                                 jme->mii_if.phy_id,
 127                                 MII_CTRL1000,
 128                                 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 129
 130         val = jme_mdio_read(jme->dev,
 131                                 jme->mii_if.phy_id,
 132                                 MII_BMCR);
 133
 134         jme_mdio_write(jme->dev,
 135                         jme->mii_if.phy_id,
 136                         MII_BMCR, val | BMCR_RESET);
 137 }
 138
 139 static void
 140 jme_setup_wakeup_frame(struct jme_adapter *jme,
 141                        const u32 *mask, u32 crc, int fnr)
 142 {
 143         int i;
 144
 145         /*
 146          * Setup CRC pattern
 147          */
 148         jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
 149         wmb();
 150         jwrite32(jme, JME_WFODP, crc);
 151         wmb();
 152
 153         /*
 154          * Setup Mask
 155          */
 156         for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
 157                 jwrite32(jme, JME_WFOI,
 158                                 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
 159                                 (fnr & WFOI_FRAME_SEL));
 160                 wmb();
 161                 jwrite32(jme, JME_WFODP, mask[i]);
 162                 wmb();
 163         }
 164 }
 165
 166 static inline void
 167 jme_mac_rxclk_off(struct jme_adapter *jme)
 168 {
 169         jme->reg_gpreg1 |= GPREG1_RXCLKOFF;
 170         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 171 }
 172
 173 static inline void
 174 jme_mac_rxclk_on(struct jme_adapter *jme)
 175 {
 176         jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF;
 177         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 178 }
 179
 180 static inline void
 181 jme_mac_txclk_off(struct jme_adapter *jme)
 182 {
 183         jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC);
 184         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 185 }
 186
 187 static inline void
 188 jme_mac_txclk_on(struct jme_adapter *jme)
 189 {
 190         u32 speed = jme->reg_ghc & GHC_SPEED;
 191         if (speed == GHC_SPEED_1000M)
 192                 jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
 193         else
 194                 jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
 195         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 196 }
 197
 198 static inline void
 199 jme_reset_ghc_speed(struct jme_adapter *jme)
 200 {
 201         jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX);
 202         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 203 }
 204
 205 static inline void
 206 jme_reset_250A2_workaround(struct jme_adapter *jme)
 207 {
 208         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 209                              GPREG1_RSSPATCH);
 210         jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 211 }
 212
 213 static inline void
 214 jme_assert_ghc_reset(struct jme_adapter *jme)
 215 {
 216         jme->reg_ghc |= GHC_SWRST;
 217         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 218 }
 219
 220 static inline void
 221 jme_clear_ghc_reset(struct jme_adapter *jme)
 222 {
 223         jme->reg_ghc &= ~GHC_SWRST;
 224         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 225 }
 226
 227 static inline void
 228 jme_reset_mac_processor(struct jme_adapter *jme)
 229 {
 230         static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
 231         u32 crc = 0xCDCDCDCD;
 232         u32 gpreg0;
 233         int i;
 234
 235         jme_reset_ghc_speed(jme);
 236         jme_reset_250A2_workaround(jme);
 237
 238         jme_mac_rxclk_on(jme);
 239         jme_mac_txclk_on(jme);
 240         udelay(1);
 241         jme_assert_ghc_reset(jme);
 242         udelay(1);
 243         jme_mac_rxclk_off(jme);
 244         jme_mac_txclk_off(jme);
 245         udelay(1);
 246         jme_clear_ghc_reset(jme);
 247         udelay(1);
 248         jme_mac_rxclk_on(jme);
 249         jme_mac_txclk_on(jme);
 250         udelay(1);
 251         jme_mac_rxclk_off(jme);
 252         jme_mac_txclk_off(jme);
 253
 254         jwrite32(jme, JME_RXDBA_LO, 0x00000000);
 255         jwrite32(jme, JME_RXDBA_HI, 0x00000000);
 256         jwrite32(jme, JME_RXQDC, 0x00000000);
 257         jwrite32(jme, JME_RXNDA, 0x00000000);
 258         jwrite32(jme, JME_TXDBA_LO, 0x00000000);
 259         jwrite32(jme, JME_TXDBA_HI, 0x00000000);
 260         jwrite32(jme, JME_TXQDC, 0x00000000);
 261         jwrite32(jme, JME_TXNDA, 0x00000000);
 262
 263         jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
 264         jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
 265         for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
 266                 jme_setup_wakeup_frame(jme, mask, crc, i);
 267         if (jme->fpgaver)
 268                 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
 269         else
 270                 gpreg0 = GPREG0_DEFAULT;
 271         jwrite32(jme, JME_GPREG0, gpreg0);
 272 }
 273
 274 static inline void
 275 jme_clear_pm(struct jme_adapter *jme)
 276 {
 277         jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
 278         pci_set_power_state(jme->pdev, PCI_D0);
 279         pci_enable_wake(jme->pdev, PCI_D0, false);
 280 }
 281
 282 static int
 283 jme_reload_eeprom(struct jme_adapter *jme)
 284 {
 285         u32 val;
 286         int i;
 287
 288         val = jread32(jme, JME_SMBCSR);
 289
 290         if (val & SMBCSR_EEPROMD) {
 291                 val |= SMBCSR_CNACK;
 292                 jwrite32(jme, JME_SMBCSR, val);
 293                 val |= SMBCSR_RELOAD;
 294                 jwrite32(jme, JME_SMBCSR, val);
 295                 mdelay(12);
 296
 297                 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
 298                         mdelay(1);
 299                         if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
 300                                 break;
 301                 }
 302
 303                 if (i == 0) {
 304                         pr_err("eeprom reload timeout\n");
 305                         return -EIO;
 306                 }
 307         }
 308
 309         return 0;
 310 }
 311
 312 static void
 313 jme_load_macaddr(struct net_device *netdev)
 314 {
 315         struct jme_adapter *jme = netdev_priv(netdev);
 316         unsigned char macaddr[6];
 317         u32 val;
 318
 319         spin_lock_bh(&jme->macaddr_lock);
 320         val = jread32(jme, JME_RXUMA_LO);
 321         macaddr[0] = (val >>  0) & 0xFF;
 322         macaddr[1] = (val >>  8) & 0xFF;
 323         macaddr[2] = (val >> 16) & 0xFF;
 324         macaddr[3] = (val >> 24) & 0xFF;
 325         val = jread32(jme, JME_RXUMA_HI);
 326         macaddr[4] = (val >>  0) & 0xFF;
 327         macaddr[5] = (val >>  8) & 0xFF;
 328         memcpy(netdev->dev_addr, macaddr, 6);
 329         spin_unlock_bh(&jme->macaddr_lock);
 330 }
 331
 332 static inline void
 333 jme_set_rx_pcc(struct jme_adapter *jme, int p)
 334 {
 335         switch (p) {
 336         case PCC_OFF:
 337                 jwrite32(jme, JME_PCCRX0,
 338                         ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 339                         ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 340                 break;
 341         case PCC_P1:
 342                 jwrite32(jme, JME_PCCRX0,
 343                         ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 344                         ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 345                 break;
 346         case PCC_P2:
 347                 jwrite32(jme, JME_PCCRX0,
 348                         ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 349                         ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 350                 break;
 351         case PCC_P3:
 352                 jwrite32(jme, JME_PCCRX0,
 353                         ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 354                         ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 355                 break;
 356         default:
 357                 break;
 358         }
 359         wmb();
 360
 361         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
 362                 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
 363 }
 364
 365 static void
 366 jme_start_irq(struct jme_adapter *jme)
 367 {
 368         register struct dynpcc_info *dpi = &(jme->dpi);
 369
 370         jme_set_rx_pcc(jme, PCC_P1);
 371         dpi->cur                = PCC_P1;
 372         dpi->attempt            = PCC_P1;
 373         dpi->cnt                = 0;
 374
 375         jwrite32(jme, JME_PCCTX,
 376                         ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
 377                         ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
 378                         PCCTXQ0_EN
 379                 );
 380
 381         /*
 382          * Enable Interrupts
 383          */
 384         jwrite32(jme, JME_IENS, INTR_ENABLE);
 385 }
 386
 387 static inline void
 388 jme_stop_irq(struct jme_adapter *jme)
 389 {
 390         /*
 391          * Disable Interrupts
 392          */
 393         jwrite32f(jme, JME_IENC, INTR_ENABLE);
 394 }
 395
 396 static u32
 397 jme_linkstat_from_phy(struct jme_adapter *jme)
 398 {
 399         u32 phylink, bmsr;
 400
 401         phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
 402         bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
 403         if (bmsr & BMSR_ANCOMP)
 404                 phylink |= PHY_LINK_AUTONEG_COMPLETE;
 405
 406         return phylink;
 407 }
 408
 409 static inline void
 410 jme_set_phyfifo_5level(struct jme_adapter *jme)
 411 {
 412         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
 413 }
 414
 415 static inline void
 416 jme_set_phyfifo_8level(struct jme_adapter *jme)
 417 {
 418         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
 419 }
 420
 421 static int
 422 jme_check_link(struct net_device *netdev, int testonly)
 423 {
 424         struct jme_adapter *jme = netdev_priv(netdev);
 425         u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr;
 426         char linkmsg[64];
 427         int rc = 0;
 428
 429         linkmsg[0] = '\0';
 430
 431         if (jme->fpgaver)
 432                 phylink = jme_linkstat_from_phy(jme);
 433         else
 434                 phylink = jread32(jme, JME_PHY_LINK);
 435
 436         if (phylink & PHY_LINK_UP) {
 437                 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
 438                         /*
 439                          * If we did not enable AN
 440                          * Speed/Duplex Info should be obtained from SMI
 441                          */
 442                         phylink = PHY_LINK_UP;
 443
 444                         bmcr = jme_mdio_read(jme->dev,
 445                                                 jme->mii_if.phy_id,
 446                                                 MII_BMCR);
 447
 448                         phylink |= ((bmcr & BMCR_SPEED1000) &&
 449                                         (bmcr & BMCR_SPEED100) == 0) ?
 450                                         PHY_LINK_SPEED_1000M :
 451                                         (bmcr & BMCR_SPEED100) ?
 452                                         PHY_LINK_SPEED_100M :
 453                                         PHY_LINK_SPEED_10M;
 454
 455                         phylink |= (bmcr & BMCR_FULLDPLX) ?
 456                                          PHY_LINK_DUPLEX : 0;
 457
 458                         strcat(linkmsg, "Forced: ");
 459                 } else {
 460                         /*
 461                          * Keep polling for speed/duplex resolve complete
 462                          */
 463                         while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
 464                                 --cnt) {
 465
 466                                 udelay(1);
 467
 468                                 if (jme->fpgaver)
 469                                         phylink = jme_linkstat_from_phy(jme);
 470                                 else
 471                                         phylink = jread32(jme, JME_PHY_LINK);
 472                         }
 473                         if (!cnt)
 474                                 pr_err("Waiting speed resolve timeout\n");
 475
 476                         strcat(linkmsg, "ANed: ");
 477                 }
 478
 479                 if (jme->phylink == phylink) {
 480                         rc = 1;
 481                         goto out;
 482                 }
 483                 if (testonly)
 484                         goto out;
 485
 486                 jme->phylink = phylink;
 487
 488                 /*
 489                  * The speed/duplex setting of jme->reg_ghc already cleared
 490                  * by jme_reset_mac_processor()
 491                  */
 492                 switch (phylink & PHY_LINK_SPEED_MASK) {
 493                 case PHY_LINK_SPEED_10M:
 494                         jme->reg_ghc |= GHC_SPEED_10M;
 495                         strcat(linkmsg, "10 Mbps, ");
 496                         break;
 497                 case PHY_LINK_SPEED_100M:
 498                         jme->reg_ghc |= GHC_SPEED_100M;
 499                         strcat(linkmsg, "100 Mbps, ");
 500                         break;
 501                 case PHY_LINK_SPEED_1000M:
 502                         jme->reg_ghc |= GHC_SPEED_1000M;
 503                         strcat(linkmsg, "1000 Mbps, ");
 504                         break;
 505                 default:
 506                         break;
 507                 }
 508
 509                 if (phylink & PHY_LINK_DUPLEX) {
 510                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
 511                         jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX);
 512                         jme->reg_ghc |= GHC_DPX;
 513                 } else {
 514                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
 515                                                 TXMCS_BACKOFF |
 516                                                 TXMCS_CARRIERSENSE |
 517                                                 TXMCS_COLLISION);
 518                         jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX);
 519                 }
 520
 521                 jwrite32(jme, JME_GHC, jme->reg_ghc);
 522
 523                 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
 524                         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 525                                              GPREG1_RSSPATCH);
 526                         if (!(phylink & PHY_LINK_DUPLEX))
 527                                 jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH;
 528                         switch (phylink & PHY_LINK_SPEED_MASK) {
 529                         case PHY_LINK_SPEED_10M:
 530                                 jme_set_phyfifo_8level(jme);
 531                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 532                                 break;
 533                         case PHY_LINK_SPEED_100M:
 534                                 jme_set_phyfifo_5level(jme);
 535                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 536                                 break;
 537                         case PHY_LINK_SPEED_1000M:
 538                                 jme_set_phyfifo_8level(jme);
 539                                 break;
 540                         default:
 541                                 break;
 542                         }
 543                 }
 544                 jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 545
 546                 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
 547                                         "Full-Duplex, " :
 548                                         "Half-Duplex, ");
 549                 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
 550                                         "MDI-X" :
 551                                         "MDI");
 552                 netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg);
 553                 netif_carrier_on(netdev);
 554         } else {
 555                 if (testonly)
 556                         goto out;
 557
 558                 netif_info(jme, link, jme->dev, "Link is down\n");
 559                 jme->phylink = 0;
 560                 netif_carrier_off(netdev);
 561         }
 562
 563 out:
 564         return rc;
 565 }
 566
 567 static int
 568 jme_setup_tx_resources(struct jme_adapter *jme)
 569 {
 570         struct jme_ring *txring = &(jme->txring[0]);
 571
 572         txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 573                                    TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 574                                    &(txring->dmaalloc),
 575                                    GFP_ATOMIC);
 576
 577         if (!txring->alloc)
 578                 goto err_set_null;
 579
 580         /*
 581          * 16 Bytes align
 582          */
 583         txring->desc            = (void *)ALIGN((unsigned long)(txring->alloc),
 584                                                 RING_DESC_ALIGN);
 585         txring->dma             = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
 586         txring->next_to_use     = 0;
 587         atomic_set(&txring->next_to_clean, 0);
 588         atomic_set(&txring->nr_free, jme->tx_ring_size);
 589
 590         txring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 591                                         jme->tx_ring_size, GFP_ATOMIC);
 592         if (unlikely(!(txring->bufinf)))
 593                 goto err_free_txring;
 594
 595         /*
 596          * Initialize Transmit Descriptors
 597          */
 598         memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
 599         memset(txring->bufinf, 0,
 600                 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
 601
 602         return 0;
 603
 604 err_free_txring:
 605         dma_free_coherent(&(jme->pdev->dev),
 606                           TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 607                           txring->alloc,
 608                           txring->dmaalloc);
 609
 610 err_set_null:
 611         txring->desc = NULL;
 612         txring->dmaalloc = 0;
 613         txring->dma = 0;
 614         txring->bufinf = NULL;
 615
 616         return -ENOMEM;
 617 }
 618
 619 static void
 620 jme_free_tx_resources(struct jme_adapter *jme)
 621 {
 622         int i;
 623         struct jme_ring *txring = &(jme->txring[0]);
 624         struct jme_buffer_info *txbi;
 625
 626         if (txring->alloc) {
 627                 if (txring->bufinf) {
 628                         for (i = 0 ; i < jme->tx_ring_size ; ++i) {
 629                                 txbi = txring->bufinf + i;
 630                                 if (txbi->skb) {
 631                                         dev_kfree_skb(txbi->skb);
 632                                         txbi->skb = NULL;
 633                                 }
 634                                 txbi->mapping           = 0;
 635                                 txbi->len               = 0;
 636                                 txbi->nr_desc           = 0;
 637                                 txbi->start_xmit        = 0;
 638                         }
 639                         kfree(txring->bufinf);
 640                 }
 641
 642                 dma_free_coherent(&(jme->pdev->dev),
 643                                   TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 644                                   txring->alloc,
 645                                   txring->dmaalloc);
 646
 647                 txring->alloc           = NULL;
 648                 txring->desc            = NULL;
 649                 txring->dmaalloc        = 0;
 650                 txring->dma             = 0;
 651                 txring->bufinf          = NULL;
 652         }
 653         txring->next_to_use     = 0;
 654         atomic_set(&txring->next_to_clean, 0);
 655         atomic_set(&txring->nr_free, 0);
 656 }
 657
 658 static inline void
 659 jme_enable_tx_engine(struct jme_adapter *jme)
 660 {
 661         /*
 662          * Select Queue 0
 663          */
 664         jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
 665         wmb();
 666
 667         /*
 668          * Setup TX Queue 0 DMA Bass Address
 669          */
 670         jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 671         jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
 672         jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 673
 674         /*
 675          * Setup TX Descptor Count
 676          */
 677         jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
 678
 679         /*
 680          * Enable TX Engine
 681          */
 682         wmb();
 683         jwrite32f(jme, JME_TXCS, jme->reg_txcs |
 684                                 TXCS_SELECT_QUEUE0 |
 685                                 TXCS_ENABLE);
 686
 687         /*
 688          * Start clock for TX MAC Processor
 689          */
 690         jme_mac_txclk_on(jme);
 691 }
 692
 693 static inline void
 694 jme_restart_tx_engine(struct jme_adapter *jme)
 695 {
 696         /*
 697          * Restart TX Engine
 698          */
 699         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 700                                 TXCS_SELECT_QUEUE0 |
 701                                 TXCS_ENABLE);
 702 }
 703
 704 static inline void
 705 jme_disable_tx_engine(struct jme_adapter *jme)
 706 {
 707         int i;
 708         u32 val;
 709
 710         /*
 711          * Disable TX Engine
 712          */
 713         jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
 714         wmb();
 715
 716         val = jread32(jme, JME_TXCS);
 717         for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
 718                 mdelay(1);
 719                 val = jread32(jme, JME_TXCS);
 720                 rmb();
 721         }
 722
 723         if (!i)
 724                 pr_err("Disable TX engine timeout\n");
 725
 726         /*
 727          * Stop clock for TX MAC Processor
 728          */
 729         jme_mac_txclk_off(jme);
 730 }
 731
 732 static void
 733 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
 734 {
 735         struct jme_ring *rxring = &(jme->rxring[0]);
 736         register struct rxdesc *rxdesc = rxring->desc;
 737         struct jme_buffer_info *rxbi = rxring->bufinf;
 738         rxdesc += i;
 739         rxbi += i;
 740
 741         rxdesc->dw[0] = 0;
 742         rxdesc->dw[1] = 0;
 743         rxdesc->desc1.bufaddrh  = cpu_to_le32((__u64)rxbi->mapping >> 32);
 744         rxdesc->desc1.bufaddrl  = cpu_to_le32(
 745                                         (__u64)rxbi->mapping & 0xFFFFFFFFUL);
 746         rxdesc->desc1.datalen   = cpu_to_le16(rxbi->len);
 747         if (jme->dev->features & NETIF_F_HIGHDMA)
 748                 rxdesc->desc1.flags = RXFLAG_64BIT;
 749         wmb();
 750         rxdesc->desc1.flags     |= RXFLAG_OWN | RXFLAG_INT;
 751 }
 752
 753 static int
 754 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
 755 {
 756         struct jme_ring *rxring = &(jme->rxring[0]);
 757         struct jme_buffer_info *rxbi = rxring->bufinf + i;
 758         struct sk_buff *skb;
 759
 760         skb = netdev_alloc_skb(jme->dev,
 761                 jme->dev->mtu + RX_EXTRA_LEN);
 762         if (unlikely(!skb))
 763                 return -ENOMEM;
 764 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
 765         skb->dev = jme->dev;
 766 #endif
 767
 768         rxbi->skb = skb;
 769         rxbi->len = skb_tailroom(skb);
 770         rxbi->mapping = pci_map_page(jme->pdev,
 771                                         virt_to_page(skb->data),
 772                                         offset_in_page(skb->data),
 773                                         rxbi->len,
 774                                         PCI_DMA_FROMDEVICE);
 775
 776         return 0;
 777 }
 778
 779 static void
 780 jme_free_rx_buf(struct jme_adapter *jme, int i)
 781 {
 782         struct jme_ring *rxring = &(jme->rxring[0]);
 783         struct jme_buffer_info *rxbi = rxring->bufinf;
 784         rxbi += i;
 785
 786         if (rxbi->skb) {
 787                 pci_unmap_page(jme->pdev,
 788                                  rxbi->mapping,
 789                                  rxbi->len,
 790                                  PCI_DMA_FROMDEVICE);
 791                 dev_kfree_skb(rxbi->skb);
 792                 rxbi->skb = NULL;
 793                 rxbi->mapping = 0;
 794                 rxbi->len = 0;
 795         }
 796 }
 797
 798 static void
 799 jme_free_rx_resources(struct jme_adapter *jme)
 800 {
 801         int i;
 802         struct jme_ring *rxring = &(jme->rxring[0]);
 803
 804         if (rxring->alloc) {
 805                 if (rxring->bufinf) {
 806                         for (i = 0 ; i < jme->rx_ring_size ; ++i)
 807                                 jme_free_rx_buf(jme, i);
 808                         kfree(rxring->bufinf);
 809                 }
 810
 811                 dma_free_coherent(&(jme->pdev->dev),
 812                                   RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 813                                   rxring->alloc,
 814                                   rxring->dmaalloc);
 815                 rxring->alloc    = NULL;
 816                 rxring->desc     = NULL;
 817                 rxring->dmaalloc = 0;
 818                 rxring->dma      = 0;
 819                 rxring->bufinf   = NULL;
 820         }
 821         rxring->next_to_use   = 0;
 822         atomic_set(&rxring->next_to_clean, 0);
 823 }
 824
 825 static int
 826 jme_setup_rx_resources(struct jme_adapter *jme)
 827 {
 828         int i;
 829         struct jme_ring *rxring = &(jme->rxring[0]);
 830
 831         rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 832                                    RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 833                                    &(rxring->dmaalloc),
 834                                    GFP_ATOMIC);
 835         if (!rxring->alloc)
 836                 goto err_set_null;
 837
 838         /*
 839          * 16 Bytes align
 840          */
 841         rxring->desc            = (void *)ALIGN((unsigned long)(rxring->alloc),
 842                                                 RING_DESC_ALIGN);
 843         rxring->dma             = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
 844         rxring->next_to_use     = 0;
 845         atomic_set(&rxring->next_to_clean, 0);
 846
 847         rxring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 848                                         jme->rx_ring_size, GFP_ATOMIC);
 849         if (unlikely(!(rxring->bufinf)))
 850                 goto err_free_rxring;
 851
 852         /*
 853          * Initiallize Receive Descriptors
 854          */
 855         memset(rxring->bufinf, 0,
 856                 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
 857         for (i = 0 ; i < jme->rx_ring_size ; ++i) {
 858                 if (unlikely(jme_make_new_rx_buf(jme, i))) {
 859                         jme_free_rx_resources(jme);
 860                         return -ENOMEM;
 861                 }
 862
 863                 jme_set_clean_rxdesc(jme, i);
 864         }
 865
 866         return 0;
 867
 868 err_free_rxring:
 869         dma_free_coherent(&(jme->pdev->dev),
 870                           RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 871                           rxring->alloc,
 872                           rxring->dmaalloc);
 873 err_set_null:
 874         rxring->desc = NULL;
 875         rxring->dmaalloc = 0;
 876         rxring->dma = 0;
 877         rxring->bufinf = NULL;
 878
 879         return -ENOMEM;
 880 }
 881
 882 static inline void
 883 jme_enable_rx_engine(struct jme_adapter *jme)
 884 {
 885         /*
 886          * Select Queue 0
 887          */
 888         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 889                                 RXCS_QUEUESEL_Q0);
 890         wmb();
 891
 892         /*
 893          * Setup RX DMA Bass Address
 894          */
 895         jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 896         jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
 897         jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 898
 899         /*
 900          * Setup RX Descriptor Count
 901          */
 902         jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
 903
 904         /*
 905          * Setup Unicast Filter
 906          */
 907         jme_set_multi(jme->dev);
 908
 909         /*
 910          * Enable RX Engine
 911          */
 912         wmb();
 913         jwrite32f(jme, JME_RXCS, jme->reg_rxcs |
 914                                 RXCS_QUEUESEL_Q0 |
 915                                 RXCS_ENABLE |
 916                                 RXCS_QST);
 917
 918         /*
 919          * Start clock for RX MAC Processor
 920          */
 921         jme_mac_rxclk_on(jme);
 922 }
 923
 924 static inline void
 925 jme_restart_rx_engine(struct jme_adapter *jme)
 926 {
 927         /*
 928          * Start RX Engine
 929          */
 930         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 931                                 RXCS_QUEUESEL_Q0 |
 932                                 RXCS_ENABLE |
 933                                 RXCS_QST);
 934 }
 935
 936 static inline void
 937 jme_disable_rx_engine(struct jme_adapter *jme)
 938 {
 939         int i;
 940         u32 val;
 941
 942         /*
 943          * Disable RX Engine
 944          */
 945         jwrite32(jme, JME_RXCS, jme->reg_rxcs);
 946         wmb();
 947
 948         val = jread32(jme, JME_RXCS);
 949         for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
 950                 mdelay(1);
 951                 val = jread32(jme, JME_RXCS);
 952                 rmb();
 953         }
 954
 955         if (!i)
 956                 pr_err("Disable RX engine timeout\n");
 957
 958         /*
 959          * Stop clock for RX MAC Processor
 960          */
 961         jme_mac_rxclk_off(jme);
 962 }
 963
 964 static int
 965 jme_rxsum_ok(struct jme_adapter *jme, u16 flags)
 966 {
 967         if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
 968                 return false;
 969
 970         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
 971                         == RXWBFLAG_TCPON)) {
 972                 if (flags & RXWBFLAG_IPV4)
 973                         netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
 974                 return false;
 975         }
 976
 977         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
 978                         == RXWBFLAG_UDPON)) {
 979                 if (flags & RXWBFLAG_IPV4)
 980                         netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n");
 981                 return false;
 982         }
 983
 984         if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
 985                         == RXWBFLAG_IPV4)) {
 986                 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n");
 987                 return false;
 988         }
 989
 990         return true;
 991 }
 992
 993 static void
 994 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
 995 {
 996         struct jme_ring *rxring = &(jme->rxring[0]);
 997         struct rxdesc *rxdesc = rxring->desc;
 998         struct jme_buffer_info *rxbi = rxring->bufinf;
 999         struct sk_buff *skb;
1000         int framesize;
1001
1002         rxdesc += idx;
1003         rxbi += idx;
1004
1005         skb = rxbi->skb;
1006         pci_dma_sync_single_for_cpu(jme->pdev,
1007                                         rxbi->mapping,
1008                                         rxbi->len,
1009                                         PCI_DMA_FROMDEVICE);
1010
1011         if (unlikely(jme_make_new_rx_buf(jme, idx))) {
1012                 pci_dma_sync_single_for_device(jme->pdev,
1013                                                 rxbi->mapping,
1014                                                 rxbi->len,
1015                                                 PCI_DMA_FROMDEVICE);
1016
1017                 ++(NET_STAT(jme).rx_dropped);
1018         } else {
1019                 framesize = le16_to_cpu(rxdesc->descwb.framesize)
1020                                 - RX_PREPAD_SIZE;
1021
1022                 skb_reserve(skb, RX_PREPAD_SIZE);
1023                 skb_put(skb, framesize);
1024                 skb->protocol = eth_type_trans(skb, jme->dev);
1025
1026                 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags)))
1027                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1028                 else
1029 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35)
1030                         skb->ip_summed = CHECKSUM_NONE;
1031 #else
1032                         skb_checksum_none_assert(skb);
1033 #endif
1034
1035                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
1036                         if (jme->vlgrp) {
1037                                 jme->jme_vlan_rx(skb, jme->vlgrp,
1038                                         le16_to_cpu(rxdesc->descwb.vlan));
1039                                 NET_STAT(jme).rx_bytes += 4;
1040                         } else {
1041                                 dev_kfree_skb(skb);
1042                         }
1043                 } else {
1044                         jme->jme_rx(skb);
1045                 }
1046
1047                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
1048                     cpu_to_le16(RXWBFLAG_DEST_MUL))
1049                         ++(NET_STAT(jme).multicast);
1050
1051                 NET_STAT(jme).rx_bytes += framesize;
1052                 ++(NET_STAT(jme).rx_packets);
1053         }
1054
1055         jme_set_clean_rxdesc(jme, idx);
1056
1057 }
1058
1059 static int
1060 jme_process_receive(struct jme_adapter *jme, int limit)
1061 {
1062         struct jme_ring *rxring = &(jme->rxring[0]);
1063         struct rxdesc *rxdesc = rxring->desc;
1064         int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1065
1066         if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1067                 goto out_inc;
1068
1069         if (unlikely(atomic_read(&jme->link_changing) != 1))
1070                 goto out_inc;
1071
1072         if (unlikely(!netif_carrier_ok(jme->dev)))
1073                 goto out_inc;
1074
1075         i = atomic_read(&rxring->next_to_clean);
1076         while (limit > 0) {
1077                 rxdesc = rxring->desc;
1078                 rxdesc += i;
1079
1080                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1081                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1082                         goto out;
1083                 --limit;
1084
1085                 rmb();
1086                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1087
1088                 if (unlikely(desccnt > 1 ||
1089                 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1090
1091                         if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1092                                 ++(NET_STAT(jme).rx_crc_errors);
1093                         else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1094                                 ++(NET_STAT(jme).rx_fifo_errors);
1095                         else
1096                                 ++(NET_STAT(jme).rx_errors);
1097
1098                         if (desccnt > 1)
1099                                 limit -= desccnt - 1;
1100
1101                         for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1102                                 jme_set_clean_rxdesc(jme, j);
1103                                 j = (j + 1) & (mask);
1104                         }
1105
1106                 } else {
1107                         jme_alloc_and_feed_skb(jme, i);
1108                 }
1109
1110                 i = (i + desccnt) & (mask);
1111         }
1112
1113 out:
1114         atomic_set(&rxring->next_to_clean, i);
1115
1116 out_inc:
1117         atomic_inc(&jme->rx_cleaning);
1118
1119         return limit > 0 ? limit : 0;
1120
1121 }
1122
1123 static void
1124 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1125 {
1126         if (likely(atmp == dpi->cur)) {
1127                 dpi->cnt = 0;
1128                 return;
1129         }
1130
1131         if (dpi->attempt == atmp) {
1132                 ++(dpi->cnt);
1133         } else {
1134                 dpi->attempt = atmp;
1135                 dpi->cnt = 0;
1136         }
1137
1138 }
1139
1140 static void
1141 jme_dynamic_pcc(struct jme_adapter *jme)
1142 {
1143         register struct dynpcc_info *dpi = &(jme->dpi);
1144
1145         if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1146                 jme_attempt_pcc(dpi, PCC_P3);
1147         else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1148                  dpi->intr_cnt > PCC_INTR_THRESHOLD)
1149                 jme_attempt_pcc(dpi, PCC_P2);
1150         else
1151                 jme_attempt_pcc(dpi, PCC_P1);
1152
1153         if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1154                 if (dpi->attempt < dpi->cur)
1155                         tasklet_schedule(&jme->rxclean_task);
1156                 jme_set_rx_pcc(jme, dpi->attempt);
1157                 dpi->cur = dpi->attempt;
1158                 dpi->cnt = 0;
1159         }
1160 }
1161
1162 static void
1163 jme_start_pcc_timer(struct jme_adapter *jme)
1164 {
1165         struct dynpcc_info *dpi = &(jme->dpi);
1166         dpi->last_bytes         = NET_STAT(jme).rx_bytes;
1167         dpi->last_pkts          = NET_STAT(jme).rx_packets;
1168         dpi->intr_cnt           = 0;
1169         jwrite32(jme, JME_TMCSR,
1170                 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1171 }
1172
1173 static inline void
1174 jme_stop_pcc_timer(struct jme_adapter *jme)
1175 {
1176         jwrite32(jme, JME_TMCSR, 0);
1177 }
1178
1179 static void
1180 jme_shutdown_nic(struct jme_adapter *jme)
1181 {
1182         u32 phylink;
1183
1184         phylink = jme_linkstat_from_phy(jme);
1185
1186         if (!(phylink & PHY_LINK_UP)) {
1187                 /*
1188                  * Disable all interrupt before issue timer
1189                  */
1190                 jme_stop_irq(jme);
1191                 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1192         }
1193 }
1194
1195 static void
1196 jme_pcc_tasklet(unsigned long arg)
1197 {
1198         struct jme_adapter *jme = (struct jme_adapter *)arg;
1199         struct net_device *netdev = jme->dev;
1200
1201         if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1202                 jme_shutdown_nic(jme);
1203                 return;
1204         }
1205
1206         if (unlikely(!netif_carrier_ok(netdev) ||
1207                 (atomic_read(&jme->link_changing) != 1)
1208         )) {
1209                 jme_stop_pcc_timer(jme);
1210                 return;
1211         }
1212
1213         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1214                 jme_dynamic_pcc(jme);
1215
1216         jme_start_pcc_timer(jme);
1217 }
1218
1219 static inline void
1220 jme_polling_mode(struct jme_adapter *jme)
1221 {
1222         jme_set_rx_pcc(jme, PCC_OFF);
1223 }
1224
1225 static inline void
1226 jme_interrupt_mode(struct jme_adapter *jme)
1227 {
1228         jme_set_rx_pcc(jme, PCC_P1);
1229 }
1230
1231 static inline int
1232 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1233 {
1234         u32 apmc;
1235         apmc = jread32(jme, JME_APMC);
1236         return apmc & JME_APMC_PSEUDO_HP_EN;
1237 }
1238
1239 static void
1240 jme_start_shutdown_timer(struct jme_adapter *jme)
1241 {
1242         u32 apmc;
1243
1244         apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1245         apmc &= ~JME_APMC_EPIEN_CTRL;
1246         if (!no_extplug) {
1247                 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1248                 wmb();
1249         }
1250         jwrite32f(jme, JME_APMC, apmc);
1251
1252         jwrite32f(jme, JME_TIMER2, 0);
1253         set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1254         jwrite32(jme, JME_TMCSR,
1255                 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1256 }
1257
1258 static void
1259 jme_stop_shutdown_timer(struct jme_adapter *jme)
1260 {
1261         u32 apmc;
1262
1263         jwrite32f(jme, JME_TMCSR, 0);
1264         jwrite32f(jme, JME_TIMER2, 0);
1265         clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1266
1267         apmc = jread32(jme, JME_APMC);
1268         apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1269         jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1270         wmb();
1271         jwrite32f(jme, JME_APMC, apmc);
1272 }
1273
1274 static void
1275 jme_link_change_tasklet(unsigned long arg)
1276 {
1277         struct jme_adapter *jme = (struct jme_adapter *)arg;
1278         struct net_device *netdev = jme->dev;
1279         int rc;
1280
1281         while (!atomic_dec_and_test(&jme->link_changing)) {
1282                 atomic_inc(&jme->link_changing);
1283                 netif_info(jme, intr, jme->dev, "Get link change lock failed\n");
1284                 while (atomic_read(&jme->link_changing) != 1)
1285                         netif_info(jme, intr, jme->dev, "Waiting link change lock\n");
1286         }
1287
1288         if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1289                 goto out;
1290
1291         jme->old_mtu = netdev->mtu;
1292         netif_stop_queue(netdev);
1293         if (jme_pseudo_hotplug_enabled(jme))
1294                 jme_stop_shutdown_timer(jme);
1295
1296         jme_stop_pcc_timer(jme);
1297         tasklet_disable(&jme->txclean_task);
1298         tasklet_disable(&jme->rxclean_task);
1299         tasklet_disable(&jme->rxempty_task);
1300
1301         if (netif_carrier_ok(netdev)) {
1302                 jme_disable_rx_engine(jme);
1303                 jme_disable_tx_engine(jme);
1304                 jme_reset_mac_processor(jme);
1305                 jme_free_rx_resources(jme);
1306                 jme_free_tx_resources(jme);
1307
1308                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1309                         jme_polling_mode(jme);
1310
1311                 netif_carrier_off(netdev);
1312         }
1313
1314         jme_check_link(netdev, 0);
1315         if (netif_carrier_ok(netdev)) {
1316                 rc = jme_setup_rx_resources(jme);
1317                 if (rc) {
1318                         pr_err("Allocating resources for RX error, Device STOPPED!\n");
1319                         goto out_enable_tasklet;
1320                 }
1321
1322                 rc = jme_setup_tx_resources(jme);
1323                 if (rc) {
1324                         pr_err("Allocating resources for TX error, Device STOPPED!\n");
1325                         goto err_out_free_rx_resources;
1326                 }
1327
1328                 jme_enable_rx_engine(jme);
1329                 jme_enable_tx_engine(jme);
1330
1331                 netif_start_queue(netdev);
1332
1333                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1334                         jme_interrupt_mode(jme);
1335
1336                 jme_start_pcc_timer(jme);
1337         } else if (jme_pseudo_hotplug_enabled(jme)) {
1338                 jme_start_shutdown_timer(jme);
1339         }
1340
1341         goto out_enable_tasklet;
1342
1343 err_out_free_rx_resources:
1344         jme_free_rx_resources(jme);
1345 out_enable_tasklet:
1346         tasklet_enable(&jme->txclean_task);
1347         tasklet_hi_enable(&jme->rxclean_task);
1348         tasklet_hi_enable(&jme->rxempty_task);
1349 out:
1350         atomic_inc(&jme->link_changing);
1351 }
1352
1353 static void
1354 jme_rx_clean_tasklet(unsigned long arg)
1355 {
1356         struct jme_adapter *jme = (struct jme_adapter *)arg;
1357         struct dynpcc_info *dpi = &(jme->dpi);
1358
1359         jme_process_receive(jme, jme->rx_ring_size);
1360         ++(dpi->intr_cnt);
1361
1362 }
1363
1364 static int
1365 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1366 {
1367         struct jme_adapter *jme = jme_napi_priv(holder);
1368         DECLARE_NETDEV
1369         int rest;
1370
1371         rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1372
1373         while (atomic_read(&jme->rx_empty) > 0) {
1374                 atomic_dec(&jme->rx_empty);
1375                 ++(NET_STAT(jme).rx_dropped);
1376                 jme_restart_rx_engine(jme);
1377         }
1378         atomic_inc(&jme->rx_empty);
1379
1380         if (rest) {
1381                 JME_RX_COMPLETE(netdev, holder);
1382                 jme_interrupt_mode(jme);
1383         }
1384
1385         JME_NAPI_WEIGHT_SET(budget, rest);
1386         return JME_NAPI_WEIGHT_VAL(budget) - rest;
1387 }
1388
1389 static void
1390 jme_rx_empty_tasklet(unsigned long arg)
1391 {
1392         struct jme_adapter *jme = (struct jme_adapter *)arg;
1393
1394         if (unlikely(atomic_read(&jme->link_changing) != 1))
1395                 return;
1396
1397         if (unlikely(!netif_carrier_ok(jme->dev)))
1398                 return;
1399
1400         netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1401
1402         jme_rx_clean_tasklet(arg);
1403
1404         while (atomic_read(&jme->rx_empty) > 0) {
1405                 atomic_dec(&jme->rx_empty);
1406                 ++(NET_STAT(jme).rx_dropped);
1407                 jme_restart_rx_engine(jme);
1408         }
1409         atomic_inc(&jme->rx_empty);
1410 }
1411
1412 static void
1413 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1414 {
1415         struct jme_ring *txring = &(jme->txring[0]);
1416
1417         smp_wmb();
1418         if (unlikely(netif_queue_stopped(jme->dev) &&
1419         atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1420                 netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n");
1421                 netif_wake_queue(jme->dev);
1422         }
1423
1424 }
1425
1426 static void
1427 jme_tx_clean_tasklet(unsigned long arg)
1428 {
1429         struct jme_adapter *jme = (struct jme_adapter *)arg;
1430         struct jme_ring *txring = &(jme->txring[0]);
1431         struct txdesc *txdesc = txring->desc;
1432         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1433         int i, j, cnt = 0, max, err, mask;
1434
1435         tx_dbg(jme, "Into txclean\n");
1436
1437         if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1438                 goto out;
1439
1440         if (unlikely(atomic_read(&jme->link_changing) != 1))
1441                 goto out;
1442
1443         if (unlikely(!netif_carrier_ok(jme->dev)))
1444                 goto out;
1445
1446         max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1447         mask = jme->tx_ring_mask;
1448
1449         for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1450
1451                 ctxbi = txbi + i;
1452
1453                 if (likely(ctxbi->skb &&
1454                 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1455
1456                         tx_dbg(jme, "txclean: %d+%d@%lu\n",
1457                                i, ctxbi->nr_desc, jiffies);
1458
1459                         err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1460
1461                         for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1462                                 ttxbi = txbi + ((i + j) & (mask));
1463                                 txdesc[(i + j) & (mask)].dw[0] = 0;
1464
1465                                 pci_unmap_page(jme->pdev,
1466                                                  ttxbi->mapping,
1467                                                  ttxbi->len,
1468                                                  PCI_DMA_TODEVICE);
1469
1470                                 ttxbi->mapping = 0;
1471                                 ttxbi->len = 0;
1472                         }
1473
1474                         dev_kfree_skb(ctxbi->skb);
1475
1476                         cnt += ctxbi->nr_desc;
1477
1478                         if (unlikely(err)) {
1479                                 ++(NET_STAT(jme).tx_carrier_errors);
1480                         } else {
1481                                 ++(NET_STAT(jme).tx_packets);
1482                                 NET_STAT(jme).tx_bytes += ctxbi->len;
1483                         }
1484
1485                         ctxbi->skb = NULL;
1486                         ctxbi->len = 0;
1487                         ctxbi->start_xmit = 0;
1488
1489                 } else {
1490                         break;
1491                 }
1492
1493                 i = (i + ctxbi->nr_desc) & mask;
1494
1495                 ctxbi->nr_desc = 0;
1496         }
1497
1498         tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies);
1499         atomic_set(&txring->next_to_clean, i);
1500         atomic_add(cnt, &txring->nr_free);
1501
1502         jme_wake_queue_if_stopped(jme);
1503
1504 out:
1505         atomic_inc(&jme->tx_cleaning);
1506 }
1507
1508 static void
1509 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1510 {
1511         /*
1512          * Disable interrupt
1513          */
1514         jwrite32f(jme, JME_IENC, INTR_ENABLE);
1515
1516         if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1517                 /*
1518                  * Link change event is critical
1519                  * all other events are ignored
1520                  */
1521                 jwrite32(jme, JME_IEVE, intrstat);
1522                 tasklet_schedule(&jme->linkch_task);
1523                 goto out_reenable;
1524         }
1525
1526         if (intrstat & INTR_TMINTR) {
1527                 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1528                 tasklet_schedule(&jme->pcc_task);
1529         }
1530
1531         if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1532                 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1533                 tasklet_schedule(&jme->txclean_task);
1534         }
1535
1536         if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1537                 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1538                                                      INTR_PCCRX0 |
1539                                                      INTR_RX0EMP)) |
1540                                         INTR_RX0);
1541         }
1542
1543         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1544                 if (intrstat & INTR_RX0EMP)
1545                         atomic_inc(&jme->rx_empty);
1546
1547                 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1548                         if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1549                                 jme_polling_mode(jme);
1550                                 JME_RX_SCHEDULE(jme);
1551                         }
1552                 }
1553         } else {
1554                 if (intrstat & INTR_RX0EMP) {
1555                         atomic_inc(&jme->rx_empty);
1556                         tasklet_hi_schedule(&jme->rxempty_task);
1557                 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1558                         tasklet_hi_schedule(&jme->rxclean_task);
1559                 }
1560         }
1561
1562 out_reenable:
1563         /*
1564          * Re-enable interrupt
1565          */
1566         jwrite32f(jme, JME_IENS, INTR_ENABLE);
1567 }
1568
1569 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1570 static irqreturn_t
1571 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1572 #else
1573 static irqreturn_t
1574 jme_intr(int irq, void *dev_id)
1575 #endif
1576 {
1577         struct net_device *netdev = dev_id;
1578         struct jme_adapter *jme = netdev_priv(netdev);
1579         u32 intrstat;
1580
1581         intrstat = jread32(jme, JME_IEVE);
1582
1583         /*
1584          * Check if it's really an interrupt for us
1585          */
1586         if (unlikely((intrstat & INTR_ENABLE) == 0))
1587                 return IRQ_NONE;
1588
1589         /*
1590          * Check if the device still exist
1591          */
1592         if (unlikely(intrstat == ~((typeof(intrstat))0)))
1593                 return IRQ_NONE;
1594
1595         jme_intr_msi(jme, intrstat);
1596
1597         return IRQ_HANDLED;
1598 }
1599
1600 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1601 static irqreturn_t
1602 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1603 #else
1604 static irqreturn_t
1605 jme_msi(int irq, void *dev_id)
1606 #endif
1607 {
1608         struct net_device *netdev = dev_id;
1609         struct jme_adapter *jme = netdev_priv(netdev);
1610         u32 intrstat;
1611
1612         intrstat = jread32(jme, JME_IEVE);
1613
1614         jme_intr_msi(jme, intrstat);
1615
1616         return IRQ_HANDLED;
1617 }
1618
1619 static void
1620 jme_reset_link(struct jme_adapter *jme)
1621 {
1622         jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1623 }
1624
1625 static void
1626 jme_restart_an(struct jme_adapter *jme)
1627 {
1628         u32 bmcr;
1629
1630         spin_lock_bh(&jme->phy_lock);
1631         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1632         bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1633         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1634         spin_unlock_bh(&jme->phy_lock);
1635 }
1636
1637 static int
1638 jme_request_irq(struct jme_adapter *jme)
1639 {
1640         int rc;
1641         struct net_device *netdev = jme->dev;
1642 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1643         irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1644         int irq_flags = SA_SHIRQ;
1645 #else
1646         irq_handler_t handler = jme_intr;
1647         int irq_flags = IRQF_SHARED;
1648 #endif
1649
1650         if (!pci_enable_msi(jme->pdev)) {
1651                 set_bit(JME_FLAG_MSI, &jme->flags);
1652                 handler = jme_msi;
1653                 irq_flags = 0;
1654         }
1655
1656         rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1657                           netdev);
1658         if (rc) {
1659                 netdev_err(netdev,
1660                            "Unable to request %s interrupt (return: %d)\n",
1661                            test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1662                            rc);
1663
1664                 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1665                         pci_disable_msi(jme->pdev);
1666                         clear_bit(JME_FLAG_MSI, &jme->flags);
1667                 }
1668         } else {
1669                 netdev->irq = jme->pdev->irq;
1670         }
1671
1672         return rc;
1673 }
1674
1675 static void
1676 jme_free_irq(struct jme_adapter *jme)
1677 {
1678         free_irq(jme->pdev->irq, jme->dev);
1679         if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1680                 pci_disable_msi(jme->pdev);
1681                 clear_bit(JME_FLAG_MSI, &jme->flags);
1682                 jme->dev->irq = jme->pdev->irq;
1683         }
1684 }
1685
1686 static inline void
1687 jme_new_phy_on(struct jme_adapter *jme)
1688 {
1689         u32 reg;
1690
1691         reg = jread32(jme, JME_PHY_PWR);
1692         reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1693                  PHY_PWR_DWN2 | PHY_PWR_CLKSEL);
1694         jwrite32(jme, JME_PHY_PWR, reg);
1695
1696         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1697         reg &= ~PE1_GPREG0_PBG;
1698         reg |= PE1_GPREG0_ENBG;
1699         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1700 }
1701
1702 static inline void
1703 jme_new_phy_off(struct jme_adapter *jme)
1704 {
1705         u32 reg;
1706
1707         reg = jread32(jme, JME_PHY_PWR);
1708         reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1709                PHY_PWR_DWN2 | PHY_PWR_CLKSEL;
1710         jwrite32(jme, JME_PHY_PWR, reg);
1711
1712         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1713         reg &= ~PE1_GPREG0_PBG;
1714         reg |= PE1_GPREG0_PDD3COLD;
1715         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1716 }
1717
1718 static inline void
1719 jme_phy_on(struct jme_adapter *jme)
1720 {
1721         u32 bmcr;
1722
1723         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1724         bmcr &= ~BMCR_PDOWN;
1725         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1726
1727         if (new_phy_power_ctrl(jme->chip_main_rev))
1728                 jme_new_phy_on(jme);
1729 }
1730
1731 static inline void
1732 jme_phy_off(struct jme_adapter *jme)
1733 {
1734         u32 bmcr;
1735
1736         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1737         bmcr |= BMCR_PDOWN;
1738         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1739
1740         if (new_phy_power_ctrl(jme->chip_main_rev))
1741                 jme_new_phy_off(jme);
1742 }
1743
1744 static int
1745 jme_open(struct net_device *netdev)
1746 {
1747         struct jme_adapter *jme = netdev_priv(netdev);
1748         int rc;
1749
1750         jme_clear_pm(jme);
1751         JME_NAPI_ENABLE(jme);
1752
1753         tasklet_enable(&jme->linkch_task);
1754         tasklet_enable(&jme->txclean_task);
1755         tasklet_hi_enable(&jme->rxclean_task);
1756         tasklet_hi_enable(&jme->rxempty_task);
1757
1758         rc = jme_request_irq(jme);
1759         if (rc)
1760                 goto err_out;
1761
1762         jme_start_irq(jme);
1763
1764         jme_phy_on(jme);
1765         if (test_bit(JME_FLAG_SSET, &jme->flags))
1766                 jme_set_settings(netdev, &jme->old_ecmd);
1767         else
1768                 jme_reset_phy_processor(jme);
1769
1770         jme_reset_link(jme);
1771
1772         return 0;
1773
1774 err_out:
1775         netif_stop_queue(netdev);
1776         netif_carrier_off(netdev);
1777         return rc;
1778 }
1779
1780 static void
1781 jme_set_100m_half(struct jme_adapter *jme)
1782 {
1783         u32 bmcr, tmp;
1784
1785         jme_phy_on(jme);
1786         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1787         tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1788                        BMCR_SPEED1000 | BMCR_FULLDPLX);
1789         tmp |= BMCR_SPEED100;
1790
1791         if (bmcr != tmp)
1792                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1793
1794         if (jme->fpgaver)
1795                 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1796         else
1797                 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1798 }
1799
1800 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1801 static void
1802 jme_wait_link(struct jme_adapter *jme)
1803 {
1804         u32 phylink, to = JME_WAIT_LINK_TIME;
1805
1806         mdelay(1000);
1807         phylink = jme_linkstat_from_phy(jme);
1808         while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1809                 mdelay(10);
1810                 phylink = jme_linkstat_from_phy(jme);
1811         }
1812 }
1813
1814 static void
1815 jme_powersave_phy(struct jme_adapter *jme)
1816 {
1817         if (jme->reg_pmcs) {
1818                 jme_set_100m_half(jme);
1819
1820                 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
1821                         jme_wait_link(jme);
1822
1823                 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
1824         } else {
1825                 jme_phy_off(jme);
1826         }
1827 }
1828
1829 static int
1830 jme_close(struct net_device *netdev)
1831 {
1832         struct jme_adapter *jme = netdev_priv(netdev);
1833
1834         netif_stop_queue(netdev);
1835         netif_carrier_off(netdev);
1836
1837         jme_stop_irq(jme);
1838         jme_free_irq(jme);
1839
1840         JME_NAPI_DISABLE(jme);
1841
1842         tasklet_disable(&jme->linkch_task);
1843         tasklet_disable(&jme->txclean_task);
1844         tasklet_disable(&jme->rxclean_task);
1845         tasklet_disable(&jme->rxempty_task);
1846
1847         jme_disable_rx_engine(jme);
1848         jme_disable_tx_engine(jme);
1849         jme_reset_mac_processor(jme);
1850         jme_free_rx_resources(jme);
1851         jme_free_tx_resources(jme);
1852         jme->phylink = 0;
1853         jme_phy_off(jme);
1854
1855         return 0;
1856 }
1857
1858 static int
1859 jme_alloc_txdesc(struct jme_adapter *jme,
1860                         struct sk_buff *skb)
1861 {
1862         struct jme_ring *txring = &(jme->txring[0]);
1863         int idx, nr_alloc, mask = jme->tx_ring_mask;
1864
1865         idx = txring->next_to_use;
1866         nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1867
1868         if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1869                 return -1;
1870
1871         atomic_sub(nr_alloc, &txring->nr_free);
1872
1873         txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1874
1875         return idx;
1876 }
1877
1878 static void
1879 jme_fill_tx_map(struct pci_dev *pdev,
1880                 struct txdesc *txdesc,
1881                 struct jme_buffer_info *txbi,
1882                 struct page *page,
1883                 u32 page_offset,
1884                 u32 len,
1885                 u8 hidma)
1886 {
1887         dma_addr_t dmaaddr;
1888
1889         dmaaddr = pci_map_page(pdev,
1890                                 page,
1891                                 page_offset,
1892                                 len,
1893                                 PCI_DMA_TODEVICE);
1894
1895         pci_dma_sync_single_for_device(pdev,
1896                                        dmaaddr,
1897                                        len,
1898                                        PCI_DMA_TODEVICE);
1899
1900         txdesc->dw[0] = 0;
1901         txdesc->dw[1] = 0;
1902         txdesc->desc2.flags     = TXFLAG_OWN;
1903         txdesc->desc2.flags     |= (hidma) ? TXFLAG_64BIT : 0;
1904         txdesc->desc2.datalen   = cpu_to_le16(len);
1905         txdesc->desc2.bufaddrh  = cpu_to_le32((__u64)dmaaddr >> 32);
1906         txdesc->desc2.bufaddrl  = cpu_to_le32(
1907                                         (__u64)dmaaddr & 0xFFFFFFFFUL);
1908
1909         txbi->mapping = dmaaddr;
1910         txbi->len = len;
1911 }
1912
1913 static void
1914 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1915 {
1916         struct jme_ring *txring = &(jme->txring[0]);
1917         struct txdesc *txdesc = txring->desc, *ctxdesc;
1918         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1919         u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1920         int i, nr_frags = skb_shinfo(skb)->nr_frags;
1921         int mask = jme->tx_ring_mask;
1922         struct skb_frag_struct *frag;
1923         u32 len;
1924
1925         for (i = 0 ; i < nr_frags ; ++i) {
1926                 frag = &skb_shinfo(skb)->frags[i];
1927                 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1928                 ctxbi = txbi + ((idx + i + 2) & (mask));
1929
1930                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1931                                  frag->page_offset, frag->size, hidma);
1932         }
1933
1934         len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1935         ctxdesc = txdesc + ((idx + 1) & (mask));
1936         ctxbi = txbi + ((idx + 1) & (mask));
1937         jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1938                         offset_in_page(skb->data), len, hidma);
1939
1940 }
1941
1942 static int
1943 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1944 {
1945         if (unlikely(
1946 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1947         skb_shinfo(skb)->tso_size
1948 #else
1949         skb_shinfo(skb)->gso_size
1950 #endif
1951                         && skb_header_cloned(skb) &&
1952                         pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1953                 dev_kfree_skb(skb);
1954                 return -1;
1955         }
1956
1957         return 0;
1958 }
1959
1960 static int
1961 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
1962 {
1963 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1964         *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1965 #else
1966         *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1967 #endif
1968         if (*mss) {
1969                 *flags |= TXFLAG_LSEN;
1970
1971                 if (skb->protocol == htons(ETH_P_IP)) {
1972                         struct iphdr *iph = ip_hdr(skb);
1973
1974                         iph->check = 0;
1975                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1976                                                                 iph->daddr, 0,
1977                                                                 IPPROTO_TCP,
1978                                                                 0);
1979                 } else {
1980                         struct ipv6hdr *ip6h = ipv6_hdr(skb);
1981
1982                         tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
1983                                                                 &ip6h->daddr, 0,
1984                                                                 IPPROTO_TCP,
1985                                                                 0);
1986                 }
1987
1988                 return 0;
1989         }
1990
1991         return 1;
1992 }
1993
1994 static void
1995 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
1996 {
1997 #ifdef CHECKSUM_PARTIAL
1998         if (skb->ip_summed == CHECKSUM_PARTIAL)
1999 #else
2000         if (skb->ip_summed == CHECKSUM_HW)
2001 #endif
2002         {
2003                 u8 ip_proto;
2004
2005 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2006                 if (skb->protocol == htons(ETH_P_IP))
2007                         ip_proto = ip_hdr(skb)->protocol;
2008                 else if (skb->protocol == htons(ETH_P_IPV6))
2009                         ip_proto = ipv6_hdr(skb)->nexthdr;
2010                 else
2011                         ip_proto = 0;
2012 #else
2013                 switch (skb->protocol) {
2014                 case htons(ETH_P_IP):
2015                         ip_proto = ip_hdr(skb)->protocol;
2016                         break;
2017                 case htons(ETH_P_IPV6):
2018                         ip_proto = ipv6_hdr(skb)->nexthdr;
2019                         break;
2020                 default:
2021                         ip_proto = 0;
2022                         break;
2023                 }
2024 #endif
2025
2026                 switch (ip_proto) {
2027                 case IPPROTO_TCP:
2028                         *flags |= TXFLAG_TCPCS;
2029                         break;
2030                 case IPPROTO_UDP:
2031                         *flags |= TXFLAG_UDPCS;
2032                         break;
2033                 default:
2034                         netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n");
2035                         break;
2036                 }
2037         }
2038 }
2039
2040 static inline void
2041 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
2042 {
2043         if (vlan_tx_tag_present(skb)) {
2044                 *flags |= TXFLAG_TAGON;
2045                 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2046         }
2047 }
2048
2049 static int
2050 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
2051 {
2052         struct jme_ring *txring = &(jme->txring[0]);
2053         struct txdesc *txdesc;
2054         struct jme_buffer_info *txbi;
2055         u8 flags;
2056
2057         txdesc = (struct txdesc *)txring->desc + idx;
2058         txbi = txring->bufinf + idx;
2059
2060         txdesc->dw[0] = 0;
2061         txdesc->dw[1] = 0;
2062         txdesc->dw[2] = 0;
2063         txdesc->dw[3] = 0;
2064         txdesc->desc1.pktsize = cpu_to_le16(skb->len);
2065         /*
2066          * Set OWN bit at final.
2067          * When kernel transmit faster than NIC.
2068          * And NIC trying to send this descriptor before we tell
2069          * it to start sending this TX queue.
2070          * Other fields are already filled correctly.
2071          */
2072         wmb();
2073         flags = TXFLAG_OWN | TXFLAG_INT;
2074         /*
2075          * Set checksum flags while not tso
2076          */
2077         if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
2078                 jme_tx_csum(jme, skb, &flags);
2079         jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
2080         jme_map_tx_skb(jme, skb, idx);
2081         txdesc->desc1.flags = flags;
2082         /*
2083          * Set tx buffer info after telling NIC to send
2084          * For better tx_clean timing
2085          */
2086         wmb();
2087         txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
2088         txbi->skb = skb;
2089         txbi->len = skb->len;
2090         txbi->start_xmit = jiffies;
2091         if (!txbi->start_xmit)
2092                 txbi->start_xmit = (0UL-1);
2093
2094         return 0;
2095 }
2096
2097 static void
2098 jme_stop_queue_if_full(struct jme_adapter *jme)
2099 {
2100         struct jme_ring *txring = &(jme->txring[0]);
2101         struct jme_buffer_info *txbi = txring->bufinf;
2102         int idx = atomic_read(&txring->next_to_clean);
2103
2104         txbi += idx;
2105
2106         smp_wmb();
2107         if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2108                 netif_stop_queue(jme->dev);
2109                 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n");
2110                 smp_wmb();
2111                 if (atomic_read(&txring->nr_free)
2112                         >= (jme->tx_wake_threshold)) {
2113                         netif_wake_queue(jme->dev);
2114                         netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n");
2115                 }
2116         }
2117
2118         if (unlikely(txbi->start_xmit &&
2119                         (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2120                         txbi->skb)) {
2121                 netif_stop_queue(jme->dev);
2122                 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu\n", idx, jiffies);
2123         }
2124 }
2125
2126 /*
2127  * This function is already protected by netif_tx_lock()
2128  */
2129
2130 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2131 static int
2132 #else
2133 static netdev_tx_t
2134 #endif
2135 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2136 {
2137         struct jme_adapter *jme = netdev_priv(netdev);
2138         int idx;
2139
2140         if (unlikely(jme_expand_header(jme, skb))) {
2141                 ++(NET_STAT(jme).tx_dropped);
2142                 return NETDEV_TX_OK;
2143         }
2144
2145         idx = jme_alloc_txdesc(jme, skb);
2146
2147         if (unlikely(idx < 0)) {
2148                 netif_stop_queue(netdev);
2149                 netif_err(jme, tx_err, jme->dev,
2150                           "BUG! Tx ring full when queue awake!\n");
2151
2152                 return NETDEV_TX_BUSY;
2153         }
2154
2155         jme_fill_tx_desc(jme, skb, idx);
2156
2157         jwrite32(jme, JME_TXCS, jme->reg_txcs |
2158                                 TXCS_SELECT_QUEUE0 |
2159                                 TXCS_QUEUE0S |
2160                                 TXCS_ENABLE);
2161 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2162         netdev->trans_start = jiffies;
2163 #endif
2164
2165         tx_dbg(jme, "xmit: %d+%d@%lu\n",
2166                idx, skb_shinfo(skb)->nr_frags + 2, jiffies);
2167         jme_stop_queue_if_full(jme);
2168
2169         return NETDEV_TX_OK;
2170 }
2171
2172 static int
2173 jme_set_macaddr(struct net_device *netdev, void *p)
2174 {
2175         struct jme_adapter *jme = netdev_priv(netdev);
2176         struct sockaddr *addr = p;
2177         u32 val;
2178
2179         if (netif_running(netdev))
2180                 return -EBUSY;
2181
2182         spin_lock_bh(&jme->macaddr_lock);
2183         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2184
2185         val = (addr->sa_data[3] & 0xff) << 24 |
2186               (addr->sa_data[2] & 0xff) << 16 |
2187               (addr->sa_data[1] & 0xff) <<  8 |
2188               (addr->sa_data[0] & 0xff);
2189         jwrite32(jme, JME_RXUMA_LO, val);
2190         val = (addr->sa_data[5] & 0xff) << 8 |
2191               (addr->sa_data[4] & 0xff);
2192         jwrite32(jme, JME_RXUMA_HI, val);
2193         spin_unlock_bh(&jme->macaddr_lock);
2194
2195         return 0;
2196 }
2197
2198 static void
2199 jme_set_multi(struct net_device *netdev)
2200 {
2201         struct jme_adapter *jme = netdev_priv(netdev);
2202         u32 mc_hash[2] = {};
2203 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2204         int i;
2205 #endif
2206
2207         spin_lock_bh(&jme->rxmcs_lock);
2208
2209         jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2210
2211         if (netdev->flags & IFF_PROMISC) {
2212                 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2213         } else if (netdev->flags & IFF_ALLMULTI) {
2214                 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2215         } else if (netdev->flags & IFF_MULTICAST) {
2216 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2217                 struct dev_mc_list *mclist;
2218 #else
2219                 struct netdev_hw_addr *ha;
2220 #endif
2221                 int bit_nr;
2222
2223                 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2224 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2225                 for (i = 0, mclist = netdev->mc_list;
2226                         mclist && i < netdev->mc_count;
2227                         ++i, mclist = mclist->next) {
2228 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2229                 netdev_for_each_mc_addr(mclist, netdev) {
2230 #else
2231                 netdev_for_each_mc_addr(ha, netdev) {
2232 #endif
2233 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2234                         bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2235 #else
2236                         bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2237 #endif
2238                         mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2239                 }
2240
2241                 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2242                 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2243         }
2244
2245         wmb();
2246         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2247
2248         spin_unlock_bh(&jme->rxmcs_lock);
2249 }
2250
2251 static int
2252 jme_change_mtu(struct net_device *netdev, int new_mtu)
2253 {
2254         struct jme_adapter *jme = netdev_priv(netdev);
2255
2256         if (new_mtu == jme->old_mtu)
2257                 return 0;
2258
2259         if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2260                 ((new_mtu) < IPV6_MIN_MTU))
2261                 return -EINVAL;
2262
2263         if (new_mtu > 4000) {
2264                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2265                 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2266                 jme_restart_rx_engine(jme);
2267         } else {
2268                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2269                 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2270                 jme_restart_rx_engine(jme);
2271         }
2272
2273         if (new_mtu > 1900) {
2274                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2275                                 NETIF_F_TSO | NETIF_F_TSO6);
2276         } else {
2277                 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2278                         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2279                 if (test_bit(JME_FLAG_TSO, &jme->flags))
2280                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2281         }
2282
2283         netdev->mtu = new_mtu;
2284         jme_reset_link(jme);
2285
2286         return 0;
2287 }
2288
2289 static void
2290 jme_tx_timeout(struct net_device *netdev)
2291 {
2292         struct jme_adapter *jme = netdev_priv(netdev);
2293
2294         jme->phylink = 0;
2295         jme_reset_phy_processor(jme);
2296         if (test_bit(JME_FLAG_SSET, &jme->flags))
2297                 jme_set_settings(netdev, &jme->old_ecmd);
2298
2299         /*
2300          * Force to Reset the link again
2301          */
2302         jme_reset_link(jme);
2303 }
2304
2305 static inline void jme_pause_rx(struct jme_adapter *jme)
2306 {
2307         atomic_dec(&jme->link_changing);
2308
2309         jme_set_rx_pcc(jme, PCC_OFF);
2310         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2311                 JME_NAPI_DISABLE(jme);
2312         } else {
2313                 tasklet_disable(&jme->rxclean_task);
2314                 tasklet_disable(&jme->rxempty_task);
2315         }
2316 }
2317
2318 static inline void jme_resume_rx(struct jme_adapter *jme)
2319 {
2320         struct dynpcc_info *dpi = &(jme->dpi);
2321
2322         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2323                 JME_NAPI_ENABLE(jme);
2324         } else {
2325                 tasklet_hi_enable(&jme->rxclean_task);
2326                 tasklet_hi_enable(&jme->rxempty_task);
2327         }
2328         dpi->cur                = PCC_P1;
2329         dpi->attempt            = PCC_P1;
2330         dpi->cnt                = 0;
2331         jme_set_rx_pcc(jme, PCC_P1);
2332
2333         atomic_inc(&jme->link_changing);
2334 }
2335
2336 static void
2337 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2338 {
2339         struct jme_adapter *jme = netdev_priv(netdev);
2340
2341         jme_pause_rx(jme);
2342         jme->vlgrp = grp;
2343         jme_resume_rx(jme);
2344 }
2345
2346 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2347 static void
2348 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2349 {
2350         struct jme_adapter *jme = netdev_priv(netdev);
2351
2352         if(jme->vlgrp) {
2353                 jme_pause_rx(jme);
2354 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2355                 jme->vlgrp->vlan_devices[vid] = NULL;
2356 #else
2357                 vlan_group_set_device(jme->vlgrp, vid, NULL);
2358 #endif
2359                 jme_resume_rx(jme);
2360         }
2361 }
2362 #endif
2363
2364 static void
2365 jme_get_drvinfo(struct net_device *netdev,
2366                      struct ethtool_drvinfo *info)
2367 {
2368         struct jme_adapter *jme = netdev_priv(netdev);
2369
2370         strcpy(info->driver, DRV_NAME);
2371         strcpy(info->version, DRV_VERSION);
2372         strcpy(info->bus_info, pci_name(jme->pdev));
2373 }
2374
2375 static int
2376 jme_get_regs_len(struct net_device *netdev)
2377 {
2378         return JME_REG_LEN;
2379 }
2380
2381 static void
2382 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2383 {
2384         int i;
2385
2386         for (i = 0 ; i < len ; i += 4)
2387                 p[i >> 2] = jread32(jme, reg + i);
2388 }
2389
2390 static void
2391 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2392 {
2393         int i;
2394         u16 *p16 = (u16 *)p;
2395
2396         for (i = 0 ; i < reg_nr ; ++i)
2397                 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2398 }
2399
2400 static void
2401 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2402 {
2403         struct jme_adapter *jme = netdev_priv(netdev);
2404         u32 *p32 = (u32 *)p;
2405
2406         memset(p, 0xFF, JME_REG_LEN);
2407
2408         regs->version = 1;
2409         mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2410
2411         p32 += 0x100 >> 2;
2412         mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2413
2414         p32 += 0x100 >> 2;
2415         mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2416
2417         p32 += 0x100 >> 2;
2418         mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2419
2420         p32 += 0x100 >> 2;
2421         mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2422 }
2423
2424 static int
2425 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2426 {
2427         struct jme_adapter *jme = netdev_priv(netdev);
2428
2429         ecmd->tx_coalesce_usecs = PCC_TX_TO;
2430         ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2431
2432         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2433                 ecmd->use_adaptive_rx_coalesce = false;
2434                 ecmd->rx_coalesce_usecs = 0;
2435                 ecmd->rx_max_coalesced_frames = 0;
2436                 return 0;
2437         }
2438
2439         ecmd->use_adaptive_rx_coalesce = true;
2440
2441         switch (jme->dpi.cur) {
2442         case PCC_P1:
2443                 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2444                 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2445                 break;
2446         case PCC_P2:
2447                 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2448                 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2449                 break;
2450         case PCC_P3:
2451                 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2452                 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2453                 break;
2454         default:
2455                 break;
2456         }
2457
2458         return 0;
2459 }
2460
2461 static int
2462 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2463 {
2464         struct jme_adapter *jme = netdev_priv(netdev);
2465         struct dynpcc_info *dpi = &(jme->dpi);
2466
2467         if (netif_running(netdev))
2468                 return -EBUSY;
2469
2470         if (ecmd->use_adaptive_rx_coalesce &&
2471             test_bit(JME_FLAG_POLL, &jme->flags)) {
2472                 clear_bit(JME_FLAG_POLL, &jme->flags);
2473                 jme->jme_rx = netif_rx;
2474                 jme->jme_vlan_rx = vlan_hwaccel_rx;
2475                 dpi->cur                = PCC_P1;
2476                 dpi->attempt            = PCC_P1;
2477                 dpi->cnt                = 0;
2478                 jme_set_rx_pcc(jme, PCC_P1);
2479                 jme_interrupt_mode(jme);
2480         } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2481                    !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2482                 set_bit(JME_FLAG_POLL, &jme->flags);
2483                 jme->jme_rx = netif_receive_skb;
2484                 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2485                 jme_interrupt_mode(jme);
2486         }
2487
2488         return 0;
2489 }
2490
2491 static void
2492 jme_get_pauseparam(struct net_device *netdev,
2493                         struct ethtool_pauseparam *ecmd)
2494 {
2495         struct jme_adapter *jme = netdev_priv(netdev);
2496         u32 val;
2497
2498         ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2499         ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2500
2501         spin_lock_bh(&jme->phy_lock);
2502         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2503         spin_unlock_bh(&jme->phy_lock);
2504
2505         ecmd->autoneg =
2506                 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2507 }
2508
2509 static int
2510 jme_set_pauseparam(struct net_device *netdev,
2511                         struct ethtool_pauseparam *ecmd)
2512 {
2513         struct jme_adapter *jme = netdev_priv(netdev);
2514         u32 val;
2515
2516         if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2517                 (ecmd->tx_pause != 0)) {
2518
2519                 if (ecmd->tx_pause)
2520                         jme->reg_txpfc |= TXPFC_PF_EN;
2521                 else
2522                         jme->reg_txpfc &= ~TXPFC_PF_EN;
2523
2524                 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2525         }
2526
2527         spin_lock_bh(&jme->rxmcs_lock);
2528         if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2529                 (ecmd->rx_pause != 0)) {
2530
2531                 if (ecmd->rx_pause)
2532                         jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2533                 else
2534                         jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2535
2536                 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2537         }
2538         spin_unlock_bh(&jme->rxmcs_lock);
2539
2540         spin_lock_bh(&jme->phy_lock);
2541         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2542         if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2543                 (ecmd->autoneg != 0)) {
2544
2545                 if (ecmd->autoneg)
2546                         val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2547                 else
2548                         val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2549
2550                 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2551                                 MII_ADVERTISE, val);
2552         }
2553         spin_unlock_bh(&jme->phy_lock);
2554
2555         return 0;
2556 }
2557
2558 static void
2559 jme_get_wol(struct net_device *netdev,
2560                 struct ethtool_wolinfo *wol)
2561 {
2562         struct jme_adapter *jme = netdev_priv(netdev);
2563
2564         wol->supported = WAKE_MAGIC | WAKE_PHY;
2565
2566         wol->wolopts = 0;
2567
2568         if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2569                 wol->wolopts |= WAKE_PHY;
2570
2571         if (jme->reg_pmcs & PMCS_MFEN)
2572                 wol->wolopts |= WAKE_MAGIC;
2573
2574 }
2575
2576 static int
2577 jme_set_wol(struct net_device *netdev,
2578                 struct ethtool_wolinfo *wol)
2579 {
2580         struct jme_adapter *jme = netdev_priv(netdev);
2581
2582         if (wol->wolopts & (WAKE_MAGICSECURE |
2583                                 WAKE_UCAST |
2584                                 WAKE_MCAST |
2585                                 WAKE_BCAST |
2586                                 WAKE_ARP))
2587                 return -EOPNOTSUPP;
2588
2589         jme->reg_pmcs = 0;
2590
2591         if (wol->wolopts & WAKE_PHY)
2592                 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2593
2594         if (wol->wolopts & WAKE_MAGIC)
2595                 jme->reg_pmcs |= PMCS_MFEN;
2596
2597         jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2598
2599         return 0;
2600 }
2601
2602 static int
2603 jme_get_settings(struct net_device *netdev,
2604                      struct ethtool_cmd *ecmd)
2605 {
2606         struct jme_adapter *jme = netdev_priv(netdev);
2607         int rc;
2608
2609         spin_lock_bh(&jme->phy_lock);
2610         rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2611         spin_unlock_bh(&jme->phy_lock);
2612         return rc;
2613 }
2614
2615 static int
2616 jme_set_settings(struct net_device *netdev,
2617                      struct ethtool_cmd *ecmd)
2618 {
2619         struct jme_adapter *jme = netdev_priv(netdev);
2620         int rc, fdc = 0;
2621
2622         if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2623                 return -EINVAL;
2624
2625         /*
2626          * Check If user changed duplex only while force_media.
2627          * Hardware would not generate link change interrupt.
2628          */
2629         if (jme->mii_if.force_media &&
2630         ecmd->autoneg != AUTONEG_ENABLE &&
2631         (jme->mii_if.full_duplex != ecmd->duplex))
2632                 fdc = 1;
2633
2634         spin_lock_bh(&jme->phy_lock);
2635         rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2636         spin_unlock_bh(&jme->phy_lock);
2637
2638         if (!rc) {
2639                 if (fdc)
2640                         jme_reset_link(jme);
2641                 jme->old_ecmd = *ecmd;
2642                 set_bit(JME_FLAG_SSET, &jme->flags);
2643         }
2644
2645         return rc;
2646 }
2647
2648 static int
2649 jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
2650 {
2651         int rc;
2652         struct jme_adapter *jme = netdev_priv(netdev);
2653         struct mii_ioctl_data *mii_data = if_mii(rq);
2654         unsigned int duplex_chg;
2655
2656         if (cmd == SIOCSMIIREG) {
2657                 u16 val = mii_data->val_in;
2658                 if (!(val & (BMCR_RESET|BMCR_ANENABLE)) &&
2659                     (val & BMCR_SPEED1000))
2660                         return -EINVAL;
2661         }
2662
2663         spin_lock_bh(&jme->phy_lock);
2664         rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg);
2665         spin_unlock_bh(&jme->phy_lock);
2666
2667         if (!rc && (cmd == SIOCSMIIREG)) {
2668                 if (duplex_chg)
2669                         jme_reset_link(jme);
2670                 jme_get_settings(netdev, &jme->old_ecmd);
2671                 set_bit(JME_FLAG_SSET, &jme->flags);
2672         }
2673
2674         return rc;
2675 }
2676
2677 static u32
2678 jme_get_link(struct net_device *netdev)
2679 {
2680         struct jme_adapter *jme = netdev_priv(netdev);
2681         return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2682 }
2683
2684 static u32
2685 jme_get_msglevel(struct net_device *netdev)
2686 {
2687         struct jme_adapter *jme = netdev_priv(netdev);
2688         return jme->msg_enable;
2689 }
2690
2691 static void
2692 jme_set_msglevel(struct net_device *netdev, u32 value)
2693 {
2694         struct jme_adapter *jme = netdev_priv(netdev);
2695         jme->msg_enable = value;
2696 }
2697
2698 static u32
2699 jme_get_rx_csum(struct net_device *netdev)
2700 {
2701         struct jme_adapter *jme = netdev_priv(netdev);
2702         return jme->reg_rxmcs & RXMCS_CHECKSUM;
2703 }
2704
2705 static int
2706 jme_set_rx_csum(struct net_device *netdev, u32 on)
2707 {
2708         struct jme_adapter *jme = netdev_priv(netdev);
2709
2710         spin_lock_bh(&jme->rxmcs_lock);
2711         if (on)
2712                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2713         else
2714                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2715         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2716         spin_unlock_bh(&jme->rxmcs_lock);
2717
2718         return 0;
2719 }
2720
2721 static int
2722 jme_set_tx_csum(struct net_device *netdev, u32 on)
2723 {
2724         struct jme_adapter *jme = netdev_priv(netdev);
2725
2726         if (on) {
2727                 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2728                 if (netdev->mtu <= 1900)
2729                         netdev->features |=
2730                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2731         } else {
2732                 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2733                 netdev->features &=
2734                                 ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
2735         }
2736
2737         return 0;
2738 }
2739
2740 static int
2741 jme_set_tso(struct net_device *netdev, u32 on)
2742 {
2743         struct jme_adapter *jme = netdev_priv(netdev);
2744
2745         if (on) {
2746                 set_bit(JME_FLAG_TSO, &jme->flags);
2747                 if (netdev->mtu <= 1900)
2748                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2749         } else {
2750                 clear_bit(JME_FLAG_TSO, &jme->flags);
2751                 netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
2752         }
2753
2754         return 0;
2755 }
2756
2757 static int
2758 jme_nway_reset(struct net_device *netdev)
2759 {
2760         struct jme_adapter *jme = netdev_priv(netdev);
2761         jme_restart_an(jme);
2762         return 0;
2763 }
2764
2765 static u8
2766 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2767 {
2768         u32 val;
2769         int to;
2770
2771         val = jread32(jme, JME_SMBCSR);
2772         to = JME_SMB_BUSY_TIMEOUT;
2773         while ((val & SMBCSR_BUSY) && --to) {
2774                 msleep(1);
2775                 val = jread32(jme, JME_SMBCSR);
2776         }
2777         if (!to) {
2778                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2779                 return 0xFF;
2780         }
2781
2782         jwrite32(jme, JME_SMBINTF,
2783                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2784                 SMBINTF_HWRWN_READ |
2785                 SMBINTF_HWCMD);
2786
2787         val = jread32(jme, JME_SMBINTF);
2788         to = JME_SMB_BUSY_TIMEOUT;
2789         while ((val & SMBINTF_HWCMD) && --to) {
2790                 msleep(1);
2791                 val = jread32(jme, JME_SMBINTF);
2792         }
2793         if (!to) {
2794                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2795                 return 0xFF;
2796         }
2797
2798         return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2799 }
2800
2801 static void
2802 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2803 {
2804         u32 val;
2805         int to;
2806
2807         val = jread32(jme, JME_SMBCSR);
2808         to = JME_SMB_BUSY_TIMEOUT;
2809         while ((val & SMBCSR_BUSY) && --to) {
2810                 msleep(1);
2811                 val = jread32(jme, JME_SMBCSR);
2812         }
2813         if (!to) {
2814                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2815                 return;
2816         }
2817
2818         jwrite32(jme, JME_SMBINTF,
2819                 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2820                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2821                 SMBINTF_HWRWN_WRITE |
2822                 SMBINTF_HWCMD);
2823
2824         val = jread32(jme, JME_SMBINTF);
2825         to = JME_SMB_BUSY_TIMEOUT;
2826         while ((val & SMBINTF_HWCMD) && --to) {
2827                 msleep(1);
2828                 val = jread32(jme, JME_SMBINTF);
2829         }
2830         if (!to) {
2831                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2832                 return;
2833         }
2834
2835         mdelay(2);
2836 }
2837
2838 static int
2839 jme_get_eeprom_len(struct net_device *netdev)
2840 {
2841         struct jme_adapter *jme = netdev_priv(netdev);
2842         u32 val;
2843         val = jread32(jme, JME_SMBCSR);
2844         return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2845 }
2846
2847 static int
2848 jme_get_eeprom(struct net_device *netdev,
2849                 struct ethtool_eeprom *eeprom, u8 *data)
2850 {
2851         struct jme_adapter *jme = netdev_priv(netdev);
2852         int i, offset = eeprom->offset, len = eeprom->len;
2853
2854         /*
2855          * ethtool will check the boundary for us
2856          */
2857         eeprom->magic = JME_EEPROM_MAGIC;
2858         for (i = 0 ; i < len ; ++i)
2859                 data[i] = jme_smb_read(jme, i + offset);
2860
2861         return 0;
2862 }
2863
2864 static int
2865 jme_set_eeprom(struct net_device *netdev,
2866                 struct ethtool_eeprom *eeprom, u8 *data)
2867 {
2868         struct jme_adapter *jme = netdev_priv(netdev);
2869         int i, offset = eeprom->offset, len = eeprom->len;
2870
2871         if (eeprom->magic != JME_EEPROM_MAGIC)
2872                 return -EINVAL;
2873
2874         /*
2875          * ethtool will check the boundary for us
2876          */
2877         for (i = 0 ; i < len ; ++i)
2878                 jme_smb_write(jme, i + offset, data[i]);
2879
2880         return 0;
2881 }
2882
2883 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2884 static struct ethtool_ops jme_ethtool_ops = {
2885 #else
2886 static const struct ethtool_ops jme_ethtool_ops = {
2887 #endif
2888         .get_drvinfo            = jme_get_drvinfo,
2889         .get_regs_len           = jme_get_regs_len,
2890         .get_regs               = jme_get_regs,
2891         .get_coalesce           = jme_get_coalesce,
2892         .set_coalesce           = jme_set_coalesce,
2893         .get_pauseparam         = jme_get_pauseparam,
2894         .set_pauseparam         = jme_set_pauseparam,
2895         .get_wol                = jme_get_wol,
2896         .set_wol                = jme_set_wol,
2897         .get_settings           = jme_get_settings,
2898         .set_settings           = jme_set_settings,
2899         .get_link               = jme_get_link,
2900         .get_msglevel           = jme_get_msglevel,
2901         .set_msglevel           = jme_set_msglevel,
2902         .get_rx_csum            = jme_get_rx_csum,
2903         .set_rx_csum            = jme_set_rx_csum,
2904         .set_tx_csum            = jme_set_tx_csum,
2905         .set_tso                = jme_set_tso,
2906         .set_sg                 = ethtool_op_set_sg,
2907         .nway_reset             = jme_nway_reset,
2908         .get_eeprom_len         = jme_get_eeprom_len,
2909         .get_eeprom             = jme_get_eeprom,
2910         .set_eeprom             = jme_set_eeprom,
2911 };
2912
2913 static int
2914 jme_pci_dma64(struct pci_dev *pdev)
2915 {
2916         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2917 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2918             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2919 #else
2920             !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2921 #endif
2922            )
2923 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2924                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2925 #else
2926                 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2927 #endif
2928                         return 1;
2929
2930         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2931 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2932             !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2933 #else
2934             !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2935 #endif
2936            )
2937 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2938                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2939 #else
2940                 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2941 #endif
2942                         return 1;
2943
2944 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2945         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2946                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2947 #else
2948         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2949                 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
2950 #endif
2951                         return 0;
2952
2953         return -1;
2954 }
2955
2956 static inline void
2957 jme_phy_init(struct jme_adapter *jme)
2958 {
2959         u16 reg26;
2960
2961         reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2962         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2963 }
2964
2965 static inline void
2966 jme_check_hw_ver(struct jme_adapter *jme)
2967 {
2968         u32 chipmode;
2969
2970         chipmode = jread32(jme, JME_CHIPMODE);
2971
2972         jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
2973         jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
2974         jme->chip_main_rev = jme->chiprev & 0xF;
2975         jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF;
2976 }
2977
2978 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2979 static const struct net_device_ops jme_netdev_ops = {
2980         .ndo_open               = jme_open,
2981         .ndo_stop               = jme_close,
2982         .ndo_validate_addr      = eth_validate_addr,
2983         .ndo_do_ioctl           = jme_ioctl,
2984         .ndo_start_xmit         = jme_start_xmit,
2985         .ndo_set_mac_address    = jme_set_macaddr,
2986         .ndo_set_multicast_list = jme_set_multi,
2987         .ndo_change_mtu         = jme_change_mtu,
2988         .ndo_tx_timeout         = jme_tx_timeout,
2989         .ndo_vlan_rx_register   = jme_vlan_rx_register,
2990 };
2991 #endif
2992
2993 static int __devinit
2994 jme_init_one(struct pci_dev *pdev,
2995              const struct pci_device_id *ent)
2996 {
2997         int rc = 0, using_dac, i;
2998         struct net_device *netdev;
2999         struct jme_adapter *jme;
3000         u16 bmcr, bmsr;
3001         u32 apmc;
3002
3003         /*
3004          * set up PCI device basics
3005          */
3006         rc = pci_enable_device(pdev);
3007         if (rc) {
3008                 pr_err("Cannot enable PCI device\n");
3009                 goto err_out;
3010         }
3011
3012         using_dac = jme_pci_dma64(pdev);
3013         if (using_dac < 0) {
3014                 pr_err("Cannot set PCI DMA Mask\n");
3015                 rc = -EIO;
3016                 goto err_out_disable_pdev;
3017         }
3018
3019         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
3020                 pr_err("No PCI resource region found\n");
3021                 rc = -ENOMEM;
3022                 goto err_out_disable_pdev;
3023         }
3024
3025         rc = pci_request_regions(pdev, DRV_NAME);
3026         if (rc) {
3027                 pr_err("Cannot obtain PCI resource region\n");
3028                 goto err_out_disable_pdev;
3029         }
3030
3031         pci_set_master(pdev);
3032
3033         /*
3034          * alloc and init net device
3035          */
3036         netdev = alloc_etherdev(sizeof(*jme));
3037         if (!netdev) {
3038                 pr_err("Cannot allocate netdev structure\n");
3039                 rc = -ENOMEM;
3040                 goto err_out_release_regions;
3041         }
3042 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3043         netdev->netdev_ops = &jme_netdev_ops;
3044 #else
3045         netdev->open                    = jme_open;
3046         netdev->stop                    = jme_close;
3047         netdev->do_ioctl                = jme_ioctl;
3048         netdev->hard_start_xmit         = jme_start_xmit;
3049         netdev->set_mac_address         = jme_set_macaddr;
3050         netdev->set_multicast_list      = jme_set_multi;
3051         netdev->change_mtu              = jme_change_mtu;
3052         netdev->tx_timeout              = jme_tx_timeout;
3053         netdev->vlan_rx_register        = jme_vlan_rx_register;
3054 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
3055         netdev->vlan_rx_kill_vid        = jme_vlan_rx_kill_vid;
3056 #endif
3057         NETDEV_GET_STATS(netdev, &jme_get_stats);
3058 #endif
3059         netdev->ethtool_ops             = &jme_ethtool_ops;
3060         netdev->watchdog_timeo          = TX_TIMEOUT;
3061         netdev->features                =       NETIF_F_IP_CSUM |
3062                                                 NETIF_F_IPV6_CSUM |
3063                                                 NETIF_F_SG |
3064                                                 NETIF_F_TSO |
3065                                                 NETIF_F_TSO6 |
3066                                                 NETIF_F_HW_VLAN_TX |
3067                                                 NETIF_F_HW_VLAN_RX;
3068         if (using_dac)
3069                 netdev->features        |=      NETIF_F_HIGHDMA;
3070
3071         SET_NETDEV_DEV(netdev, &pdev->dev);
3072         pci_set_drvdata(pdev, netdev);
3073
3074         /*
3075          * init adapter info
3076          */
3077         jme = netdev_priv(netdev);
3078         jme->pdev = pdev;
3079         jme->dev = netdev;
3080         jme->jme_rx = netif_rx;
3081         jme->jme_vlan_rx = vlan_hwaccel_rx;
3082         jme->old_mtu = netdev->mtu = 1500;
3083         jme->phylink = 0;
3084         jme->tx_ring_size = 1 << 10;
3085         jme->tx_ring_mask = jme->tx_ring_size - 1;
3086         jme->tx_wake_threshold = 1 << 9;
3087         jme->rx_ring_size = 1 << 9;
3088         jme->rx_ring_mask = jme->rx_ring_size - 1;
3089         jme->msg_enable = JME_DEF_MSG_ENABLE;
3090         jme->regs = ioremap(pci_resource_start(pdev, 0),
3091                              pci_resource_len(pdev, 0));
3092         if (!(jme->regs)) {
3093                 pr_err("Mapping PCI resource region error\n");
3094                 rc = -ENOMEM;
3095                 goto err_out_free_netdev;
3096         }
3097
3098         if (no_pseudohp) {
3099                 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
3100                 jwrite32(jme, JME_APMC, apmc);
3101         } else if (force_pseudohp) {
3102                 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
3103                 jwrite32(jme, JME_APMC, apmc);
3104         }
3105
3106         NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3107
3108         spin_lock_init(&jme->phy_lock);
3109         spin_lock_init(&jme->macaddr_lock);
3110         spin_lock_init(&jme->rxmcs_lock);
3111
3112         atomic_set(&jme->link_changing, 1);
3113         atomic_set(&jme->rx_cleaning, 1);
3114         atomic_set(&jme->tx_cleaning, 1);
3115         atomic_set(&jme->rx_empty, 1);
3116
3117         tasklet_init(&jme->pcc_task,
3118                      jme_pcc_tasklet,
3119                      (unsigned long) jme);
3120         tasklet_init(&jme->linkch_task,
3121                      jme_link_change_tasklet,
3122                      (unsigned long) jme);
3123         tasklet_init(&jme->txclean_task,
3124                      jme_tx_clean_tasklet,
3125                      (unsigned long) jme);
3126         tasklet_init(&jme->rxclean_task,
3127                      jme_rx_clean_tasklet,
3128                      (unsigned long) jme);
3129         tasklet_init(&jme->rxempty_task,
3130                      jme_rx_empty_tasklet,
3131                      (unsigned long) jme);
3132         tasklet_disable_nosync(&jme->linkch_task);
3133         tasklet_disable_nosync(&jme->txclean_task);
3134         tasklet_disable_nosync(&jme->rxclean_task);
3135         tasklet_disable_nosync(&jme->rxempty_task);
3136         jme->dpi.cur = PCC_P1;
3137
3138         jme->reg_ghc = 0;
3139         jme->reg_rxcs = RXCS_DEFAULT;
3140         jme->reg_rxmcs = RXMCS_DEFAULT;
3141         jme->reg_txpfc = 0;
3142         jme->reg_pmcs = PMCS_MFEN;
3143         jme->reg_gpreg1 = GPREG1_DEFAULT;
3144         set_bit(JME_FLAG_TXCSUM, &jme->flags);
3145         set_bit(JME_FLAG_TSO, &jme->flags);
3146
3147         /*
3148          * Get Max Read Req Size from PCI Config Space
3149          */
3150         pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3151         jme->mrrs &= PCI_DCSR_MRRS_MASK;
3152         switch (jme->mrrs) {
3153         case MRRS_128B:
3154                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3155                 break;
3156         case MRRS_256B:
3157                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3158                 break;
3159         default:
3160                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3161                 break;
3162         }
3163
3164         /*
3165          * Must check before reset_mac_processor
3166          */
3167         jme_check_hw_ver(jme);
3168         jme->mii_if.dev = netdev;
3169         if (jme->fpgaver) {
3170                 jme->mii_if.phy_id = 0;
3171                 for (i = 1 ; i < 32 ; ++i) {
3172                         bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3173                         bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3174                         if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3175                                 jme->mii_if.phy_id = i;
3176                                 break;
3177                         }
3178                 }
3179
3180                 if (!jme->mii_if.phy_id) {
3181                         rc = -EIO;
3182                         pr_err("Can not find phy_id\n");
3183                         goto err_out_unmap;
3184                 }
3185
3186                 jme->reg_ghc |= GHC_LINK_POLL;
3187         } else {
3188                 jme->mii_if.phy_id = 1;
3189         }
3190         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3191                 jme->mii_if.supports_gmii = true;
3192         else
3193                 jme->mii_if.supports_gmii = false;
3194         jme->mii_if.phy_id_mask = 0x1F;
3195         jme->mii_if.reg_num_mask = 0x1F;
3196         jme->mii_if.mdio_read = jme_mdio_read;
3197         jme->mii_if.mdio_write = jme_mdio_write;
3198
3199         jme_clear_pm(jme);
3200         jme_set_phyfifo_5level(jme);
3201         pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev);
3202         if (!jme->fpgaver)
3203                 jme_phy_init(jme);
3204         jme_phy_off(jme);
3205
3206         /*
3207          * Reset MAC processor and reload EEPROM for MAC Address
3208          */
3209         jme_reset_mac_processor(jme);
3210         rc = jme_reload_eeprom(jme);
3211         if (rc) {
3212                 pr_err("Reload eeprom for reading MAC Address error\n");
3213                 goto err_out_unmap;
3214         }
3215         jme_load_macaddr(netdev);
3216
3217         /*
3218          * Tell stack that we are not ready to work until open()
3219          */
3220         netif_carrier_off(netdev);
3221
3222         rc = register_netdev(netdev);
3223         if (rc) {
3224                 pr_err("Cannot register net device\n");
3225                 goto err_out_unmap;
3226         }
3227
3228         netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x "
3229                    "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3230                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3231                    "JMC250 Gigabit Ethernet" :
3232                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3233                    "JMC260 Fast Ethernet" : "Unknown",
3234                    (jme->fpgaver != 0) ? " (FPGA)" : "",
3235                    (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3236                    jme->pcirev,
3237                    netdev->dev_addr[0],
3238                    netdev->dev_addr[1],
3239                    netdev->dev_addr[2],
3240                    netdev->dev_addr[3],
3241                    netdev->dev_addr[4],
3242                    netdev->dev_addr[5]);
3243
3244         return 0;
3245
3246 err_out_unmap:
3247         iounmap(jme->regs);
3248 err_out_free_netdev:
3249         pci_set_drvdata(pdev, NULL);
3250         free_netdev(netdev);
3251 err_out_release_regions:
3252         pci_release_regions(pdev);
3253 err_out_disable_pdev:
3254         pci_disable_device(pdev);
3255 err_out:
3256         return rc;
3257 }
3258
3259 static void __devexit
3260 jme_remove_one(struct pci_dev *pdev)
3261 {
3262         struct net_device *netdev = pci_get_drvdata(pdev);
3263         struct jme_adapter *jme = netdev_priv(netdev);
3264
3265         unregister_netdev(netdev);
3266         iounmap(jme->regs);
3267         pci_set_drvdata(pdev, NULL);
3268         free_netdev(netdev);
3269         pci_release_regions(pdev);
3270         pci_disable_device(pdev);
3271
3272 }
3273
3274 static void
3275 jme_shutdown(struct pci_dev *pdev)
3276 {
3277         struct net_device *netdev = pci_get_drvdata(pdev);
3278         struct jme_adapter *jme = netdev_priv(netdev);
3279
3280         jme_powersave_phy(jme);
3281 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)
3282         pci_enable_wake(pdev, PCI_D3hot, true);
3283 #else
3284         pci_pme_active(pdev, true);
3285 #endif
3286 }
3287
3288 #ifdef CONFIG_PM
3289 static int
3290 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3291 {
3292         struct net_device *netdev = pci_get_drvdata(pdev);
3293         struct jme_adapter *jme = netdev_priv(netdev);
3294
3295         atomic_dec(&jme->link_changing);
3296
3297         netif_device_detach(netdev);
3298         netif_stop_queue(netdev);
3299         jme_stop_irq(jme);
3300
3301         tasklet_disable(&jme->txclean_task);
3302         tasklet_disable(&jme->rxclean_task);
3303         tasklet_disable(&jme->rxempty_task);
3304
3305         if (netif_carrier_ok(netdev)) {
3306                 if (test_bit(JME_FLAG_POLL, &jme->flags))
3307                         jme_polling_mode(jme);
3308
3309                 jme_stop_pcc_timer(jme);
3310                 jme_disable_rx_engine(jme);
3311                 jme_disable_tx_engine(jme);
3312                 jme_reset_mac_processor(jme);
3313                 jme_free_rx_resources(jme);
3314                 jme_free_tx_resources(jme);
3315                 netif_carrier_off(netdev);
3316                 jme->phylink = 0;
3317         }
3318
3319         tasklet_enable(&jme->txclean_task);
3320         tasklet_hi_enable(&jme->rxclean_task);
3321         tasklet_hi_enable(&jme->rxempty_task);
3322
3323         pci_save_state(pdev);
3324         jme_powersave_phy(jme);
3325         pci_enable_wake(pdev, PCI_D3hot, true);
3326         pci_set_power_state(pdev, PCI_D3hot);
3327
3328         return 0;
3329 }
3330
3331 static int
3332 jme_resume(struct pci_dev *pdev)
3333 {
3334         struct net_device *netdev = pci_get_drvdata(pdev);
3335         struct jme_adapter *jme = netdev_priv(netdev);
3336
3337         jme_clear_pm(jme);
3338         pci_restore_state(pdev);
3339
3340         jme_phy_on(jme);
3341         if (test_bit(JME_FLAG_SSET, &jme->flags))
3342                 jme_set_settings(netdev, &jme->old_ecmd);
3343         else
3344                 jme_reset_phy_processor(jme);
3345
3346         jme_start_irq(jme);
3347         netif_device_attach(netdev);
3348
3349         atomic_inc(&jme->link_changing);
3350
3351         jme_reset_link(jme);
3352
3353         return 0;
3354 }
3355 #endif
3356
3357 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3358 static struct pci_device_id jme_pci_tbl[] = {
3359 #else
3360 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3361 #endif
3362         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3363         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3364         { }
3365 };
3366
3367 static struct pci_driver jme_driver = {
3368         .name           = DRV_NAME,
3369         .id_table       = jme_pci_tbl,
3370         .probe          = jme_init_one,
3371         .remove         = __devexit_p(jme_remove_one),
3372 #ifdef CONFIG_PM
3373         .suspend        = jme_suspend,
3374         .resume         = jme_resume,
3375 #endif /* CONFIG_PM */
3376         .shutdown       = jme_shutdown,
3377 };
3378
3379 static int __init
3380 jme_init_module(void)
3381 {
3382         pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION);
3383         return pci_register_driver(&jme_driver);
3384 }
3385
3386 static void __exit
3387 jme_cleanup_module(void)
3388 {
3389         pci_unregister_driver(&jme_driver);
3390 }
3391
3392 module_init(jme_init_module);
3393 module_exit(jme_cleanup_module);
3394
3395 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3396 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3397 MODULE_LICENSE("GPL");
3398 MODULE_VERSION(DRV_VERSION);
3399 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3400