2 * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
4 * Copyright 2008 JMicron Technology Corporation
5 * http://www.jmicron.com/
7 * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/pci.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/ethtool.h>
30 #include <linux/mii.h>
31 #include <linux/crc32.h>
32 #include <linux/delay.h>
33 #include <linux/spinlock.h>
36 #include <linux/ipv6.h>
37 #include <linux/tcp.h>
38 #include <linux/udp.h>
39 #include <linux/if_vlan.h>
40 #include <linux/slab.h>
41 #include <net/ip6_checksum.h>
44 static int force_pseudohp = -1;
45 static int no_pseudohp = -1;
46 static int no_extplug = -1;
47 module_param(force_pseudohp, int, 0);
48 MODULE_PARM_DESC(force_pseudohp,
49 "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
50 module_param(no_pseudohp, int, 0);
51 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
52 module_param(no_extplug, int, 0);
53 MODULE_PARM_DESC(no_extplug,
54 "Do not use external plug signal for pseudo hot-plug.");
57 jme_mdio_read(struct net_device *netdev, int phy, int reg)
59 struct jme_adapter *jme = netdev_priv(netdev);
60 int i, val, again = (reg == MII_BMSR) ? 1 : 0;
63 jwrite32(jme, JME_SMI, SMI_OP_REQ |
68 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
70 val = jread32(jme, JME_SMI);
71 if ((val & SMI_OP_REQ) == 0)
76 jeprintk(jme->pdev, "phy(%d) read timeout : %d\n", phy, reg);
83 return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
87 jme_mdio_write(struct net_device *netdev,
88 int phy, int reg, int val)
90 struct jme_adapter *jme = netdev_priv(netdev);
93 jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
94 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
95 smi_phy_addr(phy) | smi_reg_addr(reg));
98 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
100 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
105 jeprintk(jme->pdev, "phy(%d) write timeout : %d\n", phy, reg);
109 jme_reset_phy_processor(struct jme_adapter *jme)
113 jme_mdio_write(jme->dev,
115 MII_ADVERTISE, ADVERTISE_ALL |
116 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
118 if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
119 jme_mdio_write(jme->dev,
122 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
124 val = jme_mdio_read(jme->dev,
128 jme_mdio_write(jme->dev,
130 MII_BMCR, val | BMCR_RESET);
134 jme_setup_wakeup_frame(struct jme_adapter *jme,
135 u32 *mask, u32 crc, int fnr)
142 jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
144 jwrite32(jme, JME_WFODP, crc);
150 for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
151 jwrite32(jme, JME_WFOI,
152 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
153 (fnr & WFOI_FRAME_SEL));
155 jwrite32(jme, JME_WFODP, mask[i]);
161 jme_reset_mac_processor(struct jme_adapter *jme)
163 u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
164 u32 crc = 0xCDCDCDCD;
168 jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
170 jwrite32(jme, JME_GHC, jme->reg_ghc);
172 jwrite32(jme, JME_RXDBA_LO, 0x00000000);
173 jwrite32(jme, JME_RXDBA_HI, 0x00000000);
174 jwrite32(jme, JME_RXQDC, 0x00000000);
175 jwrite32(jme, JME_RXNDA, 0x00000000);
176 jwrite32(jme, JME_TXDBA_LO, 0x00000000);
177 jwrite32(jme, JME_TXDBA_HI, 0x00000000);
178 jwrite32(jme, JME_TXQDC, 0x00000000);
179 jwrite32(jme, JME_TXNDA, 0x00000000);
181 jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
182 jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
183 for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
184 jme_setup_wakeup_frame(jme, mask, crc, i);
186 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
188 gpreg0 = GPREG0_DEFAULT;
189 jwrite32(jme, JME_GPREG0, gpreg0);
190 jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
194 jme_reset_ghc_speed(struct jme_adapter *jme)
196 jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX);
197 jwrite32(jme, JME_GHC, jme->reg_ghc);
201 jme_clear_pm(struct jme_adapter *jme)
203 jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
204 pci_set_power_state(jme->pdev, PCI_D0);
205 pci_enable_wake(jme->pdev, PCI_D0, false);
209 jme_reload_eeprom(struct jme_adapter *jme)
214 val = jread32(jme, JME_SMBCSR);
216 if (val & SMBCSR_EEPROMD) {
218 jwrite32(jme, JME_SMBCSR, val);
219 val |= SMBCSR_RELOAD;
220 jwrite32(jme, JME_SMBCSR, val);
223 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
225 if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
230 jeprintk(jme->pdev, "eeprom reload timeout\n");
239 jme_load_macaddr(struct net_device *netdev)
241 struct jme_adapter *jme = netdev_priv(netdev);
242 unsigned char macaddr[6];
245 spin_lock_bh(&jme->macaddr_lock);
246 val = jread32(jme, JME_RXUMA_LO);
247 macaddr[0] = (val >> 0) & 0xFF;
248 macaddr[1] = (val >> 8) & 0xFF;
249 macaddr[2] = (val >> 16) & 0xFF;
250 macaddr[3] = (val >> 24) & 0xFF;
251 val = jread32(jme, JME_RXUMA_HI);
252 macaddr[4] = (val >> 0) & 0xFF;
253 macaddr[5] = (val >> 8) & 0xFF;
254 memcpy(netdev->dev_addr, macaddr, 6);
255 spin_unlock_bh(&jme->macaddr_lock);
259 jme_set_rx_pcc(struct jme_adapter *jme, int p)
263 jwrite32(jme, JME_PCCRX0,
264 ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
265 ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
268 jwrite32(jme, JME_PCCRX0,
269 ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
270 ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
273 jwrite32(jme, JME_PCCRX0,
274 ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
275 ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
278 jwrite32(jme, JME_PCCRX0,
279 ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
280 ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
287 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
288 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
289 msg_rx_status(jme, "Switched to PCC_P%d\n", p);
291 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
296 jme_start_irq(struct jme_adapter *jme)
298 register struct dynpcc_info *dpi = &(jme->dpi);
300 jme_set_rx_pcc(jme, PCC_P1);
302 dpi->attempt = PCC_P1;
305 jwrite32(jme, JME_PCCTX,
306 ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
307 ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
314 jwrite32(jme, JME_IENS, INTR_ENABLE);
318 jme_stop_irq(struct jme_adapter *jme)
323 jwrite32f(jme, JME_IENC, INTR_ENABLE);
327 jme_linkstat_from_phy(struct jme_adapter *jme)
331 phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
332 bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
333 if (bmsr & BMSR_ANCOMP)
334 phylink |= PHY_LINK_AUTONEG_COMPLETE;
340 jme_set_phyfifoa(struct jme_adapter *jme)
342 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
346 jme_set_phyfifob(struct jme_adapter *jme)
348 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
352 jme_check_link(struct net_device *netdev, int testonly)
354 struct jme_adapter *jme = netdev_priv(netdev);
355 u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
362 phylink = jme_linkstat_from_phy(jme);
364 phylink = jread32(jme, JME_PHY_LINK);
366 if (phylink & PHY_LINK_UP) {
367 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
369 * If we did not enable AN
370 * Speed/Duplex Info should be obtained from SMI
372 phylink = PHY_LINK_UP;
374 bmcr = jme_mdio_read(jme->dev,
378 phylink |= ((bmcr & BMCR_SPEED1000) &&
379 (bmcr & BMCR_SPEED100) == 0) ?
380 PHY_LINK_SPEED_1000M :
381 (bmcr & BMCR_SPEED100) ?
382 PHY_LINK_SPEED_100M :
385 phylink |= (bmcr & BMCR_FULLDPLX) ?
388 strcat(linkmsg, "Forced: ");
391 * Keep polling for speed/duplex resolve complete
393 while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
399 phylink = jme_linkstat_from_phy(jme);
401 phylink = jread32(jme, JME_PHY_LINK);
405 "Waiting speed resolve timeout.\n");
407 strcat(linkmsg, "ANed: ");
410 if (jme->phylink == phylink) {
417 jme->phylink = phylink;
419 ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX |
420 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE |
421 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY);
422 switch (phylink & PHY_LINK_SPEED_MASK) {
423 case PHY_LINK_SPEED_10M:
424 ghc |= GHC_SPEED_10M |
425 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
426 strcat(linkmsg, "10 Mbps, ");
428 case PHY_LINK_SPEED_100M:
429 ghc |= GHC_SPEED_100M |
430 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
431 strcat(linkmsg, "100 Mbps, ");
433 case PHY_LINK_SPEED_1000M:
434 ghc |= GHC_SPEED_1000M |
435 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
436 strcat(linkmsg, "1000 Mbps, ");
442 if (phylink & PHY_LINK_DUPLEX) {
443 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
446 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
450 jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
451 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
453 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
456 gpreg1 = GPREG1_DEFAULT;
457 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
458 if (!(phylink & PHY_LINK_DUPLEX))
459 gpreg1 |= GPREG1_HALFMODEPATCH;
460 switch (phylink & PHY_LINK_SPEED_MASK) {
461 case PHY_LINK_SPEED_10M:
462 jme_set_phyfifoa(jme);
463 gpreg1 |= GPREG1_RSSPATCH;
465 case PHY_LINK_SPEED_100M:
466 jme_set_phyfifob(jme);
467 gpreg1 |= GPREG1_RSSPATCH;
469 case PHY_LINK_SPEED_1000M:
470 jme_set_phyfifoa(jme);
477 jwrite32(jme, JME_GPREG1, gpreg1);
478 jwrite32(jme, JME_GHC, ghc);
481 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
484 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
487 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
488 msg_link(jme, "Link is up at %s.\n", linkmsg);
490 netif_info(jme, link, jme->dev, "Link is up at %s.\n", linkmsg);
492 netif_carrier_on(netdev);
497 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
498 msg_link(jme, "Link is down.\n");
500 netif_info(jme, link, jme->dev, "Link is down.\n");
503 netif_carrier_off(netdev);
511 jme_setup_tx_resources(struct jme_adapter *jme)
513 struct jme_ring *txring = &(jme->txring[0]);
515 txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
516 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
526 txring->desc = (void *)ALIGN((unsigned long)(txring->alloc),
528 txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
529 txring->next_to_use = 0;
530 atomic_set(&txring->next_to_clean, 0);
531 atomic_set(&txring->nr_free, jme->tx_ring_size);
533 txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
534 jme->tx_ring_size, GFP_ATOMIC);
535 if (unlikely(!(txring->bufinf)))
536 goto err_free_txring;
539 * Initialize Transmit Descriptors
541 memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
542 memset(txring->bufinf, 0,
543 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
548 dma_free_coherent(&(jme->pdev->dev),
549 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
555 txring->dmaalloc = 0;
557 txring->bufinf = NULL;
563 jme_free_tx_resources(struct jme_adapter *jme)
566 struct jme_ring *txring = &(jme->txring[0]);
567 struct jme_buffer_info *txbi;
570 if (txring->bufinf) {
571 for (i = 0 ; i < jme->tx_ring_size ; ++i) {
572 txbi = txring->bufinf + i;
574 dev_kfree_skb(txbi->skb);
580 txbi->start_xmit = 0;
582 kfree(txring->bufinf);
585 dma_free_coherent(&(jme->pdev->dev),
586 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
590 txring->alloc = NULL;
592 txring->dmaalloc = 0;
594 txring->bufinf = NULL;
596 txring->next_to_use = 0;
597 atomic_set(&txring->next_to_clean, 0);
598 atomic_set(&txring->nr_free, 0);
602 jme_enable_tx_engine(struct jme_adapter *jme)
607 jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
611 * Setup TX Queue 0 DMA Bass Address
613 jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
614 jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
615 jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
618 * Setup TX Descptor Count
620 jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
626 jwrite32(jme, JME_TXCS, jme->reg_txcs |
633 jme_restart_tx_engine(struct jme_adapter *jme)
638 jwrite32(jme, JME_TXCS, jme->reg_txcs |
644 jme_disable_tx_engine(struct jme_adapter *jme)
652 jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
655 val = jread32(jme, JME_TXCS);
656 for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
658 val = jread32(jme, JME_TXCS);
663 jeprintk(jme->pdev, "Disable TX engine timeout.\n");
667 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
669 struct jme_ring *rxring = &(jme->rxring[0]);
670 register struct rxdesc *rxdesc = rxring->desc;
671 struct jme_buffer_info *rxbi = rxring->bufinf;
677 rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32);
678 rxdesc->desc1.bufaddrl = cpu_to_le32(
679 (__u64)rxbi->mapping & 0xFFFFFFFFUL);
680 rxdesc->desc1.datalen = cpu_to_le16(rxbi->len);
681 if (jme->dev->features & NETIF_F_HIGHDMA)
682 rxdesc->desc1.flags = RXFLAG_64BIT;
684 rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT;
688 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
690 struct jme_ring *rxring = &(jme->rxring[0]);
691 struct jme_buffer_info *rxbi = rxring->bufinf + i;
694 skb = netdev_alloc_skb(jme->dev,
695 jme->dev->mtu + RX_EXTRA_LEN);
698 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
703 rxbi->len = skb_tailroom(skb);
704 rxbi->mapping = pci_map_page(jme->pdev,
705 virt_to_page(skb->data),
706 offset_in_page(skb->data),
714 jme_free_rx_buf(struct jme_adapter *jme, int i)
716 struct jme_ring *rxring = &(jme->rxring[0]);
717 struct jme_buffer_info *rxbi = rxring->bufinf;
721 pci_unmap_page(jme->pdev,
725 dev_kfree_skb(rxbi->skb);
733 jme_free_rx_resources(struct jme_adapter *jme)
736 struct jme_ring *rxring = &(jme->rxring[0]);
739 if (rxring->bufinf) {
740 for (i = 0 ; i < jme->rx_ring_size ; ++i)
741 jme_free_rx_buf(jme, i);
742 kfree(rxring->bufinf);
745 dma_free_coherent(&(jme->pdev->dev),
746 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
749 rxring->alloc = NULL;
751 rxring->dmaalloc = 0;
753 rxring->bufinf = NULL;
755 rxring->next_to_use = 0;
756 atomic_set(&rxring->next_to_clean, 0);
760 jme_setup_rx_resources(struct jme_adapter *jme)
763 struct jme_ring *rxring = &(jme->rxring[0]);
765 rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
766 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
775 rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc),
777 rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
778 rxring->next_to_use = 0;
779 atomic_set(&rxring->next_to_clean, 0);
781 rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
782 jme->rx_ring_size, GFP_ATOMIC);
783 if (unlikely(!(rxring->bufinf)))
784 goto err_free_rxring;
787 * Initiallize Receive Descriptors
789 memset(rxring->bufinf, 0,
790 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
791 for (i = 0 ; i < jme->rx_ring_size ; ++i) {
792 if (unlikely(jme_make_new_rx_buf(jme, i))) {
793 jme_free_rx_resources(jme);
797 jme_set_clean_rxdesc(jme, i);
803 dma_free_coherent(&(jme->pdev->dev),
804 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
809 rxring->dmaalloc = 0;
811 rxring->bufinf = NULL;
817 jme_enable_rx_engine(struct jme_adapter *jme)
822 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
827 * Setup RX DMA Bass Address
829 jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
830 jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
831 jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
834 * Setup RX Descriptor Count
836 jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
839 * Setup Unicast Filter
841 jme_set_multi(jme->dev);
847 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
854 jme_restart_rx_engine(struct jme_adapter *jme)
859 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
866 jme_disable_rx_engine(struct jme_adapter *jme)
874 jwrite32(jme, JME_RXCS, jme->reg_rxcs);
877 val = jread32(jme, JME_RXCS);
878 for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
880 val = jread32(jme, JME_RXCS);
885 jeprintk(jme->pdev, "Disable RX engine timeout.\n");
890 jme_rxsum_ok(struct jme_adapter *jme, u16 flags)
892 if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
895 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
896 == RXWBFLAG_TCPON)) {
897 if (flags & RXWBFLAG_IPV4)
898 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
899 msg_rx_err(jme, "TCP Checksum error\n");
901 netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
906 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
907 == RXWBFLAG_UDPON)) {
908 if (flags & RXWBFLAG_IPV4)
909 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
910 msg_rx_err(jme, "UDP Checksum error.\n");
912 netif_err(jme, rx_err, jme->dev, "UDP Checksum error.\n");
917 if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
919 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
920 msg_rx_err(jme, "IPv4 Checksum error.\n");
922 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error.\n");
931 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
933 struct jme_ring *rxring = &(jme->rxring[0]);
934 struct rxdesc *rxdesc = rxring->desc;
935 struct jme_buffer_info *rxbi = rxring->bufinf;
943 pci_dma_sync_single_for_cpu(jme->pdev,
948 if (unlikely(jme_make_new_rx_buf(jme, idx))) {
949 pci_dma_sync_single_for_device(jme->pdev,
954 ++(NET_STAT(jme).rx_dropped);
956 framesize = le16_to_cpu(rxdesc->descwb.framesize)
959 skb_reserve(skb, RX_PREPAD_SIZE);
960 skb_put(skb, framesize);
961 skb->protocol = eth_type_trans(skb, jme->dev);
963 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags)))
964 skb->ip_summed = CHECKSUM_UNNECESSARY;
966 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35)
967 skb->ip_summed = CHECKSUM_NONE;
969 skb_checksum_none_assert(skb);
972 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
974 jme->jme_vlan_rx(skb, jme->vlgrp,
975 le16_to_cpu(rxdesc->descwb.vlan));
976 NET_STAT(jme).rx_bytes += 4;
984 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
985 cpu_to_le16(RXWBFLAG_DEST_MUL))
986 ++(NET_STAT(jme).multicast);
988 NET_STAT(jme).rx_bytes += framesize;
989 ++(NET_STAT(jme).rx_packets);
992 jme_set_clean_rxdesc(jme, idx);
997 jme_process_receive(struct jme_adapter *jme, int limit)
999 struct jme_ring *rxring = &(jme->rxring[0]);
1000 struct rxdesc *rxdesc = rxring->desc;
1001 int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1003 if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1006 if (unlikely(atomic_read(&jme->link_changing) != 1))
1009 if (unlikely(!netif_carrier_ok(jme->dev)))
1012 i = atomic_read(&rxring->next_to_clean);
1014 rxdesc = rxring->desc;
1017 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1018 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1022 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1024 if (unlikely(desccnt > 1 ||
1025 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1027 if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1028 ++(NET_STAT(jme).rx_crc_errors);
1029 else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1030 ++(NET_STAT(jme).rx_fifo_errors);
1032 ++(NET_STAT(jme).rx_errors);
1035 limit -= desccnt - 1;
1037 for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1038 jme_set_clean_rxdesc(jme, j);
1039 j = (j + 1) & (mask);
1043 jme_alloc_and_feed_skb(jme, i);
1046 i = (i + desccnt) & (mask);
1050 atomic_set(&rxring->next_to_clean, i);
1053 atomic_inc(&jme->rx_cleaning);
1055 return limit > 0 ? limit : 0;
1060 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1062 if (likely(atmp == dpi->cur)) {
1067 if (dpi->attempt == atmp) {
1070 dpi->attempt = atmp;
1077 jme_dynamic_pcc(struct jme_adapter *jme)
1079 register struct dynpcc_info *dpi = &(jme->dpi);
1081 if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1082 jme_attempt_pcc(dpi, PCC_P3);
1083 else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1084 dpi->intr_cnt > PCC_INTR_THRESHOLD)
1085 jme_attempt_pcc(dpi, PCC_P2);
1087 jme_attempt_pcc(dpi, PCC_P1);
1089 if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1090 if (dpi->attempt < dpi->cur)
1091 tasklet_schedule(&jme->rxclean_task);
1092 jme_set_rx_pcc(jme, dpi->attempt);
1093 dpi->cur = dpi->attempt;
1099 jme_start_pcc_timer(struct jme_adapter *jme)
1101 struct dynpcc_info *dpi = &(jme->dpi);
1102 dpi->last_bytes = NET_STAT(jme).rx_bytes;
1103 dpi->last_pkts = NET_STAT(jme).rx_packets;
1105 jwrite32(jme, JME_TMCSR,
1106 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1110 jme_stop_pcc_timer(struct jme_adapter *jme)
1112 jwrite32(jme, JME_TMCSR, 0);
1116 jme_shutdown_nic(struct jme_adapter *jme)
1120 phylink = jme_linkstat_from_phy(jme);
1122 if (!(phylink & PHY_LINK_UP)) {
1124 * Disable all interrupt before issue timer
1127 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1132 jme_pcc_tasklet(unsigned long arg)
1134 struct jme_adapter *jme = (struct jme_adapter *)arg;
1135 struct net_device *netdev = jme->dev;
1137 if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1138 jme_shutdown_nic(jme);
1142 if (unlikely(!netif_carrier_ok(netdev) ||
1143 (atomic_read(&jme->link_changing) != 1)
1145 jme_stop_pcc_timer(jme);
1149 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1150 jme_dynamic_pcc(jme);
1152 jme_start_pcc_timer(jme);
1156 jme_polling_mode(struct jme_adapter *jme)
1158 jme_set_rx_pcc(jme, PCC_OFF);
1162 jme_interrupt_mode(struct jme_adapter *jme)
1164 jme_set_rx_pcc(jme, PCC_P1);
1168 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1171 apmc = jread32(jme, JME_APMC);
1172 return apmc & JME_APMC_PSEUDO_HP_EN;
1176 jme_start_shutdown_timer(struct jme_adapter *jme)
1180 apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1181 apmc &= ~JME_APMC_EPIEN_CTRL;
1183 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1186 jwrite32f(jme, JME_APMC, apmc);
1188 jwrite32f(jme, JME_TIMER2, 0);
1189 set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1190 jwrite32(jme, JME_TMCSR,
1191 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1195 jme_stop_shutdown_timer(struct jme_adapter *jme)
1199 jwrite32f(jme, JME_TMCSR, 0);
1200 jwrite32f(jme, JME_TIMER2, 0);
1201 clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1203 apmc = jread32(jme, JME_APMC);
1204 apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1205 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1207 jwrite32f(jme, JME_APMC, apmc);
1211 jme_link_change_tasklet(unsigned long arg)
1213 struct jme_adapter *jme = (struct jme_adapter *)arg;
1214 struct net_device *netdev = jme->dev;
1217 while (!atomic_dec_and_test(&jme->link_changing)) {
1218 atomic_inc(&jme->link_changing);
1219 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1220 msg_intr(jme, "Get link change lock failed.\n");
1222 netif_info(jme, intr, jme->dev, "Get link change lock failed.\n");
1224 while (atomic_read(&jme->link_changing) != 1)
1225 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1226 msg_intr(jme, "Waiting link change lock.\n");
1228 netif_info(jme, intr, jme->dev, "Waiting link change lock.\n");
1232 if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1235 jme->old_mtu = netdev->mtu;
1236 netif_stop_queue(netdev);
1237 if (jme_pseudo_hotplug_enabled(jme))
1238 jme_stop_shutdown_timer(jme);
1240 jme_stop_pcc_timer(jme);
1241 tasklet_disable(&jme->txclean_task);
1242 tasklet_disable(&jme->rxclean_task);
1243 tasklet_disable(&jme->rxempty_task);
1245 if (netif_carrier_ok(netdev)) {
1246 jme_reset_ghc_speed(jme);
1247 jme_disable_rx_engine(jme);
1248 jme_disable_tx_engine(jme);
1249 jme_reset_mac_processor(jme);
1250 jme_free_rx_resources(jme);
1251 jme_free_tx_resources(jme);
1253 if (test_bit(JME_FLAG_POLL, &jme->flags))
1254 jme_polling_mode(jme);
1256 netif_carrier_off(netdev);
1259 jme_check_link(netdev, 0);
1260 if (netif_carrier_ok(netdev)) {
1261 rc = jme_setup_rx_resources(jme);
1263 jeprintk(jme->pdev, "Allocating resources for RX error"
1264 ", Device STOPPED!\n");
1265 goto out_enable_tasklet;
1268 rc = jme_setup_tx_resources(jme);
1270 jeprintk(jme->pdev, "Allocating resources for TX error"
1271 ", Device STOPPED!\n");
1272 goto err_out_free_rx_resources;
1275 jme_enable_rx_engine(jme);
1276 jme_enable_tx_engine(jme);
1278 netif_start_queue(netdev);
1280 if (test_bit(JME_FLAG_POLL, &jme->flags))
1281 jme_interrupt_mode(jme);
1283 jme_start_pcc_timer(jme);
1284 } else if (jme_pseudo_hotplug_enabled(jme)) {
1285 jme_start_shutdown_timer(jme);
1288 goto out_enable_tasklet;
1290 err_out_free_rx_resources:
1291 jme_free_rx_resources(jme);
1293 tasklet_enable(&jme->txclean_task);
1294 tasklet_hi_enable(&jme->rxclean_task);
1295 tasklet_hi_enable(&jme->rxempty_task);
1297 atomic_inc(&jme->link_changing);
1301 jme_rx_clean_tasklet(unsigned long arg)
1303 struct jme_adapter *jme = (struct jme_adapter *)arg;
1304 struct dynpcc_info *dpi = &(jme->dpi);
1306 jme_process_receive(jme, jme->rx_ring_size);
1312 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1314 struct jme_adapter *jme = jme_napi_priv(holder);
1318 rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1320 while (atomic_read(&jme->rx_empty) > 0) {
1321 atomic_dec(&jme->rx_empty);
1322 ++(NET_STAT(jme).rx_dropped);
1323 jme_restart_rx_engine(jme);
1325 atomic_inc(&jme->rx_empty);
1328 JME_RX_COMPLETE(netdev, holder);
1329 jme_interrupt_mode(jme);
1332 JME_NAPI_WEIGHT_SET(budget, rest);
1333 return JME_NAPI_WEIGHT_VAL(budget) - rest;
1337 jme_rx_empty_tasklet(unsigned long arg)
1339 struct jme_adapter *jme = (struct jme_adapter *)arg;
1341 if (unlikely(atomic_read(&jme->link_changing) != 1))
1344 if (unlikely(!netif_carrier_ok(jme->dev)))
1347 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1348 msg_rx_status(jme, "RX Queue Full!\n");
1350 netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1353 jme_rx_clean_tasklet(arg);
1355 while (atomic_read(&jme->rx_empty) > 0) {
1356 atomic_dec(&jme->rx_empty);
1357 ++(NET_STAT(jme).rx_dropped);
1358 jme_restart_rx_engine(jme);
1360 atomic_inc(&jme->rx_empty);
1364 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1366 struct jme_ring *txring = &(jme->txring[0]);
1369 if (unlikely(netif_queue_stopped(jme->dev) &&
1370 atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1371 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1372 msg_tx_done(jme, "TX Queue Waked.\n");
1374 netif_info(jme, tx_done, jme->dev, "TX Queue Waked.\n");
1376 netif_wake_queue(jme->dev);
1382 jme_tx_clean_tasklet(unsigned long arg)
1384 struct jme_adapter *jme = (struct jme_adapter *)arg;
1385 struct jme_ring *txring = &(jme->txring[0]);
1386 struct txdesc *txdesc = txring->desc;
1387 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1388 int i, j, cnt = 0, max, err, mask;
1390 tx_dbg(jme, "Into txclean.\n");
1392 if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1395 if (unlikely(atomic_read(&jme->link_changing) != 1))
1398 if (unlikely(!netif_carrier_ok(jme->dev)))
1401 max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1402 mask = jme->tx_ring_mask;
1404 for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1408 if (likely(ctxbi->skb &&
1409 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1411 tx_dbg(jme, "txclean: %d+%d@%lu\n",
1412 i, ctxbi->nr_desc, jiffies);
1414 err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1416 for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1417 ttxbi = txbi + ((i + j) & (mask));
1418 txdesc[(i + j) & (mask)].dw[0] = 0;
1420 pci_unmap_page(jme->pdev,
1429 dev_kfree_skb(ctxbi->skb);
1431 cnt += ctxbi->nr_desc;
1433 if (unlikely(err)) {
1434 ++(NET_STAT(jme).tx_carrier_errors);
1436 ++(NET_STAT(jme).tx_packets);
1437 NET_STAT(jme).tx_bytes += ctxbi->len;
1442 ctxbi->start_xmit = 0;
1448 i = (i + ctxbi->nr_desc) & mask;
1453 tx_dbg(jme, "txclean: done %d@%lu.\n", i, jiffies);
1454 atomic_set(&txring->next_to_clean, i);
1455 atomic_add(cnt, &txring->nr_free);
1457 jme_wake_queue_if_stopped(jme);
1460 atomic_inc(&jme->tx_cleaning);
1464 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1469 jwrite32f(jme, JME_IENC, INTR_ENABLE);
1471 if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1473 * Link change event is critical
1474 * all other events are ignored
1476 jwrite32(jme, JME_IEVE, intrstat);
1477 tasklet_schedule(&jme->linkch_task);
1481 if (intrstat & INTR_TMINTR) {
1482 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1483 tasklet_schedule(&jme->pcc_task);
1486 if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1487 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1488 tasklet_schedule(&jme->txclean_task);
1491 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1492 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1498 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1499 if (intrstat & INTR_RX0EMP)
1500 atomic_inc(&jme->rx_empty);
1502 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1503 if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1504 jme_polling_mode(jme);
1505 JME_RX_SCHEDULE(jme);
1509 if (intrstat & INTR_RX0EMP) {
1510 atomic_inc(&jme->rx_empty);
1511 tasklet_hi_schedule(&jme->rxempty_task);
1512 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1513 tasklet_hi_schedule(&jme->rxclean_task);
1519 * Re-enable interrupt
1521 jwrite32f(jme, JME_IENS, INTR_ENABLE);
1524 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1526 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1529 jme_intr(int irq, void *dev_id)
1532 struct net_device *netdev = dev_id;
1533 struct jme_adapter *jme = netdev_priv(netdev);
1536 intrstat = jread32(jme, JME_IEVE);
1539 * Check if it's really an interrupt for us
1541 if (unlikely((intrstat & INTR_ENABLE) == 0))
1545 * Check if the device still exist
1547 if (unlikely(intrstat == ~((typeof(intrstat))0)))
1550 jme_intr_msi(jme, intrstat);
1555 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1557 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1560 jme_msi(int irq, void *dev_id)
1563 struct net_device *netdev = dev_id;
1564 struct jme_adapter *jme = netdev_priv(netdev);
1567 intrstat = jread32(jme, JME_IEVE);
1569 jme_intr_msi(jme, intrstat);
1575 jme_reset_link(struct jme_adapter *jme)
1577 jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1581 jme_restart_an(struct jme_adapter *jme)
1585 spin_lock_bh(&jme->phy_lock);
1586 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1587 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1588 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1589 spin_unlock_bh(&jme->phy_lock);
1593 jme_request_irq(struct jme_adapter *jme)
1596 struct net_device *netdev = jme->dev;
1597 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1598 irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1599 int irq_flags = SA_SHIRQ;
1601 irq_handler_t handler = jme_intr;
1602 int irq_flags = IRQF_SHARED;
1605 if (!pci_enable_msi(jme->pdev)) {
1606 set_bit(JME_FLAG_MSI, &jme->flags);
1611 rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1615 "Unable to request %s interrupt (return: %d)\n",
1616 test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1619 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1620 pci_disable_msi(jme->pdev);
1621 clear_bit(JME_FLAG_MSI, &jme->flags);
1624 netdev->irq = jme->pdev->irq;
1631 jme_free_irq(struct jme_adapter *jme)
1633 free_irq(jme->pdev->irq, jme->dev);
1634 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1635 pci_disable_msi(jme->pdev);
1636 clear_bit(JME_FLAG_MSI, &jme->flags);
1637 jme->dev->irq = jme->pdev->irq;
1642 jme_open(struct net_device *netdev)
1644 struct jme_adapter *jme = netdev_priv(netdev);
1648 JME_NAPI_ENABLE(jme);
1650 tasklet_enable(&jme->linkch_task);
1651 tasklet_enable(&jme->txclean_task);
1652 tasklet_hi_enable(&jme->rxclean_task);
1653 tasklet_hi_enable(&jme->rxempty_task);
1655 rc = jme_request_irq(jme);
1661 if (test_bit(JME_FLAG_SSET, &jme->flags))
1662 jme_set_settings(netdev, &jme->old_ecmd);
1664 jme_reset_phy_processor(jme);
1666 jme_reset_link(jme);
1671 netif_stop_queue(netdev);
1672 netif_carrier_off(netdev);
1678 jme_set_100m_half(struct jme_adapter *jme)
1682 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1683 tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1684 BMCR_SPEED1000 | BMCR_FULLDPLX);
1685 tmp |= BMCR_SPEED100;
1688 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1691 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1693 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1696 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1698 jme_wait_link(struct jme_adapter *jme)
1700 u32 phylink, to = JME_WAIT_LINK_TIME;
1703 phylink = jme_linkstat_from_phy(jme);
1704 while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1706 phylink = jme_linkstat_from_phy(jme);
1712 jme_phy_off(struct jme_adapter *jme)
1714 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
1718 jme_close(struct net_device *netdev)
1720 struct jme_adapter *jme = netdev_priv(netdev);
1722 netif_stop_queue(netdev);
1723 netif_carrier_off(netdev);
1728 JME_NAPI_DISABLE(jme);
1730 tasklet_disable(&jme->linkch_task);
1731 tasklet_disable(&jme->txclean_task);
1732 tasklet_disable(&jme->rxclean_task);
1733 tasklet_disable(&jme->rxempty_task);
1735 jme_reset_ghc_speed(jme);
1736 jme_disable_rx_engine(jme);
1737 jme_disable_tx_engine(jme);
1738 jme_reset_mac_processor(jme);
1739 jme_free_rx_resources(jme);
1740 jme_free_tx_resources(jme);
1748 jme_alloc_txdesc(struct jme_adapter *jme,
1749 struct sk_buff *skb)
1751 struct jme_ring *txring = &(jme->txring[0]);
1752 int idx, nr_alloc, mask = jme->tx_ring_mask;
1754 idx = txring->next_to_use;
1755 nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1757 if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1760 atomic_sub(nr_alloc, &txring->nr_free);
1762 txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1768 jme_fill_tx_map(struct pci_dev *pdev,
1769 struct txdesc *txdesc,
1770 struct jme_buffer_info *txbi,
1778 dmaaddr = pci_map_page(pdev,
1784 pci_dma_sync_single_for_device(pdev,
1791 txdesc->desc2.flags = TXFLAG_OWN;
1792 txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0;
1793 txdesc->desc2.datalen = cpu_to_le16(len);
1794 txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32);
1795 txdesc->desc2.bufaddrl = cpu_to_le32(
1796 (__u64)dmaaddr & 0xFFFFFFFFUL);
1798 txbi->mapping = dmaaddr;
1803 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1805 struct jme_ring *txring = &(jme->txring[0]);
1806 struct txdesc *txdesc = txring->desc, *ctxdesc;
1807 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1808 u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1809 int i, nr_frags = skb_shinfo(skb)->nr_frags;
1810 int mask = jme->tx_ring_mask;
1811 struct skb_frag_struct *frag;
1814 for (i = 0 ; i < nr_frags ; ++i) {
1815 frag = &skb_shinfo(skb)->frags[i];
1816 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1817 ctxbi = txbi + ((idx + i + 2) & (mask));
1819 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1820 frag->page_offset, frag->size, hidma);
1823 len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1824 ctxdesc = txdesc + ((idx + 1) & (mask));
1825 ctxbi = txbi + ((idx + 1) & (mask));
1826 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1827 offset_in_page(skb->data), len, hidma);
1832 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1835 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1836 skb_shinfo(skb)->tso_size
1838 skb_shinfo(skb)->gso_size
1840 && skb_header_cloned(skb) &&
1841 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1850 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
1852 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1853 *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1855 *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1858 *flags |= TXFLAG_LSEN;
1860 if (skb->protocol == htons(ETH_P_IP)) {
1861 struct iphdr *iph = ip_hdr(skb);
1864 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1869 struct ipv6hdr *ip6h = ipv6_hdr(skb);
1871 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
1884 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
1886 #ifdef CHECKSUM_PARTIAL
1887 if (skb->ip_summed == CHECKSUM_PARTIAL)
1889 if (skb->ip_summed == CHECKSUM_HW)
1894 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1895 if (skb->protocol == htons(ETH_P_IP))
1896 ip_proto = ip_hdr(skb)->protocol;
1897 else if (skb->protocol == htons(ETH_P_IPV6))
1898 ip_proto = ipv6_hdr(skb)->nexthdr;
1902 switch (skb->protocol) {
1903 case htons(ETH_P_IP):
1904 ip_proto = ip_hdr(skb)->protocol;
1906 case htons(ETH_P_IPV6):
1907 ip_proto = ipv6_hdr(skb)->nexthdr;
1917 *flags |= TXFLAG_TCPCS;
1920 *flags |= TXFLAG_UDPCS;
1923 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1924 msg_tx_err(jme, "Error upper layer protocol.\n");
1926 netif_err(jme, tx_err, jme->dev, "Error upper layer protocol.\n");
1934 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
1936 if (vlan_tx_tag_present(skb)) {
1937 *flags |= TXFLAG_TAGON;
1938 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1943 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1945 struct jme_ring *txring = &(jme->txring[0]);
1946 struct txdesc *txdesc;
1947 struct jme_buffer_info *txbi;
1950 txdesc = (struct txdesc *)txring->desc + idx;
1951 txbi = txring->bufinf + idx;
1957 txdesc->desc1.pktsize = cpu_to_le16(skb->len);
1959 * Set OWN bit at final.
1960 * When kernel transmit faster than NIC.
1961 * And NIC trying to send this descriptor before we tell
1962 * it to start sending this TX queue.
1963 * Other fields are already filled correctly.
1966 flags = TXFLAG_OWN | TXFLAG_INT;
1968 * Set checksum flags while not tso
1970 if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
1971 jme_tx_csum(jme, skb, &flags);
1972 jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
1973 jme_map_tx_skb(jme, skb, idx);
1974 txdesc->desc1.flags = flags;
1976 * Set tx buffer info after telling NIC to send
1977 * For better tx_clean timing
1980 txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
1982 txbi->len = skb->len;
1983 txbi->start_xmit = jiffies;
1984 if (!txbi->start_xmit)
1985 txbi->start_xmit = (0UL-1);
1991 jme_stop_queue_if_full(struct jme_adapter *jme)
1993 struct jme_ring *txring = &(jme->txring[0]);
1994 struct jme_buffer_info *txbi = txring->bufinf;
1995 int idx = atomic_read(&txring->next_to_clean);
2000 if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2001 netif_stop_queue(jme->dev);
2002 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2003 msg_tx_queued(jme, "TX Queue Paused.\n");
2005 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused.\n");
2008 if (atomic_read(&txring->nr_free)
2009 >= (jme->tx_wake_threshold)) {
2010 netif_wake_queue(jme->dev);
2011 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2012 msg_tx_queued(jme, "TX Queue Fast Waked.\n");
2014 netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked.\n");
2019 if (unlikely(txbi->start_xmit &&
2020 (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2022 netif_stop_queue(jme->dev);
2023 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2024 msg_tx_queued(jme, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2026 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2032 * This function is already protected by netif_tx_lock()
2035 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2040 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2042 struct jme_adapter *jme = netdev_priv(netdev);
2045 if (unlikely(jme_expand_header(jme, skb))) {
2046 ++(NET_STAT(jme).tx_dropped);
2047 return NETDEV_TX_OK;
2050 idx = jme_alloc_txdesc(jme, skb);
2052 if (unlikely(idx < 0)) {
2053 netif_stop_queue(netdev);
2054 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2055 msg_tx_err(jme, "BUG! Tx ring full when queue awake!\n");
2057 netif_err(jme, tx_err, jme->dev, "BUG! Tx ring full when queue awake!\n");
2060 return NETDEV_TX_BUSY;
2063 jme_fill_tx_desc(jme, skb, idx);
2065 jwrite32(jme, JME_TXCS, jme->reg_txcs |
2066 TXCS_SELECT_QUEUE0 |
2069 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2070 netdev->trans_start = jiffies;
2073 tx_dbg(jme, "xmit: %d+%d@%lu\n", idx,
2074 skb_shinfo(skb)->nr_frags + 2,
2076 jme_stop_queue_if_full(jme);
2078 return NETDEV_TX_OK;
2082 jme_set_macaddr(struct net_device *netdev, void *p)
2084 struct jme_adapter *jme = netdev_priv(netdev);
2085 struct sockaddr *addr = p;
2088 if (netif_running(netdev))
2091 spin_lock_bh(&jme->macaddr_lock);
2092 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2094 val = (addr->sa_data[3] & 0xff) << 24 |
2095 (addr->sa_data[2] & 0xff) << 16 |
2096 (addr->sa_data[1] & 0xff) << 8 |
2097 (addr->sa_data[0] & 0xff);
2098 jwrite32(jme, JME_RXUMA_LO, val);
2099 val = (addr->sa_data[5] & 0xff) << 8 |
2100 (addr->sa_data[4] & 0xff);
2101 jwrite32(jme, JME_RXUMA_HI, val);
2102 spin_unlock_bh(&jme->macaddr_lock);
2108 jme_set_multi(struct net_device *netdev)
2110 struct jme_adapter *jme = netdev_priv(netdev);
2111 u32 mc_hash[2] = {};
2112 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2116 spin_lock_bh(&jme->rxmcs_lock);
2118 jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2120 if (netdev->flags & IFF_PROMISC) {
2121 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2122 } else if (netdev->flags & IFF_ALLMULTI) {
2123 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2124 } else if (netdev->flags & IFF_MULTICAST) {
2125 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2126 struct dev_mc_list *mclist;
2128 struct netdev_hw_addr *ha;
2132 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2133 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2134 for (i = 0, mclist = netdev->mc_list;
2135 mclist && i < netdev->mc_count;
2136 ++i, mclist = mclist->next) {
2137 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2138 netdev_for_each_mc_addr(mclist, netdev) {
2140 netdev_for_each_mc_addr(ha, netdev) {
2142 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2143 bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2145 bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2147 mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2150 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2151 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2155 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2157 spin_unlock_bh(&jme->rxmcs_lock);
2161 jme_change_mtu(struct net_device *netdev, int new_mtu)
2163 struct jme_adapter *jme = netdev_priv(netdev);
2165 if (new_mtu == jme->old_mtu)
2168 if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2169 ((new_mtu) < IPV6_MIN_MTU))
2172 if (new_mtu > 4000) {
2173 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2174 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2175 jme_restart_rx_engine(jme);
2177 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2178 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2179 jme_restart_rx_engine(jme);
2182 if (new_mtu > 1900) {
2183 netdev->features &= ~(NETIF_F_HW_CSUM |
2190 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2191 netdev->features |= NETIF_F_HW_CSUM;
2192 if (test_bit(JME_FLAG_TSO, &jme->flags))
2193 netdev->features |= NETIF_F_TSO
2200 netdev->mtu = new_mtu;
2201 jme_reset_link(jme);
2207 jme_tx_timeout(struct net_device *netdev)
2209 struct jme_adapter *jme = netdev_priv(netdev);
2212 jme_reset_phy_processor(jme);
2213 if (test_bit(JME_FLAG_SSET, &jme->flags))
2214 jme_set_settings(netdev, &jme->old_ecmd);
2217 * Force to Reset the link again
2219 jme_reset_link(jme);
2222 static inline void jme_pause_rx(struct jme_adapter *jme)
2224 atomic_dec(&jme->link_changing);
2226 jme_set_rx_pcc(jme, PCC_OFF);
2227 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2228 JME_NAPI_DISABLE(jme);
2230 tasklet_disable(&jme->rxclean_task);
2231 tasklet_disable(&jme->rxempty_task);
2235 static inline void jme_resume_rx(struct jme_adapter *jme)
2237 struct dynpcc_info *dpi = &(jme->dpi);
2239 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2240 JME_NAPI_ENABLE(jme);
2242 tasklet_hi_enable(&jme->rxclean_task);
2243 tasklet_hi_enable(&jme->rxempty_task);
2246 dpi->attempt = PCC_P1;
2248 jme_set_rx_pcc(jme, PCC_P1);
2250 atomic_inc(&jme->link_changing);
2254 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2256 struct jme_adapter *jme = netdev_priv(netdev);
2263 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2265 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2267 struct jme_adapter *jme = netdev_priv(netdev);
2271 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2272 jme->vlgrp->vlan_devices[vid] = NULL;
2274 vlan_group_set_device(jme->vlgrp, vid, NULL);
2282 jme_get_drvinfo(struct net_device *netdev,
2283 struct ethtool_drvinfo *info)
2285 struct jme_adapter *jme = netdev_priv(netdev);
2287 strcpy(info->driver, DRV_NAME);
2288 strcpy(info->version, DRV_VERSION);
2289 strcpy(info->bus_info, pci_name(jme->pdev));
2293 jme_get_regs_len(struct net_device *netdev)
2299 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2303 for (i = 0 ; i < len ; i += 4)
2304 p[i >> 2] = jread32(jme, reg + i);
2308 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2311 u16 *p16 = (u16 *)p;
2313 for (i = 0 ; i < reg_nr ; ++i)
2314 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2318 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2320 struct jme_adapter *jme = netdev_priv(netdev);
2321 u32 *p32 = (u32 *)p;
2323 memset(p, 0xFF, JME_REG_LEN);
2326 mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2329 mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2332 mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2335 mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2338 mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2342 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2344 struct jme_adapter *jme = netdev_priv(netdev);
2346 ecmd->tx_coalesce_usecs = PCC_TX_TO;
2347 ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2349 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2350 ecmd->use_adaptive_rx_coalesce = false;
2351 ecmd->rx_coalesce_usecs = 0;
2352 ecmd->rx_max_coalesced_frames = 0;
2356 ecmd->use_adaptive_rx_coalesce = true;
2358 switch (jme->dpi.cur) {
2360 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2361 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2364 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2365 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2368 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2369 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2379 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2381 struct jme_adapter *jme = netdev_priv(netdev);
2382 struct dynpcc_info *dpi = &(jme->dpi);
2384 if (netif_running(netdev))
2387 if (ecmd->use_adaptive_rx_coalesce &&
2388 test_bit(JME_FLAG_POLL, &jme->flags)) {
2389 clear_bit(JME_FLAG_POLL, &jme->flags);
2390 jme->jme_rx = netif_rx;
2391 jme->jme_vlan_rx = vlan_hwaccel_rx;
2393 dpi->attempt = PCC_P1;
2395 jme_set_rx_pcc(jme, PCC_P1);
2396 jme_interrupt_mode(jme);
2397 } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2398 !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2399 set_bit(JME_FLAG_POLL, &jme->flags);
2400 jme->jme_rx = netif_receive_skb;
2401 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2402 jme_interrupt_mode(jme);
2409 jme_get_pauseparam(struct net_device *netdev,
2410 struct ethtool_pauseparam *ecmd)
2412 struct jme_adapter *jme = netdev_priv(netdev);
2415 ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2416 ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2418 spin_lock_bh(&jme->phy_lock);
2419 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2420 spin_unlock_bh(&jme->phy_lock);
2423 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2427 jme_set_pauseparam(struct net_device *netdev,
2428 struct ethtool_pauseparam *ecmd)
2430 struct jme_adapter *jme = netdev_priv(netdev);
2433 if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2434 (ecmd->tx_pause != 0)) {
2437 jme->reg_txpfc |= TXPFC_PF_EN;
2439 jme->reg_txpfc &= ~TXPFC_PF_EN;
2441 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2444 spin_lock_bh(&jme->rxmcs_lock);
2445 if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2446 (ecmd->rx_pause != 0)) {
2449 jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2451 jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2453 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2455 spin_unlock_bh(&jme->rxmcs_lock);
2457 spin_lock_bh(&jme->phy_lock);
2458 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2459 if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2460 (ecmd->autoneg != 0)) {
2463 val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2465 val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2467 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2468 MII_ADVERTISE, val);
2470 spin_unlock_bh(&jme->phy_lock);
2476 jme_get_wol(struct net_device *netdev,
2477 struct ethtool_wolinfo *wol)
2479 struct jme_adapter *jme = netdev_priv(netdev);
2481 wol->supported = WAKE_MAGIC | WAKE_PHY;
2485 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2486 wol->wolopts |= WAKE_PHY;
2488 if (jme->reg_pmcs & PMCS_MFEN)
2489 wol->wolopts |= WAKE_MAGIC;
2494 jme_set_wol(struct net_device *netdev,
2495 struct ethtool_wolinfo *wol)
2497 struct jme_adapter *jme = netdev_priv(netdev);
2499 if (wol->wolopts & (WAKE_MAGICSECURE |
2508 if (wol->wolopts & WAKE_PHY)
2509 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2511 if (wol->wolopts & WAKE_MAGIC)
2512 jme->reg_pmcs |= PMCS_MFEN;
2514 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2520 jme_get_settings(struct net_device *netdev,
2521 struct ethtool_cmd *ecmd)
2523 struct jme_adapter *jme = netdev_priv(netdev);
2526 spin_lock_bh(&jme->phy_lock);
2527 rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2528 spin_unlock_bh(&jme->phy_lock);
2533 jme_set_settings(struct net_device *netdev,
2534 struct ethtool_cmd *ecmd)
2536 struct jme_adapter *jme = netdev_priv(netdev);
2539 if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2542 if (jme->mii_if.force_media &&
2543 ecmd->autoneg != AUTONEG_ENABLE &&
2544 (jme->mii_if.full_duplex != ecmd->duplex))
2547 spin_lock_bh(&jme->phy_lock);
2548 rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2549 spin_unlock_bh(&jme->phy_lock);
2552 jme_reset_link(jme);
2555 set_bit(JME_FLAG_SSET, &jme->flags);
2556 jme->old_ecmd = *ecmd;
2563 jme_get_link(struct net_device *netdev)
2565 struct jme_adapter *jme = netdev_priv(netdev);
2566 return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2570 jme_get_msglevel(struct net_device *netdev)
2572 struct jme_adapter *jme = netdev_priv(netdev);
2573 return jme->msg_enable;
2577 jme_set_msglevel(struct net_device *netdev, u32 value)
2579 struct jme_adapter *jme = netdev_priv(netdev);
2580 jme->msg_enable = value;
2584 jme_get_rx_csum(struct net_device *netdev)
2586 struct jme_adapter *jme = netdev_priv(netdev);
2587 return jme->reg_rxmcs & RXMCS_CHECKSUM;
2591 jme_set_rx_csum(struct net_device *netdev, u32 on)
2593 struct jme_adapter *jme = netdev_priv(netdev);
2595 spin_lock_bh(&jme->rxmcs_lock);
2597 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2599 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2600 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2601 spin_unlock_bh(&jme->rxmcs_lock);
2607 jme_set_tx_csum(struct net_device *netdev, u32 on)
2609 struct jme_adapter *jme = netdev_priv(netdev);
2612 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2613 if (netdev->mtu <= 1900)
2614 netdev->features |= NETIF_F_HW_CSUM;
2616 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2617 netdev->features &= ~NETIF_F_HW_CSUM;
2624 jme_set_tso(struct net_device *netdev, u32 on)
2626 struct jme_adapter *jme = netdev_priv(netdev);
2629 set_bit(JME_FLAG_TSO, &jme->flags);
2630 if (netdev->mtu <= 1900)
2631 netdev->features |= NETIF_F_TSO
2637 clear_bit(JME_FLAG_TSO, &jme->flags);
2638 netdev->features &= ~(NETIF_F_TSO
2649 jme_nway_reset(struct net_device *netdev)
2651 struct jme_adapter *jme = netdev_priv(netdev);
2652 jme_restart_an(jme);
2657 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2662 val = jread32(jme, JME_SMBCSR);
2663 to = JME_SMB_BUSY_TIMEOUT;
2664 while ((val & SMBCSR_BUSY) && --to) {
2666 val = jread32(jme, JME_SMBCSR);
2669 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2670 msg_hw(jme, "SMB Bus Busy.\n");
2672 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2677 jwrite32(jme, JME_SMBINTF,
2678 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2679 SMBINTF_HWRWN_READ |
2682 val = jread32(jme, JME_SMBINTF);
2683 to = JME_SMB_BUSY_TIMEOUT;
2684 while ((val & SMBINTF_HWCMD) && --to) {
2686 val = jread32(jme, JME_SMBINTF);
2689 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2690 msg_hw(jme, "SMB Bus Busy.\n");
2692 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2697 return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2701 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2706 val = jread32(jme, JME_SMBCSR);
2707 to = JME_SMB_BUSY_TIMEOUT;
2708 while ((val & SMBCSR_BUSY) && --to) {
2710 val = jread32(jme, JME_SMBCSR);
2713 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2714 msg_hw(jme, "SMB Bus Busy.\n");
2716 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2721 jwrite32(jme, JME_SMBINTF,
2722 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2723 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2724 SMBINTF_HWRWN_WRITE |
2727 val = jread32(jme, JME_SMBINTF);
2728 to = JME_SMB_BUSY_TIMEOUT;
2729 while ((val & SMBINTF_HWCMD) && --to) {
2731 val = jread32(jme, JME_SMBINTF);
2734 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2735 msg_hw(jme, "SMB Bus Busy.\n");
2737 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2746 jme_get_eeprom_len(struct net_device *netdev)
2748 struct jme_adapter *jme = netdev_priv(netdev);
2750 val = jread32(jme, JME_SMBCSR);
2751 return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2755 jme_get_eeprom(struct net_device *netdev,
2756 struct ethtool_eeprom *eeprom, u8 *data)
2758 struct jme_adapter *jme = netdev_priv(netdev);
2759 int i, offset = eeprom->offset, len = eeprom->len;
2762 * ethtool will check the boundary for us
2764 eeprom->magic = JME_EEPROM_MAGIC;
2765 for (i = 0 ; i < len ; ++i)
2766 data[i] = jme_smb_read(jme, i + offset);
2772 jme_set_eeprom(struct net_device *netdev,
2773 struct ethtool_eeprom *eeprom, u8 *data)
2775 struct jme_adapter *jme = netdev_priv(netdev);
2776 int i, offset = eeprom->offset, len = eeprom->len;
2778 if (eeprom->magic != JME_EEPROM_MAGIC)
2782 * ethtool will check the boundary for us
2784 for (i = 0 ; i < len ; ++i)
2785 jme_smb_write(jme, i + offset, data[i]);
2790 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2791 static struct ethtool_ops jme_ethtool_ops = {
2793 static const struct ethtool_ops jme_ethtool_ops = {
2795 .get_drvinfo = jme_get_drvinfo,
2796 .get_regs_len = jme_get_regs_len,
2797 .get_regs = jme_get_regs,
2798 .get_coalesce = jme_get_coalesce,
2799 .set_coalesce = jme_set_coalesce,
2800 .get_pauseparam = jme_get_pauseparam,
2801 .set_pauseparam = jme_set_pauseparam,
2802 .get_wol = jme_get_wol,
2803 .set_wol = jme_set_wol,
2804 .get_settings = jme_get_settings,
2805 .set_settings = jme_set_settings,
2806 .get_link = jme_get_link,
2807 .get_msglevel = jme_get_msglevel,
2808 .set_msglevel = jme_set_msglevel,
2809 .get_rx_csum = jme_get_rx_csum,
2810 .set_rx_csum = jme_set_rx_csum,
2811 .set_tx_csum = jme_set_tx_csum,
2812 .set_tso = jme_set_tso,
2813 .set_sg = ethtool_op_set_sg,
2814 .nway_reset = jme_nway_reset,
2815 .get_eeprom_len = jme_get_eeprom_len,
2816 .get_eeprom = jme_get_eeprom,
2817 .set_eeprom = jme_set_eeprom,
2821 jme_pci_dma64(struct pci_dev *pdev)
2823 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2824 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2825 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2827 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2830 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2831 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2833 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2837 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2838 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2839 !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2841 !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2844 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2845 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2847 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2851 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2852 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2853 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2855 if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2856 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
2864 jme_phy_init(struct jme_adapter *jme)
2868 reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2869 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2873 jme_check_hw_ver(struct jme_adapter *jme)
2877 chipmode = jread32(jme, JME_CHIPMODE);
2879 jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
2880 jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
2883 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2884 static const struct net_device_ops jme_netdev_ops = {
2885 .ndo_open = jme_open,
2886 .ndo_stop = jme_close,
2887 .ndo_validate_addr = eth_validate_addr,
2888 .ndo_start_xmit = jme_start_xmit,
2889 .ndo_set_mac_address = jme_set_macaddr,
2890 .ndo_set_multicast_list = jme_set_multi,
2891 .ndo_change_mtu = jme_change_mtu,
2892 .ndo_tx_timeout = jme_tx_timeout,
2893 .ndo_vlan_rx_register = jme_vlan_rx_register,
2897 static int __devinit
2898 jme_init_one(struct pci_dev *pdev,
2899 const struct pci_device_id *ent)
2901 int rc = 0, using_dac, i;
2902 struct net_device *netdev;
2903 struct jme_adapter *jme;
2908 * set up PCI device basics
2910 rc = pci_enable_device(pdev);
2912 jeprintk(pdev, "Cannot enable PCI device.\n");
2916 using_dac = jme_pci_dma64(pdev);
2917 if (using_dac < 0) {
2918 jeprintk(pdev, "Cannot set PCI DMA Mask.\n");
2920 goto err_out_disable_pdev;
2923 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2924 jeprintk(pdev, "No PCI resource region found.\n");
2926 goto err_out_disable_pdev;
2929 rc = pci_request_regions(pdev, DRV_NAME);
2931 jeprintk(pdev, "Cannot obtain PCI resource region.\n");
2932 goto err_out_disable_pdev;
2935 pci_set_master(pdev);
2938 * alloc and init net device
2940 netdev = alloc_etherdev(sizeof(*jme));
2942 jeprintk(pdev, "Cannot allocate netdev structure.\n");
2944 goto err_out_release_regions;
2946 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2947 netdev->netdev_ops = &jme_netdev_ops;
2949 netdev->open = jme_open;
2950 netdev->stop = jme_close;
2951 netdev->hard_start_xmit = jme_start_xmit;
2952 netdev->set_mac_address = jme_set_macaddr;
2953 netdev->set_multicast_list = jme_set_multi;
2954 netdev->change_mtu = jme_change_mtu;
2955 netdev->tx_timeout = jme_tx_timeout;
2956 netdev->vlan_rx_register = jme_vlan_rx_register;
2957 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2958 netdev->vlan_rx_kill_vid = jme_vlan_rx_kill_vid;
2960 NETDEV_GET_STATS(netdev, &jme_get_stats);
2962 netdev->ethtool_ops = &jme_ethtool_ops;
2963 netdev->watchdog_timeo = TX_TIMEOUT;
2964 netdev->features = NETIF_F_HW_CSUM |
2970 NETIF_F_HW_VLAN_TX |
2973 netdev->features |= NETIF_F_HIGHDMA;
2975 SET_NETDEV_DEV(netdev, &pdev->dev);
2976 pci_set_drvdata(pdev, netdev);
2981 jme = netdev_priv(netdev);
2984 jme->jme_rx = netif_rx;
2985 jme->jme_vlan_rx = vlan_hwaccel_rx;
2986 jme->old_mtu = netdev->mtu = 1500;
2988 jme->tx_ring_size = 1 << 10;
2989 jme->tx_ring_mask = jme->tx_ring_size - 1;
2990 jme->tx_wake_threshold = 1 << 9;
2991 jme->rx_ring_size = 1 << 9;
2992 jme->rx_ring_mask = jme->rx_ring_size - 1;
2993 jme->msg_enable = JME_DEF_MSG_ENABLE;
2994 jme->regs = ioremap(pci_resource_start(pdev, 0),
2995 pci_resource_len(pdev, 0));
2997 jeprintk(pdev, "Mapping PCI resource region error.\n");
2999 goto err_out_free_netdev;
3003 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
3004 jwrite32(jme, JME_APMC, apmc);
3005 } else if (force_pseudohp) {
3006 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
3007 jwrite32(jme, JME_APMC, apmc);
3010 NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3012 spin_lock_init(&jme->phy_lock);
3013 spin_lock_init(&jme->macaddr_lock);
3014 spin_lock_init(&jme->rxmcs_lock);
3016 atomic_set(&jme->link_changing, 1);
3017 atomic_set(&jme->rx_cleaning, 1);
3018 atomic_set(&jme->tx_cleaning, 1);
3019 atomic_set(&jme->rx_empty, 1);
3021 tasklet_init(&jme->pcc_task,
3023 (unsigned long) jme);
3024 tasklet_init(&jme->linkch_task,
3025 jme_link_change_tasklet,
3026 (unsigned long) jme);
3027 tasklet_init(&jme->txclean_task,
3028 jme_tx_clean_tasklet,
3029 (unsigned long) jme);
3030 tasklet_init(&jme->rxclean_task,
3031 jme_rx_clean_tasklet,
3032 (unsigned long) jme);
3033 tasklet_init(&jme->rxempty_task,
3034 jme_rx_empty_tasklet,
3035 (unsigned long) jme);
3036 tasklet_disable_nosync(&jme->linkch_task);
3037 tasklet_disable_nosync(&jme->txclean_task);
3038 tasklet_disable_nosync(&jme->rxclean_task);
3039 tasklet_disable_nosync(&jme->rxempty_task);
3040 jme->dpi.cur = PCC_P1;
3043 jme->reg_rxcs = RXCS_DEFAULT;
3044 jme->reg_rxmcs = RXMCS_DEFAULT;
3046 jme->reg_pmcs = PMCS_MFEN;
3047 set_bit(JME_FLAG_TXCSUM, &jme->flags);
3048 set_bit(JME_FLAG_TSO, &jme->flags);
3051 * Get Max Read Req Size from PCI Config Space
3053 pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3054 jme->mrrs &= PCI_DCSR_MRRS_MASK;
3055 switch (jme->mrrs) {
3057 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3060 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3063 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3068 * Must check before reset_mac_processor
3070 jme_check_hw_ver(jme);
3071 jme->mii_if.dev = netdev;
3073 jme->mii_if.phy_id = 0;
3074 for (i = 1 ; i < 32 ; ++i) {
3075 bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3076 bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3077 if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3078 jme->mii_if.phy_id = i;
3083 if (!jme->mii_if.phy_id) {
3085 jeprintk(pdev, "Can not find phy_id.\n");
3089 jme->reg_ghc |= GHC_LINK_POLL;
3091 jme->mii_if.phy_id = 1;
3093 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3094 jme->mii_if.supports_gmii = true;
3096 jme->mii_if.supports_gmii = false;
3097 jme->mii_if.mdio_read = jme_mdio_read;
3098 jme->mii_if.mdio_write = jme_mdio_write;
3101 jme_set_phyfifoa(jme);
3102 pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
3108 * Reset MAC processor and reload EEPROM for MAC Address
3110 jme_reset_mac_processor(jme);
3111 rc = jme_reload_eeprom(jme);
3114 "Reload eeprom for reading MAC Address error.\n");
3117 jme_load_macaddr(netdev);
3120 * Tell stack that we are not ready to work until open()
3122 netif_carrier_off(netdev);
3123 netif_stop_queue(netdev);
3128 rc = register_netdev(netdev);
3130 jeprintk(pdev, "Cannot register net device.\n");
3134 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
3135 msg_probe(jme, "%s%s ver:%x rev:%x "
3136 "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3137 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3138 "JMC250 Gigabit Ethernet" :
3139 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3140 "JMC260 Fast Ethernet" : "Unknown",
3141 (jme->fpgaver != 0) ? " (FPGA)" : "",
3142 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3144 netdev->dev_addr[0],
3145 netdev->dev_addr[1],
3146 netdev->dev_addr[2],
3147 netdev->dev_addr[3],
3148 netdev->dev_addr[4],
3149 netdev->dev_addr[5]);
3151 netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x macaddr:%pM\n",
3152 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3153 "JMC250 Gigabit Ethernet" :
3154 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3155 "JMC260 Fast Ethernet" : "Unknown",
3156 (jme->fpgaver != 0) ? " (FPGA)" : "",
3157 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3158 jme->rev, netdev->dev_addr);
3165 err_out_free_netdev:
3166 pci_set_drvdata(pdev, NULL);
3167 free_netdev(netdev);
3168 err_out_release_regions:
3169 pci_release_regions(pdev);
3170 err_out_disable_pdev:
3171 pci_disable_device(pdev);
3176 static void __devexit
3177 jme_remove_one(struct pci_dev *pdev)
3179 struct net_device *netdev = pci_get_drvdata(pdev);
3180 struct jme_adapter *jme = netdev_priv(netdev);
3182 unregister_netdev(netdev);
3184 pci_set_drvdata(pdev, NULL);
3185 free_netdev(netdev);
3186 pci_release_regions(pdev);
3187 pci_disable_device(pdev);
3193 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3195 struct net_device *netdev = pci_get_drvdata(pdev);
3196 struct jme_adapter *jme = netdev_priv(netdev);
3198 atomic_dec(&jme->link_changing);
3200 netif_device_detach(netdev);
3201 netif_stop_queue(netdev);
3204 tasklet_disable(&jme->txclean_task);
3205 tasklet_disable(&jme->rxclean_task);
3206 tasklet_disable(&jme->rxempty_task);
3208 if (netif_carrier_ok(netdev)) {
3209 if (test_bit(JME_FLAG_POLL, &jme->flags))
3210 jme_polling_mode(jme);
3212 jme_stop_pcc_timer(jme);
3213 jme_reset_ghc_speed(jme);
3214 jme_disable_rx_engine(jme);
3215 jme_disable_tx_engine(jme);
3216 jme_reset_mac_processor(jme);
3217 jme_free_rx_resources(jme);
3218 jme_free_tx_resources(jme);
3219 netif_carrier_off(netdev);
3223 tasklet_enable(&jme->txclean_task);
3224 tasklet_hi_enable(&jme->rxclean_task);
3225 tasklet_hi_enable(&jme->rxempty_task);
3227 pci_save_state(pdev);
3228 if (jme->reg_pmcs) {
3229 jme_set_100m_half(jme);
3231 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
3234 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
3236 pci_enable_wake(pdev, PCI_D3cold, true);
3240 pci_set_power_state(pdev, PCI_D3cold);
3246 jme_resume(struct pci_dev *pdev)
3248 struct net_device *netdev = pci_get_drvdata(pdev);
3249 struct jme_adapter *jme = netdev_priv(netdev);
3252 pci_restore_state(pdev);
3254 if (test_bit(JME_FLAG_SSET, &jme->flags))
3255 jme_set_settings(netdev, &jme->old_ecmd);
3257 jme_reset_phy_processor(jme);
3260 netif_device_attach(netdev);
3262 atomic_inc(&jme->link_changing);
3264 jme_reset_link(jme);
3270 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3271 static struct pci_device_id jme_pci_tbl[] = {
3273 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3275 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3276 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3280 static struct pci_driver jme_driver = {
3282 .id_table = jme_pci_tbl,
3283 .probe = jme_init_one,
3284 .remove = __devexit_p(jme_remove_one),
3286 .suspend = jme_suspend,
3287 .resume = jme_resume,
3288 #endif /* CONFIG_PM */
3292 jme_init_module(void)
3294 printk(KERN_INFO PFX "JMicron JMC2XX ethernet "
3295 "driver version %s\n", DRV_VERSION);
3296 return pci_register_driver(&jme_driver);
3300 jme_cleanup_module(void)
3302 pci_unregister_driver(&jme_driver);
3305 module_init(jme_init_module);
3306 module_exit(jme_cleanup_module);
3308 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3309 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3310 MODULE_LICENSE("GPL");
3311 MODULE_VERSION(DRV_VERSION);
3312 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);