jme.c

   1 /*
   2  * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
   3  *
   4  * Copyright 2008 JMicron Technology Corporation
   5  * http://www.jmicron.com/
   6  *
   7  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  */
  23
  24 #include <linux/version.h>
  25 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
  26 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  27 #endif
  28
  29 #include <linux/module.h>
  30 #include <linux/kernel.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/etherdevice.h>
  34 #include <linux/ethtool.h>
  35 #include <linux/mii.h>
  36 #include <linux/crc32.h>
  37 #include <linux/delay.h>
  38 #include <linux/spinlock.h>
  39 #include <linux/in.h>
  40 #include <linux/ip.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/tcp.h>
  43 #include <linux/udp.h>
  44 #include <linux/if_vlan.h>
  45 #include <linux/slab.h>
  46 #include <net/ip6_checksum.h>
  47 #include "jme.h"
  48
  49 static int force_pseudohp = -1;
  50 static int no_pseudohp = -1;
  51 static int no_extplug = -1;
  52 module_param(force_pseudohp, int, 0);
  53 MODULE_PARM_DESC(force_pseudohp,
  54         "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
  55 module_param(no_pseudohp, int, 0);
  56 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
  57 module_param(no_extplug, int, 0);
  58 MODULE_PARM_DESC(no_extplug,
  59         "Do not use external plug signal for pseudo hot-plug.");
  60
  61 static int
  62 jme_mdio_read(struct net_device *netdev, int phy, int reg)
  63 {
  64         struct jme_adapter *jme = netdev_priv(netdev);
  65         int i, val, again = (reg == MII_BMSR) ? 1 : 0;
  66
  67 read_again:
  68         jwrite32(jme, JME_SMI, SMI_OP_REQ |
  69                                 smi_phy_addr(phy) |
  70                                 smi_reg_addr(reg));
  71
  72         wmb();
  73         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
  74                 udelay(20);
  75                 val = jread32(jme, JME_SMI);
  76                 if ((val & SMI_OP_REQ) == 0)
  77                         break;
  78         }
  79
  80         if (i == 0) {
  81                 pr_err("phy(%d) read timeout : %d\n", phy, reg);
  82                 return 0;
  83         }
  84
  85         if (again--)
  86                 goto read_again;
  87
  88         return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
  89 }
  90
  91 static void
  92 jme_mdio_write(struct net_device *netdev,
  93                                 int phy, int reg, int val)
  94 {
  95         struct jme_adapter *jme = netdev_priv(netdev);
  96         int i;
  97
  98         jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
  99                 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
 100                 smi_phy_addr(phy) | smi_reg_addr(reg));
 101
 102         wmb();
 103         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
 104                 udelay(20);
 105                 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
 106                         break;
 107         }
 108
 109         if (i == 0)
 110                 pr_err("phy(%d) write timeout : %d\n", phy, reg);
 111 }
 112
 113 static inline void
 114 jme_reset_phy_processor(struct jme_adapter *jme)
 115 {
 116         u32 val;
 117
 118         jme_mdio_write(jme->dev,
 119                         jme->mii_if.phy_id,
 120                         MII_ADVERTISE, ADVERTISE_ALL |
 121                         ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 122
 123         if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
 124                 jme_mdio_write(jme->dev,
 125                                 jme->mii_if.phy_id,
 126                                 MII_CTRL1000,
 127                                 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 128
 129         val = jme_mdio_read(jme->dev,
 130                                 jme->mii_if.phy_id,
 131                                 MII_BMCR);
 132
 133         jme_mdio_write(jme->dev,
 134                         jme->mii_if.phy_id,
 135                         MII_BMCR, val | BMCR_RESET);
 136 }
 137
 138 static void
 139 jme_setup_wakeup_frame(struct jme_adapter *jme,
 140                 u32 *mask, u32 crc, int fnr)
 141 {
 142         int i;
 143
 144         /*
 145          * Setup CRC pattern
 146          */
 147         jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
 148         wmb();
 149         jwrite32(jme, JME_WFODP, crc);
 150         wmb();
 151
 152         /*
 153          * Setup Mask
 154          */
 155         for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
 156                 jwrite32(jme, JME_WFOI,
 157                                 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
 158                                 (fnr & WFOI_FRAME_SEL));
 159                 wmb();
 160                 jwrite32(jme, JME_WFODP, mask[i]);
 161                 wmb();
 162         }
 163 }
 164
 165 static inline void
 166 jme_reset_mac_processor(struct jme_adapter *jme)
 167 {
 168         u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
 169         u32 crc = 0xCDCDCDCD;
 170         u32 gpreg0;
 171         int i;
 172
 173         jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
 174         udelay(2);
 175         jwrite32(jme, JME_GHC, jme->reg_ghc);
 176
 177         jwrite32(jme, JME_RXDBA_LO, 0x00000000);
 178         jwrite32(jme, JME_RXDBA_HI, 0x00000000);
 179         jwrite32(jme, JME_RXQDC, 0x00000000);
 180         jwrite32(jme, JME_RXNDA, 0x00000000);
 181         jwrite32(jme, JME_TXDBA_LO, 0x00000000);
 182         jwrite32(jme, JME_TXDBA_HI, 0x00000000);
 183         jwrite32(jme, JME_TXQDC, 0x00000000);
 184         jwrite32(jme, JME_TXNDA, 0x00000000);
 185
 186         jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
 187         jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
 188         for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
 189                 jme_setup_wakeup_frame(jme, mask, crc, i);
 190         if (jme->fpgaver)
 191                 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
 192         else
 193                 gpreg0 = GPREG0_DEFAULT;
 194         jwrite32(jme, JME_GPREG0, gpreg0);
 195         jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
 196 }
 197
 198 static inline void
 199 jme_reset_ghc_speed(struct jme_adapter *jme)
 200 {
 201         jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX);
 202         jwrite32(jme, JME_GHC, jme->reg_ghc);
 203 }
 204
 205 static inline void
 206 jme_clear_pm(struct jme_adapter *jme)
 207 {
 208         jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
 209         pci_set_power_state(jme->pdev, PCI_D0);
 210         pci_enable_wake(jme->pdev, PCI_D0, false);
 211 }
 212
 213 static int
 214 jme_reload_eeprom(struct jme_adapter *jme)
 215 {
 216         u32 val;
 217         int i;
 218
 219         val = jread32(jme, JME_SMBCSR);
 220
 221         if (val & SMBCSR_EEPROMD) {
 222                 val |= SMBCSR_CNACK;
 223                 jwrite32(jme, JME_SMBCSR, val);
 224                 val |= SMBCSR_RELOAD;
 225                 jwrite32(jme, JME_SMBCSR, val);
 226                 mdelay(12);
 227
 228                 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
 229                         mdelay(1);
 230                         if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
 231                                 break;
 232                 }
 233
 234                 if (i == 0) {
 235                         pr_err("eeprom reload timeout\n");
 236                         return -EIO;
 237                 }
 238         }
 239
 240         return 0;
 241 }
 242
 243 static void
 244 jme_load_macaddr(struct net_device *netdev)
 245 {
 246         struct jme_adapter *jme = netdev_priv(netdev);
 247         unsigned char macaddr[6];
 248         u32 val;
 249
 250         spin_lock_bh(&jme->macaddr_lock);
 251         val = jread32(jme, JME_RXUMA_LO);
 252         macaddr[0] = (val >>  0) & 0xFF;
 253         macaddr[1] = (val >>  8) & 0xFF;
 254         macaddr[2] = (val >> 16) & 0xFF;
 255         macaddr[3] = (val >> 24) & 0xFF;
 256         val = jread32(jme, JME_RXUMA_HI);
 257         macaddr[4] = (val >>  0) & 0xFF;
 258         macaddr[5] = (val >>  8) & 0xFF;
 259         memcpy(netdev->dev_addr, macaddr, 6);
 260         spin_unlock_bh(&jme->macaddr_lock);
 261 }
 262
 263 static inline void
 264 jme_set_rx_pcc(struct jme_adapter *jme, int p)
 265 {
 266         switch (p) {
 267         case PCC_OFF:
 268                 jwrite32(jme, JME_PCCRX0,
 269                         ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 270                         ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 271                 break;
 272         case PCC_P1:
 273                 jwrite32(jme, JME_PCCRX0,
 274                         ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 275                         ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 276                 break;
 277         case PCC_P2:
 278                 jwrite32(jme, JME_PCCRX0,
 279                         ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 280                         ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 281                 break;
 282         case PCC_P3:
 283                 jwrite32(jme, JME_PCCRX0,
 284                         ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 285                         ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 286                 break;
 287         default:
 288                 break;
 289         }
 290         wmb();
 291
 292         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
 293                 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
 294 }
 295
 296 static void
 297 jme_start_irq(struct jme_adapter *jme)
 298 {
 299         register struct dynpcc_info *dpi = &(jme->dpi);
 300
 301         jme_set_rx_pcc(jme, PCC_P1);
 302         dpi->cur                = PCC_P1;
 303         dpi->attempt            = PCC_P1;
 304         dpi->cnt                = 0;
 305
 306         jwrite32(jme, JME_PCCTX,
 307                         ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
 308                         ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
 309                         PCCTXQ0_EN
 310                 );
 311
 312         /*
 313          * Enable Interrupts
 314          */
 315         jwrite32(jme, JME_IENS, INTR_ENABLE);
 316 }
 317
 318 static inline void
 319 jme_stop_irq(struct jme_adapter *jme)
 320 {
 321         /*
 322          * Disable Interrupts
 323          */
 324         jwrite32f(jme, JME_IENC, INTR_ENABLE);
 325 }
 326
 327 static u32
 328 jme_linkstat_from_phy(struct jme_adapter *jme)
 329 {
 330         u32 phylink, bmsr;
 331
 332         phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
 333         bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
 334         if (bmsr & BMSR_ANCOMP)
 335                 phylink |= PHY_LINK_AUTONEG_COMPLETE;
 336
 337         return phylink;
 338 }
 339
 340 static inline void
 341 jme_set_phyfifoa(struct jme_adapter *jme)
 342 {
 343         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
 344 }
 345
 346 static inline void
 347 jme_set_phyfifob(struct jme_adapter *jme)
 348 {
 349         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
 350 }
 351
 352 static int
 353 jme_check_link(struct net_device *netdev, int testonly)
 354 {
 355         struct jme_adapter *jme = netdev_priv(netdev);
 356         u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
 357         char linkmsg[64];
 358         int rc = 0;
 359
 360         linkmsg[0] = '\0';
 361
 362         if (jme->fpgaver)
 363                 phylink = jme_linkstat_from_phy(jme);
 364         else
 365                 phylink = jread32(jme, JME_PHY_LINK);
 366
 367         if (phylink & PHY_LINK_UP) {
 368                 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
 369                         /*
 370                          * If we did not enable AN
 371                          * Speed/Duplex Info should be obtained from SMI
 372                          */
 373                         phylink = PHY_LINK_UP;
 374
 375                         bmcr = jme_mdio_read(jme->dev,
 376                                                 jme->mii_if.phy_id,
 377                                                 MII_BMCR);
 378
 379                         phylink |= ((bmcr & BMCR_SPEED1000) &&
 380                                         (bmcr & BMCR_SPEED100) == 0) ?
 381                                         PHY_LINK_SPEED_1000M :
 382                                         (bmcr & BMCR_SPEED100) ?
 383                                         PHY_LINK_SPEED_100M :
 384                                         PHY_LINK_SPEED_10M;
 385
 386                         phylink |= (bmcr & BMCR_FULLDPLX) ?
 387                                          PHY_LINK_DUPLEX : 0;
 388
 389                         strcat(linkmsg, "Forced: ");
 390                 } else {
 391                         /*
 392                          * Keep polling for speed/duplex resolve complete
 393                          */
 394                         while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
 395                                 --cnt) {
 396
 397                                 udelay(1);
 398
 399                                 if (jme->fpgaver)
 400                                         phylink = jme_linkstat_from_phy(jme);
 401                                 else
 402                                         phylink = jread32(jme, JME_PHY_LINK);
 403                         }
 404                         if (!cnt)
 405                                 pr_err("Waiting speed resolve timeout\n");
 406
 407                         strcat(linkmsg, "ANed: ");
 408                 }
 409
 410                 if (jme->phylink == phylink) {
 411                         rc = 1;
 412                         goto out;
 413                 }
 414                 if (testonly)
 415                         goto out;
 416
 417                 jme->phylink = phylink;
 418
 419                 ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX |
 420                                 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE |
 421                                 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY);
 422                 switch (phylink & PHY_LINK_SPEED_MASK) {
 423                 case PHY_LINK_SPEED_10M:
 424                         ghc |= GHC_SPEED_10M |
 425                                 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
 426                         strcat(linkmsg, "10 Mbps, ");
 427                         break;
 428                 case PHY_LINK_SPEED_100M:
 429                         ghc |= GHC_SPEED_100M |
 430                                 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
 431                         strcat(linkmsg, "100 Mbps, ");
 432                         break;
 433                 case PHY_LINK_SPEED_1000M:
 434                         ghc |= GHC_SPEED_1000M |
 435                                 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
 436                         strcat(linkmsg, "1000 Mbps, ");
 437                         break;
 438                 default:
 439                         break;
 440                 }
 441
 442                 if (phylink & PHY_LINK_DUPLEX) {
 443                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
 444                         ghc |= GHC_DPX;
 445                 } else {
 446                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
 447                                                 TXMCS_BACKOFF |
 448                                                 TXMCS_CARRIERSENSE |
 449                                                 TXMCS_COLLISION);
 450                         jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
 451                                 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
 452                                 TXTRHD_TXREN |
 453                                 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
 454                 }
 455
 456                 gpreg1 = GPREG1_DEFAULT;
 457                 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
 458                         if (!(phylink & PHY_LINK_DUPLEX))
 459                                 gpreg1 |= GPREG1_HALFMODEPATCH;
 460                         switch (phylink & PHY_LINK_SPEED_MASK) {
 461                         case PHY_LINK_SPEED_10M:
 462                                 jme_set_phyfifoa(jme);
 463                                 gpreg1 |= GPREG1_RSSPATCH;
 464                                 break;
 465                         case PHY_LINK_SPEED_100M:
 466                                 jme_set_phyfifob(jme);
 467                                 gpreg1 |= GPREG1_RSSPATCH;
 468                                 break;
 469                         case PHY_LINK_SPEED_1000M:
 470                                 jme_set_phyfifoa(jme);
 471                                 break;
 472                         default:
 473                                 break;
 474                         }
 475                 }
 476
 477                 jwrite32(jme, JME_GPREG1, gpreg1);
 478                 jwrite32(jme, JME_GHC, ghc);
 479                 jme->reg_ghc = ghc;
 480
 481                 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
 482                                         "Full-Duplex, " :
 483                                         "Half-Duplex, ");
 484                 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
 485                                         "MDI-X" :
 486                                         "MDI");
 487                 netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg);
 488                 netif_carrier_on(netdev);
 489         } else {
 490                 if (testonly)
 491                         goto out;
 492
 493                 netif_info(jme, link, jme->dev, "Link is down\n");
 494                 jme->phylink = 0;
 495                 netif_carrier_off(netdev);
 496         }
 497
 498 out:
 499         return rc;
 500 }
 501
 502 static int
 503 jme_setup_tx_resources(struct jme_adapter *jme)
 504 {
 505         struct jme_ring *txring = &(jme->txring[0]);
 506
 507         txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 508                                    TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 509                                    &(txring->dmaalloc),
 510                                    GFP_ATOMIC);
 511
 512         if (!txring->alloc)
 513                 goto err_set_null;
 514
 515         /*
 516          * 16 Bytes align
 517          */
 518         txring->desc            = (void *)ALIGN((unsigned long)(txring->alloc),
 519                                                 RING_DESC_ALIGN);
 520         txring->dma             = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
 521         txring->next_to_use     = 0;
 522         atomic_set(&txring->next_to_clean, 0);
 523         atomic_set(&txring->nr_free, jme->tx_ring_size);
 524
 525         txring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 526                                         jme->tx_ring_size, GFP_ATOMIC);
 527         if (unlikely(!(txring->bufinf)))
 528                 goto err_free_txring;
 529
 530         /*
 531          * Initialize Transmit Descriptors
 532          */
 533         memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
 534         memset(txring->bufinf, 0,
 535                 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
 536
 537         return 0;
 538
 539 err_free_txring:
 540         dma_free_coherent(&(jme->pdev->dev),
 541                           TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 542                           txring->alloc,
 543                           txring->dmaalloc);
 544
 545 err_set_null:
 546         txring->desc = NULL;
 547         txring->dmaalloc = 0;
 548         txring->dma = 0;
 549         txring->bufinf = NULL;
 550
 551         return -ENOMEM;
 552 }
 553
 554 static void
 555 jme_free_tx_resources(struct jme_adapter *jme)
 556 {
 557         int i;
 558         struct jme_ring *txring = &(jme->txring[0]);
 559         struct jme_buffer_info *txbi;
 560
 561         if (txring->alloc) {
 562                 if (txring->bufinf) {
 563                         for (i = 0 ; i < jme->tx_ring_size ; ++i) {
 564                                 txbi = txring->bufinf + i;
 565                                 if (txbi->skb) {
 566                                         dev_kfree_skb(txbi->skb);
 567                                         txbi->skb = NULL;
 568                                 }
 569                                 txbi->mapping           = 0;
 570                                 txbi->len               = 0;
 571                                 txbi->nr_desc           = 0;
 572                                 txbi->start_xmit        = 0;
 573                         }
 574                         kfree(txring->bufinf);
 575                 }
 576
 577                 dma_free_coherent(&(jme->pdev->dev),
 578                                   TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 579                                   txring->alloc,
 580                                   txring->dmaalloc);
 581
 582                 txring->alloc           = NULL;
 583                 txring->desc            = NULL;
 584                 txring->dmaalloc        = 0;
 585                 txring->dma             = 0;
 586                 txring->bufinf          = NULL;
 587         }
 588         txring->next_to_use     = 0;
 589         atomic_set(&txring->next_to_clean, 0);
 590         atomic_set(&txring->nr_free, 0);
 591 }
 592
 593 static inline void
 594 jme_enable_tx_engine(struct jme_adapter *jme)
 595 {
 596         /*
 597          * Select Queue 0
 598          */
 599         jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
 600         wmb();
 601
 602         /*
 603          * Setup TX Queue 0 DMA Bass Address
 604          */
 605         jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 606         jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
 607         jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 608
 609         /*
 610          * Setup TX Descptor Count
 611          */
 612         jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
 613
 614         /*
 615          * Enable TX Engine
 616          */
 617         wmb();
 618         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 619                                 TXCS_SELECT_QUEUE0 |
 620                                 TXCS_ENABLE);
 621
 622 }
 623
 624 static inline void
 625 jme_restart_tx_engine(struct jme_adapter *jme)
 626 {
 627         /*
 628          * Restart TX Engine
 629          */
 630         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 631                                 TXCS_SELECT_QUEUE0 |
 632                                 TXCS_ENABLE);
 633 }
 634
 635 static inline void
 636 jme_disable_tx_engine(struct jme_adapter *jme)
 637 {
 638         int i;
 639         u32 val;
 640
 641         /*
 642          * Disable TX Engine
 643          */
 644         jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
 645         wmb();
 646
 647         val = jread32(jme, JME_TXCS);
 648         for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
 649                 mdelay(1);
 650                 val = jread32(jme, JME_TXCS);
 651                 rmb();
 652         }
 653
 654         if (!i)
 655                 pr_err("Disable TX engine timeout\n");
 656 }
 657
 658 static void
 659 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
 660 {
 661         struct jme_ring *rxring = &(jme->rxring[0]);
 662         register struct rxdesc *rxdesc = rxring->desc;
 663         struct jme_buffer_info *rxbi = rxring->bufinf;
 664         rxdesc += i;
 665         rxbi += i;
 666
 667         rxdesc->dw[0] = 0;
 668         rxdesc->dw[1] = 0;
 669         rxdesc->desc1.bufaddrh  = cpu_to_le32((__u64)rxbi->mapping >> 32);
 670         rxdesc->desc1.bufaddrl  = cpu_to_le32(
 671                                         (__u64)rxbi->mapping & 0xFFFFFFFFUL);
 672         rxdesc->desc1.datalen   = cpu_to_le16(rxbi->len);
 673         if (jme->dev->features & NETIF_F_HIGHDMA)
 674                 rxdesc->desc1.flags = RXFLAG_64BIT;
 675         wmb();
 676         rxdesc->desc1.flags     |= RXFLAG_OWN | RXFLAG_INT;
 677 }
 678
 679 static int
 680 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
 681 {
 682         struct jme_ring *rxring = &(jme->rxring[0]);
 683         struct jme_buffer_info *rxbi = rxring->bufinf + i;
 684         struct sk_buff *skb;
 685
 686         skb = netdev_alloc_skb(jme->dev,
 687                 jme->dev->mtu + RX_EXTRA_LEN);
 688         if (unlikely(!skb))
 689                 return -ENOMEM;
 690 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
 691         skb->dev = jme->dev;
 692 #endif
 693
 694         rxbi->skb = skb;
 695         rxbi->len = skb_tailroom(skb);
 696         rxbi->mapping = pci_map_page(jme->pdev,
 697                                         virt_to_page(skb->data),
 698                                         offset_in_page(skb->data),
 699                                         rxbi->len,
 700                                         PCI_DMA_FROMDEVICE);
 701
 702         return 0;
 703 }
 704
 705 static void
 706 jme_free_rx_buf(struct jme_adapter *jme, int i)
 707 {
 708         struct jme_ring *rxring = &(jme->rxring[0]);
 709         struct jme_buffer_info *rxbi = rxring->bufinf;
 710         rxbi += i;
 711
 712         if (rxbi->skb) {
 713                 pci_unmap_page(jme->pdev,
 714                                  rxbi->mapping,
 715                                  rxbi->len,
 716                                  PCI_DMA_FROMDEVICE);
 717                 dev_kfree_skb(rxbi->skb);
 718                 rxbi->skb = NULL;
 719                 rxbi->mapping = 0;
 720                 rxbi->len = 0;
 721         }
 722 }
 723
 724 static void
 725 jme_free_rx_resources(struct jme_adapter *jme)
 726 {
 727         int i;
 728         struct jme_ring *rxring = &(jme->rxring[0]);
 729
 730         if (rxring->alloc) {
 731                 if (rxring->bufinf) {
 732                         for (i = 0 ; i < jme->rx_ring_size ; ++i)
 733                                 jme_free_rx_buf(jme, i);
 734                         kfree(rxring->bufinf);
 735                 }
 736
 737                 dma_free_coherent(&(jme->pdev->dev),
 738                                   RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 739                                   rxring->alloc,
 740                                   rxring->dmaalloc);
 741                 rxring->alloc    = NULL;
 742                 rxring->desc     = NULL;
 743                 rxring->dmaalloc = 0;
 744                 rxring->dma      = 0;
 745                 rxring->bufinf   = NULL;
 746         }
 747         rxring->next_to_use   = 0;
 748         atomic_set(&rxring->next_to_clean, 0);
 749 }
 750
 751 static int
 752 jme_setup_rx_resources(struct jme_adapter *jme)
 753 {
 754         int i;
 755         struct jme_ring *rxring = &(jme->rxring[0]);
 756
 757         rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 758                                    RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 759                                    &(rxring->dmaalloc),
 760                                    GFP_ATOMIC);
 761         if (!rxring->alloc)
 762                 goto err_set_null;
 763
 764         /*
 765          * 16 Bytes align
 766          */
 767         rxring->desc            = (void *)ALIGN((unsigned long)(rxring->alloc),
 768                                                 RING_DESC_ALIGN);
 769         rxring->dma             = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
 770         rxring->next_to_use     = 0;
 771         atomic_set(&rxring->next_to_clean, 0);
 772
 773         rxring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 774                                         jme->rx_ring_size, GFP_ATOMIC);
 775         if (unlikely(!(rxring->bufinf)))
 776                 goto err_free_rxring;
 777
 778         /*
 779          * Initiallize Receive Descriptors
 780          */
 781         memset(rxring->bufinf, 0,
 782                 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
 783         for (i = 0 ; i < jme->rx_ring_size ; ++i) {
 784                 if (unlikely(jme_make_new_rx_buf(jme, i))) {
 785                         jme_free_rx_resources(jme);
 786                         return -ENOMEM;
 787                 }
 788
 789                 jme_set_clean_rxdesc(jme, i);
 790         }
 791
 792         return 0;
 793
 794 err_free_rxring:
 795         dma_free_coherent(&(jme->pdev->dev),
 796                           RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 797                           rxring->alloc,
 798                           rxring->dmaalloc);
 799 err_set_null:
 800         rxring->desc = NULL;
 801         rxring->dmaalloc = 0;
 802         rxring->dma = 0;
 803         rxring->bufinf = NULL;
 804
 805         return -ENOMEM;
 806 }
 807
 808 static inline void
 809 jme_enable_rx_engine(struct jme_adapter *jme)
 810 {
 811         /*
 812          * Select Queue 0
 813          */
 814         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 815                                 RXCS_QUEUESEL_Q0);
 816         wmb();
 817
 818         /*
 819          * Setup RX DMA Bass Address
 820          */
 821         jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 822         jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
 823         jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 824
 825         /*
 826          * Setup RX Descriptor Count
 827          */
 828         jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
 829
 830         /*
 831          * Setup Unicast Filter
 832          */
 833         jme_set_multi(jme->dev);
 834
 835         /*
 836          * Enable RX Engine
 837          */
 838         wmb();
 839         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 840                                 RXCS_QUEUESEL_Q0 |
 841                                 RXCS_ENABLE |
 842                                 RXCS_QST);
 843 }
 844
 845 static inline void
 846 jme_restart_rx_engine(struct jme_adapter *jme)
 847 {
 848         /*
 849          * Start RX Engine
 850          */
 851         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 852                                 RXCS_QUEUESEL_Q0 |
 853                                 RXCS_ENABLE |
 854                                 RXCS_QST);
 855 }
 856
 857 static inline void
 858 jme_disable_rx_engine(struct jme_adapter *jme)
 859 {
 860         int i;
 861         u32 val;
 862
 863         /*
 864          * Disable RX Engine
 865          */
 866         jwrite32(jme, JME_RXCS, jme->reg_rxcs);
 867         wmb();
 868
 869         val = jread32(jme, JME_RXCS);
 870         for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
 871                 mdelay(1);
 872                 val = jread32(jme, JME_RXCS);
 873                 rmb();
 874         }
 875
 876         if (!i)
 877                 pr_err("Disable RX engine timeout\n");
 878
 879 }
 880
 881 static int
 882 jme_rxsum_ok(struct jme_adapter *jme, u16 flags)
 883 {
 884         if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
 885                 return false;
 886
 887         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
 888                         == RXWBFLAG_TCPON)) {
 889                 if (flags & RXWBFLAG_IPV4)
 890                         netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
 891                 return false;
 892         }
 893
 894         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
 895                         == RXWBFLAG_UDPON)) {
 896                 if (flags & RXWBFLAG_IPV4)
 897                         netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n");
 898                 return false;
 899         }
 900
 901         if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
 902                         == RXWBFLAG_IPV4)) {
 903                 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n");
 904                 return false;
 905         }
 906
 907         return true;
 908 }
 909
 910 static void
 911 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
 912 {
 913         struct jme_ring *rxring = &(jme->rxring[0]);
 914         struct rxdesc *rxdesc = rxring->desc;
 915         struct jme_buffer_info *rxbi = rxring->bufinf;
 916         struct sk_buff *skb;
 917         int framesize;
 918
 919         rxdesc += idx;
 920         rxbi += idx;
 921
 922         skb = rxbi->skb;
 923         pci_dma_sync_single_for_cpu(jme->pdev,
 924                                         rxbi->mapping,
 925                                         rxbi->len,
 926                                         PCI_DMA_FROMDEVICE);
 927
 928         if (unlikely(jme_make_new_rx_buf(jme, idx))) {
 929                 pci_dma_sync_single_for_device(jme->pdev,
 930                                                 rxbi->mapping,
 931                                                 rxbi->len,
 932                                                 PCI_DMA_FROMDEVICE);
 933
 934                 ++(NET_STAT(jme).rx_dropped);
 935         } else {
 936                 framesize = le16_to_cpu(rxdesc->descwb.framesize)
 937                                 - RX_PREPAD_SIZE;
 938
 939                 skb_reserve(skb, RX_PREPAD_SIZE);
 940                 skb_put(skb, framesize);
 941                 skb->protocol = eth_type_trans(skb, jme->dev);
 942
 943                 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags)))
 944                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 945                 else
 946 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35)
 947                         skb->ip_summed = CHECKSUM_NONE;
 948 #else
 949                         skb_checksum_none_assert(skb);
 950 #endif
 951
 952                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
 953                         if (jme->vlgrp) {
 954                                 jme->jme_vlan_rx(skb, jme->vlgrp,
 955                                         le16_to_cpu(rxdesc->descwb.vlan));
 956                                 NET_STAT(jme).rx_bytes += 4;
 957                         } else {
 958                                 dev_kfree_skb(skb);
 959                         }
 960                 } else {
 961                         jme->jme_rx(skb);
 962                 }
 963
 964                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
 965                     cpu_to_le16(RXWBFLAG_DEST_MUL))
 966                         ++(NET_STAT(jme).multicast);
 967
 968                 NET_STAT(jme).rx_bytes += framesize;
 969                 ++(NET_STAT(jme).rx_packets);
 970         }
 971
 972         jme_set_clean_rxdesc(jme, idx);
 973
 974 }
 975
 976 static int
 977 jme_process_receive(struct jme_adapter *jme, int limit)
 978 {
 979         struct jme_ring *rxring = &(jme->rxring[0]);
 980         struct rxdesc *rxdesc = rxring->desc;
 981         int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
 982
 983         if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
 984                 goto out_inc;
 985
 986         if (unlikely(atomic_read(&jme->link_changing) != 1))
 987                 goto out_inc;
 988
 989         if (unlikely(!netif_carrier_ok(jme->dev)))
 990                 goto out_inc;
 991
 992         i = atomic_read(&rxring->next_to_clean);
 993         while (limit > 0) {
 994                 rxdesc = rxring->desc;
 995                 rxdesc += i;
 996
 997                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
 998                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
 999                         goto out;
1000                 --limit;
1001
1002                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1003
1004                 if (unlikely(desccnt > 1 ||
1005                 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1006
1007                         if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1008                                 ++(NET_STAT(jme).rx_crc_errors);
1009                         else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1010                                 ++(NET_STAT(jme).rx_fifo_errors);
1011                         else
1012                                 ++(NET_STAT(jme).rx_errors);
1013
1014                         if (desccnt > 1)
1015                                 limit -= desccnt - 1;
1016
1017                         for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1018                                 jme_set_clean_rxdesc(jme, j);
1019                                 j = (j + 1) & (mask);
1020                         }
1021
1022                 } else {
1023                         jme_alloc_and_feed_skb(jme, i);
1024                 }
1025
1026                 i = (i + desccnt) & (mask);
1027         }
1028
1029 out:
1030         atomic_set(&rxring->next_to_clean, i);
1031
1032 out_inc:
1033         atomic_inc(&jme->rx_cleaning);
1034
1035         return limit > 0 ? limit : 0;
1036
1037 }
1038
1039 static void
1040 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1041 {
1042         if (likely(atmp == dpi->cur)) {
1043                 dpi->cnt = 0;
1044                 return;
1045         }
1046
1047         if (dpi->attempt == atmp) {
1048                 ++(dpi->cnt);
1049         } else {
1050                 dpi->attempt = atmp;
1051                 dpi->cnt = 0;
1052         }
1053
1054 }
1055
1056 static void
1057 jme_dynamic_pcc(struct jme_adapter *jme)
1058 {
1059         register struct dynpcc_info *dpi = &(jme->dpi);
1060
1061         if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1062                 jme_attempt_pcc(dpi, PCC_P3);
1063         else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1064                  dpi->intr_cnt > PCC_INTR_THRESHOLD)
1065                 jme_attempt_pcc(dpi, PCC_P2);
1066         else
1067                 jme_attempt_pcc(dpi, PCC_P1);
1068
1069         if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1070                 if (dpi->attempt < dpi->cur)
1071                         tasklet_schedule(&jme->rxclean_task);
1072                 jme_set_rx_pcc(jme, dpi->attempt);
1073                 dpi->cur = dpi->attempt;
1074                 dpi->cnt = 0;
1075         }
1076 }
1077
1078 static void
1079 jme_start_pcc_timer(struct jme_adapter *jme)
1080 {
1081         struct dynpcc_info *dpi = &(jme->dpi);
1082         dpi->last_bytes         = NET_STAT(jme).rx_bytes;
1083         dpi->last_pkts          = NET_STAT(jme).rx_packets;
1084         dpi->intr_cnt           = 0;
1085         jwrite32(jme, JME_TMCSR,
1086                 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1087 }
1088
1089 static inline void
1090 jme_stop_pcc_timer(struct jme_adapter *jme)
1091 {
1092         jwrite32(jme, JME_TMCSR, 0);
1093 }
1094
1095 static void
1096 jme_shutdown_nic(struct jme_adapter *jme)
1097 {
1098         u32 phylink;
1099
1100         phylink = jme_linkstat_from_phy(jme);
1101
1102         if (!(phylink & PHY_LINK_UP)) {
1103                 /*
1104                  * Disable all interrupt before issue timer
1105                  */
1106                 jme_stop_irq(jme);
1107                 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1108         }
1109 }
1110
1111 static void
1112 jme_pcc_tasklet(unsigned long arg)
1113 {
1114         struct jme_adapter *jme = (struct jme_adapter *)arg;
1115         struct net_device *netdev = jme->dev;
1116
1117         if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1118                 jme_shutdown_nic(jme);
1119                 return;
1120         }
1121
1122         if (unlikely(!netif_carrier_ok(netdev) ||
1123                 (atomic_read(&jme->link_changing) != 1)
1124         )) {
1125                 jme_stop_pcc_timer(jme);
1126                 return;
1127         }
1128
1129         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1130                 jme_dynamic_pcc(jme);
1131
1132         jme_start_pcc_timer(jme);
1133 }
1134
1135 static inline void
1136 jme_polling_mode(struct jme_adapter *jme)
1137 {
1138         jme_set_rx_pcc(jme, PCC_OFF);
1139 }
1140
1141 static inline void
1142 jme_interrupt_mode(struct jme_adapter *jme)
1143 {
1144         jme_set_rx_pcc(jme, PCC_P1);
1145 }
1146
1147 static inline int
1148 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1149 {
1150         u32 apmc;
1151         apmc = jread32(jme, JME_APMC);
1152         return apmc & JME_APMC_PSEUDO_HP_EN;
1153 }
1154
1155 static void
1156 jme_start_shutdown_timer(struct jme_adapter *jme)
1157 {
1158         u32 apmc;
1159
1160         apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1161         apmc &= ~JME_APMC_EPIEN_CTRL;
1162         if (!no_extplug) {
1163                 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1164                 wmb();
1165         }
1166         jwrite32f(jme, JME_APMC, apmc);
1167
1168         jwrite32f(jme, JME_TIMER2, 0);
1169         set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1170         jwrite32(jme, JME_TMCSR,
1171                 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1172 }
1173
1174 static void
1175 jme_stop_shutdown_timer(struct jme_adapter *jme)
1176 {
1177         u32 apmc;
1178
1179         jwrite32f(jme, JME_TMCSR, 0);
1180         jwrite32f(jme, JME_TIMER2, 0);
1181         clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1182
1183         apmc = jread32(jme, JME_APMC);
1184         apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1185         jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1186         wmb();
1187         jwrite32f(jme, JME_APMC, apmc);
1188 }
1189
1190 static void
1191 jme_link_change_tasklet(unsigned long arg)
1192 {
1193         struct jme_adapter *jme = (struct jme_adapter *)arg;
1194         struct net_device *netdev = jme->dev;
1195         int rc;
1196
1197         while (!atomic_dec_and_test(&jme->link_changing)) {
1198                 atomic_inc(&jme->link_changing);
1199                 netif_info(jme, intr, jme->dev, "Get link change lock failed\n");
1200                 while (atomic_read(&jme->link_changing) != 1)
1201                         netif_info(jme, intr, jme->dev, "Waiting link change lock\n");
1202         }
1203
1204         if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1205                 goto out;
1206
1207         jme->old_mtu = netdev->mtu;
1208         netif_stop_queue(netdev);
1209         if (jme_pseudo_hotplug_enabled(jme))
1210                 jme_stop_shutdown_timer(jme);
1211
1212         jme_stop_pcc_timer(jme);
1213         tasklet_disable(&jme->txclean_task);
1214         tasklet_disable(&jme->rxclean_task);
1215         tasklet_disable(&jme->rxempty_task);
1216
1217         if (netif_carrier_ok(netdev)) {
1218                 jme_reset_ghc_speed(jme);
1219                 jme_disable_rx_engine(jme);
1220                 jme_disable_tx_engine(jme);
1221                 jme_reset_mac_processor(jme);
1222                 jme_free_rx_resources(jme);
1223                 jme_free_tx_resources(jme);
1224
1225                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1226                         jme_polling_mode(jme);
1227
1228                 netif_carrier_off(netdev);
1229         }
1230
1231         jme_check_link(netdev, 0);
1232         if (netif_carrier_ok(netdev)) {
1233                 rc = jme_setup_rx_resources(jme);
1234                 if (rc) {
1235                         pr_err("Allocating resources for RX error, Device STOPPED!\n");
1236                         goto out_enable_tasklet;
1237                 }
1238
1239                 rc = jme_setup_tx_resources(jme);
1240                 if (rc) {
1241                         pr_err("Allocating resources for TX error, Device STOPPED!\n");
1242                         goto err_out_free_rx_resources;
1243                 }
1244
1245                 jme_enable_rx_engine(jme);
1246                 jme_enable_tx_engine(jme);
1247
1248                 netif_start_queue(netdev);
1249
1250                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1251                         jme_interrupt_mode(jme);
1252
1253                 jme_start_pcc_timer(jme);
1254         } else if (jme_pseudo_hotplug_enabled(jme)) {
1255                 jme_start_shutdown_timer(jme);
1256         }
1257
1258         goto out_enable_tasklet;
1259
1260 err_out_free_rx_resources:
1261         jme_free_rx_resources(jme);
1262 out_enable_tasklet:
1263         tasklet_enable(&jme->txclean_task);
1264         tasklet_hi_enable(&jme->rxclean_task);
1265         tasklet_hi_enable(&jme->rxempty_task);
1266 out:
1267         atomic_inc(&jme->link_changing);
1268 }
1269
1270 static void
1271 jme_rx_clean_tasklet(unsigned long arg)
1272 {
1273         struct jme_adapter *jme = (struct jme_adapter *)arg;
1274         struct dynpcc_info *dpi = &(jme->dpi);
1275
1276         jme_process_receive(jme, jme->rx_ring_size);
1277         ++(dpi->intr_cnt);
1278
1279 }
1280
1281 static int
1282 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1283 {
1284         struct jme_adapter *jme = jme_napi_priv(holder);
1285         DECLARE_NETDEV
1286         int rest;
1287
1288         rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1289
1290         while (atomic_read(&jme->rx_empty) > 0) {
1291                 atomic_dec(&jme->rx_empty);
1292                 ++(NET_STAT(jme).rx_dropped);
1293                 jme_restart_rx_engine(jme);
1294         }
1295         atomic_inc(&jme->rx_empty);
1296
1297         if (rest) {
1298                 JME_RX_COMPLETE(netdev, holder);
1299                 jme_interrupt_mode(jme);
1300         }
1301
1302         JME_NAPI_WEIGHT_SET(budget, rest);
1303         return JME_NAPI_WEIGHT_VAL(budget) - rest;
1304 }
1305
1306 static void
1307 jme_rx_empty_tasklet(unsigned long arg)
1308 {
1309         struct jme_adapter *jme = (struct jme_adapter *)arg;
1310
1311         if (unlikely(atomic_read(&jme->link_changing) != 1))
1312                 return;
1313
1314         if (unlikely(!netif_carrier_ok(jme->dev)))
1315                 return;
1316
1317         netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1318
1319         jme_rx_clean_tasklet(arg);
1320
1321         while (atomic_read(&jme->rx_empty) > 0) {
1322                 atomic_dec(&jme->rx_empty);
1323                 ++(NET_STAT(jme).rx_dropped);
1324                 jme_restart_rx_engine(jme);
1325         }
1326         atomic_inc(&jme->rx_empty);
1327 }
1328
1329 static void
1330 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1331 {
1332         struct jme_ring *txring = &(jme->txring[0]);
1333
1334         smp_wmb();
1335         if (unlikely(netif_queue_stopped(jme->dev) &&
1336         atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1337                 netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n");
1338                 netif_wake_queue(jme->dev);
1339         }
1340
1341 }
1342
1343 static void
1344 jme_tx_clean_tasklet(unsigned long arg)
1345 {
1346         struct jme_adapter *jme = (struct jme_adapter *)arg;
1347         struct jme_ring *txring = &(jme->txring[0]);
1348         struct txdesc *txdesc = txring->desc;
1349         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1350         int i, j, cnt = 0, max, err, mask;
1351
1352         tx_dbg(jme, "Into txclean\n");
1353
1354         if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1355                 goto out;
1356
1357         if (unlikely(atomic_read(&jme->link_changing) != 1))
1358                 goto out;
1359
1360         if (unlikely(!netif_carrier_ok(jme->dev)))
1361                 goto out;
1362
1363         max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1364         mask = jme->tx_ring_mask;
1365
1366         for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1367
1368                 ctxbi = txbi + i;
1369
1370                 if (likely(ctxbi->skb &&
1371                 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1372
1373                         tx_dbg(jme, "txclean: %d+%d@%lu\n",
1374                                i, ctxbi->nr_desc, jiffies);
1375
1376                         err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1377
1378                         for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1379                                 ttxbi = txbi + ((i + j) & (mask));
1380                                 txdesc[(i + j) & (mask)].dw[0] = 0;
1381
1382                                 pci_unmap_page(jme->pdev,
1383                                                  ttxbi->mapping,
1384                                                  ttxbi->len,
1385                                                  PCI_DMA_TODEVICE);
1386
1387                                 ttxbi->mapping = 0;
1388                                 ttxbi->len = 0;
1389                         }
1390
1391                         dev_kfree_skb(ctxbi->skb);
1392
1393                         cnt += ctxbi->nr_desc;
1394
1395                         if (unlikely(err)) {
1396                                 ++(NET_STAT(jme).tx_carrier_errors);
1397                         } else {
1398                                 ++(NET_STAT(jme).tx_packets);
1399                                 NET_STAT(jme).tx_bytes += ctxbi->len;
1400                         }
1401
1402                         ctxbi->skb = NULL;
1403                         ctxbi->len = 0;
1404                         ctxbi->start_xmit = 0;
1405
1406                 } else {
1407                         break;
1408                 }
1409
1410                 i = (i + ctxbi->nr_desc) & mask;
1411
1412                 ctxbi->nr_desc = 0;
1413         }
1414
1415         tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies);
1416         atomic_set(&txring->next_to_clean, i);
1417         atomic_add(cnt, &txring->nr_free);
1418
1419         jme_wake_queue_if_stopped(jme);
1420
1421 out:
1422         atomic_inc(&jme->tx_cleaning);
1423 }
1424
1425 static void
1426 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1427 {
1428         /*
1429          * Disable interrupt
1430          */
1431         jwrite32f(jme, JME_IENC, INTR_ENABLE);
1432
1433         if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1434                 /*
1435                  * Link change event is critical
1436                  * all other events are ignored
1437                  */
1438                 jwrite32(jme, JME_IEVE, intrstat);
1439                 tasklet_schedule(&jme->linkch_task);
1440                 goto out_reenable;
1441         }
1442
1443         if (intrstat & INTR_TMINTR) {
1444                 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1445                 tasklet_schedule(&jme->pcc_task);
1446         }
1447
1448         if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1449                 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1450                 tasklet_schedule(&jme->txclean_task);
1451         }
1452
1453         if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1454                 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1455                                                      INTR_PCCRX0 |
1456                                                      INTR_RX0EMP)) |
1457                                         INTR_RX0);
1458         }
1459
1460         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1461                 if (intrstat & INTR_RX0EMP)
1462                         atomic_inc(&jme->rx_empty);
1463
1464                 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1465                         if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1466                                 jme_polling_mode(jme);
1467                                 JME_RX_SCHEDULE(jme);
1468                         }
1469                 }
1470         } else {
1471                 if (intrstat & INTR_RX0EMP) {
1472                         atomic_inc(&jme->rx_empty);
1473                         tasklet_hi_schedule(&jme->rxempty_task);
1474                 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1475                         tasklet_hi_schedule(&jme->rxclean_task);
1476                 }
1477         }
1478
1479 out_reenable:
1480         /*
1481          * Re-enable interrupt
1482          */
1483         jwrite32f(jme, JME_IENS, INTR_ENABLE);
1484 }
1485
1486 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1487 static irqreturn_t
1488 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1489 #else
1490 static irqreturn_t
1491 jme_intr(int irq, void *dev_id)
1492 #endif
1493 {
1494         struct net_device *netdev = dev_id;
1495         struct jme_adapter *jme = netdev_priv(netdev);
1496         u32 intrstat;
1497
1498         intrstat = jread32(jme, JME_IEVE);
1499
1500         /*
1501          * Check if it's really an interrupt for us
1502          */
1503         if (unlikely((intrstat & INTR_ENABLE) == 0))
1504                 return IRQ_NONE;
1505
1506         /*
1507          * Check if the device still exist
1508          */
1509         if (unlikely(intrstat == ~((typeof(intrstat))0)))
1510                 return IRQ_NONE;
1511
1512         jme_intr_msi(jme, intrstat);
1513
1514         return IRQ_HANDLED;
1515 }
1516
1517 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1518 static irqreturn_t
1519 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1520 #else
1521 static irqreturn_t
1522 jme_msi(int irq, void *dev_id)
1523 #endif
1524 {
1525         struct net_device *netdev = dev_id;
1526         struct jme_adapter *jme = netdev_priv(netdev);
1527         u32 intrstat;
1528
1529         intrstat = jread32(jme, JME_IEVE);
1530
1531         jme_intr_msi(jme, intrstat);
1532
1533         return IRQ_HANDLED;
1534 }
1535
1536 static void
1537 jme_reset_link(struct jme_adapter *jme)
1538 {
1539         jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1540 }
1541
1542 static void
1543 jme_restart_an(struct jme_adapter *jme)
1544 {
1545         u32 bmcr;
1546
1547         spin_lock_bh(&jme->phy_lock);
1548         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1549         bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1550         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1551         spin_unlock_bh(&jme->phy_lock);
1552 }
1553
1554 static int
1555 jme_request_irq(struct jme_adapter *jme)
1556 {
1557         int rc;
1558         struct net_device *netdev = jme->dev;
1559 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1560         irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1561         int irq_flags = SA_SHIRQ;
1562 #else
1563         irq_handler_t handler = jme_intr;
1564         int irq_flags = IRQF_SHARED;
1565 #endif
1566
1567         if (!pci_enable_msi(jme->pdev)) {
1568                 set_bit(JME_FLAG_MSI, &jme->flags);
1569                 handler = jme_msi;
1570                 irq_flags = 0;
1571         }
1572
1573         rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1574                           netdev);
1575         if (rc) {
1576                 netdev_err(netdev,
1577                            "Unable to request %s interrupt (return: %d)\n",
1578                            test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1579                            rc);
1580
1581                 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1582                         pci_disable_msi(jme->pdev);
1583                         clear_bit(JME_FLAG_MSI, &jme->flags);
1584                 }
1585         } else {
1586                 netdev->irq = jme->pdev->irq;
1587         }
1588
1589         return rc;
1590 }
1591
1592 static void
1593 jme_free_irq(struct jme_adapter *jme)
1594 {
1595         free_irq(jme->pdev->irq, jme->dev);
1596         if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1597                 pci_disable_msi(jme->pdev);
1598                 clear_bit(JME_FLAG_MSI, &jme->flags);
1599                 jme->dev->irq = jme->pdev->irq;
1600         }
1601 }
1602
1603 static inline void
1604 jme_phy_on(struct jme_adapter *jme)
1605 {
1606         u32 bmcr;
1607
1608         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1609         bmcr &= ~BMCR_PDOWN;
1610         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1611 }
1612
1613 static int
1614 jme_open(struct net_device *netdev)
1615 {
1616         struct jme_adapter *jme = netdev_priv(netdev);
1617         int rc;
1618
1619         jme_clear_pm(jme);
1620         JME_NAPI_ENABLE(jme);
1621
1622         tasklet_enable(&jme->linkch_task);
1623         tasklet_enable(&jme->txclean_task);
1624         tasklet_hi_enable(&jme->rxclean_task);
1625         tasklet_hi_enable(&jme->rxempty_task);
1626
1627         rc = jme_request_irq(jme);
1628         if (rc)
1629                 goto err_out;
1630
1631         jme_start_irq(jme);
1632
1633         if (test_bit(JME_FLAG_SSET, &jme->flags)) {
1634                 jme_phy_on(jme);
1635                 jme_set_settings(netdev, &jme->old_ecmd);
1636         } else {
1637                 jme_reset_phy_processor(jme);
1638         }
1639
1640         jme_reset_link(jme);
1641
1642         return 0;
1643
1644 err_out:
1645         netif_stop_queue(netdev);
1646         netif_carrier_off(netdev);
1647         return rc;
1648 }
1649
1650 #ifdef CONFIG_PM
1651 static void
1652 jme_set_100m_half(struct jme_adapter *jme)
1653 {
1654         u32 bmcr, tmp;
1655
1656         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1657         tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1658                        BMCR_SPEED1000 | BMCR_FULLDPLX);
1659         tmp |= BMCR_SPEED100;
1660
1661         if (bmcr != tmp)
1662                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1663
1664         if (jme->fpgaver)
1665                 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1666         else
1667                 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1668 }
1669
1670 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1671 static void
1672 jme_wait_link(struct jme_adapter *jme)
1673 {
1674         u32 phylink, to = JME_WAIT_LINK_TIME;
1675
1676         mdelay(1000);
1677         phylink = jme_linkstat_from_phy(jme);
1678         while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1679                 mdelay(10);
1680                 phylink = jme_linkstat_from_phy(jme);
1681         }
1682 }
1683 #endif
1684
1685 static inline void
1686 jme_phy_off(struct jme_adapter *jme)
1687 {
1688         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
1689 }
1690
1691 static int
1692 jme_close(struct net_device *netdev)
1693 {
1694         struct jme_adapter *jme = netdev_priv(netdev);
1695
1696         netif_stop_queue(netdev);
1697         netif_carrier_off(netdev);
1698
1699         jme_stop_irq(jme);
1700         jme_free_irq(jme);
1701
1702         JME_NAPI_DISABLE(jme);
1703
1704         tasklet_disable(&jme->linkch_task);
1705         tasklet_disable(&jme->txclean_task);
1706         tasklet_disable(&jme->rxclean_task);
1707         tasklet_disable(&jme->rxempty_task);
1708
1709         jme_reset_ghc_speed(jme);
1710         jme_disable_rx_engine(jme);
1711         jme_disable_tx_engine(jme);
1712         jme_reset_mac_processor(jme);
1713         jme_free_rx_resources(jme);
1714         jme_free_tx_resources(jme);
1715         jme->phylink = 0;
1716         jme_phy_off(jme);
1717
1718         return 0;
1719 }
1720
1721 static int
1722 jme_alloc_txdesc(struct jme_adapter *jme,
1723                         struct sk_buff *skb)
1724 {
1725         struct jme_ring *txring = &(jme->txring[0]);
1726         int idx, nr_alloc, mask = jme->tx_ring_mask;
1727
1728         idx = txring->next_to_use;
1729         nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1730
1731         if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1732                 return -1;
1733
1734         atomic_sub(nr_alloc, &txring->nr_free);
1735
1736         txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1737
1738         return idx;
1739 }
1740
1741 static void
1742 jme_fill_tx_map(struct pci_dev *pdev,
1743                 struct txdesc *txdesc,
1744                 struct jme_buffer_info *txbi,
1745                 struct page *page,
1746                 u32 page_offset,
1747                 u32 len,
1748                 u8 hidma)
1749 {
1750         dma_addr_t dmaaddr;
1751
1752         dmaaddr = pci_map_page(pdev,
1753                                 page,
1754                                 page_offset,
1755                                 len,
1756                                 PCI_DMA_TODEVICE);
1757
1758         pci_dma_sync_single_for_device(pdev,
1759                                        dmaaddr,
1760                                        len,
1761                                        PCI_DMA_TODEVICE);
1762
1763         txdesc->dw[0] = 0;
1764         txdesc->dw[1] = 0;
1765         txdesc->desc2.flags     = TXFLAG_OWN;
1766         txdesc->desc2.flags     |= (hidma) ? TXFLAG_64BIT : 0;
1767         txdesc->desc2.datalen   = cpu_to_le16(len);
1768         txdesc->desc2.bufaddrh  = cpu_to_le32((__u64)dmaaddr >> 32);
1769         txdesc->desc2.bufaddrl  = cpu_to_le32(
1770                                         (__u64)dmaaddr & 0xFFFFFFFFUL);
1771
1772         txbi->mapping = dmaaddr;
1773         txbi->len = len;
1774 }
1775
1776 static void
1777 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1778 {
1779         struct jme_ring *txring = &(jme->txring[0]);
1780         struct txdesc *txdesc = txring->desc, *ctxdesc;
1781         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1782         u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1783         int i, nr_frags = skb_shinfo(skb)->nr_frags;
1784         int mask = jme->tx_ring_mask;
1785         struct skb_frag_struct *frag;
1786         u32 len;
1787
1788         for (i = 0 ; i < nr_frags ; ++i) {
1789                 frag = &skb_shinfo(skb)->frags[i];
1790                 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1791                 ctxbi = txbi + ((idx + i + 2) & (mask));
1792
1793                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1794                                  frag->page_offset, frag->size, hidma);
1795         }
1796
1797         len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1798         ctxdesc = txdesc + ((idx + 1) & (mask));
1799         ctxbi = txbi + ((idx + 1) & (mask));
1800         jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1801                         offset_in_page(skb->data), len, hidma);
1802
1803 }
1804
1805 static int
1806 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1807 {
1808         if (unlikely(
1809 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1810         skb_shinfo(skb)->tso_size
1811 #else
1812         skb_shinfo(skb)->gso_size
1813 #endif
1814                         && skb_header_cloned(skb) &&
1815                         pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1816                 dev_kfree_skb(skb);
1817                 return -1;
1818         }
1819
1820         return 0;
1821 }
1822
1823 static int
1824 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
1825 {
1826 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1827         *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1828 #else
1829         *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1830 #endif
1831         if (*mss) {
1832                 *flags |= TXFLAG_LSEN;
1833
1834                 if (skb->protocol == htons(ETH_P_IP)) {
1835                         struct iphdr *iph = ip_hdr(skb);
1836
1837                         iph->check = 0;
1838                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1839                                                                 iph->daddr, 0,
1840                                                                 IPPROTO_TCP,
1841                                                                 0);
1842                 } else {
1843                         struct ipv6hdr *ip6h = ipv6_hdr(skb);
1844
1845                         tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
1846                                                                 &ip6h->daddr, 0,
1847                                                                 IPPROTO_TCP,
1848                                                                 0);
1849                 }
1850
1851                 return 0;
1852         }
1853
1854         return 1;
1855 }
1856
1857 static void
1858 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
1859 {
1860 #ifdef CHECKSUM_PARTIAL
1861         if (skb->ip_summed == CHECKSUM_PARTIAL)
1862 #else
1863         if (skb->ip_summed == CHECKSUM_HW)
1864 #endif
1865         {
1866                 u8 ip_proto;
1867
1868 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1869                 if (skb->protocol == htons(ETH_P_IP))
1870                         ip_proto = ip_hdr(skb)->protocol;
1871                 else if (skb->protocol == htons(ETH_P_IPV6))
1872                         ip_proto = ipv6_hdr(skb)->nexthdr;
1873                 else
1874                         ip_proto = 0;
1875 #else
1876                 switch (skb->protocol) {
1877                 case htons(ETH_P_IP):
1878                         ip_proto = ip_hdr(skb)->protocol;
1879                         break;
1880                 case htons(ETH_P_IPV6):
1881                         ip_proto = ipv6_hdr(skb)->nexthdr;
1882                         break;
1883                 default:
1884                         ip_proto = 0;
1885                         break;
1886                 }
1887 #endif
1888
1889                 switch (ip_proto) {
1890                 case IPPROTO_TCP:
1891                         *flags |= TXFLAG_TCPCS;
1892                         break;
1893                 case IPPROTO_UDP:
1894                         *flags |= TXFLAG_UDPCS;
1895                         break;
1896                 default:
1897                         netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n");
1898                         break;
1899                 }
1900         }
1901 }
1902
1903 static inline void
1904 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
1905 {
1906         if (vlan_tx_tag_present(skb)) {
1907                 *flags |= TXFLAG_TAGON;
1908                 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1909         }
1910 }
1911
1912 static int
1913 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1914 {
1915         struct jme_ring *txring = &(jme->txring[0]);
1916         struct txdesc *txdesc;
1917         struct jme_buffer_info *txbi;
1918         u8 flags;
1919
1920         txdesc = (struct txdesc *)txring->desc + idx;
1921         txbi = txring->bufinf + idx;
1922
1923         txdesc->dw[0] = 0;
1924         txdesc->dw[1] = 0;
1925         txdesc->dw[2] = 0;
1926         txdesc->dw[3] = 0;
1927         txdesc->desc1.pktsize = cpu_to_le16(skb->len);
1928         /*
1929          * Set OWN bit at final.
1930          * When kernel transmit faster than NIC.
1931          * And NIC trying to send this descriptor before we tell
1932          * it to start sending this TX queue.
1933          * Other fields are already filled correctly.
1934          */
1935         wmb();
1936         flags = TXFLAG_OWN | TXFLAG_INT;
1937         /*
1938          * Set checksum flags while not tso
1939          */
1940         if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
1941                 jme_tx_csum(jme, skb, &flags);
1942         jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
1943         jme_map_tx_skb(jme, skb, idx);
1944         txdesc->desc1.flags = flags;
1945         /*
1946          * Set tx buffer info after telling NIC to send
1947          * For better tx_clean timing
1948          */
1949         wmb();
1950         txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
1951         txbi->skb = skb;
1952         txbi->len = skb->len;
1953         txbi->start_xmit = jiffies;
1954         if (!txbi->start_xmit)
1955                 txbi->start_xmit = (0UL-1);
1956
1957         return 0;
1958 }
1959
1960 static void
1961 jme_stop_queue_if_full(struct jme_adapter *jme)
1962 {
1963         struct jme_ring *txring = &(jme->txring[0]);
1964         struct jme_buffer_info *txbi = txring->bufinf;
1965         int idx = atomic_read(&txring->next_to_clean);
1966
1967         txbi += idx;
1968
1969         smp_wmb();
1970         if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
1971                 netif_stop_queue(jme->dev);
1972                 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n");
1973                 smp_wmb();
1974                 if (atomic_read(&txring->nr_free)
1975                         >= (jme->tx_wake_threshold)) {
1976                         netif_wake_queue(jme->dev);
1977                         netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n");
1978                 }
1979         }
1980
1981         if (unlikely(txbi->start_xmit &&
1982                         (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
1983                         txbi->skb)) {
1984                 netif_stop_queue(jme->dev);
1985                 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu\n", idx, jiffies);
1986         }
1987 }
1988
1989 /*
1990  * This function is already protected by netif_tx_lock()
1991  */
1992
1993 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
1994 static int
1995 #else
1996 static netdev_tx_t
1997 #endif
1998 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1999 {
2000         struct jme_adapter *jme = netdev_priv(netdev);
2001         int idx;
2002
2003         if (unlikely(jme_expand_header(jme, skb))) {
2004                 ++(NET_STAT(jme).tx_dropped);
2005                 return NETDEV_TX_OK;
2006         }
2007
2008         idx = jme_alloc_txdesc(jme, skb);
2009
2010         if (unlikely(idx < 0)) {
2011                 netif_stop_queue(netdev);
2012                 netif_err(jme, tx_err, jme->dev,
2013                           "BUG! Tx ring full when queue awake!\n");
2014
2015                 return NETDEV_TX_BUSY;
2016         }
2017
2018         jme_fill_tx_desc(jme, skb, idx);
2019
2020         jwrite32(jme, JME_TXCS, jme->reg_txcs |
2021                                 TXCS_SELECT_QUEUE0 |
2022                                 TXCS_QUEUE0S |
2023                                 TXCS_ENABLE);
2024 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2025         netdev->trans_start = jiffies;
2026 #endif
2027
2028         tx_dbg(jme, "xmit: %d+%d@%lu\n",
2029                idx, skb_shinfo(skb)->nr_frags + 2, jiffies);
2030         jme_stop_queue_if_full(jme);
2031
2032         return NETDEV_TX_OK;
2033 }
2034
2035 static int
2036 jme_set_macaddr(struct net_device *netdev, void *p)
2037 {
2038         struct jme_adapter *jme = netdev_priv(netdev);
2039         struct sockaddr *addr = p;
2040         u32 val;
2041
2042         if (netif_running(netdev))
2043                 return -EBUSY;
2044
2045         spin_lock_bh(&jme->macaddr_lock);
2046         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2047
2048         val = (addr->sa_data[3] & 0xff) << 24 |
2049               (addr->sa_data[2] & 0xff) << 16 |
2050               (addr->sa_data[1] & 0xff) <<  8 |
2051               (addr->sa_data[0] & 0xff);
2052         jwrite32(jme, JME_RXUMA_LO, val);
2053         val = (addr->sa_data[5] & 0xff) << 8 |
2054               (addr->sa_data[4] & 0xff);
2055         jwrite32(jme, JME_RXUMA_HI, val);
2056         spin_unlock_bh(&jme->macaddr_lock);
2057
2058         return 0;
2059 }
2060
2061 static void
2062 jme_set_multi(struct net_device *netdev)
2063 {
2064         struct jme_adapter *jme = netdev_priv(netdev);
2065         u32 mc_hash[2] = {};
2066 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2067         int i;
2068 #endif
2069
2070         spin_lock_bh(&jme->rxmcs_lock);
2071
2072         jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2073
2074         if (netdev->flags & IFF_PROMISC) {
2075                 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2076         } else if (netdev->flags & IFF_ALLMULTI) {
2077                 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2078         } else if (netdev->flags & IFF_MULTICAST) {
2079 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2080                 struct dev_mc_list *mclist;
2081 #else
2082                 struct netdev_hw_addr *ha;
2083 #endif
2084                 int bit_nr;
2085
2086                 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2087 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2088                 for (i = 0, mclist = netdev->mc_list;
2089                         mclist && i < netdev->mc_count;
2090                         ++i, mclist = mclist->next) {
2091 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2092                 netdev_for_each_mc_addr(mclist, netdev) {
2093 #else
2094                 netdev_for_each_mc_addr(ha, netdev) {
2095 #endif
2096 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2097                         bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2098 #else
2099                         bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2100 #endif
2101                         mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2102                 }
2103
2104                 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2105                 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2106         }
2107
2108         wmb();
2109         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2110
2111         spin_unlock_bh(&jme->rxmcs_lock);
2112 }
2113
2114 static int
2115 jme_change_mtu(struct net_device *netdev, int new_mtu)
2116 {
2117         struct jme_adapter *jme = netdev_priv(netdev);
2118
2119         if (new_mtu == jme->old_mtu)
2120                 return 0;
2121
2122         if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2123                 ((new_mtu) < IPV6_MIN_MTU))
2124                 return -EINVAL;
2125
2126         if (new_mtu > 4000) {
2127                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2128                 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2129                 jme_restart_rx_engine(jme);
2130         } else {
2131                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2132                 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2133                 jme_restart_rx_engine(jme);
2134         }
2135
2136         if (new_mtu > 1900) {
2137                 netdev->features &= ~(NETIF_F_HW_CSUM |
2138                                 NETIF_F_TSO
2139 #ifdef NETIF_F_TSO6
2140                                 | NETIF_F_TSO6
2141 #endif
2142                                 );
2143         } else {
2144                 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2145                         netdev->features |= NETIF_F_HW_CSUM;
2146                 if (test_bit(JME_FLAG_TSO, &jme->flags))
2147                         netdev->features |= NETIF_F_TSO
2148 #ifdef NETIF_F_TSO6
2149                                 | NETIF_F_TSO6
2150 #endif
2151                                 ;
2152         }
2153
2154         netdev->mtu = new_mtu;
2155         jme_reset_link(jme);
2156
2157         return 0;
2158 }
2159
2160 static void
2161 jme_tx_timeout(struct net_device *netdev)
2162 {
2163         struct jme_adapter *jme = netdev_priv(netdev);
2164
2165         jme->phylink = 0;
2166         jme_reset_phy_processor(jme);
2167         if (test_bit(JME_FLAG_SSET, &jme->flags))
2168                 jme_set_settings(netdev, &jme->old_ecmd);
2169
2170         /*
2171          * Force to Reset the link again
2172          */
2173         jme_reset_link(jme);
2174 }
2175
2176 static inline void jme_pause_rx(struct jme_adapter *jme)
2177 {
2178         atomic_dec(&jme->link_changing);
2179
2180         jme_set_rx_pcc(jme, PCC_OFF);
2181         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2182                 JME_NAPI_DISABLE(jme);
2183         } else {
2184                 tasklet_disable(&jme->rxclean_task);
2185                 tasklet_disable(&jme->rxempty_task);
2186         }
2187 }
2188
2189 static inline void jme_resume_rx(struct jme_adapter *jme)
2190 {
2191         struct dynpcc_info *dpi = &(jme->dpi);
2192
2193         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2194                 JME_NAPI_ENABLE(jme);
2195         } else {
2196                 tasklet_hi_enable(&jme->rxclean_task);
2197                 tasklet_hi_enable(&jme->rxempty_task);
2198         }
2199         dpi->cur                = PCC_P1;
2200         dpi->attempt            = PCC_P1;
2201         dpi->cnt                = 0;
2202         jme_set_rx_pcc(jme, PCC_P1);
2203
2204         atomic_inc(&jme->link_changing);
2205 }
2206
2207 static void
2208 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2209 {
2210         struct jme_adapter *jme = netdev_priv(netdev);
2211
2212         jme_pause_rx(jme);
2213         jme->vlgrp = grp;
2214         jme_resume_rx(jme);
2215 }
2216
2217 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2218 static void
2219 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2220 {
2221         struct jme_adapter *jme = netdev_priv(netdev);
2222
2223         if(jme->vlgrp) {
2224                 jme_pause_rx(jme);
2225 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2226                 jme->vlgrp->vlan_devices[vid] = NULL;
2227 #else
2228                 vlan_group_set_device(jme->vlgrp, vid, NULL);
2229 #endif
2230                 jme_resume_rx(jme);
2231         }
2232 }
2233 #endif
2234
2235 static void
2236 jme_get_drvinfo(struct net_device *netdev,
2237                      struct ethtool_drvinfo *info)
2238 {
2239         struct jme_adapter *jme = netdev_priv(netdev);
2240
2241         strcpy(info->driver, DRV_NAME);
2242         strcpy(info->version, DRV_VERSION);
2243         strcpy(info->bus_info, pci_name(jme->pdev));
2244 }
2245
2246 static int
2247 jme_get_regs_len(struct net_device *netdev)
2248 {
2249         return JME_REG_LEN;
2250 }
2251
2252 static void
2253 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2254 {
2255         int i;
2256
2257         for (i = 0 ; i < len ; i += 4)
2258                 p[i >> 2] = jread32(jme, reg + i);
2259 }
2260
2261 static void
2262 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2263 {
2264         int i;
2265         u16 *p16 = (u16 *)p;
2266
2267         for (i = 0 ; i < reg_nr ; ++i)
2268                 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2269 }
2270
2271 static void
2272 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2273 {
2274         struct jme_adapter *jme = netdev_priv(netdev);
2275         u32 *p32 = (u32 *)p;
2276
2277         memset(p, 0xFF, JME_REG_LEN);
2278
2279         regs->version = 1;
2280         mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2281
2282         p32 += 0x100 >> 2;
2283         mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2284
2285         p32 += 0x100 >> 2;
2286         mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2287
2288         p32 += 0x100 >> 2;
2289         mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2290
2291         p32 += 0x100 >> 2;
2292         mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2293 }
2294
2295 static int
2296 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2297 {
2298         struct jme_adapter *jme = netdev_priv(netdev);
2299
2300         ecmd->tx_coalesce_usecs = PCC_TX_TO;
2301         ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2302
2303         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2304                 ecmd->use_adaptive_rx_coalesce = false;
2305                 ecmd->rx_coalesce_usecs = 0;
2306                 ecmd->rx_max_coalesced_frames = 0;
2307                 return 0;
2308         }
2309
2310         ecmd->use_adaptive_rx_coalesce = true;
2311
2312         switch (jme->dpi.cur) {
2313         case PCC_P1:
2314                 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2315                 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2316                 break;
2317         case PCC_P2:
2318                 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2319                 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2320                 break;
2321         case PCC_P3:
2322                 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2323                 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2324                 break;
2325         default:
2326                 break;
2327         }
2328
2329         return 0;
2330 }
2331
2332 static int
2333 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2334 {
2335         struct jme_adapter *jme = netdev_priv(netdev);
2336         struct dynpcc_info *dpi = &(jme->dpi);
2337
2338         if (netif_running(netdev))
2339                 return -EBUSY;
2340
2341         if (ecmd->use_adaptive_rx_coalesce &&
2342             test_bit(JME_FLAG_POLL, &jme->flags)) {
2343                 clear_bit(JME_FLAG_POLL, &jme->flags);
2344                 jme->jme_rx = netif_rx;
2345                 jme->jme_vlan_rx = vlan_hwaccel_rx;
2346                 dpi->cur                = PCC_P1;
2347                 dpi->attempt            = PCC_P1;
2348                 dpi->cnt                = 0;
2349                 jme_set_rx_pcc(jme, PCC_P1);
2350                 jme_interrupt_mode(jme);
2351         } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2352                    !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2353                 set_bit(JME_FLAG_POLL, &jme->flags);
2354                 jme->jme_rx = netif_receive_skb;
2355                 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2356                 jme_interrupt_mode(jme);
2357         }
2358
2359         return 0;
2360 }
2361
2362 static void
2363 jme_get_pauseparam(struct net_device *netdev,
2364                         struct ethtool_pauseparam *ecmd)
2365 {
2366         struct jme_adapter *jme = netdev_priv(netdev);
2367         u32 val;
2368
2369         ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2370         ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2371
2372         spin_lock_bh(&jme->phy_lock);
2373         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2374         spin_unlock_bh(&jme->phy_lock);
2375
2376         ecmd->autoneg =
2377                 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2378 }
2379
2380 static int
2381 jme_set_pauseparam(struct net_device *netdev,
2382                         struct ethtool_pauseparam *ecmd)
2383 {
2384         struct jme_adapter *jme = netdev_priv(netdev);
2385         u32 val;
2386
2387         if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2388                 (ecmd->tx_pause != 0)) {
2389
2390                 if (ecmd->tx_pause)
2391                         jme->reg_txpfc |= TXPFC_PF_EN;
2392                 else
2393                         jme->reg_txpfc &= ~TXPFC_PF_EN;
2394
2395                 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2396         }
2397
2398         spin_lock_bh(&jme->rxmcs_lock);
2399         if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2400                 (ecmd->rx_pause != 0)) {
2401
2402                 if (ecmd->rx_pause)
2403                         jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2404                 else
2405                         jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2406
2407                 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2408         }
2409         spin_unlock_bh(&jme->rxmcs_lock);
2410
2411         spin_lock_bh(&jme->phy_lock);
2412         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2413         if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2414                 (ecmd->autoneg != 0)) {
2415
2416                 if (ecmd->autoneg)
2417                         val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2418                 else
2419                         val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2420
2421                 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2422                                 MII_ADVERTISE, val);
2423         }
2424         spin_unlock_bh(&jme->phy_lock);
2425
2426         return 0;
2427 }
2428
2429 static void
2430 jme_get_wol(struct net_device *netdev,
2431                 struct ethtool_wolinfo *wol)
2432 {
2433         struct jme_adapter *jme = netdev_priv(netdev);
2434
2435         wol->supported = WAKE_MAGIC | WAKE_PHY;
2436
2437         wol->wolopts = 0;
2438
2439         if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2440                 wol->wolopts |= WAKE_PHY;
2441
2442         if (jme->reg_pmcs & PMCS_MFEN)
2443                 wol->wolopts |= WAKE_MAGIC;
2444
2445 }
2446
2447 static int
2448 jme_set_wol(struct net_device *netdev,
2449                 struct ethtool_wolinfo *wol)
2450 {
2451         struct jme_adapter *jme = netdev_priv(netdev);
2452
2453         if (wol->wolopts & (WAKE_MAGICSECURE |
2454                                 WAKE_UCAST |
2455                                 WAKE_MCAST |
2456                                 WAKE_BCAST |
2457                                 WAKE_ARP))
2458                 return -EOPNOTSUPP;
2459
2460         jme->reg_pmcs = 0;
2461
2462         if (wol->wolopts & WAKE_PHY)
2463                 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2464
2465         if (wol->wolopts & WAKE_MAGIC)
2466                 jme->reg_pmcs |= PMCS_MFEN;
2467
2468         jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2469
2470         return 0;
2471 }
2472
2473 static int
2474 jme_get_settings(struct net_device *netdev,
2475                      struct ethtool_cmd *ecmd)
2476 {
2477         struct jme_adapter *jme = netdev_priv(netdev);
2478         int rc;
2479
2480         spin_lock_bh(&jme->phy_lock);
2481         rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2482         spin_unlock_bh(&jme->phy_lock);
2483         return rc;
2484 }
2485
2486 static int
2487 jme_set_settings(struct net_device *netdev,
2488                      struct ethtool_cmd *ecmd)
2489 {
2490         struct jme_adapter *jme = netdev_priv(netdev);
2491         int rc, fdc = 0;
2492
2493         if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2494                 return -EINVAL;
2495
2496         /*
2497          * Check If user changed duplex only while force_media.
2498          * Hardware would not generate link change interrupt.
2499          */
2500         if (jme->mii_if.force_media &&
2501         ecmd->autoneg != AUTONEG_ENABLE &&
2502         (jme->mii_if.full_duplex != ecmd->duplex))
2503                 fdc = 1;
2504
2505         spin_lock_bh(&jme->phy_lock);
2506         rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2507         spin_unlock_bh(&jme->phy_lock);
2508
2509         if (!rc) {
2510                 if (fdc)
2511                         jme_reset_link(jme);
2512                 set_bit(JME_FLAG_SSET, &jme->flags);
2513                 jme->old_ecmd = *ecmd;
2514         }
2515
2516         return rc;
2517 }
2518
2519 static u32
2520 jme_get_link(struct net_device *netdev)
2521 {
2522         struct jme_adapter *jme = netdev_priv(netdev);
2523         return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2524 }
2525
2526 static u32
2527 jme_get_msglevel(struct net_device *netdev)
2528 {
2529         struct jme_adapter *jme = netdev_priv(netdev);
2530         return jme->msg_enable;
2531 }
2532
2533 static void
2534 jme_set_msglevel(struct net_device *netdev, u32 value)
2535 {
2536         struct jme_adapter *jme = netdev_priv(netdev);
2537         jme->msg_enable = value;
2538 }
2539
2540 static u32
2541 jme_get_rx_csum(struct net_device *netdev)
2542 {
2543         struct jme_adapter *jme = netdev_priv(netdev);
2544         return jme->reg_rxmcs & RXMCS_CHECKSUM;
2545 }
2546
2547 static int
2548 jme_set_rx_csum(struct net_device *netdev, u32 on)
2549 {
2550         struct jme_adapter *jme = netdev_priv(netdev);
2551
2552         spin_lock_bh(&jme->rxmcs_lock);
2553         if (on)
2554                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2555         else
2556                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2557         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2558         spin_unlock_bh(&jme->rxmcs_lock);
2559
2560         return 0;
2561 }
2562
2563 static int
2564 jme_set_tx_csum(struct net_device *netdev, u32 on)
2565 {
2566         struct jme_adapter *jme = netdev_priv(netdev);
2567
2568         if (on) {
2569                 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2570                 if (netdev->mtu <= 1900)
2571                         netdev->features |= NETIF_F_HW_CSUM;
2572         } else {
2573                 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2574                 netdev->features &= ~NETIF_F_HW_CSUM;
2575         }
2576
2577         return 0;
2578 }
2579
2580 static int
2581 jme_set_tso(struct net_device *netdev, u32 on)
2582 {
2583         struct jme_adapter *jme = netdev_priv(netdev);
2584
2585         if (on) {
2586                 set_bit(JME_FLAG_TSO, &jme->flags);
2587                 if (netdev->mtu <= 1900)
2588                         netdev->features |= NETIF_F_TSO
2589 #ifdef NETIF_F_TSO6
2590                                 | NETIF_F_TSO6
2591 #endif
2592                                 ;
2593         } else {
2594                 clear_bit(JME_FLAG_TSO, &jme->flags);
2595                 netdev->features &= ~(NETIF_F_TSO
2596 #ifdef NETIF_F_TSO6
2597                                 | NETIF_F_TSO6
2598 #endif
2599                                 );
2600         }
2601
2602         return 0;
2603 }
2604
2605 static int
2606 jme_nway_reset(struct net_device *netdev)
2607 {
2608         struct jme_adapter *jme = netdev_priv(netdev);
2609         jme_restart_an(jme);
2610         return 0;
2611 }
2612
2613 static u8
2614 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2615 {
2616         u32 val;
2617         int to;
2618
2619         val = jread32(jme, JME_SMBCSR);
2620         to = JME_SMB_BUSY_TIMEOUT;
2621         while ((val & SMBCSR_BUSY) && --to) {
2622                 msleep(1);
2623                 val = jread32(jme, JME_SMBCSR);
2624         }
2625         if (!to) {
2626                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2627                 return 0xFF;
2628         }
2629
2630         jwrite32(jme, JME_SMBINTF,
2631                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2632                 SMBINTF_HWRWN_READ |
2633                 SMBINTF_HWCMD);
2634
2635         val = jread32(jme, JME_SMBINTF);
2636         to = JME_SMB_BUSY_TIMEOUT;
2637         while ((val & SMBINTF_HWCMD) && --to) {
2638                 msleep(1);
2639                 val = jread32(jme, JME_SMBINTF);
2640         }
2641         if (!to) {
2642                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2643                 return 0xFF;
2644         }
2645
2646         return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2647 }
2648
2649 static void
2650 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2651 {
2652         u32 val;
2653         int to;
2654
2655         val = jread32(jme, JME_SMBCSR);
2656         to = JME_SMB_BUSY_TIMEOUT;
2657         while ((val & SMBCSR_BUSY) && --to) {
2658                 msleep(1);
2659                 val = jread32(jme, JME_SMBCSR);
2660         }
2661         if (!to) {
2662                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2663                 return;
2664         }
2665
2666         jwrite32(jme, JME_SMBINTF,
2667                 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2668                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2669                 SMBINTF_HWRWN_WRITE |
2670                 SMBINTF_HWCMD);
2671
2672         val = jread32(jme, JME_SMBINTF);
2673         to = JME_SMB_BUSY_TIMEOUT;
2674         while ((val & SMBINTF_HWCMD) && --to) {
2675                 msleep(1);
2676                 val = jread32(jme, JME_SMBINTF);
2677         }
2678         if (!to) {
2679                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2680                 return;
2681         }
2682
2683         mdelay(2);
2684 }
2685
2686 static int
2687 jme_get_eeprom_len(struct net_device *netdev)
2688 {
2689         struct jme_adapter *jme = netdev_priv(netdev);
2690         u32 val;
2691         val = jread32(jme, JME_SMBCSR);
2692         return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2693 }
2694
2695 static int
2696 jme_get_eeprom(struct net_device *netdev,
2697                 struct ethtool_eeprom *eeprom, u8 *data)
2698 {
2699         struct jme_adapter *jme = netdev_priv(netdev);
2700         int i, offset = eeprom->offset, len = eeprom->len;
2701
2702         /*
2703          * ethtool will check the boundary for us
2704          */
2705         eeprom->magic = JME_EEPROM_MAGIC;
2706         for (i = 0 ; i < len ; ++i)
2707                 data[i] = jme_smb_read(jme, i + offset);
2708
2709         return 0;
2710 }
2711
2712 static int
2713 jme_set_eeprom(struct net_device *netdev,
2714                 struct ethtool_eeprom *eeprom, u8 *data)
2715 {
2716         struct jme_adapter *jme = netdev_priv(netdev);
2717         int i, offset = eeprom->offset, len = eeprom->len;
2718
2719         if (eeprom->magic != JME_EEPROM_MAGIC)
2720                 return -EINVAL;
2721
2722         /*
2723          * ethtool will check the boundary for us
2724          */
2725         for (i = 0 ; i < len ; ++i)
2726                 jme_smb_write(jme, i + offset, data[i]);
2727
2728         return 0;
2729 }
2730
2731 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2732 static struct ethtool_ops jme_ethtool_ops = {
2733 #else
2734 static const struct ethtool_ops jme_ethtool_ops = {
2735 #endif
2736         .get_drvinfo            = jme_get_drvinfo,
2737         .get_regs_len           = jme_get_regs_len,
2738         .get_regs               = jme_get_regs,
2739         .get_coalesce           = jme_get_coalesce,
2740         .set_coalesce           = jme_set_coalesce,
2741         .get_pauseparam         = jme_get_pauseparam,
2742         .set_pauseparam         = jme_set_pauseparam,
2743         .get_wol                = jme_get_wol,
2744         .set_wol                = jme_set_wol,
2745         .get_settings           = jme_get_settings,
2746         .set_settings           = jme_set_settings,
2747         .get_link               = jme_get_link,
2748         .get_msglevel           = jme_get_msglevel,
2749         .set_msglevel           = jme_set_msglevel,
2750         .get_rx_csum            = jme_get_rx_csum,
2751         .set_rx_csum            = jme_set_rx_csum,
2752         .set_tx_csum            = jme_set_tx_csum,
2753         .set_tso                = jme_set_tso,
2754         .set_sg                 = ethtool_op_set_sg,
2755         .nway_reset             = jme_nway_reset,
2756         .get_eeprom_len         = jme_get_eeprom_len,
2757         .get_eeprom             = jme_get_eeprom,
2758         .set_eeprom             = jme_set_eeprom,
2759 };
2760
2761 static int
2762 jme_pci_dma64(struct pci_dev *pdev)
2763 {
2764         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2765 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2766             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2767 #else
2768             !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2769 #endif
2770            )
2771 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2772                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2773 #else
2774                 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2775 #endif
2776                         return 1;
2777
2778         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2779 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2780             !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2781 #else
2782             !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2783 #endif
2784            )
2785 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2786                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2787 #else
2788                 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2789 #endif
2790                         return 1;
2791
2792 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2793         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2794                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2795 #else
2796         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2797                 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
2798 #endif
2799                         return 0;
2800
2801         return -1;
2802 }
2803
2804 static inline void
2805 jme_phy_init(struct jme_adapter *jme)
2806 {
2807         u16 reg26;
2808
2809         reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2810         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2811 }
2812
2813 static inline void
2814 jme_check_hw_ver(struct jme_adapter *jme)
2815 {
2816         u32 chipmode;
2817
2818         chipmode = jread32(jme, JME_CHIPMODE);
2819
2820         jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
2821         jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
2822 }
2823
2824 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2825 static const struct net_device_ops jme_netdev_ops = {
2826         .ndo_open               = jme_open,
2827         .ndo_stop               = jme_close,
2828         .ndo_validate_addr      = eth_validate_addr,
2829         .ndo_start_xmit         = jme_start_xmit,
2830         .ndo_set_mac_address    = jme_set_macaddr,
2831         .ndo_set_multicast_list = jme_set_multi,
2832         .ndo_change_mtu         = jme_change_mtu,
2833         .ndo_tx_timeout         = jme_tx_timeout,
2834         .ndo_vlan_rx_register   = jme_vlan_rx_register,
2835 };
2836 #endif
2837
2838 static int __devinit
2839 jme_init_one(struct pci_dev *pdev,
2840              const struct pci_device_id *ent)
2841 {
2842         int rc = 0, using_dac, i;
2843         struct net_device *netdev;
2844         struct jme_adapter *jme;
2845         u16 bmcr, bmsr;
2846         u32 apmc;
2847
2848         /*
2849          * set up PCI device basics
2850          */
2851         rc = pci_enable_device(pdev);
2852         if (rc) {
2853                 pr_err("Cannot enable PCI device\n");
2854                 goto err_out;
2855         }
2856
2857         using_dac = jme_pci_dma64(pdev);
2858         if (using_dac < 0) {
2859                 pr_err("Cannot set PCI DMA Mask\n");
2860                 rc = -EIO;
2861                 goto err_out_disable_pdev;
2862         }
2863
2864         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2865                 pr_err("No PCI resource region found\n");
2866                 rc = -ENOMEM;
2867                 goto err_out_disable_pdev;
2868         }
2869
2870         rc = pci_request_regions(pdev, DRV_NAME);
2871         if (rc) {
2872                 pr_err("Cannot obtain PCI resource region\n");
2873                 goto err_out_disable_pdev;
2874         }
2875
2876         pci_set_master(pdev);
2877
2878         /*
2879          * alloc and init net device
2880          */
2881         netdev = alloc_etherdev(sizeof(*jme));
2882         if (!netdev) {
2883                 pr_err("Cannot allocate netdev structure\n");
2884                 rc = -ENOMEM;
2885                 goto err_out_release_regions;
2886         }
2887 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2888         netdev->netdev_ops = &jme_netdev_ops;
2889 #else
2890         netdev->open                    = jme_open;
2891         netdev->stop                    = jme_close;
2892         netdev->hard_start_xmit         = jme_start_xmit;
2893         netdev->set_mac_address         = jme_set_macaddr;
2894         netdev->set_multicast_list      = jme_set_multi;
2895         netdev->change_mtu              = jme_change_mtu;
2896         netdev->tx_timeout              = jme_tx_timeout;
2897         netdev->vlan_rx_register        = jme_vlan_rx_register;
2898 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2899         netdev->vlan_rx_kill_vid        = jme_vlan_rx_kill_vid;
2900 #endif
2901         NETDEV_GET_STATS(netdev, &jme_get_stats);
2902 #endif
2903         netdev->ethtool_ops             = &jme_ethtool_ops;
2904         netdev->watchdog_timeo          = TX_TIMEOUT;
2905         netdev->features                =       NETIF_F_HW_CSUM |
2906                                                 NETIF_F_SG |
2907                                                 NETIF_F_TSO |
2908 #ifdef NETIF_F_TSO6
2909                                                 NETIF_F_TSO6 |
2910 #endif
2911                                                 NETIF_F_HW_VLAN_TX |
2912                                                 NETIF_F_HW_VLAN_RX;
2913         if (using_dac)
2914                 netdev->features        |=      NETIF_F_HIGHDMA;
2915
2916         SET_NETDEV_DEV(netdev, &pdev->dev);
2917         pci_set_drvdata(pdev, netdev);
2918
2919         /*
2920          * init adapter info
2921          */
2922         jme = netdev_priv(netdev);
2923         jme->pdev = pdev;
2924         jme->dev = netdev;
2925         jme->jme_rx = netif_rx;
2926         jme->jme_vlan_rx = vlan_hwaccel_rx;
2927         jme->old_mtu = netdev->mtu = 1500;
2928         jme->phylink = 0;
2929         jme->tx_ring_size = 1 << 10;
2930         jme->tx_ring_mask = jme->tx_ring_size - 1;
2931         jme->tx_wake_threshold = 1 << 9;
2932         jme->rx_ring_size = 1 << 9;
2933         jme->rx_ring_mask = jme->rx_ring_size - 1;
2934         jme->msg_enable = JME_DEF_MSG_ENABLE;
2935         jme->regs = ioremap(pci_resource_start(pdev, 0),
2936                              pci_resource_len(pdev, 0));
2937         if (!(jme->regs)) {
2938                 pr_err("Mapping PCI resource region error\n");
2939                 rc = -ENOMEM;
2940                 goto err_out_free_netdev;
2941         }
2942
2943         if (no_pseudohp) {
2944                 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
2945                 jwrite32(jme, JME_APMC, apmc);
2946         } else if (force_pseudohp) {
2947                 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
2948                 jwrite32(jme, JME_APMC, apmc);
2949         }
2950
2951         NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
2952
2953         spin_lock_init(&jme->phy_lock);
2954         spin_lock_init(&jme->macaddr_lock);
2955         spin_lock_init(&jme->rxmcs_lock);
2956
2957         atomic_set(&jme->link_changing, 1);
2958         atomic_set(&jme->rx_cleaning, 1);
2959         atomic_set(&jme->tx_cleaning, 1);
2960         atomic_set(&jme->rx_empty, 1);
2961
2962         tasklet_init(&jme->pcc_task,
2963                      jme_pcc_tasklet,
2964                      (unsigned long) jme);
2965         tasklet_init(&jme->linkch_task,
2966                      jme_link_change_tasklet,
2967                      (unsigned long) jme);
2968         tasklet_init(&jme->txclean_task,
2969                      jme_tx_clean_tasklet,
2970                      (unsigned long) jme);
2971         tasklet_init(&jme->rxclean_task,
2972                      jme_rx_clean_tasklet,
2973                      (unsigned long) jme);
2974         tasklet_init(&jme->rxempty_task,
2975                      jme_rx_empty_tasklet,
2976                      (unsigned long) jme);
2977         tasklet_disable_nosync(&jme->linkch_task);
2978         tasklet_disable_nosync(&jme->txclean_task);
2979         tasklet_disable_nosync(&jme->rxclean_task);
2980         tasklet_disable_nosync(&jme->rxempty_task);
2981         jme->dpi.cur = PCC_P1;
2982
2983         jme->reg_ghc = 0;
2984         jme->reg_rxcs = RXCS_DEFAULT;
2985         jme->reg_rxmcs = RXMCS_DEFAULT;
2986         jme->reg_txpfc = 0;
2987         jme->reg_pmcs = PMCS_MFEN;
2988         set_bit(JME_FLAG_TXCSUM, &jme->flags);
2989         set_bit(JME_FLAG_TSO, &jme->flags);
2990
2991         /*
2992          * Get Max Read Req Size from PCI Config Space
2993          */
2994         pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
2995         jme->mrrs &= PCI_DCSR_MRRS_MASK;
2996         switch (jme->mrrs) {
2997         case MRRS_128B:
2998                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
2999                 break;
3000         case MRRS_256B:
3001                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3002                 break;
3003         default:
3004                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3005                 break;
3006         }
3007
3008         /*
3009          * Must check before reset_mac_processor
3010          */
3011         jme_check_hw_ver(jme);
3012         jme->mii_if.dev = netdev;
3013         if (jme->fpgaver) {
3014                 jme->mii_if.phy_id = 0;
3015                 for (i = 1 ; i < 32 ; ++i) {
3016                         bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3017                         bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3018                         if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3019                                 jme->mii_if.phy_id = i;
3020                                 break;
3021                         }
3022                 }
3023
3024                 if (!jme->mii_if.phy_id) {
3025                         rc = -EIO;
3026                         pr_err("Can not find phy_id\n");
3027                         goto err_out_unmap;
3028                 }
3029
3030                 jme->reg_ghc |= GHC_LINK_POLL;
3031         } else {
3032                 jme->mii_if.phy_id = 1;
3033         }
3034         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3035                 jme->mii_if.supports_gmii = true;
3036         else
3037                 jme->mii_if.supports_gmii = false;
3038         jme->mii_if.mdio_read = jme_mdio_read;
3039         jme->mii_if.mdio_write = jme_mdio_write;
3040
3041         jme_clear_pm(jme);
3042         jme_set_phyfifoa(jme);
3043         pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
3044         if (!jme->fpgaver)
3045                 jme_phy_init(jme);
3046         jme_phy_off(jme);
3047
3048         /*
3049          * Reset MAC processor and reload EEPROM for MAC Address
3050          */
3051         jme_reset_mac_processor(jme);
3052         rc = jme_reload_eeprom(jme);
3053         if (rc) {
3054                 pr_err("Reload eeprom for reading MAC Address error\n");
3055                 goto err_out_unmap;
3056         }
3057         jme_load_macaddr(netdev);
3058
3059         /*
3060          * Tell stack that we are not ready to work until open()
3061          */
3062         netif_carrier_off(netdev);
3063         netif_stop_queue(netdev);
3064
3065         /*
3066          * Register netdev
3067          */
3068         rc = register_netdev(netdev);
3069         if (rc) {
3070                 pr_err("Cannot register net device\n");
3071                 goto err_out_unmap;
3072         }
3073
3074         netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x "
3075                    "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3076                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3077                    "JMC250 Gigabit Ethernet" :
3078                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3079                    "JMC260 Fast Ethernet" : "Unknown",
3080                    (jme->fpgaver != 0) ? " (FPGA)" : "",
3081                    (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3082                    jme->rev,
3083                    netdev->dev_addr[0],
3084                    netdev->dev_addr[1],
3085                    netdev->dev_addr[2],
3086                    netdev->dev_addr[3],
3087                    netdev->dev_addr[4],
3088                    netdev->dev_addr[5]);
3089
3090         return 0;
3091
3092 err_out_unmap:
3093         iounmap(jme->regs);
3094 err_out_free_netdev:
3095         pci_set_drvdata(pdev, NULL);
3096         free_netdev(netdev);
3097 err_out_release_regions:
3098         pci_release_regions(pdev);
3099 err_out_disable_pdev:
3100         pci_disable_device(pdev);
3101 err_out:
3102         return rc;
3103 }
3104
3105 static void __devexit
3106 jme_remove_one(struct pci_dev *pdev)
3107 {
3108         struct net_device *netdev = pci_get_drvdata(pdev);
3109         struct jme_adapter *jme = netdev_priv(netdev);
3110
3111         unregister_netdev(netdev);
3112         iounmap(jme->regs);
3113         pci_set_drvdata(pdev, NULL);
3114         free_netdev(netdev);
3115         pci_release_regions(pdev);
3116         pci_disable_device(pdev);
3117
3118 }
3119
3120 #ifdef CONFIG_PM
3121 static int
3122 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3123 {
3124         struct net_device *netdev = pci_get_drvdata(pdev);
3125         struct jme_adapter *jme = netdev_priv(netdev);
3126
3127         atomic_dec(&jme->link_changing);
3128
3129         netif_device_detach(netdev);
3130         netif_stop_queue(netdev);
3131         jme_stop_irq(jme);
3132
3133         tasklet_disable(&jme->txclean_task);
3134         tasklet_disable(&jme->rxclean_task);
3135         tasklet_disable(&jme->rxempty_task);
3136
3137         if (netif_carrier_ok(netdev)) {
3138                 if (test_bit(JME_FLAG_POLL, &jme->flags))
3139                         jme_polling_mode(jme);
3140
3141                 jme_stop_pcc_timer(jme);
3142                 jme_reset_ghc_speed(jme);
3143                 jme_disable_rx_engine(jme);
3144                 jme_disable_tx_engine(jme);
3145                 jme_reset_mac_processor(jme);
3146                 jme_free_rx_resources(jme);
3147                 jme_free_tx_resources(jme);
3148                 netif_carrier_off(netdev);
3149                 jme->phylink = 0;
3150         }
3151
3152         tasklet_enable(&jme->txclean_task);
3153         tasklet_hi_enable(&jme->rxclean_task);
3154         tasklet_hi_enable(&jme->rxempty_task);
3155
3156         pci_save_state(pdev);
3157         if (jme->reg_pmcs) {
3158                 jme_set_100m_half(jme);
3159
3160                 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
3161                         jme_wait_link(jme);
3162
3163                 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
3164
3165                 pci_enable_wake(pdev, PCI_D3cold, true);
3166         } else {
3167                 jme_phy_off(jme);
3168         }
3169         pci_set_power_state(pdev, PCI_D3cold);
3170
3171         return 0;
3172 }
3173
3174 static int
3175 jme_resume(struct pci_dev *pdev)
3176 {
3177         struct net_device *netdev = pci_get_drvdata(pdev);
3178         struct jme_adapter *jme = netdev_priv(netdev);
3179
3180         jme_clear_pm(jme);
3181         pci_restore_state(pdev);
3182
3183         if (test_bit(JME_FLAG_SSET, &jme->flags)) {
3184                 jme_phy_on(jme);
3185                 jme_set_settings(netdev, &jme->old_ecmd);
3186         } else {
3187                 jme_reset_phy_processor(jme);
3188         }
3189
3190         jme_start_irq(jme);
3191         netif_device_attach(netdev);
3192
3193         atomic_inc(&jme->link_changing);
3194
3195         jme_reset_link(jme);
3196
3197         return 0;
3198 }
3199 #endif
3200
3201 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3202 static struct pci_device_id jme_pci_tbl[] = {
3203 #else
3204 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3205 #endif
3206         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3207         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3208         { }
3209 };
3210
3211 static struct pci_driver jme_driver = {
3212         .name           = DRV_NAME,
3213         .id_table       = jme_pci_tbl,
3214         .probe          = jme_init_one,
3215         .remove         = __devexit_p(jme_remove_one),
3216 #ifdef CONFIG_PM
3217         .suspend        = jme_suspend,
3218         .resume         = jme_resume,
3219 #endif /* CONFIG_PM */
3220 };
3221
3222 static int __init
3223 jme_init_module(void)
3224 {
3225         pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION);
3226         return pci_register_driver(&jme_driver);
3227 }
3228
3229 static void __exit
3230 jme_cleanup_module(void)
3231 {
3232         pci_unregister_driver(&jme_driver);
3233 }
3234
3235 module_init(jme_init_module);
3236 module_exit(jme_cleanup_module);
3237
3238 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3239 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3240 MODULE_LICENSE("GPL");
3241 MODULE_VERSION(DRV_VERSION);
3242 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3243