2 * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
4 * Copyright 2008 JMicron Technology Corporation
5 * http://www.jmicron.com/
7 * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/version.h>
25 #include <linux/module.h>
26 #include <linux/kernel.h>
27 #include <linux/pci.h>
28 #include <linux/netdevice.h>
29 #include <linux/etherdevice.h>
30 #include <linux/ethtool.h>
31 #include <linux/mii.h>
32 #include <linux/crc32.h>
33 #include <linux/delay.h>
34 #include <linux/spinlock.h>
37 #include <linux/ipv6.h>
38 #include <linux/tcp.h>
39 #include <linux/udp.h>
40 #include <linux/if_vlan.h>
41 #include <linux/slab.h>
42 #include <net/ip6_checksum.h>
45 static int force_pseudohp = -1;
46 static int no_pseudohp = -1;
47 static int no_extplug = -1;
48 module_param(force_pseudohp, int, 0);
49 MODULE_PARM_DESC(force_pseudohp,
50 "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
51 module_param(no_pseudohp, int, 0);
52 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
53 module_param(no_extplug, int, 0);
54 MODULE_PARM_DESC(no_extplug,
55 "Do not use external plug signal for pseudo hot-plug.");
58 jme_mdio_read(struct net_device *netdev, int phy, int reg)
60 struct jme_adapter *jme = netdev_priv(netdev);
61 int i, val, again = (reg == MII_BMSR) ? 1 : 0;
64 jwrite32(jme, JME_SMI, SMI_OP_REQ |
69 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
71 val = jread32(jme, JME_SMI);
72 if ((val & SMI_OP_REQ) == 0)
77 jeprintk(jme->pdev, "phy(%d) read timeout : %d\n", phy, reg);
84 return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
88 jme_mdio_write(struct net_device *netdev,
89 int phy, int reg, int val)
91 struct jme_adapter *jme = netdev_priv(netdev);
94 jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
95 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
96 smi_phy_addr(phy) | smi_reg_addr(reg));
99 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
101 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
106 jeprintk(jme->pdev, "phy(%d) write timeout : %d\n", phy, reg);
110 jme_reset_phy_processor(struct jme_adapter *jme)
114 jme_mdio_write(jme->dev,
116 MII_ADVERTISE, ADVERTISE_ALL |
117 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
119 if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
120 jme_mdio_write(jme->dev,
123 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
125 val = jme_mdio_read(jme->dev,
129 jme_mdio_write(jme->dev,
131 MII_BMCR, val | BMCR_RESET);
135 jme_setup_wakeup_frame(struct jme_adapter *jme,
136 u32 *mask, u32 crc, int fnr)
143 jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
145 jwrite32(jme, JME_WFODP, crc);
151 for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
152 jwrite32(jme, JME_WFOI,
153 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
154 (fnr & WFOI_FRAME_SEL));
156 jwrite32(jme, JME_WFODP, mask[i]);
162 jme_reset_mac_processor(struct jme_adapter *jme)
164 u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
165 u32 crc = 0xCDCDCDCD;
169 jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
171 jwrite32(jme, JME_GHC, jme->reg_ghc);
173 jwrite32(jme, JME_RXDBA_LO, 0x00000000);
174 jwrite32(jme, JME_RXDBA_HI, 0x00000000);
175 jwrite32(jme, JME_RXQDC, 0x00000000);
176 jwrite32(jme, JME_RXNDA, 0x00000000);
177 jwrite32(jme, JME_TXDBA_LO, 0x00000000);
178 jwrite32(jme, JME_TXDBA_HI, 0x00000000);
179 jwrite32(jme, JME_TXQDC, 0x00000000);
180 jwrite32(jme, JME_TXNDA, 0x00000000);
182 jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
183 jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
184 for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
185 jme_setup_wakeup_frame(jme, mask, crc, i);
187 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
189 gpreg0 = GPREG0_DEFAULT;
190 jwrite32(jme, JME_GPREG0, gpreg0);
191 jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
195 jme_reset_ghc_speed(struct jme_adapter *jme)
197 jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX);
198 jwrite32(jme, JME_GHC, jme->reg_ghc);
202 jme_clear_pm(struct jme_adapter *jme)
204 jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
205 pci_set_power_state(jme->pdev, PCI_D0);
206 pci_enable_wake(jme->pdev, PCI_D0, false);
210 jme_reload_eeprom(struct jme_adapter *jme)
215 val = jread32(jme, JME_SMBCSR);
217 if (val & SMBCSR_EEPROMD) {
219 jwrite32(jme, JME_SMBCSR, val);
220 val |= SMBCSR_RELOAD;
221 jwrite32(jme, JME_SMBCSR, val);
224 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
226 if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
231 jeprintk(jme->pdev, "eeprom reload timeout\n");
240 jme_load_macaddr(struct net_device *netdev)
242 struct jme_adapter *jme = netdev_priv(netdev);
243 unsigned char macaddr[6];
246 spin_lock_bh(&jme->macaddr_lock);
247 val = jread32(jme, JME_RXUMA_LO);
248 macaddr[0] = (val >> 0) & 0xFF;
249 macaddr[1] = (val >> 8) & 0xFF;
250 macaddr[2] = (val >> 16) & 0xFF;
251 macaddr[3] = (val >> 24) & 0xFF;
252 val = jread32(jme, JME_RXUMA_HI);
253 macaddr[4] = (val >> 0) & 0xFF;
254 macaddr[5] = (val >> 8) & 0xFF;
255 memcpy(netdev->dev_addr, macaddr, 6);
256 spin_unlock_bh(&jme->macaddr_lock);
260 jme_set_rx_pcc(struct jme_adapter *jme, int p)
264 jwrite32(jme, JME_PCCRX0,
265 ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
266 ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
269 jwrite32(jme, JME_PCCRX0,
270 ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
271 ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
274 jwrite32(jme, JME_PCCRX0,
275 ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
276 ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
279 jwrite32(jme, JME_PCCRX0,
280 ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
281 ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
288 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
289 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
290 msg_rx_status(jme, "Switched to PCC_P%d\n", p);
292 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
297 jme_start_irq(struct jme_adapter *jme)
299 register struct dynpcc_info *dpi = &(jme->dpi);
301 jme_set_rx_pcc(jme, PCC_P1);
303 dpi->attempt = PCC_P1;
306 jwrite32(jme, JME_PCCTX,
307 ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
308 ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
315 jwrite32(jme, JME_IENS, INTR_ENABLE);
319 jme_stop_irq(struct jme_adapter *jme)
324 jwrite32f(jme, JME_IENC, INTR_ENABLE);
328 jme_linkstat_from_phy(struct jme_adapter *jme)
332 phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
333 bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
334 if (bmsr & BMSR_ANCOMP)
335 phylink |= PHY_LINK_AUTONEG_COMPLETE;
341 jme_set_phyfifoa(struct jme_adapter *jme)
343 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
347 jme_set_phyfifob(struct jme_adapter *jme)
349 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
353 jme_check_link(struct net_device *netdev, int testonly)
355 struct jme_adapter *jme = netdev_priv(netdev);
356 u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
363 phylink = jme_linkstat_from_phy(jme);
365 phylink = jread32(jme, JME_PHY_LINK);
367 if (phylink & PHY_LINK_UP) {
368 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
370 * If we did not enable AN
371 * Speed/Duplex Info should be obtained from SMI
373 phylink = PHY_LINK_UP;
375 bmcr = jme_mdio_read(jme->dev,
379 phylink |= ((bmcr & BMCR_SPEED1000) &&
380 (bmcr & BMCR_SPEED100) == 0) ?
381 PHY_LINK_SPEED_1000M :
382 (bmcr & BMCR_SPEED100) ?
383 PHY_LINK_SPEED_100M :
386 phylink |= (bmcr & BMCR_FULLDPLX) ?
389 strcat(linkmsg, "Forced: ");
392 * Keep polling for speed/duplex resolve complete
394 while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
400 phylink = jme_linkstat_from_phy(jme);
402 phylink = jread32(jme, JME_PHY_LINK);
406 "Waiting speed resolve timeout.\n");
408 strcat(linkmsg, "ANed: ");
411 if (jme->phylink == phylink) {
418 jme->phylink = phylink;
420 ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX |
421 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE |
422 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY);
423 switch (phylink & PHY_LINK_SPEED_MASK) {
424 case PHY_LINK_SPEED_10M:
425 ghc |= GHC_SPEED_10M |
426 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
427 strcat(linkmsg, "10 Mbps, ");
429 case PHY_LINK_SPEED_100M:
430 ghc |= GHC_SPEED_100M |
431 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
432 strcat(linkmsg, "100 Mbps, ");
434 case PHY_LINK_SPEED_1000M:
435 ghc |= GHC_SPEED_1000M |
436 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
437 strcat(linkmsg, "1000 Mbps, ");
443 if (phylink & PHY_LINK_DUPLEX) {
444 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
447 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
451 jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
452 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
454 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
457 gpreg1 = GPREG1_DEFAULT;
458 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
459 if (!(phylink & PHY_LINK_DUPLEX))
460 gpreg1 |= GPREG1_HALFMODEPATCH;
461 switch (phylink & PHY_LINK_SPEED_MASK) {
462 case PHY_LINK_SPEED_10M:
463 jme_set_phyfifoa(jme);
464 gpreg1 |= GPREG1_RSSPATCH;
466 case PHY_LINK_SPEED_100M:
467 jme_set_phyfifob(jme);
468 gpreg1 |= GPREG1_RSSPATCH;
470 case PHY_LINK_SPEED_1000M:
471 jme_set_phyfifoa(jme);
478 jwrite32(jme, JME_GPREG1, gpreg1);
479 jwrite32(jme, JME_GHC, ghc);
482 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
485 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
488 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
489 msg_link(jme, "Link is up at %s.\n", linkmsg);
491 netif_info(jme, link, jme->dev, "Link is up at %s.\n", linkmsg);
493 netif_carrier_on(netdev);
498 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
499 msg_link(jme, "Link is down.\n");
501 netif_info(jme, link, jme->dev, "Link is down.\n");
504 netif_carrier_off(netdev);
512 jme_setup_tx_resources(struct jme_adapter *jme)
514 struct jme_ring *txring = &(jme->txring[0]);
516 txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
517 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
527 txring->desc = (void *)ALIGN((unsigned long)(txring->alloc),
529 txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
530 txring->next_to_use = 0;
531 atomic_set(&txring->next_to_clean, 0);
532 atomic_set(&txring->nr_free, jme->tx_ring_size);
534 txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
535 jme->tx_ring_size, GFP_ATOMIC);
536 if (unlikely(!(txring->bufinf)))
537 goto err_free_txring;
540 * Initialize Transmit Descriptors
542 memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
543 memset(txring->bufinf, 0,
544 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
549 dma_free_coherent(&(jme->pdev->dev),
550 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
556 txring->dmaalloc = 0;
558 txring->bufinf = NULL;
564 jme_free_tx_resources(struct jme_adapter *jme)
567 struct jme_ring *txring = &(jme->txring[0]);
568 struct jme_buffer_info *txbi;
571 if (txring->bufinf) {
572 for (i = 0 ; i < jme->tx_ring_size ; ++i) {
573 txbi = txring->bufinf + i;
575 dev_kfree_skb(txbi->skb);
581 txbi->start_xmit = 0;
583 kfree(txring->bufinf);
586 dma_free_coherent(&(jme->pdev->dev),
587 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
591 txring->alloc = NULL;
593 txring->dmaalloc = 0;
595 txring->bufinf = NULL;
597 txring->next_to_use = 0;
598 atomic_set(&txring->next_to_clean, 0);
599 atomic_set(&txring->nr_free, 0);
603 jme_enable_tx_engine(struct jme_adapter *jme)
608 jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
612 * Setup TX Queue 0 DMA Bass Address
614 jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
615 jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
616 jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
619 * Setup TX Descptor Count
621 jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
627 jwrite32(jme, JME_TXCS, jme->reg_txcs |
634 jme_restart_tx_engine(struct jme_adapter *jme)
639 jwrite32(jme, JME_TXCS, jme->reg_txcs |
645 jme_disable_tx_engine(struct jme_adapter *jme)
653 jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
656 val = jread32(jme, JME_TXCS);
657 for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
659 val = jread32(jme, JME_TXCS);
664 jeprintk(jme->pdev, "Disable TX engine timeout.\n");
668 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
670 struct jme_ring *rxring = &(jme->rxring[0]);
671 register struct rxdesc *rxdesc = rxring->desc;
672 struct jme_buffer_info *rxbi = rxring->bufinf;
678 rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32);
679 rxdesc->desc1.bufaddrl = cpu_to_le32(
680 (__u64)rxbi->mapping & 0xFFFFFFFFUL);
681 rxdesc->desc1.datalen = cpu_to_le16(rxbi->len);
682 if (jme->dev->features & NETIF_F_HIGHDMA)
683 rxdesc->desc1.flags = RXFLAG_64BIT;
685 rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT;
689 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
691 struct jme_ring *rxring = &(jme->rxring[0]);
692 struct jme_buffer_info *rxbi = rxring->bufinf + i;
695 skb = netdev_alloc_skb(jme->dev,
696 jme->dev->mtu + RX_EXTRA_LEN);
699 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
704 rxbi->len = skb_tailroom(skb);
705 rxbi->mapping = pci_map_page(jme->pdev,
706 virt_to_page(skb->data),
707 offset_in_page(skb->data),
715 jme_free_rx_buf(struct jme_adapter *jme, int i)
717 struct jme_ring *rxring = &(jme->rxring[0]);
718 struct jme_buffer_info *rxbi = rxring->bufinf;
722 pci_unmap_page(jme->pdev,
726 dev_kfree_skb(rxbi->skb);
734 jme_free_rx_resources(struct jme_adapter *jme)
737 struct jme_ring *rxring = &(jme->rxring[0]);
740 if (rxring->bufinf) {
741 for (i = 0 ; i < jme->rx_ring_size ; ++i)
742 jme_free_rx_buf(jme, i);
743 kfree(rxring->bufinf);
746 dma_free_coherent(&(jme->pdev->dev),
747 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
750 rxring->alloc = NULL;
752 rxring->dmaalloc = 0;
754 rxring->bufinf = NULL;
756 rxring->next_to_use = 0;
757 atomic_set(&rxring->next_to_clean, 0);
761 jme_setup_rx_resources(struct jme_adapter *jme)
764 struct jme_ring *rxring = &(jme->rxring[0]);
766 rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
767 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
776 rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc),
778 rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
779 rxring->next_to_use = 0;
780 atomic_set(&rxring->next_to_clean, 0);
782 rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
783 jme->rx_ring_size, GFP_ATOMIC);
784 if (unlikely(!(rxring->bufinf)))
785 goto err_free_rxring;
788 * Initiallize Receive Descriptors
790 memset(rxring->bufinf, 0,
791 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
792 for (i = 0 ; i < jme->rx_ring_size ; ++i) {
793 if (unlikely(jme_make_new_rx_buf(jme, i))) {
794 jme_free_rx_resources(jme);
798 jme_set_clean_rxdesc(jme, i);
804 dma_free_coherent(&(jme->pdev->dev),
805 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
810 rxring->dmaalloc = 0;
812 rxring->bufinf = NULL;
818 jme_enable_rx_engine(struct jme_adapter *jme)
823 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
828 * Setup RX DMA Bass Address
830 jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
831 jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
832 jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
835 * Setup RX Descriptor Count
837 jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
840 * Setup Unicast Filter
842 jme_set_multi(jme->dev);
848 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
855 jme_restart_rx_engine(struct jme_adapter *jme)
860 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
867 jme_disable_rx_engine(struct jme_adapter *jme)
875 jwrite32(jme, JME_RXCS, jme->reg_rxcs);
878 val = jread32(jme, JME_RXCS);
879 for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
881 val = jread32(jme, JME_RXCS);
886 jeprintk(jme->pdev, "Disable RX engine timeout.\n");
891 jme_rxsum_ok(struct jme_adapter *jme, u16 flags)
893 if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
896 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
897 == RXWBFLAG_TCPON)) {
898 if (flags & RXWBFLAG_IPV4)
899 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
900 msg_rx_err(jme, "TCP Checksum error\n");
902 netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
907 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
908 == RXWBFLAG_UDPON)) {
909 if (flags & RXWBFLAG_IPV4)
910 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
911 msg_rx_err(jme, "UDP Checksum error.\n");
913 netif_err(jme, rx_err, jme->dev, "UDP Checksum error.\n");
918 if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
920 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
921 msg_rx_err(jme, "IPv4 Checksum error.\n");
923 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error.\n");
932 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
934 struct jme_ring *rxring = &(jme->rxring[0]);
935 struct rxdesc *rxdesc = rxring->desc;
936 struct jme_buffer_info *rxbi = rxring->bufinf;
944 pci_dma_sync_single_for_cpu(jme->pdev,
949 if (unlikely(jme_make_new_rx_buf(jme, idx))) {
950 pci_dma_sync_single_for_device(jme->pdev,
955 ++(NET_STAT(jme).rx_dropped);
957 framesize = le16_to_cpu(rxdesc->descwb.framesize)
960 skb_reserve(skb, RX_PREPAD_SIZE);
961 skb_put(skb, framesize);
962 skb->protocol = eth_type_trans(skb, jme->dev);
964 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags)))
965 skb->ip_summed = CHECKSUM_UNNECESSARY;
967 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35)
968 skb->ip_summed = CHECKSUM_NONE;
970 skb_checksum_none_assert(skb);
973 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
975 jme->jme_vlan_rx(skb, jme->vlgrp,
976 le16_to_cpu(rxdesc->descwb.vlan));
977 NET_STAT(jme).rx_bytes += 4;
985 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
986 cpu_to_le16(RXWBFLAG_DEST_MUL))
987 ++(NET_STAT(jme).multicast);
989 NET_STAT(jme).rx_bytes += framesize;
990 ++(NET_STAT(jme).rx_packets);
993 jme_set_clean_rxdesc(jme, idx);
998 jme_process_receive(struct jme_adapter *jme, int limit)
1000 struct jme_ring *rxring = &(jme->rxring[0]);
1001 struct rxdesc *rxdesc = rxring->desc;
1002 int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1004 if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1007 if (unlikely(atomic_read(&jme->link_changing) != 1))
1010 if (unlikely(!netif_carrier_ok(jme->dev)))
1013 i = atomic_read(&rxring->next_to_clean);
1015 rxdesc = rxring->desc;
1018 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1019 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1023 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1025 if (unlikely(desccnt > 1 ||
1026 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1028 if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1029 ++(NET_STAT(jme).rx_crc_errors);
1030 else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1031 ++(NET_STAT(jme).rx_fifo_errors);
1033 ++(NET_STAT(jme).rx_errors);
1036 limit -= desccnt - 1;
1038 for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1039 jme_set_clean_rxdesc(jme, j);
1040 j = (j + 1) & (mask);
1044 jme_alloc_and_feed_skb(jme, i);
1047 i = (i + desccnt) & (mask);
1051 atomic_set(&rxring->next_to_clean, i);
1054 atomic_inc(&jme->rx_cleaning);
1056 return limit > 0 ? limit : 0;
1061 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1063 if (likely(atmp == dpi->cur)) {
1068 if (dpi->attempt == atmp) {
1071 dpi->attempt = atmp;
1078 jme_dynamic_pcc(struct jme_adapter *jme)
1080 register struct dynpcc_info *dpi = &(jme->dpi);
1082 if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1083 jme_attempt_pcc(dpi, PCC_P3);
1084 else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1085 dpi->intr_cnt > PCC_INTR_THRESHOLD)
1086 jme_attempt_pcc(dpi, PCC_P2);
1088 jme_attempt_pcc(dpi, PCC_P1);
1090 if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1091 if (dpi->attempt < dpi->cur)
1092 tasklet_schedule(&jme->rxclean_task);
1093 jme_set_rx_pcc(jme, dpi->attempt);
1094 dpi->cur = dpi->attempt;
1100 jme_start_pcc_timer(struct jme_adapter *jme)
1102 struct dynpcc_info *dpi = &(jme->dpi);
1103 dpi->last_bytes = NET_STAT(jme).rx_bytes;
1104 dpi->last_pkts = NET_STAT(jme).rx_packets;
1106 jwrite32(jme, JME_TMCSR,
1107 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1111 jme_stop_pcc_timer(struct jme_adapter *jme)
1113 jwrite32(jme, JME_TMCSR, 0);
1117 jme_shutdown_nic(struct jme_adapter *jme)
1121 phylink = jme_linkstat_from_phy(jme);
1123 if (!(phylink & PHY_LINK_UP)) {
1125 * Disable all interrupt before issue timer
1128 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1133 jme_pcc_tasklet(unsigned long arg)
1135 struct jme_adapter *jme = (struct jme_adapter *)arg;
1136 struct net_device *netdev = jme->dev;
1138 if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1139 jme_shutdown_nic(jme);
1143 if (unlikely(!netif_carrier_ok(netdev) ||
1144 (atomic_read(&jme->link_changing) != 1)
1146 jme_stop_pcc_timer(jme);
1150 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1151 jme_dynamic_pcc(jme);
1153 jme_start_pcc_timer(jme);
1157 jme_polling_mode(struct jme_adapter *jme)
1159 jme_set_rx_pcc(jme, PCC_OFF);
1163 jme_interrupt_mode(struct jme_adapter *jme)
1165 jme_set_rx_pcc(jme, PCC_P1);
1169 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1172 apmc = jread32(jme, JME_APMC);
1173 return apmc & JME_APMC_PSEUDO_HP_EN;
1177 jme_start_shutdown_timer(struct jme_adapter *jme)
1181 apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1182 apmc &= ~JME_APMC_EPIEN_CTRL;
1184 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1187 jwrite32f(jme, JME_APMC, apmc);
1189 jwrite32f(jme, JME_TIMER2, 0);
1190 set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1191 jwrite32(jme, JME_TMCSR,
1192 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1196 jme_stop_shutdown_timer(struct jme_adapter *jme)
1200 jwrite32f(jme, JME_TMCSR, 0);
1201 jwrite32f(jme, JME_TIMER2, 0);
1202 clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1204 apmc = jread32(jme, JME_APMC);
1205 apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1206 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1208 jwrite32f(jme, JME_APMC, apmc);
1212 jme_link_change_tasklet(unsigned long arg)
1214 struct jme_adapter *jme = (struct jme_adapter *)arg;
1215 struct net_device *netdev = jme->dev;
1218 while (!atomic_dec_and_test(&jme->link_changing)) {
1219 atomic_inc(&jme->link_changing);
1220 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1221 msg_intr(jme, "Get link change lock failed.\n");
1223 netif_info(jme, intr, jme->dev, "Get link change lock failed.\n");
1225 while (atomic_read(&jme->link_changing) != 1)
1226 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1227 msg_intr(jme, "Waiting link change lock.\n");
1229 netif_info(jme, intr, jme->dev, "Waiting link change lock.\n");
1233 if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1236 jme->old_mtu = netdev->mtu;
1237 netif_stop_queue(netdev);
1238 if (jme_pseudo_hotplug_enabled(jme))
1239 jme_stop_shutdown_timer(jme);
1241 jme_stop_pcc_timer(jme);
1242 tasklet_disable(&jme->txclean_task);
1243 tasklet_disable(&jme->rxclean_task);
1244 tasklet_disable(&jme->rxempty_task);
1246 if (netif_carrier_ok(netdev)) {
1247 jme_reset_ghc_speed(jme);
1248 jme_disable_rx_engine(jme);
1249 jme_disable_tx_engine(jme);
1250 jme_reset_mac_processor(jme);
1251 jme_free_rx_resources(jme);
1252 jme_free_tx_resources(jme);
1254 if (test_bit(JME_FLAG_POLL, &jme->flags))
1255 jme_polling_mode(jme);
1257 netif_carrier_off(netdev);
1260 jme_check_link(netdev, 0);
1261 if (netif_carrier_ok(netdev)) {
1262 rc = jme_setup_rx_resources(jme);
1264 jeprintk(jme->pdev, "Allocating resources for RX error"
1265 ", Device STOPPED!\n");
1266 goto out_enable_tasklet;
1269 rc = jme_setup_tx_resources(jme);
1271 jeprintk(jme->pdev, "Allocating resources for TX error"
1272 ", Device STOPPED!\n");
1273 goto err_out_free_rx_resources;
1276 jme_enable_rx_engine(jme);
1277 jme_enable_tx_engine(jme);
1279 netif_start_queue(netdev);
1281 if (test_bit(JME_FLAG_POLL, &jme->flags))
1282 jme_interrupt_mode(jme);
1284 jme_start_pcc_timer(jme);
1285 } else if (jme_pseudo_hotplug_enabled(jme)) {
1286 jme_start_shutdown_timer(jme);
1289 goto out_enable_tasklet;
1291 err_out_free_rx_resources:
1292 jme_free_rx_resources(jme);
1294 tasklet_enable(&jme->txclean_task);
1295 tasklet_hi_enable(&jme->rxclean_task);
1296 tasklet_hi_enable(&jme->rxempty_task);
1298 atomic_inc(&jme->link_changing);
1302 jme_rx_clean_tasklet(unsigned long arg)
1304 struct jme_adapter *jme = (struct jme_adapter *)arg;
1305 struct dynpcc_info *dpi = &(jme->dpi);
1307 jme_process_receive(jme, jme->rx_ring_size);
1313 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1315 struct jme_adapter *jme = jme_napi_priv(holder);
1319 rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1321 while (atomic_read(&jme->rx_empty) > 0) {
1322 atomic_dec(&jme->rx_empty);
1323 ++(NET_STAT(jme).rx_dropped);
1324 jme_restart_rx_engine(jme);
1326 atomic_inc(&jme->rx_empty);
1329 JME_RX_COMPLETE(netdev, holder);
1330 jme_interrupt_mode(jme);
1333 JME_NAPI_WEIGHT_SET(budget, rest);
1334 return JME_NAPI_WEIGHT_VAL(budget) - rest;
1338 jme_rx_empty_tasklet(unsigned long arg)
1340 struct jme_adapter *jme = (struct jme_adapter *)arg;
1342 if (unlikely(atomic_read(&jme->link_changing) != 1))
1345 if (unlikely(!netif_carrier_ok(jme->dev)))
1348 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1349 msg_rx_status(jme, "RX Queue Full!\n");
1351 netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1354 jme_rx_clean_tasklet(arg);
1356 while (atomic_read(&jme->rx_empty) > 0) {
1357 atomic_dec(&jme->rx_empty);
1358 ++(NET_STAT(jme).rx_dropped);
1359 jme_restart_rx_engine(jme);
1361 atomic_inc(&jme->rx_empty);
1365 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1367 struct jme_ring *txring = &(jme->txring[0]);
1370 if (unlikely(netif_queue_stopped(jme->dev) &&
1371 atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1372 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1373 msg_tx_done(jme, "TX Queue Waked.\n");
1375 netif_info(jme, tx_done, jme->dev, "TX Queue Waked.\n");
1377 netif_wake_queue(jme->dev);
1383 jme_tx_clean_tasklet(unsigned long arg)
1385 struct jme_adapter *jme = (struct jme_adapter *)arg;
1386 struct jme_ring *txring = &(jme->txring[0]);
1387 struct txdesc *txdesc = txring->desc;
1388 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1389 int i, j, cnt = 0, max, err, mask;
1391 tx_dbg(jme, "Into txclean.\n");
1393 if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1396 if (unlikely(atomic_read(&jme->link_changing) != 1))
1399 if (unlikely(!netif_carrier_ok(jme->dev)))
1402 max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1403 mask = jme->tx_ring_mask;
1405 for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1409 if (likely(ctxbi->skb &&
1410 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1412 tx_dbg(jme, "txclean: %d+%d@%lu\n",
1413 i, ctxbi->nr_desc, jiffies);
1415 err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1417 for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1418 ttxbi = txbi + ((i + j) & (mask));
1419 txdesc[(i + j) & (mask)].dw[0] = 0;
1421 pci_unmap_page(jme->pdev,
1430 dev_kfree_skb(ctxbi->skb);
1432 cnt += ctxbi->nr_desc;
1434 if (unlikely(err)) {
1435 ++(NET_STAT(jme).tx_carrier_errors);
1437 ++(NET_STAT(jme).tx_packets);
1438 NET_STAT(jme).tx_bytes += ctxbi->len;
1443 ctxbi->start_xmit = 0;
1449 i = (i + ctxbi->nr_desc) & mask;
1454 tx_dbg(jme, "txclean: done %d@%lu.\n", i, jiffies);
1455 atomic_set(&txring->next_to_clean, i);
1456 atomic_add(cnt, &txring->nr_free);
1458 jme_wake_queue_if_stopped(jme);
1461 atomic_inc(&jme->tx_cleaning);
1465 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1470 jwrite32f(jme, JME_IENC, INTR_ENABLE);
1472 if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1474 * Link change event is critical
1475 * all other events are ignored
1477 jwrite32(jme, JME_IEVE, intrstat);
1478 tasklet_schedule(&jme->linkch_task);
1482 if (intrstat & INTR_TMINTR) {
1483 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1484 tasklet_schedule(&jme->pcc_task);
1487 if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1488 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1489 tasklet_schedule(&jme->txclean_task);
1492 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1493 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1499 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1500 if (intrstat & INTR_RX0EMP)
1501 atomic_inc(&jme->rx_empty);
1503 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1504 if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1505 jme_polling_mode(jme);
1506 JME_RX_SCHEDULE(jme);
1510 if (intrstat & INTR_RX0EMP) {
1511 atomic_inc(&jme->rx_empty);
1512 tasklet_hi_schedule(&jme->rxempty_task);
1513 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1514 tasklet_hi_schedule(&jme->rxclean_task);
1520 * Re-enable interrupt
1522 jwrite32f(jme, JME_IENS, INTR_ENABLE);
1525 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1527 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1530 jme_intr(int irq, void *dev_id)
1533 struct net_device *netdev = dev_id;
1534 struct jme_adapter *jme = netdev_priv(netdev);
1537 intrstat = jread32(jme, JME_IEVE);
1540 * Check if it's really an interrupt for us
1542 if (unlikely((intrstat & INTR_ENABLE) == 0))
1546 * Check if the device still exist
1548 if (unlikely(intrstat == ~((typeof(intrstat))0)))
1551 jme_intr_msi(jme, intrstat);
1556 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1558 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1561 jme_msi(int irq, void *dev_id)
1564 struct net_device *netdev = dev_id;
1565 struct jme_adapter *jme = netdev_priv(netdev);
1568 intrstat = jread32(jme, JME_IEVE);
1570 jme_intr_msi(jme, intrstat);
1576 jme_reset_link(struct jme_adapter *jme)
1578 jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1582 jme_restart_an(struct jme_adapter *jme)
1586 spin_lock_bh(&jme->phy_lock);
1587 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1588 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1589 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1590 spin_unlock_bh(&jme->phy_lock);
1594 jme_request_irq(struct jme_adapter *jme)
1597 struct net_device *netdev = jme->dev;
1598 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1599 irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1600 int irq_flags = SA_SHIRQ;
1602 irq_handler_t handler = jme_intr;
1603 int irq_flags = IRQF_SHARED;
1606 if (!pci_enable_msi(jme->pdev)) {
1607 set_bit(JME_FLAG_MSI, &jme->flags);
1612 rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1616 "Unable to request %s interrupt (return: %d)\n",
1617 test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1620 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1621 pci_disable_msi(jme->pdev);
1622 clear_bit(JME_FLAG_MSI, &jme->flags);
1625 netdev->irq = jme->pdev->irq;
1632 jme_free_irq(struct jme_adapter *jme)
1634 free_irq(jme->pdev->irq, jme->dev);
1635 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1636 pci_disable_msi(jme->pdev);
1637 clear_bit(JME_FLAG_MSI, &jme->flags);
1638 jme->dev->irq = jme->pdev->irq;
1643 jme_open(struct net_device *netdev)
1645 struct jme_adapter *jme = netdev_priv(netdev);
1649 JME_NAPI_ENABLE(jme);
1651 tasklet_enable(&jme->linkch_task);
1652 tasklet_enable(&jme->txclean_task);
1653 tasklet_hi_enable(&jme->rxclean_task);
1654 tasklet_hi_enable(&jme->rxempty_task);
1656 rc = jme_request_irq(jme);
1662 if (test_bit(JME_FLAG_SSET, &jme->flags))
1663 jme_set_settings(netdev, &jme->old_ecmd);
1665 jme_reset_phy_processor(jme);
1667 jme_reset_link(jme);
1672 netif_stop_queue(netdev);
1673 netif_carrier_off(netdev);
1679 jme_set_100m_half(struct jme_adapter *jme)
1683 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1684 tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1685 BMCR_SPEED1000 | BMCR_FULLDPLX);
1686 tmp |= BMCR_SPEED100;
1689 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1692 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1694 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1697 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1699 jme_wait_link(struct jme_adapter *jme)
1701 u32 phylink, to = JME_WAIT_LINK_TIME;
1704 phylink = jme_linkstat_from_phy(jme);
1705 while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1707 phylink = jme_linkstat_from_phy(jme);
1713 jme_phy_off(struct jme_adapter *jme)
1715 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
1719 jme_close(struct net_device *netdev)
1721 struct jme_adapter *jme = netdev_priv(netdev);
1723 netif_stop_queue(netdev);
1724 netif_carrier_off(netdev);
1729 JME_NAPI_DISABLE(jme);
1731 tasklet_disable(&jme->linkch_task);
1732 tasklet_disable(&jme->txclean_task);
1733 tasklet_disable(&jme->rxclean_task);
1734 tasklet_disable(&jme->rxempty_task);
1736 jme_reset_ghc_speed(jme);
1737 jme_disable_rx_engine(jme);
1738 jme_disable_tx_engine(jme);
1739 jme_reset_mac_processor(jme);
1740 jme_free_rx_resources(jme);
1741 jme_free_tx_resources(jme);
1749 jme_alloc_txdesc(struct jme_adapter *jme,
1750 struct sk_buff *skb)
1752 struct jme_ring *txring = &(jme->txring[0]);
1753 int idx, nr_alloc, mask = jme->tx_ring_mask;
1755 idx = txring->next_to_use;
1756 nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1758 if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1761 atomic_sub(nr_alloc, &txring->nr_free);
1763 txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1769 jme_fill_tx_map(struct pci_dev *pdev,
1770 struct txdesc *txdesc,
1771 struct jme_buffer_info *txbi,
1779 dmaaddr = pci_map_page(pdev,
1785 pci_dma_sync_single_for_device(pdev,
1792 txdesc->desc2.flags = TXFLAG_OWN;
1793 txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0;
1794 txdesc->desc2.datalen = cpu_to_le16(len);
1795 txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32);
1796 txdesc->desc2.bufaddrl = cpu_to_le32(
1797 (__u64)dmaaddr & 0xFFFFFFFFUL);
1799 txbi->mapping = dmaaddr;
1804 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1806 struct jme_ring *txring = &(jme->txring[0]);
1807 struct txdesc *txdesc = txring->desc, *ctxdesc;
1808 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1809 u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1810 int i, nr_frags = skb_shinfo(skb)->nr_frags;
1811 int mask = jme->tx_ring_mask;
1812 struct skb_frag_struct *frag;
1815 for (i = 0 ; i < nr_frags ; ++i) {
1816 frag = &skb_shinfo(skb)->frags[i];
1817 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1818 ctxbi = txbi + ((idx + i + 2) & (mask));
1820 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1821 frag->page_offset, frag->size, hidma);
1824 len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1825 ctxdesc = txdesc + ((idx + 1) & (mask));
1826 ctxbi = txbi + ((idx + 1) & (mask));
1827 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1828 offset_in_page(skb->data), len, hidma);
1833 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1836 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1837 skb_shinfo(skb)->tso_size
1839 skb_shinfo(skb)->gso_size
1841 && skb_header_cloned(skb) &&
1842 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1851 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
1853 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1854 *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1856 *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1859 *flags |= TXFLAG_LSEN;
1861 if (skb->protocol == htons(ETH_P_IP)) {
1862 struct iphdr *iph = ip_hdr(skb);
1865 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1870 struct ipv6hdr *ip6h = ipv6_hdr(skb);
1872 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
1885 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
1887 #ifdef CHECKSUM_PARTIAL
1888 if (skb->ip_summed == CHECKSUM_PARTIAL)
1890 if (skb->ip_summed == CHECKSUM_HW)
1895 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1896 if (skb->protocol == htons(ETH_P_IP))
1897 ip_proto = ip_hdr(skb)->protocol;
1898 else if (skb->protocol == htons(ETH_P_IPV6))
1899 ip_proto = ipv6_hdr(skb)->nexthdr;
1903 switch (skb->protocol) {
1904 case htons(ETH_P_IP):
1905 ip_proto = ip_hdr(skb)->protocol;
1907 case htons(ETH_P_IPV6):
1908 ip_proto = ipv6_hdr(skb)->nexthdr;
1918 *flags |= TXFLAG_TCPCS;
1921 *flags |= TXFLAG_UDPCS;
1924 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1925 msg_tx_err(jme, "Error upper layer protocol.\n");
1927 netif_err(jme, tx_err, jme->dev, "Error upper layer protocol.\n");
1935 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
1937 if (vlan_tx_tag_present(skb)) {
1938 *flags |= TXFLAG_TAGON;
1939 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1944 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1946 struct jme_ring *txring = &(jme->txring[0]);
1947 struct txdesc *txdesc;
1948 struct jme_buffer_info *txbi;
1951 txdesc = (struct txdesc *)txring->desc + idx;
1952 txbi = txring->bufinf + idx;
1958 txdesc->desc1.pktsize = cpu_to_le16(skb->len);
1960 * Set OWN bit at final.
1961 * When kernel transmit faster than NIC.
1962 * And NIC trying to send this descriptor before we tell
1963 * it to start sending this TX queue.
1964 * Other fields are already filled correctly.
1967 flags = TXFLAG_OWN | TXFLAG_INT;
1969 * Set checksum flags while not tso
1971 if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
1972 jme_tx_csum(jme, skb, &flags);
1973 jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
1974 jme_map_tx_skb(jme, skb, idx);
1975 txdesc->desc1.flags = flags;
1977 * Set tx buffer info after telling NIC to send
1978 * For better tx_clean timing
1981 txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
1983 txbi->len = skb->len;
1984 txbi->start_xmit = jiffies;
1985 if (!txbi->start_xmit)
1986 txbi->start_xmit = (0UL-1);
1992 jme_stop_queue_if_full(struct jme_adapter *jme)
1994 struct jme_ring *txring = &(jme->txring[0]);
1995 struct jme_buffer_info *txbi = txring->bufinf;
1996 int idx = atomic_read(&txring->next_to_clean);
2001 if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2002 netif_stop_queue(jme->dev);
2003 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2004 msg_tx_queued(jme, "TX Queue Paused.\n");
2006 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused.\n");
2009 if (atomic_read(&txring->nr_free)
2010 >= (jme->tx_wake_threshold)) {
2011 netif_wake_queue(jme->dev);
2012 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2013 msg_tx_queued(jme, "TX Queue Fast Waked.\n");
2015 netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked.\n");
2020 if (unlikely(txbi->start_xmit &&
2021 (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2023 netif_stop_queue(jme->dev);
2024 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2025 msg_tx_queued(jme, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2027 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2033 * This function is already protected by netif_tx_lock()
2036 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2041 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2043 struct jme_adapter *jme = netdev_priv(netdev);
2046 if (unlikely(jme_expand_header(jme, skb))) {
2047 ++(NET_STAT(jme).tx_dropped);
2048 return NETDEV_TX_OK;
2051 idx = jme_alloc_txdesc(jme, skb);
2053 if (unlikely(idx < 0)) {
2054 netif_stop_queue(netdev);
2055 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2056 msg_tx_err(jme, "BUG! Tx ring full when queue awake!\n");
2058 netif_err(jme, tx_err, jme->dev, "BUG! Tx ring full when queue awake!\n");
2061 return NETDEV_TX_BUSY;
2064 jme_fill_tx_desc(jme, skb, idx);
2066 jwrite32(jme, JME_TXCS, jme->reg_txcs |
2067 TXCS_SELECT_QUEUE0 |
2070 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2071 netdev->trans_start = jiffies;
2074 tx_dbg(jme, "xmit: %d+%d@%lu\n", idx,
2075 skb_shinfo(skb)->nr_frags + 2,
2077 jme_stop_queue_if_full(jme);
2079 return NETDEV_TX_OK;
2083 jme_set_macaddr(struct net_device *netdev, void *p)
2085 struct jme_adapter *jme = netdev_priv(netdev);
2086 struct sockaddr *addr = p;
2089 if (netif_running(netdev))
2092 spin_lock_bh(&jme->macaddr_lock);
2093 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2095 val = (addr->sa_data[3] & 0xff) << 24 |
2096 (addr->sa_data[2] & 0xff) << 16 |
2097 (addr->sa_data[1] & 0xff) << 8 |
2098 (addr->sa_data[0] & 0xff);
2099 jwrite32(jme, JME_RXUMA_LO, val);
2100 val = (addr->sa_data[5] & 0xff) << 8 |
2101 (addr->sa_data[4] & 0xff);
2102 jwrite32(jme, JME_RXUMA_HI, val);
2103 spin_unlock_bh(&jme->macaddr_lock);
2109 jme_set_multi(struct net_device *netdev)
2111 struct jme_adapter *jme = netdev_priv(netdev);
2112 u32 mc_hash[2] = {};
2113 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2117 spin_lock_bh(&jme->rxmcs_lock);
2119 jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2121 if (netdev->flags & IFF_PROMISC) {
2122 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2123 } else if (netdev->flags & IFF_ALLMULTI) {
2124 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2125 } else if (netdev->flags & IFF_MULTICAST) {
2126 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2127 struct dev_mc_list *mclist;
2129 struct netdev_hw_addr *ha;
2133 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2134 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2135 for (i = 0, mclist = netdev->mc_list;
2136 mclist && i < netdev->mc_count;
2137 ++i, mclist = mclist->next) {
2138 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2139 netdev_for_each_mc_addr(mclist, netdev) {
2141 netdev_for_each_mc_addr(ha, netdev) {
2143 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2144 bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2146 bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2148 mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2151 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2152 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2156 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2158 spin_unlock_bh(&jme->rxmcs_lock);
2162 jme_change_mtu(struct net_device *netdev, int new_mtu)
2164 struct jme_adapter *jme = netdev_priv(netdev);
2166 if (new_mtu == jme->old_mtu)
2169 if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2170 ((new_mtu) < IPV6_MIN_MTU))
2173 if (new_mtu > 4000) {
2174 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2175 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2176 jme_restart_rx_engine(jme);
2178 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2179 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2180 jme_restart_rx_engine(jme);
2183 if (new_mtu > 1900) {
2184 netdev->features &= ~(NETIF_F_HW_CSUM |
2191 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2192 netdev->features |= NETIF_F_HW_CSUM;
2193 if (test_bit(JME_FLAG_TSO, &jme->flags))
2194 netdev->features |= NETIF_F_TSO
2201 netdev->mtu = new_mtu;
2202 jme_reset_link(jme);
2208 jme_tx_timeout(struct net_device *netdev)
2210 struct jme_adapter *jme = netdev_priv(netdev);
2213 jme_reset_phy_processor(jme);
2214 if (test_bit(JME_FLAG_SSET, &jme->flags))
2215 jme_set_settings(netdev, &jme->old_ecmd);
2218 * Force to Reset the link again
2220 jme_reset_link(jme);
2223 static inline void jme_pause_rx(struct jme_adapter *jme)
2225 atomic_dec(&jme->link_changing);
2227 jme_set_rx_pcc(jme, PCC_OFF);
2228 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2229 JME_NAPI_DISABLE(jme);
2231 tasklet_disable(&jme->rxclean_task);
2232 tasklet_disable(&jme->rxempty_task);
2236 static inline void jme_resume_rx(struct jme_adapter *jme)
2238 struct dynpcc_info *dpi = &(jme->dpi);
2240 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2241 JME_NAPI_ENABLE(jme);
2243 tasklet_hi_enable(&jme->rxclean_task);
2244 tasklet_hi_enable(&jme->rxempty_task);
2247 dpi->attempt = PCC_P1;
2249 jme_set_rx_pcc(jme, PCC_P1);
2251 atomic_inc(&jme->link_changing);
2255 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2257 struct jme_adapter *jme = netdev_priv(netdev);
2264 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2266 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2268 struct jme_adapter *jme = netdev_priv(netdev);
2272 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2273 jme->vlgrp->vlan_devices[vid] = NULL;
2275 vlan_group_set_device(jme->vlgrp, vid, NULL);
2283 jme_get_drvinfo(struct net_device *netdev,
2284 struct ethtool_drvinfo *info)
2286 struct jme_adapter *jme = netdev_priv(netdev);
2288 strcpy(info->driver, DRV_NAME);
2289 strcpy(info->version, DRV_VERSION);
2290 strcpy(info->bus_info, pci_name(jme->pdev));
2294 jme_get_regs_len(struct net_device *netdev)
2300 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2304 for (i = 0 ; i < len ; i += 4)
2305 p[i >> 2] = jread32(jme, reg + i);
2309 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2312 u16 *p16 = (u16 *)p;
2314 for (i = 0 ; i < reg_nr ; ++i)
2315 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2319 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2321 struct jme_adapter *jme = netdev_priv(netdev);
2322 u32 *p32 = (u32 *)p;
2324 memset(p, 0xFF, JME_REG_LEN);
2327 mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2330 mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2333 mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2336 mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2339 mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2343 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2345 struct jme_adapter *jme = netdev_priv(netdev);
2347 ecmd->tx_coalesce_usecs = PCC_TX_TO;
2348 ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2350 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2351 ecmd->use_adaptive_rx_coalesce = false;
2352 ecmd->rx_coalesce_usecs = 0;
2353 ecmd->rx_max_coalesced_frames = 0;
2357 ecmd->use_adaptive_rx_coalesce = true;
2359 switch (jme->dpi.cur) {
2361 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2362 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2365 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2366 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2369 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2370 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2380 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2382 struct jme_adapter *jme = netdev_priv(netdev);
2383 struct dynpcc_info *dpi = &(jme->dpi);
2385 if (netif_running(netdev))
2388 if (ecmd->use_adaptive_rx_coalesce &&
2389 test_bit(JME_FLAG_POLL, &jme->flags)) {
2390 clear_bit(JME_FLAG_POLL, &jme->flags);
2391 jme->jme_rx = netif_rx;
2392 jme->jme_vlan_rx = vlan_hwaccel_rx;
2394 dpi->attempt = PCC_P1;
2396 jme_set_rx_pcc(jme, PCC_P1);
2397 jme_interrupt_mode(jme);
2398 } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2399 !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2400 set_bit(JME_FLAG_POLL, &jme->flags);
2401 jme->jme_rx = netif_receive_skb;
2402 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2403 jme_interrupt_mode(jme);
2410 jme_get_pauseparam(struct net_device *netdev,
2411 struct ethtool_pauseparam *ecmd)
2413 struct jme_adapter *jme = netdev_priv(netdev);
2416 ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2417 ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2419 spin_lock_bh(&jme->phy_lock);
2420 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2421 spin_unlock_bh(&jme->phy_lock);
2424 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2428 jme_set_pauseparam(struct net_device *netdev,
2429 struct ethtool_pauseparam *ecmd)
2431 struct jme_adapter *jme = netdev_priv(netdev);
2434 if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2435 (ecmd->tx_pause != 0)) {
2438 jme->reg_txpfc |= TXPFC_PF_EN;
2440 jme->reg_txpfc &= ~TXPFC_PF_EN;
2442 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2445 spin_lock_bh(&jme->rxmcs_lock);
2446 if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2447 (ecmd->rx_pause != 0)) {
2450 jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2452 jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2454 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2456 spin_unlock_bh(&jme->rxmcs_lock);
2458 spin_lock_bh(&jme->phy_lock);
2459 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2460 if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2461 (ecmd->autoneg != 0)) {
2464 val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2466 val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2468 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2469 MII_ADVERTISE, val);
2471 spin_unlock_bh(&jme->phy_lock);
2477 jme_get_wol(struct net_device *netdev,
2478 struct ethtool_wolinfo *wol)
2480 struct jme_adapter *jme = netdev_priv(netdev);
2482 wol->supported = WAKE_MAGIC | WAKE_PHY;
2486 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2487 wol->wolopts |= WAKE_PHY;
2489 if (jme->reg_pmcs & PMCS_MFEN)
2490 wol->wolopts |= WAKE_MAGIC;
2495 jme_set_wol(struct net_device *netdev,
2496 struct ethtool_wolinfo *wol)
2498 struct jme_adapter *jme = netdev_priv(netdev);
2500 if (wol->wolopts & (WAKE_MAGICSECURE |
2509 if (wol->wolopts & WAKE_PHY)
2510 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2512 if (wol->wolopts & WAKE_MAGIC)
2513 jme->reg_pmcs |= PMCS_MFEN;
2515 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2521 jme_get_settings(struct net_device *netdev,
2522 struct ethtool_cmd *ecmd)
2524 struct jme_adapter *jme = netdev_priv(netdev);
2527 spin_lock_bh(&jme->phy_lock);
2528 rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2529 spin_unlock_bh(&jme->phy_lock);
2534 jme_set_settings(struct net_device *netdev,
2535 struct ethtool_cmd *ecmd)
2537 struct jme_adapter *jme = netdev_priv(netdev);
2540 if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2543 if (jme->mii_if.force_media &&
2544 ecmd->autoneg != AUTONEG_ENABLE &&
2545 (jme->mii_if.full_duplex != ecmd->duplex))
2548 spin_lock_bh(&jme->phy_lock);
2549 rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2550 spin_unlock_bh(&jme->phy_lock);
2553 jme_reset_link(jme);
2556 set_bit(JME_FLAG_SSET, &jme->flags);
2557 jme->old_ecmd = *ecmd;
2564 jme_get_link(struct net_device *netdev)
2566 struct jme_adapter *jme = netdev_priv(netdev);
2567 return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2571 jme_get_msglevel(struct net_device *netdev)
2573 struct jme_adapter *jme = netdev_priv(netdev);
2574 return jme->msg_enable;
2578 jme_set_msglevel(struct net_device *netdev, u32 value)
2580 struct jme_adapter *jme = netdev_priv(netdev);
2581 jme->msg_enable = value;
2585 jme_get_rx_csum(struct net_device *netdev)
2587 struct jme_adapter *jme = netdev_priv(netdev);
2588 return jme->reg_rxmcs & RXMCS_CHECKSUM;
2592 jme_set_rx_csum(struct net_device *netdev, u32 on)
2594 struct jme_adapter *jme = netdev_priv(netdev);
2596 spin_lock_bh(&jme->rxmcs_lock);
2598 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2600 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2601 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2602 spin_unlock_bh(&jme->rxmcs_lock);
2608 jme_set_tx_csum(struct net_device *netdev, u32 on)
2610 struct jme_adapter *jme = netdev_priv(netdev);
2613 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2614 if (netdev->mtu <= 1900)
2615 netdev->features |= NETIF_F_HW_CSUM;
2617 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2618 netdev->features &= ~NETIF_F_HW_CSUM;
2625 jme_set_tso(struct net_device *netdev, u32 on)
2627 struct jme_adapter *jme = netdev_priv(netdev);
2630 set_bit(JME_FLAG_TSO, &jme->flags);
2631 if (netdev->mtu <= 1900)
2632 netdev->features |= NETIF_F_TSO
2638 clear_bit(JME_FLAG_TSO, &jme->flags);
2639 netdev->features &= ~(NETIF_F_TSO
2650 jme_nway_reset(struct net_device *netdev)
2652 struct jme_adapter *jme = netdev_priv(netdev);
2653 jme_restart_an(jme);
2658 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2663 val = jread32(jme, JME_SMBCSR);
2664 to = JME_SMB_BUSY_TIMEOUT;
2665 while ((val & SMBCSR_BUSY) && --to) {
2667 val = jread32(jme, JME_SMBCSR);
2670 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2671 msg_hw(jme, "SMB Bus Busy.\n");
2673 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2678 jwrite32(jme, JME_SMBINTF,
2679 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2680 SMBINTF_HWRWN_READ |
2683 val = jread32(jme, JME_SMBINTF);
2684 to = JME_SMB_BUSY_TIMEOUT;
2685 while ((val & SMBINTF_HWCMD) && --to) {
2687 val = jread32(jme, JME_SMBINTF);
2690 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2691 msg_hw(jme, "SMB Bus Busy.\n");
2693 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2698 return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2702 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2707 val = jread32(jme, JME_SMBCSR);
2708 to = JME_SMB_BUSY_TIMEOUT;
2709 while ((val & SMBCSR_BUSY) && --to) {
2711 val = jread32(jme, JME_SMBCSR);
2714 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2715 msg_hw(jme, "SMB Bus Busy.\n");
2717 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2722 jwrite32(jme, JME_SMBINTF,
2723 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2724 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2725 SMBINTF_HWRWN_WRITE |
2728 val = jread32(jme, JME_SMBINTF);
2729 to = JME_SMB_BUSY_TIMEOUT;
2730 while ((val & SMBINTF_HWCMD) && --to) {
2732 val = jread32(jme, JME_SMBINTF);
2735 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2736 msg_hw(jme, "SMB Bus Busy.\n");
2738 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2747 jme_get_eeprom_len(struct net_device *netdev)
2749 struct jme_adapter *jme = netdev_priv(netdev);
2751 val = jread32(jme, JME_SMBCSR);
2752 return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2756 jme_get_eeprom(struct net_device *netdev,
2757 struct ethtool_eeprom *eeprom, u8 *data)
2759 struct jme_adapter *jme = netdev_priv(netdev);
2760 int i, offset = eeprom->offset, len = eeprom->len;
2763 * ethtool will check the boundary for us
2765 eeprom->magic = JME_EEPROM_MAGIC;
2766 for (i = 0 ; i < len ; ++i)
2767 data[i] = jme_smb_read(jme, i + offset);
2773 jme_set_eeprom(struct net_device *netdev,
2774 struct ethtool_eeprom *eeprom, u8 *data)
2776 struct jme_adapter *jme = netdev_priv(netdev);
2777 int i, offset = eeprom->offset, len = eeprom->len;
2779 if (eeprom->magic != JME_EEPROM_MAGIC)
2783 * ethtool will check the boundary for us
2785 for (i = 0 ; i < len ; ++i)
2786 jme_smb_write(jme, i + offset, data[i]);
2791 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2792 static struct ethtool_ops jme_ethtool_ops = {
2794 static const struct ethtool_ops jme_ethtool_ops = {
2796 .get_drvinfo = jme_get_drvinfo,
2797 .get_regs_len = jme_get_regs_len,
2798 .get_regs = jme_get_regs,
2799 .get_coalesce = jme_get_coalesce,
2800 .set_coalesce = jme_set_coalesce,
2801 .get_pauseparam = jme_get_pauseparam,
2802 .set_pauseparam = jme_set_pauseparam,
2803 .get_wol = jme_get_wol,
2804 .set_wol = jme_set_wol,
2805 .get_settings = jme_get_settings,
2806 .set_settings = jme_set_settings,
2807 .get_link = jme_get_link,
2808 .get_msglevel = jme_get_msglevel,
2809 .set_msglevel = jme_set_msglevel,
2810 .get_rx_csum = jme_get_rx_csum,
2811 .set_rx_csum = jme_set_rx_csum,
2812 .set_tx_csum = jme_set_tx_csum,
2813 .set_tso = jme_set_tso,
2814 .set_sg = ethtool_op_set_sg,
2815 .nway_reset = jme_nway_reset,
2816 .get_eeprom_len = jme_get_eeprom_len,
2817 .get_eeprom = jme_get_eeprom,
2818 .set_eeprom = jme_set_eeprom,
2822 jme_pci_dma64(struct pci_dev *pdev)
2824 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2825 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2826 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2828 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2831 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2832 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2834 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2838 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2839 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2840 !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2842 !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2845 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2846 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2848 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2852 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2853 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2854 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2856 if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2857 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
2865 jme_phy_init(struct jme_adapter *jme)
2869 reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2870 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2874 jme_check_hw_ver(struct jme_adapter *jme)
2878 chipmode = jread32(jme, JME_CHIPMODE);
2880 jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
2881 jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
2884 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2885 static const struct net_device_ops jme_netdev_ops = {
2886 .ndo_open = jme_open,
2887 .ndo_stop = jme_close,
2888 .ndo_validate_addr = eth_validate_addr,
2889 .ndo_start_xmit = jme_start_xmit,
2890 .ndo_set_mac_address = jme_set_macaddr,
2891 .ndo_set_multicast_list = jme_set_multi,
2892 .ndo_change_mtu = jme_change_mtu,
2893 .ndo_tx_timeout = jme_tx_timeout,
2894 .ndo_vlan_rx_register = jme_vlan_rx_register,
2898 static int __devinit
2899 jme_init_one(struct pci_dev *pdev,
2900 const struct pci_device_id *ent)
2902 int rc = 0, using_dac, i;
2903 struct net_device *netdev;
2904 struct jme_adapter *jme;
2909 * set up PCI device basics
2911 rc = pci_enable_device(pdev);
2913 jeprintk(pdev, "Cannot enable PCI device.\n");
2917 using_dac = jme_pci_dma64(pdev);
2918 if (using_dac < 0) {
2919 jeprintk(pdev, "Cannot set PCI DMA Mask.\n");
2921 goto err_out_disable_pdev;
2924 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2925 jeprintk(pdev, "No PCI resource region found.\n");
2927 goto err_out_disable_pdev;
2930 rc = pci_request_regions(pdev, DRV_NAME);
2932 jeprintk(pdev, "Cannot obtain PCI resource region.\n");
2933 goto err_out_disable_pdev;
2936 pci_set_master(pdev);
2939 * alloc and init net device
2941 netdev = alloc_etherdev(sizeof(*jme));
2943 jeprintk(pdev, "Cannot allocate netdev structure.\n");
2945 goto err_out_release_regions;
2947 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2948 netdev->netdev_ops = &jme_netdev_ops;
2950 netdev->open = jme_open;
2951 netdev->stop = jme_close;
2952 netdev->hard_start_xmit = jme_start_xmit;
2953 netdev->set_mac_address = jme_set_macaddr;
2954 netdev->set_multicast_list = jme_set_multi;
2955 netdev->change_mtu = jme_change_mtu;
2956 netdev->tx_timeout = jme_tx_timeout;
2957 netdev->vlan_rx_register = jme_vlan_rx_register;
2958 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2959 netdev->vlan_rx_kill_vid = jme_vlan_rx_kill_vid;
2961 NETDEV_GET_STATS(netdev, &jme_get_stats);
2963 netdev->ethtool_ops = &jme_ethtool_ops;
2964 netdev->watchdog_timeo = TX_TIMEOUT;
2965 netdev->features = NETIF_F_HW_CSUM |
2971 NETIF_F_HW_VLAN_TX |
2974 netdev->features |= NETIF_F_HIGHDMA;
2976 SET_NETDEV_DEV(netdev, &pdev->dev);
2977 pci_set_drvdata(pdev, netdev);
2982 jme = netdev_priv(netdev);
2985 jme->jme_rx = netif_rx;
2986 jme->jme_vlan_rx = vlan_hwaccel_rx;
2987 jme->old_mtu = netdev->mtu = 1500;
2989 jme->tx_ring_size = 1 << 10;
2990 jme->tx_ring_mask = jme->tx_ring_size - 1;
2991 jme->tx_wake_threshold = 1 << 9;
2992 jme->rx_ring_size = 1 << 9;
2993 jme->rx_ring_mask = jme->rx_ring_size - 1;
2994 jme->msg_enable = JME_DEF_MSG_ENABLE;
2995 jme->regs = ioremap(pci_resource_start(pdev, 0),
2996 pci_resource_len(pdev, 0));
2998 jeprintk(pdev, "Mapping PCI resource region error.\n");
3000 goto err_out_free_netdev;
3004 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
3005 jwrite32(jme, JME_APMC, apmc);
3006 } else if (force_pseudohp) {
3007 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
3008 jwrite32(jme, JME_APMC, apmc);
3011 NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3013 spin_lock_init(&jme->phy_lock);
3014 spin_lock_init(&jme->macaddr_lock);
3015 spin_lock_init(&jme->rxmcs_lock);
3017 atomic_set(&jme->link_changing, 1);
3018 atomic_set(&jme->rx_cleaning, 1);
3019 atomic_set(&jme->tx_cleaning, 1);
3020 atomic_set(&jme->rx_empty, 1);
3022 tasklet_init(&jme->pcc_task,
3024 (unsigned long) jme);
3025 tasklet_init(&jme->linkch_task,
3026 jme_link_change_tasklet,
3027 (unsigned long) jme);
3028 tasklet_init(&jme->txclean_task,
3029 jme_tx_clean_tasklet,
3030 (unsigned long) jme);
3031 tasklet_init(&jme->rxclean_task,
3032 jme_rx_clean_tasklet,
3033 (unsigned long) jme);
3034 tasklet_init(&jme->rxempty_task,
3035 jme_rx_empty_tasklet,
3036 (unsigned long) jme);
3037 tasklet_disable_nosync(&jme->linkch_task);
3038 tasklet_disable_nosync(&jme->txclean_task);
3039 tasklet_disable_nosync(&jme->rxclean_task);
3040 tasklet_disable_nosync(&jme->rxempty_task);
3041 jme->dpi.cur = PCC_P1;
3044 jme->reg_rxcs = RXCS_DEFAULT;
3045 jme->reg_rxmcs = RXMCS_DEFAULT;
3047 jme->reg_pmcs = PMCS_MFEN;
3048 set_bit(JME_FLAG_TXCSUM, &jme->flags);
3049 set_bit(JME_FLAG_TSO, &jme->flags);
3052 * Get Max Read Req Size from PCI Config Space
3054 pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3055 jme->mrrs &= PCI_DCSR_MRRS_MASK;
3056 switch (jme->mrrs) {
3058 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3061 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3064 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3069 * Must check before reset_mac_processor
3071 jme_check_hw_ver(jme);
3072 jme->mii_if.dev = netdev;
3074 jme->mii_if.phy_id = 0;
3075 for (i = 1 ; i < 32 ; ++i) {
3076 bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3077 bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3078 if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3079 jme->mii_if.phy_id = i;
3084 if (!jme->mii_if.phy_id) {
3086 jeprintk(pdev, "Can not find phy_id.\n");
3090 jme->reg_ghc |= GHC_LINK_POLL;
3092 jme->mii_if.phy_id = 1;
3094 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3095 jme->mii_if.supports_gmii = true;
3097 jme->mii_if.supports_gmii = false;
3098 jme->mii_if.mdio_read = jme_mdio_read;
3099 jme->mii_if.mdio_write = jme_mdio_write;
3102 jme_set_phyfifoa(jme);
3103 pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
3109 * Reset MAC processor and reload EEPROM for MAC Address
3111 jme_reset_mac_processor(jme);
3112 rc = jme_reload_eeprom(jme);
3115 "Reload eeprom for reading MAC Address error.\n");
3118 jme_load_macaddr(netdev);
3121 * Tell stack that we are not ready to work until open()
3123 netif_carrier_off(netdev);
3124 netif_stop_queue(netdev);
3129 rc = register_netdev(netdev);
3131 jeprintk(pdev, "Cannot register net device.\n");
3135 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
3136 msg_probe(jme, "%s%s ver:%x rev:%x "
3137 "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3138 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3139 "JMC250 Gigabit Ethernet" :
3140 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3141 "JMC260 Fast Ethernet" : "Unknown",
3142 (jme->fpgaver != 0) ? " (FPGA)" : "",
3143 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3145 netdev->dev_addr[0],
3146 netdev->dev_addr[1],
3147 netdev->dev_addr[2],
3148 netdev->dev_addr[3],
3149 netdev->dev_addr[4],
3150 netdev->dev_addr[5]);
3152 netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x macaddr:%pM\n",
3153 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3154 "JMC250 Gigabit Ethernet" :
3155 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3156 "JMC260 Fast Ethernet" : "Unknown",
3157 (jme->fpgaver != 0) ? " (FPGA)" : "",
3158 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3159 jme->rev, netdev->dev_addr);
3166 err_out_free_netdev:
3167 pci_set_drvdata(pdev, NULL);
3168 free_netdev(netdev);
3169 err_out_release_regions:
3170 pci_release_regions(pdev);
3171 err_out_disable_pdev:
3172 pci_disable_device(pdev);
3177 static void __devexit
3178 jme_remove_one(struct pci_dev *pdev)
3180 struct net_device *netdev = pci_get_drvdata(pdev);
3181 struct jme_adapter *jme = netdev_priv(netdev);
3183 unregister_netdev(netdev);
3185 pci_set_drvdata(pdev, NULL);
3186 free_netdev(netdev);
3187 pci_release_regions(pdev);
3188 pci_disable_device(pdev);
3194 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3196 struct net_device *netdev = pci_get_drvdata(pdev);
3197 struct jme_adapter *jme = netdev_priv(netdev);
3199 atomic_dec(&jme->link_changing);
3201 netif_device_detach(netdev);
3202 netif_stop_queue(netdev);
3205 tasklet_disable(&jme->txclean_task);
3206 tasklet_disable(&jme->rxclean_task);
3207 tasklet_disable(&jme->rxempty_task);
3209 if (netif_carrier_ok(netdev)) {
3210 if (test_bit(JME_FLAG_POLL, &jme->flags))
3211 jme_polling_mode(jme);
3213 jme_stop_pcc_timer(jme);
3214 jme_reset_ghc_speed(jme);
3215 jme_disable_rx_engine(jme);
3216 jme_disable_tx_engine(jme);
3217 jme_reset_mac_processor(jme);
3218 jme_free_rx_resources(jme);
3219 jme_free_tx_resources(jme);
3220 netif_carrier_off(netdev);
3224 tasklet_enable(&jme->txclean_task);
3225 tasklet_hi_enable(&jme->rxclean_task);
3226 tasklet_hi_enable(&jme->rxempty_task);
3228 pci_save_state(pdev);
3229 if (jme->reg_pmcs) {
3230 jme_set_100m_half(jme);
3232 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
3235 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
3237 pci_enable_wake(pdev, PCI_D3cold, true);
3241 pci_set_power_state(pdev, PCI_D3cold);
3247 jme_resume(struct pci_dev *pdev)
3249 struct net_device *netdev = pci_get_drvdata(pdev);
3250 struct jme_adapter *jme = netdev_priv(netdev);
3253 pci_restore_state(pdev);
3255 if (test_bit(JME_FLAG_SSET, &jme->flags))
3256 jme_set_settings(netdev, &jme->old_ecmd);
3258 jme_reset_phy_processor(jme);
3261 netif_device_attach(netdev);
3263 atomic_inc(&jme->link_changing);
3265 jme_reset_link(jme);
3271 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3272 static struct pci_device_id jme_pci_tbl[] = {
3274 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3276 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3277 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3281 static struct pci_driver jme_driver = {
3283 .id_table = jme_pci_tbl,
3284 .probe = jme_init_one,
3285 .remove = __devexit_p(jme_remove_one),
3287 .suspend = jme_suspend,
3288 .resume = jme_resume,
3289 #endif /* CONFIG_PM */
3293 jme_init_module(void)
3295 printk(KERN_INFO PFX "JMicron JMC2XX ethernet "
3296 "driver version %s\n", DRV_VERSION);
3297 return pci_register_driver(&jme_driver);
3301 jme_cleanup_module(void)
3303 pci_unregister_driver(&jme_driver);
3306 module_init(jme_init_module);
3307 module_exit(jme_cleanup_module);
3309 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3310 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3311 MODULE_LICENSE("GPL");
3312 MODULE_VERSION(DRV_VERSION);
3313 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);