jme.c

   1 /*
   2  * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
   3  *
   4  * Copyright 2008 JMicron Technology Corporation
   5  * http://www.jmicron.com/
   6  * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org>
   7  *
   8  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  */
  24
  25 #include <linux/version.h>
  26 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
  27 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  28 #endif
  29
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/pci.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/etherdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/mii.h>
  37 #include <linux/crc32.h>
  38 #include <linux/delay.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/in.h>
  41 #include <linux/ip.h>
  42 #include <linux/ipv6.h>
  43 #include <linux/tcp.h>
  44 #include <linux/udp.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/slab.h>
  47 #include <net/ip6_checksum.h>
  48 #include "jme.h"
  49
  50 static int force_pseudohp = -1;
  51 static int no_pseudohp = -1;
  52 static int no_extplug = -1;
  53 module_param(force_pseudohp, int, 0);
  54 MODULE_PARM_DESC(force_pseudohp,
  55         "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
  56 module_param(no_pseudohp, int, 0);
  57 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
  58 module_param(no_extplug, int, 0);
  59 MODULE_PARM_DESC(no_extplug,
  60         "Do not use external plug signal for pseudo hot-plug.");
  61
  62 static int
  63 jme_mdio_read(struct net_device *netdev, int phy, int reg)
  64 {
  65         struct jme_adapter *jme = netdev_priv(netdev);
  66         int i, val, again = (reg == MII_BMSR) ? 1 : 0;
  67
  68 read_again:
  69         jwrite32(jme, JME_SMI, SMI_OP_REQ |
  70                                 smi_phy_addr(phy) |
  71                                 smi_reg_addr(reg));
  72
  73         wmb();
  74         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
  75                 udelay(20);
  76                 val = jread32(jme, JME_SMI);
  77                 if ((val & SMI_OP_REQ) == 0)
  78                         break;
  79         }
  80
  81         if (i == 0) {
  82                 pr_err("phy(%d) read timeout : %d\n", phy, reg);
  83                 return 0;
  84         }
  85
  86         if (again--)
  87                 goto read_again;
  88
  89         return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
  90 }
  91
  92 static void
  93 jme_mdio_write(struct net_device *netdev,
  94                                 int phy, int reg, int val)
  95 {
  96         struct jme_adapter *jme = netdev_priv(netdev);
  97         int i;
  98
  99         jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
 100                 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
 101                 smi_phy_addr(phy) | smi_reg_addr(reg));
 102
 103         wmb();
 104         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
 105                 udelay(20);
 106                 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
 107                         break;
 108         }
 109
 110         if (i == 0)
 111                 pr_err("phy(%d) write timeout : %d\n", phy, reg);
 112 }
 113
 114 static int
 115 jme_phyext_read(struct jme_adapter *jme, int reg)
 116 {
 117         jme_mdio_write(jme->dev, jme->mii_if.phy_id,
 118                         JME_PHY_SPEC_ADDR_REG,
 119                         JME_PHY_SPEC_REG_READ | (reg & 0x3FFF));
 120         return jme_mdio_read(jme->dev, jme->mii_if.phy_id,
 121                                 JME_PHY_SPEC_DATA_REG);
 122 }
 123
 124 static void
 125 jme_phyext_write(struct jme_adapter *jme, int reg, int val)
 126 {
 127         jme_mdio_write(jme->dev, jme->mii_if.phy_id,
 128                         JME_PHY_SPEC_DATA_REG, val);
 129         jme_mdio_write(jme->dev, jme->mii_if.phy_id,
 130                         JME_PHY_SPEC_ADDR_REG,
 131                         JME_PHY_SPEC_REG_WRITE | (reg & 0x3FFF));
 132 }
 133
 134 static void
 135 jme_phyext_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
 136 {
 137         int i;
 138         u16 *p16 = (u16 *)p;
 139
 140         for (i = 0; i < reg_nr; ++i)
 141                 p16[i] = jme_phyext_read(jme, i);
 142 }
 143
 144 static inline void
 145 jme_reset_phy_processor(struct jme_adapter *jme)
 146 {
 147         u32 val;
 148
 149         jme_mdio_write(jme->dev,
 150                         jme->mii_if.phy_id,
 151                         MII_ADVERTISE, ADVERTISE_ALL |
 152                         ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 153
 154         if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
 155                 jme_mdio_write(jme->dev,
 156                                 jme->mii_if.phy_id,
 157                                 MII_CTRL1000,
 158                                 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 159
 160         val = jme_mdio_read(jme->dev,
 161                                 jme->mii_if.phy_id,
 162                                 MII_BMCR);
 163
 164         jme_mdio_write(jme->dev,
 165                         jme->mii_if.phy_id,
 166                         MII_BMCR, val | BMCR_RESET);
 167 }
 168
 169 static void
 170 jme_setup_wakeup_frame(struct jme_adapter *jme,
 171                        const u32 *mask, u32 crc, int fnr)
 172 {
 173         int i;
 174
 175         /*
 176          * Setup CRC pattern
 177          */
 178         jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
 179         wmb();
 180         jwrite32(jme, JME_WFODP, crc);
 181         wmb();
 182
 183         /*
 184          * Setup Mask
 185          */
 186         for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
 187                 jwrite32(jme, JME_WFOI,
 188                                 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
 189                                 (fnr & WFOI_FRAME_SEL));
 190                 wmb();
 191                 jwrite32(jme, JME_WFODP, mask[i]);
 192                 wmb();
 193         }
 194 }
 195
 196 static inline void
 197 jme_mac_rxclk_off(struct jme_adapter *jme)
 198 {
 199         jme->reg_gpreg1 |= GPREG1_RXCLKOFF;
 200         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 201 }
 202
 203 static inline void
 204 jme_mac_rxclk_on(struct jme_adapter *jme)
 205 {
 206         jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF;
 207         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 208 }
 209
 210 static inline void
 211 jme_mac_txclk_off(struct jme_adapter *jme)
 212 {
 213         jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC);
 214         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 215 }
 216
 217 static inline void
 218 jme_mac_txclk_on(struct jme_adapter *jme)
 219 {
 220         u32 speed = jme->reg_ghc & GHC_SPEED;
 221         if (speed == GHC_SPEED_1000M)
 222                 jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
 223         else
 224                 jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
 225         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 226 }
 227
 228 static inline void
 229 jme_reset_ghc_speed(struct jme_adapter *jme)
 230 {
 231         jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX);
 232         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 233 }
 234
 235 static inline void
 236 jme_reset_250A2_workaround(struct jme_adapter *jme)
 237 {
 238         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 239                              GPREG1_RSSPATCH);
 240         jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 241 }
 242
 243 static inline void
 244 jme_assert_ghc_reset(struct jme_adapter *jme)
 245 {
 246         jme->reg_ghc |= GHC_SWRST;
 247         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 248 }
 249
 250 static inline void
 251 jme_clear_ghc_reset(struct jme_adapter *jme)
 252 {
 253         jme->reg_ghc &= ~GHC_SWRST;
 254         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 255 }
 256
 257 static inline void
 258 jme_reset_mac_processor(struct jme_adapter *jme)
 259 {
 260         static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
 261         u32 crc = 0xCDCDCDCD;
 262         u32 gpreg0;
 263         int i;
 264
 265         jme_reset_ghc_speed(jme);
 266         jme_reset_250A2_workaround(jme);
 267
 268         jme_mac_rxclk_on(jme);
 269         jme_mac_txclk_on(jme);
 270         udelay(1);
 271         jme_assert_ghc_reset(jme);
 272         udelay(1);
 273         jme_mac_rxclk_off(jme);
 274         jme_mac_txclk_off(jme);
 275         udelay(1);
 276         jme_clear_ghc_reset(jme);
 277         udelay(1);
 278         jme_mac_rxclk_on(jme);
 279         jme_mac_txclk_on(jme);
 280         udelay(1);
 281         jme_mac_rxclk_off(jme);
 282         jme_mac_txclk_off(jme);
 283
 284         jwrite32(jme, JME_RXDBA_LO, 0x00000000);
 285         jwrite32(jme, JME_RXDBA_HI, 0x00000000);
 286         jwrite32(jme, JME_RXQDC, 0x00000000);
 287         jwrite32(jme, JME_RXNDA, 0x00000000);
 288         jwrite32(jme, JME_TXDBA_LO, 0x00000000);
 289         jwrite32(jme, JME_TXDBA_HI, 0x00000000);
 290         jwrite32(jme, JME_TXQDC, 0x00000000);
 291         jwrite32(jme, JME_TXNDA, 0x00000000);
 292
 293         jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
 294         jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
 295         for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
 296                 jme_setup_wakeup_frame(jme, mask, crc, i);
 297         if (jme->fpgaver)
 298                 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
 299         else
 300                 gpreg0 = GPREG0_DEFAULT;
 301         jwrite32(jme, JME_GPREG0, gpreg0);
 302 }
 303
 304 static inline void
 305 jme_clear_pm(struct jme_adapter *jme)
 306 {
 307         jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
 308         pci_set_power_state(jme->pdev, PCI_D0);
 309         pci_enable_wake(jme->pdev, PCI_D0, false);
 310 }
 311
 312 static int
 313 jme_reload_eeprom(struct jme_adapter *jme)
 314 {
 315         u32 val;
 316         int i;
 317
 318         val = jread32(jme, JME_SMBCSR);
 319
 320         if (val & SMBCSR_EEPROMD) {
 321                 val |= SMBCSR_CNACK;
 322                 jwrite32(jme, JME_SMBCSR, val);
 323                 val |= SMBCSR_RELOAD;
 324                 jwrite32(jme, JME_SMBCSR, val);
 325                 mdelay(12);
 326
 327                 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
 328                         mdelay(1);
 329                         if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
 330                                 break;
 331                 }
 332
 333                 if (i == 0) {
 334                         pr_err("eeprom reload timeout\n");
 335                         return -EIO;
 336                 }
 337         }
 338
 339         return 0;
 340 }
 341
 342 static void
 343 jme_load_macaddr(struct net_device *netdev)
 344 {
 345         struct jme_adapter *jme = netdev_priv(netdev);
 346         unsigned char macaddr[6];
 347         u32 val;
 348
 349         spin_lock_bh(&jme->macaddr_lock);
 350         val = jread32(jme, JME_RXUMA_LO);
 351         macaddr[0] = (val >>  0) & 0xFF;
 352         macaddr[1] = (val >>  8) & 0xFF;
 353         macaddr[2] = (val >> 16) & 0xFF;
 354         macaddr[3] = (val >> 24) & 0xFF;
 355         val = jread32(jme, JME_RXUMA_HI);
 356         macaddr[4] = (val >>  0) & 0xFF;
 357         macaddr[5] = (val >>  8) & 0xFF;
 358         memcpy(netdev->dev_addr, macaddr, 6);
 359         spin_unlock_bh(&jme->macaddr_lock);
 360 }
 361
 362 static inline void
 363 jme_set_rx_pcc(struct jme_adapter *jme, int p)
 364 {
 365         switch (p) {
 366         case PCC_OFF:
 367                 jwrite32(jme, JME_PCCRX0,
 368                         ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 369                         ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 370                 break;
 371         case PCC_P1:
 372                 jwrite32(jme, JME_PCCRX0,
 373                         ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 374                         ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 375                 break;
 376         case PCC_P2:
 377                 jwrite32(jme, JME_PCCRX0,
 378                         ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 379                         ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 380                 break;
 381         case PCC_P3:
 382                 jwrite32(jme, JME_PCCRX0,
 383                         ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 384                         ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 385                 break;
 386         default:
 387                 break;
 388         }
 389         wmb();
 390
 391         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
 392                 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
 393 }
 394
 395 static void
 396 jme_start_irq(struct jme_adapter *jme)
 397 {
 398         register struct dynpcc_info *dpi = &(jme->dpi);
 399
 400         jme_set_rx_pcc(jme, PCC_P1);
 401         dpi->cur                = PCC_P1;
 402         dpi->attempt            = PCC_P1;
 403         dpi->cnt                = 0;
 404
 405         jwrite32(jme, JME_PCCTX,
 406                         ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
 407                         ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
 408                         PCCTXQ0_EN
 409                 );
 410
 411         /*
 412          * Enable Interrupts
 413          */
 414         jwrite32(jme, JME_IENS, INTR_ENABLE);
 415 }
 416
 417 static inline void
 418 jme_stop_irq(struct jme_adapter *jme)
 419 {
 420         /*
 421          * Disable Interrupts
 422          */
 423         jwrite32f(jme, JME_IENC, INTR_ENABLE);
 424 }
 425
 426 static u32
 427 jme_linkstat_from_phy(struct jme_adapter *jme)
 428 {
 429         u32 phylink, bmsr;
 430
 431         phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
 432         bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
 433         if (bmsr & BMSR_ANCOMP)
 434                 phylink |= PHY_LINK_AUTONEG_COMPLETE;
 435
 436         return phylink;
 437 }
 438
 439 static inline void
 440 jme_set_phyfifo_5level(struct jme_adapter *jme)
 441 {
 442         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
 443 }
 444
 445 static inline void
 446 jme_set_phyfifo_8level(struct jme_adapter *jme)
 447 {
 448         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
 449 }
 450
 451 static int
 452 jme_check_link(struct net_device *netdev, int testonly)
 453 {
 454         struct jme_adapter *jme = netdev_priv(netdev);
 455         u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr;
 456         char linkmsg[64];
 457         int rc = 0;
 458
 459         linkmsg[0] = '\0';
 460
 461         if (jme->fpgaver)
 462                 phylink = jme_linkstat_from_phy(jme);
 463         else
 464                 phylink = jread32(jme, JME_PHY_LINK);
 465
 466         if (phylink & PHY_LINK_UP) {
 467                 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
 468                         /*
 469                          * If we did not enable AN
 470                          * Speed/Duplex Info should be obtained from SMI
 471                          */
 472                         phylink = PHY_LINK_UP;
 473
 474                         bmcr = jme_mdio_read(jme->dev,
 475                                                 jme->mii_if.phy_id,
 476                                                 MII_BMCR);
 477
 478                         phylink |= ((bmcr & BMCR_SPEED1000) &&
 479                                         (bmcr & BMCR_SPEED100) == 0) ?
 480                                         PHY_LINK_SPEED_1000M :
 481                                         (bmcr & BMCR_SPEED100) ?
 482                                         PHY_LINK_SPEED_100M :
 483                                         PHY_LINK_SPEED_10M;
 484
 485                         phylink |= (bmcr & BMCR_FULLDPLX) ?
 486                                          PHY_LINK_DUPLEX : 0;
 487
 488                         strcat(linkmsg, "Forced: ");
 489                 } else {
 490                         /*
 491                          * Keep polling for speed/duplex resolve complete
 492                          */
 493                         while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
 494                                 --cnt) {
 495
 496                                 udelay(1);
 497
 498                                 if (jme->fpgaver)
 499                                         phylink = jme_linkstat_from_phy(jme);
 500                                 else
 501                                         phylink = jread32(jme, JME_PHY_LINK);
 502                         }
 503                         if (!cnt)
 504                                 pr_err("Waiting speed resolve timeout\n");
 505
 506                         strcat(linkmsg, "ANed: ");
 507                 }
 508
 509                 if (jme->phylink == phylink) {
 510                         rc = 1;
 511                         goto out;
 512                 }
 513                 if (testonly)
 514                         goto out;
 515
 516                 jme->phylink = phylink;
 517
 518                 /*
 519                  * The speed/duplex setting of jme->reg_ghc already cleared
 520                  * by jme_reset_mac_processor()
 521                  */
 522                 switch (phylink & PHY_LINK_SPEED_MASK) {
 523                 case PHY_LINK_SPEED_10M:
 524                         jme->reg_ghc |= GHC_SPEED_10M;
 525                         strcat(linkmsg, "10 Mbps, ");
 526                         break;
 527                 case PHY_LINK_SPEED_100M:
 528                         jme->reg_ghc |= GHC_SPEED_100M;
 529                         strcat(linkmsg, "100 Mbps, ");
 530                         break;
 531                 case PHY_LINK_SPEED_1000M:
 532                         jme->reg_ghc |= GHC_SPEED_1000M;
 533                         strcat(linkmsg, "1000 Mbps, ");
 534                         break;
 535                 default:
 536                         break;
 537                 }
 538
 539                 if (phylink & PHY_LINK_DUPLEX) {
 540                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
 541                         jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX);
 542                         jme->reg_ghc |= GHC_DPX;
 543                 } else {
 544                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
 545                                                 TXMCS_BACKOFF |
 546                                                 TXMCS_CARRIERSENSE |
 547                                                 TXMCS_COLLISION);
 548                         jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX);
 549                 }
 550
 551                 jwrite32(jme, JME_GHC, jme->reg_ghc);
 552
 553                 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
 554                         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 555                                              GPREG1_RSSPATCH);
 556                         if (!(phylink & PHY_LINK_DUPLEX))
 557                                 jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH;
 558                         switch (phylink & PHY_LINK_SPEED_MASK) {
 559                         case PHY_LINK_SPEED_10M:
 560                                 jme_set_phyfifo_8level(jme);
 561                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 562                                 break;
 563                         case PHY_LINK_SPEED_100M:
 564                                 jme_set_phyfifo_5level(jme);
 565                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 566                                 break;
 567                         case PHY_LINK_SPEED_1000M:
 568                                 jme_set_phyfifo_8level(jme);
 569                                 break;
 570                         default:
 571                                 break;
 572                         }
 573                 }
 574                 jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 575
 576                 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
 577                                         "Full-Duplex, " :
 578                                         "Half-Duplex, ");
 579                 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
 580                                         "MDI-X" :
 581                                         "MDI");
 582                 netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg);
 583                 netif_carrier_on(netdev);
 584         } else {
 585                 if (testonly)
 586                         goto out;
 587
 588                 netif_info(jme, link, jme->dev, "Link is down\n");
 589                 jme->phylink = 0;
 590                 netif_carrier_off(netdev);
 591         }
 592
 593 out:
 594         return rc;
 595 }
 596
 597 static int
 598 jme_setup_tx_resources(struct jme_adapter *jme)
 599 {
 600         struct jme_ring *txring = &(jme->txring[0]);
 601
 602         txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 603                                    TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 604                                    &(txring->dmaalloc),
 605                                    GFP_ATOMIC);
 606
 607         if (!txring->alloc)
 608                 goto err_set_null;
 609
 610         /*
 611          * 16 Bytes align
 612          */
 613         txring->desc            = (void *)ALIGN((unsigned long)(txring->alloc),
 614                                                 RING_DESC_ALIGN);
 615         txring->dma             = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
 616         txring->next_to_use     = 0;
 617         atomic_set(&txring->next_to_clean, 0);
 618         atomic_set(&txring->nr_free, jme->tx_ring_size);
 619
 620         txring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 621                                         jme->tx_ring_size, GFP_ATOMIC);
 622         if (unlikely(!(txring->bufinf)))
 623                 goto err_free_txring;
 624
 625         /*
 626          * Initialize Transmit Descriptors
 627          */
 628         memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
 629         memset(txring->bufinf, 0,
 630                 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
 631
 632         return 0;
 633
 634 err_free_txring:
 635         dma_free_coherent(&(jme->pdev->dev),
 636                           TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 637                           txring->alloc,
 638                           txring->dmaalloc);
 639
 640 err_set_null:
 641         txring->desc = NULL;
 642         txring->dmaalloc = 0;
 643         txring->dma = 0;
 644         txring->bufinf = NULL;
 645
 646         return -ENOMEM;
 647 }
 648
 649 static void
 650 jme_free_tx_resources(struct jme_adapter *jme)
 651 {
 652         int i;
 653         struct jme_ring *txring = &(jme->txring[0]);
 654         struct jme_buffer_info *txbi;
 655
 656         if (txring->alloc) {
 657                 if (txring->bufinf) {
 658                         for (i = 0 ; i < jme->tx_ring_size ; ++i) {
 659                                 txbi = txring->bufinf + i;
 660                                 if (txbi->skb) {
 661                                         dev_kfree_skb(txbi->skb);
 662                                         txbi->skb = NULL;
 663                                 }
 664                                 txbi->mapping           = 0;
 665                                 txbi->len               = 0;
 666                                 txbi->nr_desc           = 0;
 667                                 txbi->start_xmit        = 0;
 668                         }
 669                         kfree(txring->bufinf);
 670                 }
 671
 672                 dma_free_coherent(&(jme->pdev->dev),
 673                                   TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 674                                   txring->alloc,
 675                                   txring->dmaalloc);
 676
 677                 txring->alloc           = NULL;
 678                 txring->desc            = NULL;
 679                 txring->dmaalloc        = 0;
 680                 txring->dma             = 0;
 681                 txring->bufinf          = NULL;
 682         }
 683         txring->next_to_use     = 0;
 684         atomic_set(&txring->next_to_clean, 0);
 685         atomic_set(&txring->nr_free, 0);
 686 }
 687
 688 static inline void
 689 jme_enable_tx_engine(struct jme_adapter *jme)
 690 {
 691         /*
 692          * Select Queue 0
 693          */
 694         jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
 695         wmb();
 696
 697         /*
 698          * Setup TX Queue 0 DMA Bass Address
 699          */
 700         jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 701         jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
 702         jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 703
 704         /*
 705          * Setup TX Descptor Count
 706          */
 707         jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
 708
 709         /*
 710          * Enable TX Engine
 711          */
 712         wmb();
 713         jwrite32f(jme, JME_TXCS, jme->reg_txcs |
 714                                 TXCS_SELECT_QUEUE0 |
 715                                 TXCS_ENABLE);
 716
 717         /*
 718          * Start clock for TX MAC Processor
 719          */
 720         jme_mac_txclk_on(jme);
 721 }
 722
 723 static inline void
 724 jme_restart_tx_engine(struct jme_adapter *jme)
 725 {
 726         /*
 727          * Restart TX Engine
 728          */
 729         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 730                                 TXCS_SELECT_QUEUE0 |
 731                                 TXCS_ENABLE);
 732 }
 733
 734 static inline void
 735 jme_disable_tx_engine(struct jme_adapter *jme)
 736 {
 737         int i;
 738         u32 val;
 739
 740         /*
 741          * Disable TX Engine
 742          */
 743         jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
 744         wmb();
 745
 746         val = jread32(jme, JME_TXCS);
 747         for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
 748                 mdelay(1);
 749                 val = jread32(jme, JME_TXCS);
 750                 rmb();
 751         }
 752
 753         if (!i)
 754                 pr_err("Disable TX engine timeout\n");
 755
 756         /*
 757          * Stop clock for TX MAC Processor
 758          */
 759         jme_mac_txclk_off(jme);
 760 }
 761
 762 static void
 763 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
 764 {
 765         struct jme_ring *rxring = &(jme->rxring[0]);
 766         register struct rxdesc *rxdesc = rxring->desc;
 767         struct jme_buffer_info *rxbi = rxring->bufinf;
 768         rxdesc += i;
 769         rxbi += i;
 770
 771         rxdesc->dw[0] = 0;
 772         rxdesc->dw[1] = 0;
 773         rxdesc->desc1.bufaddrh  = cpu_to_le32((__u64)rxbi->mapping >> 32);
 774         rxdesc->desc1.bufaddrl  = cpu_to_le32(
 775                                         (__u64)rxbi->mapping & 0xFFFFFFFFUL);
 776         rxdesc->desc1.datalen   = cpu_to_le16(rxbi->len);
 777         if (jme->dev->features & NETIF_F_HIGHDMA)
 778                 rxdesc->desc1.flags = RXFLAG_64BIT;
 779         wmb();
 780         rxdesc->desc1.flags     |= RXFLAG_OWN | RXFLAG_INT;
 781 }
 782
 783 static int
 784 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
 785 {
 786         struct jme_ring *rxring = &(jme->rxring[0]);
 787         struct jme_buffer_info *rxbi = rxring->bufinf + i;
 788         struct sk_buff *skb;
 789
 790         skb = netdev_alloc_skb(jme->dev,
 791                 jme->dev->mtu + RX_EXTRA_LEN);
 792         if (unlikely(!skb))
 793                 return -ENOMEM;
 794 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
 795         skb->dev = jme->dev;
 796 #endif
 797
 798         rxbi->skb = skb;
 799         rxbi->len = skb_tailroom(skb);
 800         rxbi->mapping = pci_map_page(jme->pdev,
 801                                         virt_to_page(skb->data),
 802                                         offset_in_page(skb->data),
 803                                         rxbi->len,
 804                                         PCI_DMA_FROMDEVICE);
 805
 806         return 0;
 807 }
 808
 809 static void
 810 jme_free_rx_buf(struct jme_adapter *jme, int i)
 811 {
 812         struct jme_ring *rxring = &(jme->rxring[0]);
 813         struct jme_buffer_info *rxbi = rxring->bufinf;
 814         rxbi += i;
 815
 816         if (rxbi->skb) {
 817                 pci_unmap_page(jme->pdev,
 818                                  rxbi->mapping,
 819                                  rxbi->len,
 820                                  PCI_DMA_FROMDEVICE);
 821                 dev_kfree_skb(rxbi->skb);
 822                 rxbi->skb = NULL;
 823                 rxbi->mapping = 0;
 824                 rxbi->len = 0;
 825         }
 826 }
 827
 828 static void
 829 jme_free_rx_resources(struct jme_adapter *jme)
 830 {
 831         int i;
 832         struct jme_ring *rxring = &(jme->rxring[0]);
 833
 834         if (rxring->alloc) {
 835                 if (rxring->bufinf) {
 836                         for (i = 0 ; i < jme->rx_ring_size ; ++i)
 837                                 jme_free_rx_buf(jme, i);
 838                         kfree(rxring->bufinf);
 839                 }
 840
 841                 dma_free_coherent(&(jme->pdev->dev),
 842                                   RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 843                                   rxring->alloc,
 844                                   rxring->dmaalloc);
 845                 rxring->alloc    = NULL;
 846                 rxring->desc     = NULL;
 847                 rxring->dmaalloc = 0;
 848                 rxring->dma      = 0;
 849                 rxring->bufinf   = NULL;
 850         }
 851         rxring->next_to_use   = 0;
 852         atomic_set(&rxring->next_to_clean, 0);
 853 }
 854
 855 static int
 856 jme_setup_rx_resources(struct jme_adapter *jme)
 857 {
 858         int i;
 859         struct jme_ring *rxring = &(jme->rxring[0]);
 860
 861         rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 862                                    RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 863                                    &(rxring->dmaalloc),
 864                                    GFP_ATOMIC);
 865         if (!rxring->alloc)
 866                 goto err_set_null;
 867
 868         /*
 869          * 16 Bytes align
 870          */
 871         rxring->desc            = (void *)ALIGN((unsigned long)(rxring->alloc),
 872                                                 RING_DESC_ALIGN);
 873         rxring->dma             = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
 874         rxring->next_to_use     = 0;
 875         atomic_set(&rxring->next_to_clean, 0);
 876
 877         rxring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 878                                         jme->rx_ring_size, GFP_ATOMIC);
 879         if (unlikely(!(rxring->bufinf)))
 880                 goto err_free_rxring;
 881
 882         /*
 883          * Initiallize Receive Descriptors
 884          */
 885         memset(rxring->bufinf, 0,
 886                 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
 887         for (i = 0 ; i < jme->rx_ring_size ; ++i) {
 888                 if (unlikely(jme_make_new_rx_buf(jme, i))) {
 889                         jme_free_rx_resources(jme);
 890                         return -ENOMEM;
 891                 }
 892
 893                 jme_set_clean_rxdesc(jme, i);
 894         }
 895
 896         return 0;
 897
 898 err_free_rxring:
 899         dma_free_coherent(&(jme->pdev->dev),
 900                           RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 901                           rxring->alloc,
 902                           rxring->dmaalloc);
 903 err_set_null:
 904         rxring->desc = NULL;
 905         rxring->dmaalloc = 0;
 906         rxring->dma = 0;
 907         rxring->bufinf = NULL;
 908
 909         return -ENOMEM;
 910 }
 911
 912 static inline void
 913 jme_enable_rx_engine(struct jme_adapter *jme)
 914 {
 915         /*
 916          * Select Queue 0
 917          */
 918         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 919                                 RXCS_QUEUESEL_Q0);
 920         wmb();
 921
 922         /*
 923          * Setup RX DMA Bass Address
 924          */
 925         jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 926         jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
 927         jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 928
 929         /*
 930          * Setup RX Descriptor Count
 931          */
 932         jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
 933
 934         /*
 935          * Setup Unicast Filter
 936          */
 937         jme_set_unicastaddr(jme->dev);
 938         jme_set_multi(jme->dev);
 939
 940         /*
 941          * Enable RX Engine
 942          */
 943         wmb();
 944         jwrite32f(jme, JME_RXCS, jme->reg_rxcs |
 945                                 RXCS_QUEUESEL_Q0 |
 946                                 RXCS_ENABLE |
 947                                 RXCS_QST);
 948
 949         /*
 950          * Start clock for RX MAC Processor
 951          */
 952         jme_mac_rxclk_on(jme);
 953 }
 954
 955 static inline void
 956 jme_restart_rx_engine(struct jme_adapter *jme)
 957 {
 958         /*
 959          * Start RX Engine
 960          */
 961         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 962                                 RXCS_QUEUESEL_Q0 |
 963                                 RXCS_ENABLE |
 964                                 RXCS_QST);
 965 }
 966
 967 static inline void
 968 jme_disable_rx_engine(struct jme_adapter *jme)
 969 {
 970         int i;
 971         u32 val;
 972
 973         /*
 974          * Disable RX Engine
 975          */
 976         jwrite32(jme, JME_RXCS, jme->reg_rxcs);
 977         wmb();
 978
 979         val = jread32(jme, JME_RXCS);
 980         for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
 981                 mdelay(1);
 982                 val = jread32(jme, JME_RXCS);
 983                 rmb();
 984         }
 985
 986         if (!i)
 987                 pr_err("Disable RX engine timeout\n");
 988
 989         /*
 990          * Stop clock for RX MAC Processor
 991          */
 992         jme_mac_rxclk_off(jme);
 993 }
 994
 995 static u16
 996 jme_udpsum(struct sk_buff *skb)
 997 {
 998         u16 csum = 0xFFFFu;
 999
1000         if (skb->len < (ETH_HLEN + sizeof(struct iphdr)))
1001                 return csum;
1002         if (skb->protocol != htons(ETH_P_IP))
1003                 return csum;
1004         skb_set_network_header(skb, ETH_HLEN);
1005         if ((ip_hdr(skb)->protocol != IPPROTO_UDP) ||
1006             (skb->len < (ETH_HLEN +
1007                         (ip_hdr(skb)->ihl << 2) +
1008                         sizeof(struct udphdr)))) {
1009                 skb_reset_network_header(skb);
1010                 return csum;
1011         }
1012         skb_set_transport_header(skb,
1013                         ETH_HLEN + (ip_hdr(skb)->ihl << 2));
1014         csum = udp_hdr(skb)->check;
1015         skb_reset_transport_header(skb);
1016         skb_reset_network_header(skb);
1017
1018         return csum;
1019 }
1020
1021 static int
1022 jme_rxsum_ok(struct jme_adapter *jme, u16 flags, struct sk_buff *skb)
1023 {
1024         if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
1025                 return false;
1026
1027         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
1028                         == RXWBFLAG_TCPON)) {
1029                 if (flags & RXWBFLAG_IPV4)
1030                         netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
1031                 return false;
1032         }
1033
1034         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
1035                         == RXWBFLAG_UDPON) && jme_udpsum(skb)) {
1036                 if (flags & RXWBFLAG_IPV4)
1037                         netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n");
1038                 return false;
1039         }
1040
1041         if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
1042                         == RXWBFLAG_IPV4)) {
1043                 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n");
1044                 return false;
1045         }
1046
1047         return true;
1048 }
1049
1050 static void
1051 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
1052 {
1053         struct jme_ring *rxring = &(jme->rxring[0]);
1054         struct rxdesc *rxdesc = rxring->desc;
1055         struct jme_buffer_info *rxbi = rxring->bufinf;
1056         struct sk_buff *skb;
1057         int framesize;
1058
1059         rxdesc += idx;
1060         rxbi += idx;
1061
1062         skb = rxbi->skb;
1063         pci_dma_sync_single_for_cpu(jme->pdev,
1064                                         rxbi->mapping,
1065                                         rxbi->len,
1066                                         PCI_DMA_FROMDEVICE);
1067
1068         if (unlikely(jme_make_new_rx_buf(jme, idx))) {
1069                 pci_dma_sync_single_for_device(jme->pdev,
1070                                                 rxbi->mapping,
1071                                                 rxbi->len,
1072                                                 PCI_DMA_FROMDEVICE);
1073
1074                 ++(NET_STAT(jme).rx_dropped);
1075         } else {
1076                 framesize = le16_to_cpu(rxdesc->descwb.framesize)
1077                                 - RX_PREPAD_SIZE;
1078
1079                 skb_reserve(skb, RX_PREPAD_SIZE);
1080                 skb_put(skb, framesize);
1081                 skb->protocol = eth_type_trans(skb, jme->dev);
1082
1083                 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags), skb))
1084                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1085                 else
1086 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35)
1087                         skb->ip_summed = CHECKSUM_NONE;
1088 #else
1089                         skb_checksum_none_assert(skb);
1090 #endif
1091
1092                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
1093                         if (jme->vlgrp) {
1094                                 jme->jme_vlan_rx(skb, jme->vlgrp,
1095                                         le16_to_cpu(rxdesc->descwb.vlan));
1096                                 NET_STAT(jme).rx_bytes += 4;
1097                         } else {
1098                                 dev_kfree_skb(skb);
1099                         }
1100                 } else {
1101                         jme->jme_rx(skb);
1102                 }
1103
1104                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
1105                     cpu_to_le16(RXWBFLAG_DEST_MUL))
1106                         ++(NET_STAT(jme).multicast);
1107
1108                 NET_STAT(jme).rx_bytes += framesize;
1109                 ++(NET_STAT(jme).rx_packets);
1110         }
1111
1112         jme_set_clean_rxdesc(jme, idx);
1113
1114 }
1115
1116 static int
1117 jme_process_receive(struct jme_adapter *jme, int limit)
1118 {
1119         struct jme_ring *rxring = &(jme->rxring[0]);
1120         struct rxdesc *rxdesc = rxring->desc;
1121         int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1122
1123         if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1124                 goto out_inc;
1125
1126         if (unlikely(atomic_read(&jme->link_changing) != 1))
1127                 goto out_inc;
1128
1129         if (unlikely(!netif_carrier_ok(jme->dev)))
1130                 goto out_inc;
1131
1132         i = atomic_read(&rxring->next_to_clean);
1133         while (limit > 0) {
1134                 rxdesc = rxring->desc;
1135                 rxdesc += i;
1136
1137                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1138                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1139                         goto out;
1140                 --limit;
1141
1142                 rmb();
1143                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1144
1145                 if (unlikely(desccnt > 1 ||
1146                 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1147
1148                         if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1149                                 ++(NET_STAT(jme).rx_crc_errors);
1150                         else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1151                                 ++(NET_STAT(jme).rx_fifo_errors);
1152                         else
1153                                 ++(NET_STAT(jme).rx_errors);
1154
1155                         if (desccnt > 1)
1156                                 limit -= desccnt - 1;
1157
1158                         for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1159                                 jme_set_clean_rxdesc(jme, j);
1160                                 j = (j + 1) & (mask);
1161                         }
1162
1163                 } else {
1164                         jme_alloc_and_feed_skb(jme, i);
1165                 }
1166
1167                 i = (i + desccnt) & (mask);
1168         }
1169
1170 out:
1171         atomic_set(&rxring->next_to_clean, i);
1172
1173 out_inc:
1174         atomic_inc(&jme->rx_cleaning);
1175
1176         return limit > 0 ? limit : 0;
1177
1178 }
1179
1180 static void
1181 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1182 {
1183         if (likely(atmp == dpi->cur)) {
1184                 dpi->cnt = 0;
1185                 return;
1186         }
1187
1188         if (dpi->attempt == atmp) {
1189                 ++(dpi->cnt);
1190         } else {
1191                 dpi->attempt = atmp;
1192                 dpi->cnt = 0;
1193         }
1194
1195 }
1196
1197 static void
1198 jme_dynamic_pcc(struct jme_adapter *jme)
1199 {
1200         register struct dynpcc_info *dpi = &(jme->dpi);
1201
1202         if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1203                 jme_attempt_pcc(dpi, PCC_P3);
1204         else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1205                  dpi->intr_cnt > PCC_INTR_THRESHOLD)
1206                 jme_attempt_pcc(dpi, PCC_P2);
1207         else
1208                 jme_attempt_pcc(dpi, PCC_P1);
1209
1210         if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1211                 if (dpi->attempt < dpi->cur)
1212                         tasklet_schedule(&jme->rxclean_task);
1213                 jme_set_rx_pcc(jme, dpi->attempt);
1214                 dpi->cur = dpi->attempt;
1215                 dpi->cnt = 0;
1216         }
1217 }
1218
1219 static void
1220 jme_start_pcc_timer(struct jme_adapter *jme)
1221 {
1222         struct dynpcc_info *dpi = &(jme->dpi);
1223         dpi->last_bytes         = NET_STAT(jme).rx_bytes;
1224         dpi->last_pkts          = NET_STAT(jme).rx_packets;
1225         dpi->intr_cnt           = 0;
1226         jwrite32(jme, JME_TMCSR,
1227                 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1228 }
1229
1230 static inline void
1231 jme_stop_pcc_timer(struct jme_adapter *jme)
1232 {
1233         jwrite32(jme, JME_TMCSR, 0);
1234 }
1235
1236 static void
1237 jme_shutdown_nic(struct jme_adapter *jme)
1238 {
1239         u32 phylink;
1240
1241         phylink = jme_linkstat_from_phy(jme);
1242
1243         if (!(phylink & PHY_LINK_UP)) {
1244                 /*
1245                  * Disable all interrupt before issue timer
1246                  */
1247                 jme_stop_irq(jme);
1248                 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1249         }
1250 }
1251
1252 static void
1253 jme_pcc_tasklet(unsigned long arg)
1254 {
1255         struct jme_adapter *jme = (struct jme_adapter *)arg;
1256         struct net_device *netdev = jme->dev;
1257
1258         if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1259                 jme_shutdown_nic(jme);
1260                 return;
1261         }
1262
1263         if (unlikely(!netif_carrier_ok(netdev) ||
1264                 (atomic_read(&jme->link_changing) != 1)
1265         )) {
1266                 jme_stop_pcc_timer(jme);
1267                 return;
1268         }
1269
1270         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1271                 jme_dynamic_pcc(jme);
1272
1273         jme_start_pcc_timer(jme);
1274 }
1275
1276 static inline void
1277 jme_polling_mode(struct jme_adapter *jme)
1278 {
1279         jme_set_rx_pcc(jme, PCC_OFF);
1280 }
1281
1282 static inline void
1283 jme_interrupt_mode(struct jme_adapter *jme)
1284 {
1285         jme_set_rx_pcc(jme, PCC_P1);
1286 }
1287
1288 static inline int
1289 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1290 {
1291         u32 apmc;
1292         apmc = jread32(jme, JME_APMC);
1293         return apmc & JME_APMC_PSEUDO_HP_EN;
1294 }
1295
1296 static void
1297 jme_start_shutdown_timer(struct jme_adapter *jme)
1298 {
1299         u32 apmc;
1300
1301         apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1302         apmc &= ~JME_APMC_EPIEN_CTRL;
1303         if (!no_extplug) {
1304                 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1305                 wmb();
1306         }
1307         jwrite32f(jme, JME_APMC, apmc);
1308
1309         jwrite32f(jme, JME_TIMER2, 0);
1310         set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1311         jwrite32(jme, JME_TMCSR,
1312                 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1313 }
1314
1315 static void
1316 jme_stop_shutdown_timer(struct jme_adapter *jme)
1317 {
1318         u32 apmc;
1319
1320         jwrite32f(jme, JME_TMCSR, 0);
1321         jwrite32f(jme, JME_TIMER2, 0);
1322         clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1323
1324         apmc = jread32(jme, JME_APMC);
1325         apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1326         jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1327         wmb();
1328         jwrite32f(jme, JME_APMC, apmc);
1329 }
1330
1331 static void
1332 jme_link_change_tasklet(unsigned long arg)
1333 {
1334         struct jme_adapter *jme = (struct jme_adapter *)arg;
1335         struct net_device *netdev = jme->dev;
1336         int rc;
1337
1338         while (!atomic_dec_and_test(&jme->link_changing)) {
1339                 atomic_inc(&jme->link_changing);
1340                 netif_info(jme, intr, jme->dev, "Get link change lock failed\n");
1341                 while (atomic_read(&jme->link_changing) != 1)
1342                         netif_info(jme, intr, jme->dev, "Waiting link change lock\n");
1343         }
1344
1345         if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1346                 goto out;
1347
1348         jme->old_mtu = netdev->mtu;
1349         netif_stop_queue(netdev);
1350         if (jme_pseudo_hotplug_enabled(jme))
1351                 jme_stop_shutdown_timer(jme);
1352
1353         jme_stop_pcc_timer(jme);
1354         tasklet_disable(&jme->txclean_task);
1355         tasklet_disable(&jme->rxclean_task);
1356         tasklet_disable(&jme->rxempty_task);
1357
1358         if (netif_carrier_ok(netdev)) {
1359                 jme_disable_rx_engine(jme);
1360                 jme_disable_tx_engine(jme);
1361                 jme_reset_mac_processor(jme);
1362                 jme_free_rx_resources(jme);
1363                 jme_free_tx_resources(jme);
1364
1365                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1366                         jme_polling_mode(jme);
1367
1368                 netif_carrier_off(netdev);
1369         }
1370
1371         jme_check_link(netdev, 0);
1372         if (netif_carrier_ok(netdev)) {
1373                 rc = jme_setup_rx_resources(jme);
1374                 if (rc) {
1375                         pr_err("Allocating resources for RX error, Device STOPPED!\n");
1376                         goto out_enable_tasklet;
1377                 }
1378
1379                 rc = jme_setup_tx_resources(jme);
1380                 if (rc) {
1381                         pr_err("Allocating resources for TX error, Device STOPPED!\n");
1382                         goto err_out_free_rx_resources;
1383                 }
1384
1385                 jme_enable_rx_engine(jme);
1386                 jme_enable_tx_engine(jme);
1387
1388                 netif_start_queue(netdev);
1389
1390                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1391                         jme_interrupt_mode(jme);
1392
1393                 jme_start_pcc_timer(jme);
1394         } else if (jme_pseudo_hotplug_enabled(jme)) {
1395                 jme_start_shutdown_timer(jme);
1396         }
1397
1398         goto out_enable_tasklet;
1399
1400 err_out_free_rx_resources:
1401         jme_free_rx_resources(jme);
1402 out_enable_tasklet:
1403         tasklet_enable(&jme->txclean_task);
1404         tasklet_hi_enable(&jme->rxclean_task);
1405         tasklet_hi_enable(&jme->rxempty_task);
1406 out:
1407         atomic_inc(&jme->link_changing);
1408 }
1409
1410 static void
1411 jme_rx_clean_tasklet(unsigned long arg)
1412 {
1413         struct jme_adapter *jme = (struct jme_adapter *)arg;
1414         struct dynpcc_info *dpi = &(jme->dpi);
1415
1416         jme_process_receive(jme, jme->rx_ring_size);
1417         ++(dpi->intr_cnt);
1418
1419 }
1420
1421 static int
1422 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1423 {
1424         struct jme_adapter *jme = jme_napi_priv(holder);
1425         DECLARE_NETDEV
1426         int rest;
1427
1428         rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1429
1430         while (atomic_read(&jme->rx_empty) > 0) {
1431                 atomic_dec(&jme->rx_empty);
1432                 ++(NET_STAT(jme).rx_dropped);
1433                 jme_restart_rx_engine(jme);
1434         }
1435         atomic_inc(&jme->rx_empty);
1436
1437         if (rest) {
1438                 JME_RX_COMPLETE(netdev, holder);
1439                 jme_interrupt_mode(jme);
1440         }
1441
1442         JME_NAPI_WEIGHT_SET(budget, rest);
1443         return JME_NAPI_WEIGHT_VAL(budget) - rest;
1444 }
1445
1446 static void
1447 jme_rx_empty_tasklet(unsigned long arg)
1448 {
1449         struct jme_adapter *jme = (struct jme_adapter *)arg;
1450
1451         if (unlikely(atomic_read(&jme->link_changing) != 1))
1452                 return;
1453
1454         if (unlikely(!netif_carrier_ok(jme->dev)))
1455                 return;
1456
1457         netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1458
1459         jme_rx_clean_tasklet(arg);
1460
1461         while (atomic_read(&jme->rx_empty) > 0) {
1462                 atomic_dec(&jme->rx_empty);
1463                 ++(NET_STAT(jme).rx_dropped);
1464                 jme_restart_rx_engine(jme);
1465         }
1466         atomic_inc(&jme->rx_empty);
1467 }
1468
1469 static void
1470 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1471 {
1472         struct jme_ring *txring = &(jme->txring[0]);
1473
1474         smp_wmb();
1475         if (unlikely(netif_queue_stopped(jme->dev) &&
1476         atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1477                 netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n");
1478                 netif_wake_queue(jme->dev);
1479         }
1480
1481 }
1482
1483 static void
1484 jme_tx_clean_tasklet(unsigned long arg)
1485 {
1486         struct jme_adapter *jme = (struct jme_adapter *)arg;
1487         struct jme_ring *txring = &(jme->txring[0]);
1488         struct txdesc *txdesc = txring->desc;
1489         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1490         int i, j, cnt = 0, max, err, mask;
1491
1492         tx_dbg(jme, "Into txclean\n");
1493
1494         if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1495                 goto out;
1496
1497         if (unlikely(atomic_read(&jme->link_changing) != 1))
1498                 goto out;
1499
1500         if (unlikely(!netif_carrier_ok(jme->dev)))
1501                 goto out;
1502
1503         max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1504         mask = jme->tx_ring_mask;
1505
1506         for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1507
1508                 ctxbi = txbi + i;
1509
1510                 if (likely(ctxbi->skb &&
1511                 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1512
1513                         tx_dbg(jme, "txclean: %d+%d@%lu\n",
1514                                i, ctxbi->nr_desc, jiffies);
1515
1516                         err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1517
1518                         for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1519                                 ttxbi = txbi + ((i + j) & (mask));
1520                                 txdesc[(i + j) & (mask)].dw[0] = 0;
1521
1522                                 pci_unmap_page(jme->pdev,
1523                                                  ttxbi->mapping,
1524                                                  ttxbi->len,
1525                                                  PCI_DMA_TODEVICE);
1526
1527                                 ttxbi->mapping = 0;
1528                                 ttxbi->len = 0;
1529                         }
1530
1531                         dev_kfree_skb(ctxbi->skb);
1532
1533                         cnt += ctxbi->nr_desc;
1534
1535                         if (unlikely(err)) {
1536                                 ++(NET_STAT(jme).tx_carrier_errors);
1537                         } else {
1538                                 ++(NET_STAT(jme).tx_packets);
1539                                 NET_STAT(jme).tx_bytes += ctxbi->len;
1540                         }
1541
1542                         ctxbi->skb = NULL;
1543                         ctxbi->len = 0;
1544                         ctxbi->start_xmit = 0;
1545
1546                 } else {
1547                         break;
1548                 }
1549
1550                 i = (i + ctxbi->nr_desc) & mask;
1551
1552                 ctxbi->nr_desc = 0;
1553         }
1554
1555         tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies);
1556         atomic_set(&txring->next_to_clean, i);
1557         atomic_add(cnt, &txring->nr_free);
1558
1559         jme_wake_queue_if_stopped(jme);
1560
1561 out:
1562         atomic_inc(&jme->tx_cleaning);
1563 }
1564
1565 static void
1566 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1567 {
1568         /*
1569          * Disable interrupt
1570          */
1571         jwrite32f(jme, JME_IENC, INTR_ENABLE);
1572
1573         if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1574                 /*
1575                  * Link change event is critical
1576                  * all other events are ignored
1577                  */
1578                 jwrite32(jme, JME_IEVE, intrstat);
1579                 tasklet_schedule(&jme->linkch_task);
1580                 goto out_reenable;
1581         }
1582
1583         if (intrstat & INTR_TMINTR) {
1584                 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1585                 tasklet_schedule(&jme->pcc_task);
1586         }
1587
1588         if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1589                 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1590                 tasklet_schedule(&jme->txclean_task);
1591         }
1592
1593         if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1594                 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1595                                                      INTR_PCCRX0 |
1596                                                      INTR_RX0EMP)) |
1597                                         INTR_RX0);
1598         }
1599
1600         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1601                 if (intrstat & INTR_RX0EMP)
1602                         atomic_inc(&jme->rx_empty);
1603
1604                 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1605                         if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1606                                 jme_polling_mode(jme);
1607                                 JME_RX_SCHEDULE(jme);
1608                         }
1609                 }
1610         } else {
1611                 if (intrstat & INTR_RX0EMP) {
1612                         atomic_inc(&jme->rx_empty);
1613                         tasklet_hi_schedule(&jme->rxempty_task);
1614                 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1615                         tasklet_hi_schedule(&jme->rxclean_task);
1616                 }
1617         }
1618
1619 out_reenable:
1620         /*
1621          * Re-enable interrupt
1622          */
1623         jwrite32f(jme, JME_IENS, INTR_ENABLE);
1624 }
1625
1626 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1627 static irqreturn_t
1628 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1629 #else
1630 static irqreturn_t
1631 jme_intr(int irq, void *dev_id)
1632 #endif
1633 {
1634         struct net_device *netdev = dev_id;
1635         struct jme_adapter *jme = netdev_priv(netdev);
1636         u32 intrstat;
1637
1638         intrstat = jread32(jme, JME_IEVE);
1639
1640         /*
1641          * Check if it's really an interrupt for us
1642          */
1643         if (unlikely((intrstat & INTR_ENABLE) == 0))
1644                 return IRQ_NONE;
1645
1646         /*
1647          * Check if the device still exist
1648          */
1649         if (unlikely(intrstat == ~((typeof(intrstat))0)))
1650                 return IRQ_NONE;
1651
1652         jme_intr_msi(jme, intrstat);
1653
1654         return IRQ_HANDLED;
1655 }
1656
1657 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1658 static irqreturn_t
1659 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1660 #else
1661 static irqreturn_t
1662 jme_msi(int irq, void *dev_id)
1663 #endif
1664 {
1665         struct net_device *netdev = dev_id;
1666         struct jme_adapter *jme = netdev_priv(netdev);
1667         u32 intrstat;
1668
1669         intrstat = jread32(jme, JME_IEVE);
1670
1671         jme_intr_msi(jme, intrstat);
1672
1673         return IRQ_HANDLED;
1674 }
1675
1676 static void
1677 jme_reset_link(struct jme_adapter *jme)
1678 {
1679         jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1680 }
1681
1682 static void
1683 jme_restart_an(struct jme_adapter *jme)
1684 {
1685         u32 bmcr;
1686
1687         spin_lock_bh(&jme->phy_lock);
1688         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1689         bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1690         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1691         spin_unlock_bh(&jme->phy_lock);
1692 }
1693
1694 static int
1695 jme_request_irq(struct jme_adapter *jme)
1696 {
1697         int rc;
1698         struct net_device *netdev = jme->dev;
1699 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1700         irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1701         int irq_flags = SA_SHIRQ;
1702 #else
1703         irq_handler_t handler = jme_intr;
1704         int irq_flags = IRQF_SHARED;
1705 #endif
1706
1707         if (!pci_enable_msi(jme->pdev)) {
1708                 set_bit(JME_FLAG_MSI, &jme->flags);
1709                 handler = jme_msi;
1710                 irq_flags = 0;
1711         }
1712
1713         rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1714                           netdev);
1715         if (rc) {
1716                 netdev_err(netdev,
1717                            "Unable to request %s interrupt (return: %d)\n",
1718                            test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1719                            rc);
1720
1721                 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1722                         pci_disable_msi(jme->pdev);
1723                         clear_bit(JME_FLAG_MSI, &jme->flags);
1724                 }
1725         } else {
1726                 netdev->irq = jme->pdev->irq;
1727         }
1728
1729         return rc;
1730 }
1731
1732 static void
1733 jme_free_irq(struct jme_adapter *jme)
1734 {
1735         free_irq(jme->pdev->irq, jme->dev);
1736         if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1737                 pci_disable_msi(jme->pdev);
1738                 clear_bit(JME_FLAG_MSI, &jme->flags);
1739                 jme->dev->irq = jme->pdev->irq;
1740         }
1741 }
1742
1743 static inline void
1744 jme_new_phy_on(struct jme_adapter *jme)
1745 {
1746         u32 reg;
1747
1748         reg = jread32(jme, JME_PHY_PWR);
1749         reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1750                  PHY_PWR_DWN2 | PHY_PWR_CLKSEL);
1751         jwrite32(jme, JME_PHY_PWR, reg);
1752
1753         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1754         reg &= ~PE1_GPREG0_PBG;
1755         reg |= PE1_GPREG0_ENBG;
1756         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1757 }
1758
1759 static inline void
1760 jme_new_phy_off(struct jme_adapter *jme)
1761 {
1762         u32 reg;
1763
1764         reg = jread32(jme, JME_PHY_PWR);
1765         reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1766                PHY_PWR_DWN2 | PHY_PWR_CLKSEL;
1767         jwrite32(jme, JME_PHY_PWR, reg);
1768
1769         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1770         reg &= ~PE1_GPREG0_PBG;
1771         reg |= PE1_GPREG0_PDD3COLD;
1772         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1773 }
1774
1775 static inline void
1776 jme_recal_phy(struct jme_adapter *jme)
1777 {
1778         u32 miictl1000, comm2;
1779
1780         miictl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
1781         miictl1000 &= ~JME_PHY_GCTRL_TESTMASK;
1782         miictl1000 |= JME_PHY_GCTRL_TESTMODE1;
1783         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, miictl1000);
1784
1785         comm2 = jme_phyext_read(jme, JME_PHYEXT_COMM2);
1786         comm2 &= ~(0x0001u);
1787         comm2 |= 0x0011u;
1788         jme_phyext_write(jme, JME_PHYEXT_COMM2, comm2);
1789
1790         mdelay(20);
1791
1792         comm2 = jme_phyext_read(jme, JME_PHYEXT_COMM2);
1793         comm2 &= ~(0x0013u);
1794         jme_phyext_write(jme, JME_PHYEXT_COMM2, comm2);
1795
1796         miictl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
1797         miictl1000 &= ~JME_PHY_GCTRL_TESTMASK;
1798         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, miictl1000);
1799 }
1800
1801 static inline void
1802 jme_refill_phyparm(struct jme_adapter *jme)
1803 {
1804         if (jme->chip_main_rev >= 6 ||
1805             (jme->chip_main_rev == 5 &&
1806              (jme->chip_sub_rev == 0 ||
1807               jme->chip_sub_rev == 1 ||
1808               jme->chip_sub_rev == 3))) {
1809                 jme_phyext_write(jme, JME_PHYEXT_COMM0, 0x008Au);
1810                 jme_phyext_write(jme, JME_PHYEXT_COMM1, 0x4109u);
1811         } else if (jme->chip_main_rev == 3 &&
1812                    (jme->chip_sub_rev == 1 ||
1813                     jme->chip_sub_rev == 2)) {
1814                 jme_phyext_write(jme, JME_PHYEXT_COMM0, 0xE088u);
1815 //              jme_phyext_write(jme, JME_PHYEXT_COMM1, 0x4108u);
1816         } else if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260 &&
1817                    jme->chip_main_rev == 2) {
1818                 if (jme->chip_sub_rev == 0) {
1819                         jme_phyext_write(jme, JME_PHYEXT_COMM0, 0x608Au);
1820 //                      jme_phyext_write(jme, JME_PHYEXT_COMM1, 0x4108u);
1821                 } else if (jme->chip_sub_rev == 2) {
1822                         jme_phyext_write(jme, JME_PHYEXT_COMM0, 0x408Au);
1823 //                      jme_phyext_write(jme, JME_PHYEXT_COMM1, 0x4108u);
1824                 }
1825         }
1826 }
1827
1828 static inline void
1829 jme_phy_on(struct jme_adapter *jme)
1830 {
1831         u32 bmcr;
1832
1833         if (new_phy_power_ctrl(jme->chip_main_rev))
1834                 jme_new_phy_on(jme);
1835
1836         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1837         bmcr &= ~BMCR_PDOWN;
1838         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1839
1840         jme_recal_phy(jme);
1841         jme_refill_phyparm(jme);
1842 }
1843
1844 static inline void
1845 jme_phy_off(struct jme_adapter *jme)
1846 {
1847         u32 bmcr;
1848
1849         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1850         bmcr |= BMCR_PDOWN;
1851         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1852
1853         if (new_phy_power_ctrl(jme->chip_main_rev))
1854                 jme_new_phy_off(jme);
1855 }
1856
1857 static int
1858 jme_open(struct net_device *netdev)
1859 {
1860         struct jme_adapter *jme = netdev_priv(netdev);
1861         int rc;
1862
1863         jme_clear_pm(jme);
1864         JME_NAPI_ENABLE(jme);
1865
1866         tasklet_enable(&jme->linkch_task);
1867         tasklet_enable(&jme->txclean_task);
1868         tasklet_hi_enable(&jme->rxclean_task);
1869         tasklet_hi_enable(&jme->rxempty_task);
1870
1871         rc = jme_request_irq(jme);
1872         if (rc)
1873                 goto err_out;
1874
1875         jme_start_irq(jme);
1876
1877         jme_phy_on(jme);
1878         if (test_bit(JME_FLAG_SSET, &jme->flags))
1879                 jme_set_settings(netdev, &jme->old_ecmd);
1880         else
1881                 jme_reset_phy_processor(jme);
1882
1883         jme_reset_link(jme);
1884
1885         return 0;
1886
1887 err_out:
1888         netif_stop_queue(netdev);
1889         netif_carrier_off(netdev);
1890         return rc;
1891 }
1892
1893 static void
1894 jme_set_100m_half(struct jme_adapter *jme)
1895 {
1896         u32 bmcr, tmp;
1897
1898         jme_phy_on(jme);
1899         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1900         tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1901                        BMCR_SPEED1000 | BMCR_FULLDPLX);
1902         tmp |= BMCR_SPEED100;
1903
1904         if (bmcr != tmp)
1905                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1906
1907         if (jme->fpgaver)
1908                 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1909         else
1910                 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1911 }
1912
1913 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1914 static void
1915 jme_wait_link(struct jme_adapter *jme)
1916 {
1917         u32 phylink, to = JME_WAIT_LINK_TIME;
1918
1919         mdelay(1000);
1920         phylink = jme_linkstat_from_phy(jme);
1921         while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1922                 mdelay(10);
1923                 phylink = jme_linkstat_from_phy(jme);
1924         }
1925 }
1926
1927 static void
1928 jme_powersave_phy(struct jme_adapter *jme)
1929 {
1930         if (jme->reg_pmcs) {
1931                 jme_set_100m_half(jme);
1932
1933                 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
1934                         jme_wait_link(jme);
1935
1936                 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
1937         } else {
1938                 jme_phy_off(jme);
1939         }
1940 }
1941
1942 static int
1943 jme_close(struct net_device *netdev)
1944 {
1945         struct jme_adapter *jme = netdev_priv(netdev);
1946
1947         netif_stop_queue(netdev);
1948         netif_carrier_off(netdev);
1949
1950         jme_stop_irq(jme);
1951         jme_free_irq(jme);
1952
1953         JME_NAPI_DISABLE(jme);
1954
1955         tasklet_disable(&jme->linkch_task);
1956         tasklet_disable(&jme->txclean_task);
1957         tasklet_disable(&jme->rxclean_task);
1958         tasklet_disable(&jme->rxempty_task);
1959
1960         jme_disable_rx_engine(jme);
1961         jme_disable_tx_engine(jme);
1962         jme_reset_mac_processor(jme);
1963         jme_free_rx_resources(jme);
1964         jme_free_tx_resources(jme);
1965         jme->phylink = 0;
1966         jme_phy_off(jme);
1967
1968         return 0;
1969 }
1970
1971 static int
1972 jme_alloc_txdesc(struct jme_adapter *jme,
1973                         struct sk_buff *skb)
1974 {
1975         struct jme_ring *txring = &(jme->txring[0]);
1976         int idx, nr_alloc, mask = jme->tx_ring_mask;
1977
1978         idx = txring->next_to_use;
1979         nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1980
1981         if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1982                 return -1;
1983
1984         atomic_sub(nr_alloc, &txring->nr_free);
1985
1986         txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1987
1988         return idx;
1989 }
1990
1991 static void
1992 jme_fill_tx_map(struct pci_dev *pdev,
1993                 struct txdesc *txdesc,
1994                 struct jme_buffer_info *txbi,
1995                 struct page *page,
1996                 u32 page_offset,
1997                 u32 len,
1998                 u8 hidma)
1999 {
2000         dma_addr_t dmaaddr;
2001
2002         dmaaddr = pci_map_page(pdev,
2003                                 page,
2004                                 page_offset,
2005                                 len,
2006                                 PCI_DMA_TODEVICE);
2007
2008         pci_dma_sync_single_for_device(pdev,
2009                                        dmaaddr,
2010                                        len,
2011                                        PCI_DMA_TODEVICE);
2012
2013         txdesc->dw[0] = 0;
2014         txdesc->dw[1] = 0;
2015         txdesc->desc2.flags     = TXFLAG_OWN;
2016         txdesc->desc2.flags     |= (hidma) ? TXFLAG_64BIT : 0;
2017         txdesc->desc2.datalen   = cpu_to_le16(len);
2018         txdesc->desc2.bufaddrh  = cpu_to_le32((__u64)dmaaddr >> 32);
2019         txdesc->desc2.bufaddrl  = cpu_to_le32(
2020                                         (__u64)dmaaddr & 0xFFFFFFFFUL);
2021
2022         txbi->mapping = dmaaddr;
2023         txbi->len = len;
2024 }
2025
2026 static void
2027 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
2028 {
2029         struct jme_ring *txring = &(jme->txring[0]);
2030         struct txdesc *txdesc = txring->desc, *ctxdesc;
2031         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
2032         u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
2033         int i, nr_frags = skb_shinfo(skb)->nr_frags;
2034         int mask = jme->tx_ring_mask;
2035         struct skb_frag_struct *frag;
2036         u32 len;
2037
2038         for (i = 0 ; i < nr_frags ; ++i) {
2039                 frag = &skb_shinfo(skb)->frags[i];
2040                 ctxdesc = txdesc + ((idx + i + 2) & (mask));
2041                 ctxbi = txbi + ((idx + i + 2) & (mask));
2042
2043                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
2044                                  frag->page_offset, frag->size, hidma);
2045         }
2046
2047         len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
2048         ctxdesc = txdesc + ((idx + 1) & (mask));
2049         ctxbi = txbi + ((idx + 1) & (mask));
2050         jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
2051                         offset_in_page(skb->data), len, hidma);
2052
2053 }
2054
2055 static int
2056 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
2057 {
2058         if (unlikely(
2059 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
2060         skb_shinfo(skb)->tso_size
2061 #else
2062         skb_shinfo(skb)->gso_size
2063 #endif
2064                         && skb_header_cloned(skb) &&
2065                         pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
2066                 dev_kfree_skb(skb);
2067                 return -1;
2068         }
2069
2070         return 0;
2071 }
2072
2073 static int
2074 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
2075 {
2076 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
2077         *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
2078 #else
2079         *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
2080 #endif
2081         if (*mss) {
2082                 *flags |= TXFLAG_LSEN;
2083
2084                 if (skb->protocol == htons(ETH_P_IP)) {
2085                         struct iphdr *iph = ip_hdr(skb);
2086
2087                         iph->check = 0;
2088                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2089                                                                 iph->daddr, 0,
2090                                                                 IPPROTO_TCP,
2091                                                                 0);
2092                 } else {
2093                         struct ipv6hdr *ip6h = ipv6_hdr(skb);
2094
2095                         tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
2096                                                                 &ip6h->daddr, 0,
2097                                                                 IPPROTO_TCP,
2098                                                                 0);
2099                 }
2100
2101                 return 0;
2102         }
2103
2104         return 1;
2105 }
2106
2107 static void
2108 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
2109 {
2110 #ifdef CHECKSUM_PARTIAL
2111         if (skb->ip_summed == CHECKSUM_PARTIAL)
2112 #else
2113         if (skb->ip_summed == CHECKSUM_HW)
2114 #endif
2115         {
2116                 u8 ip_proto;
2117
2118 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2119                 if (skb->protocol == htons(ETH_P_IP))
2120                         ip_proto = ip_hdr(skb)->protocol;
2121                 else if (skb->protocol == htons(ETH_P_IPV6))
2122                         ip_proto = ipv6_hdr(skb)->nexthdr;
2123                 else
2124                         ip_proto = 0;
2125 #else
2126                 switch (skb->protocol) {
2127                 case htons(ETH_P_IP):
2128                         ip_proto = ip_hdr(skb)->protocol;
2129                         break;
2130                 case htons(ETH_P_IPV6):
2131                         ip_proto = ipv6_hdr(skb)->nexthdr;
2132                         break;
2133                 default:
2134                         ip_proto = 0;
2135                         break;
2136                 }
2137 #endif
2138
2139                 switch (ip_proto) {
2140                 case IPPROTO_TCP:
2141                         *flags |= TXFLAG_TCPCS;
2142                         break;
2143                 case IPPROTO_UDP:
2144                         *flags |= TXFLAG_UDPCS;
2145                         break;
2146                 default:
2147                         netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n");
2148                         break;
2149                 }
2150         }
2151 }
2152
2153 static inline void
2154 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
2155 {
2156         if (vlan_tx_tag_present(skb)) {
2157                 *flags |= TXFLAG_TAGON;
2158                 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2159         }
2160 }
2161
2162 static int
2163 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
2164 {
2165         struct jme_ring *txring = &(jme->txring[0]);
2166         struct txdesc *txdesc;
2167         struct jme_buffer_info *txbi;
2168         u8 flags;
2169
2170         txdesc = (struct txdesc *)txring->desc + idx;
2171         txbi = txring->bufinf + idx;
2172
2173         txdesc->dw[0] = 0;
2174         txdesc->dw[1] = 0;
2175         txdesc->dw[2] = 0;
2176         txdesc->dw[3] = 0;
2177         txdesc->desc1.pktsize = cpu_to_le16(skb->len);
2178         /*
2179          * Set OWN bit at final.
2180          * When kernel transmit faster than NIC.
2181          * And NIC trying to send this descriptor before we tell
2182          * it to start sending this TX queue.
2183          * Other fields are already filled correctly.
2184          */
2185         wmb();
2186         flags = TXFLAG_OWN | TXFLAG_INT;
2187         /*
2188          * Set checksum flags while not tso
2189          */
2190         if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
2191                 jme_tx_csum(jme, skb, &flags);
2192         jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
2193         jme_map_tx_skb(jme, skb, idx);
2194         txdesc->desc1.flags = flags;
2195         /*
2196          * Set tx buffer info after telling NIC to send
2197          * For better tx_clean timing
2198          */
2199         wmb();
2200         txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
2201         txbi->skb = skb;
2202         txbi->len = skb->len;
2203         txbi->start_xmit = jiffies;
2204         if (!txbi->start_xmit)
2205                 txbi->start_xmit = (0UL-1);
2206
2207         return 0;
2208 }
2209
2210 static void
2211 jme_stop_queue_if_full(struct jme_adapter *jme)
2212 {
2213         struct jme_ring *txring = &(jme->txring[0]);
2214         struct jme_buffer_info *txbi = txring->bufinf;
2215         int idx = atomic_read(&txring->next_to_clean);
2216
2217         txbi += idx;
2218
2219         smp_wmb();
2220         if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2221                 netif_stop_queue(jme->dev);
2222                 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n");
2223                 smp_wmb();
2224                 if (atomic_read(&txring->nr_free)
2225                         >= (jme->tx_wake_threshold)) {
2226                         netif_wake_queue(jme->dev);
2227                         netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n");
2228                 }
2229         }
2230
2231         if (unlikely(txbi->start_xmit &&
2232                         (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2233                         txbi->skb)) {
2234                 netif_stop_queue(jme->dev);
2235                 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu\n", idx, jiffies);
2236         }
2237 }
2238
2239 /*
2240  * This function is already protected by netif_tx_lock()
2241  */
2242
2243 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2244 static int
2245 #else
2246 static netdev_tx_t
2247 #endif
2248 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2249 {
2250         struct jme_adapter *jme = netdev_priv(netdev);
2251         int idx;
2252
2253         if (unlikely(jme_expand_header(jme, skb))) {
2254                 ++(NET_STAT(jme).tx_dropped);
2255                 return NETDEV_TX_OK;
2256         }
2257
2258         idx = jme_alloc_txdesc(jme, skb);
2259
2260         if (unlikely(idx < 0)) {
2261                 netif_stop_queue(netdev);
2262                 netif_err(jme, tx_err, jme->dev,
2263                           "BUG! Tx ring full when queue awake!\n");
2264
2265                 return NETDEV_TX_BUSY;
2266         }
2267
2268         jme_fill_tx_desc(jme, skb, idx);
2269
2270         jwrite32(jme, JME_TXCS, jme->reg_txcs |
2271                                 TXCS_SELECT_QUEUE0 |
2272                                 TXCS_QUEUE0S |
2273                                 TXCS_ENABLE);
2274 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2275         netdev->trans_start = jiffies;
2276 #endif
2277
2278         tx_dbg(jme, "xmit: %d+%d@%lu\n",
2279                idx, skb_shinfo(skb)->nr_frags + 2, jiffies);
2280         jme_stop_queue_if_full(jme);
2281
2282         return NETDEV_TX_OK;
2283 }
2284
2285 static void
2286 jme_set_unicastaddr(struct net_device *netdev)
2287 {
2288         struct jme_adapter *jme = netdev_priv(netdev);
2289         u32 val;
2290
2291         val = (netdev->dev_addr[3] & 0xff) << 24 |
2292               (netdev->dev_addr[2] & 0xff) << 16 |
2293               (netdev->dev_addr[1] & 0xff) <<  8 |
2294               (netdev->dev_addr[0] & 0xff);
2295         jwrite32(jme, JME_RXUMA_LO, val);
2296         val = (netdev->dev_addr[5] & 0xff) << 8 |
2297               (netdev->dev_addr[4] & 0xff);
2298         jwrite32(jme, JME_RXUMA_HI, val);
2299 }
2300
2301 static int
2302 jme_set_macaddr(struct net_device *netdev, void *p)
2303 {
2304         struct jme_adapter *jme = netdev_priv(netdev);
2305         struct sockaddr *addr = p;
2306
2307         if (netif_running(netdev))
2308                 return -EBUSY;
2309
2310         spin_lock_bh(&jme->macaddr_lock);
2311         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2312         jme_set_unicastaddr(netdev);
2313         spin_unlock_bh(&jme->macaddr_lock);
2314
2315         return 0;
2316 }
2317
2318 static void
2319 jme_set_multi(struct net_device *netdev)
2320 {
2321         struct jme_adapter *jme = netdev_priv(netdev);
2322         u32 mc_hash[2] = {};
2323 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2324         int i;
2325 #endif
2326
2327         spin_lock_bh(&jme->rxmcs_lock);
2328
2329         jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2330
2331         if (netdev->flags & IFF_PROMISC) {
2332                 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2333         } else if (netdev->flags & IFF_ALLMULTI) {
2334                 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2335         } else if (netdev->flags & IFF_MULTICAST) {
2336 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2337                 struct dev_mc_list *mclist;
2338 #else
2339                 struct netdev_hw_addr *ha;
2340 #endif
2341                 int bit_nr;
2342
2343                 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2344 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2345                 for (i = 0, mclist = netdev->mc_list;
2346                         mclist && i < netdev->mc_count;
2347                         ++i, mclist = mclist->next) {
2348 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2349                 netdev_for_each_mc_addr(mclist, netdev) {
2350 #else
2351                 netdev_for_each_mc_addr(ha, netdev) {
2352 #endif
2353 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2354                         bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2355 #else
2356                         bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2357 #endif
2358                         mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2359                 }
2360
2361                 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2362                 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2363         }
2364
2365         wmb();
2366         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2367
2368         spin_unlock_bh(&jme->rxmcs_lock);
2369 }
2370
2371 static int
2372 jme_change_mtu(struct net_device *netdev, int new_mtu)
2373 {
2374         struct jme_adapter *jme = netdev_priv(netdev);
2375
2376         if (new_mtu == jme->old_mtu)
2377                 return 0;
2378
2379         if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2380                 ((new_mtu) < IPV6_MIN_MTU))
2381                 return -EINVAL;
2382
2383         if (new_mtu > 4000) {
2384                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2385                 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2386                 jme_restart_rx_engine(jme);
2387         } else {
2388                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2389                 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2390                 jme_restart_rx_engine(jme);
2391         }
2392
2393         if (new_mtu > 1900) {
2394                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2395                                 NETIF_F_TSO | NETIF_F_TSO6);
2396         } else {
2397                 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2398                         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2399                 if (test_bit(JME_FLAG_TSO, &jme->flags))
2400                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2401         }
2402
2403         netdev->mtu = new_mtu;
2404         jme_reset_link(jme);
2405
2406         return 0;
2407 }
2408
2409 static void
2410 jme_tx_timeout(struct net_device *netdev)
2411 {
2412         struct jme_adapter *jme = netdev_priv(netdev);
2413
2414         jme->phylink = 0;
2415         jme_reset_phy_processor(jme);
2416         if (test_bit(JME_FLAG_SSET, &jme->flags))
2417                 jme_set_settings(netdev, &jme->old_ecmd);
2418
2419         /*
2420          * Force to Reset the link again
2421          */
2422         jme_reset_link(jme);
2423 }
2424
2425 static inline void jme_pause_rx(struct jme_adapter *jme)
2426 {
2427         atomic_dec(&jme->link_changing);
2428
2429         jme_set_rx_pcc(jme, PCC_OFF);
2430         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2431                 JME_NAPI_DISABLE(jme);
2432         } else {
2433                 tasklet_disable(&jme->rxclean_task);
2434                 tasklet_disable(&jme->rxempty_task);
2435         }
2436 }
2437
2438 static inline void jme_resume_rx(struct jme_adapter *jme)
2439 {
2440         struct dynpcc_info *dpi = &(jme->dpi);
2441
2442         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2443                 JME_NAPI_ENABLE(jme);
2444         } else {
2445                 tasklet_hi_enable(&jme->rxclean_task);
2446                 tasklet_hi_enable(&jme->rxempty_task);
2447         }
2448         dpi->cur                = PCC_P1;
2449         dpi->attempt            = PCC_P1;
2450         dpi->cnt                = 0;
2451         jme_set_rx_pcc(jme, PCC_P1);
2452
2453         atomic_inc(&jme->link_changing);
2454 }
2455
2456 static void
2457 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2458 {
2459         struct jme_adapter *jme = netdev_priv(netdev);
2460
2461         jme_pause_rx(jme);
2462         jme->vlgrp = grp;
2463         jme_resume_rx(jme);
2464 }
2465
2466 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2467 static void
2468 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2469 {
2470         struct jme_adapter *jme = netdev_priv(netdev);
2471
2472         if(jme->vlgrp) {
2473                 jme_pause_rx(jme);
2474 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2475                 jme->vlgrp->vlan_devices[vid] = NULL;
2476 #else
2477                 vlan_group_set_device(jme->vlgrp, vid, NULL);
2478 #endif
2479                 jme_resume_rx(jme);
2480         }
2481 }
2482 #endif
2483
2484 static void
2485 jme_get_drvinfo(struct net_device *netdev,
2486                      struct ethtool_drvinfo *info)
2487 {
2488         struct jme_adapter *jme = netdev_priv(netdev);
2489
2490         strcpy(info->driver, DRV_NAME);
2491         strcpy(info->version, DRV_VERSION);
2492         strcpy(info->bus_info, pci_name(jme->pdev));
2493 }
2494
2495 static int
2496 jme_get_regs_len(struct net_device *netdev)
2497 {
2498         return JME_REG_LEN;
2499 }
2500
2501 static void
2502 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2503 {
2504         int i;
2505
2506         for (i = 0 ; i < len ; i += 4)
2507                 p[i >> 2] = jread32(jme, reg + i);
2508 }
2509
2510 static void
2511 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2512 {
2513         int i;
2514         u16 *p16 = (u16 *)p;
2515
2516         for (i = 0 ; i < reg_nr ; ++i)
2517                 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2518 }
2519
2520 static void
2521 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2522 {
2523         struct jme_adapter *jme = netdev_priv(netdev);
2524         u32 *p32 = (u32 *)p;
2525
2526         memset(p, 0xFF, JME_REG_LEN);
2527
2528         regs->version = 1;
2529         mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2530
2531         p32 += 0x100 >> 2;
2532         mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2533
2534         p32 += 0x100 >> 2;
2535         mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2536
2537         p32 += 0x100 >> 2;
2538         mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2539
2540         p32 += 0x100 >> 2;
2541         mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2542
2543         p32 += 0x100 >> 2;
2544         jme_phyext_memcpy(jme, p32, JME_PHY_SPEC_REG_NR);
2545 }
2546
2547 static int
2548 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2549 {
2550         struct jme_adapter *jme = netdev_priv(netdev);
2551
2552         ecmd->tx_coalesce_usecs = PCC_TX_TO;
2553         ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2554
2555         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2556                 ecmd->use_adaptive_rx_coalesce = false;
2557                 ecmd->rx_coalesce_usecs = 0;
2558                 ecmd->rx_max_coalesced_frames = 0;
2559                 return 0;
2560         }
2561
2562         ecmd->use_adaptive_rx_coalesce = true;
2563
2564         switch (jme->dpi.cur) {
2565         case PCC_P1:
2566                 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2567                 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2568                 break;
2569         case PCC_P2:
2570                 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2571                 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2572                 break;
2573         case PCC_P3:
2574                 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2575                 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2576                 break;
2577         default:
2578                 break;
2579         }
2580
2581         return 0;
2582 }
2583
2584 static int
2585 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2586 {
2587         struct jme_adapter *jme = netdev_priv(netdev);
2588         struct dynpcc_info *dpi = &(jme->dpi);
2589
2590         if (netif_running(netdev))
2591                 return -EBUSY;
2592
2593         if (ecmd->use_adaptive_rx_coalesce &&
2594             test_bit(JME_FLAG_POLL, &jme->flags)) {
2595                 clear_bit(JME_FLAG_POLL, &jme->flags);
2596                 jme->jme_rx = netif_rx;
2597                 jme->jme_vlan_rx = vlan_hwaccel_rx;
2598                 dpi->cur                = PCC_P1;
2599                 dpi->attempt            = PCC_P1;
2600                 dpi->cnt                = 0;
2601                 jme_set_rx_pcc(jme, PCC_P1);
2602                 jme_interrupt_mode(jme);
2603         } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2604                    !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2605                 set_bit(JME_FLAG_POLL, &jme->flags);
2606                 jme->jme_rx = netif_receive_skb;
2607                 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2608                 jme_interrupt_mode(jme);
2609         }
2610
2611         return 0;
2612 }
2613
2614 static void
2615 jme_get_pauseparam(struct net_device *netdev,
2616                         struct ethtool_pauseparam *ecmd)
2617 {
2618         struct jme_adapter *jme = netdev_priv(netdev);
2619         u32 val;
2620
2621         ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2622         ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2623
2624         spin_lock_bh(&jme->phy_lock);
2625         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2626         spin_unlock_bh(&jme->phy_lock);
2627
2628         ecmd->autoneg =
2629                 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2630 }
2631
2632 static int
2633 jme_set_pauseparam(struct net_device *netdev,
2634                         struct ethtool_pauseparam *ecmd)
2635 {
2636         struct jme_adapter *jme = netdev_priv(netdev);
2637         u32 val;
2638
2639         if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2640                 (ecmd->tx_pause != 0)) {
2641
2642                 if (ecmd->tx_pause)
2643                         jme->reg_txpfc |= TXPFC_PF_EN;
2644                 else
2645                         jme->reg_txpfc &= ~TXPFC_PF_EN;
2646
2647                 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2648         }
2649
2650         spin_lock_bh(&jme->rxmcs_lock);
2651         if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2652                 (ecmd->rx_pause != 0)) {
2653
2654                 if (ecmd->rx_pause)
2655                         jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2656                 else
2657                         jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2658
2659                 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2660         }
2661         spin_unlock_bh(&jme->rxmcs_lock);
2662
2663         spin_lock_bh(&jme->phy_lock);
2664         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2665         if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2666                 (ecmd->autoneg != 0)) {
2667
2668                 if (ecmd->autoneg)
2669                         val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2670                 else
2671                         val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2672
2673                 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2674                                 MII_ADVERTISE, val);
2675         }
2676         spin_unlock_bh(&jme->phy_lock);
2677
2678         return 0;
2679 }
2680
2681 static void
2682 jme_get_wol(struct net_device *netdev,
2683                 struct ethtool_wolinfo *wol)
2684 {
2685         struct jme_adapter *jme = netdev_priv(netdev);
2686
2687         wol->supported = WAKE_MAGIC | WAKE_PHY;
2688
2689         wol->wolopts = 0;
2690
2691         if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2692                 wol->wolopts |= WAKE_PHY;
2693
2694         if (jme->reg_pmcs & PMCS_MFEN)
2695                 wol->wolopts |= WAKE_MAGIC;
2696
2697 }
2698
2699 static int
2700 jme_set_wol(struct net_device *netdev,
2701                 struct ethtool_wolinfo *wol)
2702 {
2703         struct jme_adapter *jme = netdev_priv(netdev);
2704
2705         if (wol->wolopts & (WAKE_MAGICSECURE |
2706                                 WAKE_UCAST |
2707                                 WAKE_MCAST |
2708                                 WAKE_BCAST |
2709                                 WAKE_ARP))
2710                 return -EOPNOTSUPP;
2711
2712         jme->reg_pmcs = 0;
2713
2714         if (wol->wolopts & WAKE_PHY)
2715                 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2716
2717         if (wol->wolopts & WAKE_MAGIC)
2718                 jme->reg_pmcs |= PMCS_MFEN;
2719
2720         jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2721
2722         return 0;
2723 }
2724
2725 static int
2726 jme_get_settings(struct net_device *netdev,
2727                      struct ethtool_cmd *ecmd)
2728 {
2729         struct jme_adapter *jme = netdev_priv(netdev);
2730         int rc;
2731
2732         spin_lock_bh(&jme->phy_lock);
2733         rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2734         spin_unlock_bh(&jme->phy_lock);
2735         return rc;
2736 }
2737
2738 static int
2739 jme_set_settings(struct net_device *netdev,
2740                      struct ethtool_cmd *ecmd)
2741 {
2742         struct jme_adapter *jme = netdev_priv(netdev);
2743         int rc, fdc = 0;
2744
2745         if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2746                 return -EINVAL;
2747
2748         /*
2749          * Check If user changed duplex only while force_media.
2750          * Hardware would not generate link change interrupt.
2751          */
2752         if (jme->mii_if.force_media &&
2753         ecmd->autoneg != AUTONEG_ENABLE &&
2754         (jme->mii_if.full_duplex != ecmd->duplex))
2755                 fdc = 1;
2756
2757         spin_lock_bh(&jme->phy_lock);
2758         rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2759         spin_unlock_bh(&jme->phy_lock);
2760
2761         if (!rc) {
2762                 if (fdc)
2763                         jme_reset_link(jme);
2764                 jme->old_ecmd = *ecmd;
2765                 set_bit(JME_FLAG_SSET, &jme->flags);
2766         }
2767
2768         return rc;
2769 }
2770
2771 static int
2772 jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
2773 {
2774         int rc;
2775         struct jme_adapter *jme = netdev_priv(netdev);
2776         struct mii_ioctl_data *mii_data = if_mii(rq);
2777         unsigned int duplex_chg;
2778
2779         if (cmd == SIOCSMIIREG) {
2780                 u16 val = mii_data->val_in;
2781                 if (!(val & (BMCR_RESET|BMCR_ANENABLE)) &&
2782                     (val & BMCR_SPEED1000))
2783                         return -EINVAL;
2784         }
2785
2786         spin_lock_bh(&jme->phy_lock);
2787         rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg);
2788         spin_unlock_bh(&jme->phy_lock);
2789
2790         if (!rc && (cmd == SIOCSMIIREG)) {
2791                 if (duplex_chg)
2792                         jme_reset_link(jme);
2793                 jme_get_settings(netdev, &jme->old_ecmd);
2794                 set_bit(JME_FLAG_SSET, &jme->flags);
2795         }
2796
2797         return rc;
2798 }
2799
2800 static u32
2801 jme_get_link(struct net_device *netdev)
2802 {
2803         struct jme_adapter *jme = netdev_priv(netdev);
2804         return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2805 }
2806
2807 static u32
2808 jme_get_msglevel(struct net_device *netdev)
2809 {
2810         struct jme_adapter *jme = netdev_priv(netdev);
2811         return jme->msg_enable;
2812 }
2813
2814 static void
2815 jme_set_msglevel(struct net_device *netdev, u32 value)
2816 {
2817         struct jme_adapter *jme = netdev_priv(netdev);
2818         jme->msg_enable = value;
2819 }
2820
2821 static u32
2822 jme_get_rx_csum(struct net_device *netdev)
2823 {
2824         struct jme_adapter *jme = netdev_priv(netdev);
2825         return jme->reg_rxmcs & RXMCS_CHECKSUM;
2826 }
2827
2828 static int
2829 jme_set_rx_csum(struct net_device *netdev, u32 on)
2830 {
2831         struct jme_adapter *jme = netdev_priv(netdev);
2832
2833         spin_lock_bh(&jme->rxmcs_lock);
2834         if (on)
2835                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2836         else
2837                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2838         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2839         spin_unlock_bh(&jme->rxmcs_lock);
2840
2841         return 0;
2842 }
2843
2844 static int
2845 jme_set_tx_csum(struct net_device *netdev, u32 on)
2846 {
2847         struct jme_adapter *jme = netdev_priv(netdev);
2848
2849         if (on) {
2850                 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2851                 if (netdev->mtu <= 1900)
2852                         netdev->features |=
2853                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2854         } else {
2855                 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2856                 netdev->features &=
2857                                 ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
2858         }
2859
2860         return 0;
2861 }
2862
2863 static int
2864 jme_set_tso(struct net_device *netdev, u32 on)
2865 {
2866         struct jme_adapter *jme = netdev_priv(netdev);
2867
2868         if (on) {
2869                 set_bit(JME_FLAG_TSO, &jme->flags);
2870                 if (netdev->mtu <= 1900)
2871                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2872         } else {
2873                 clear_bit(JME_FLAG_TSO, &jme->flags);
2874                 netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
2875         }
2876
2877         return 0;
2878 }
2879
2880 static int
2881 jme_nway_reset(struct net_device *netdev)
2882 {
2883         struct jme_adapter *jme = netdev_priv(netdev);
2884         jme_restart_an(jme);
2885         return 0;
2886 }
2887
2888 static u8
2889 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2890 {
2891         u32 val;
2892         int to;
2893
2894         val = jread32(jme, JME_SMBCSR);
2895         to = JME_SMB_BUSY_TIMEOUT;
2896         while ((val & SMBCSR_BUSY) && --to) {
2897                 msleep(1);
2898                 val = jread32(jme, JME_SMBCSR);
2899         }
2900         if (!to) {
2901                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2902                 return 0xFF;
2903         }
2904
2905         jwrite32(jme, JME_SMBINTF,
2906                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2907                 SMBINTF_HWRWN_READ |
2908                 SMBINTF_HWCMD);
2909
2910         val = jread32(jme, JME_SMBINTF);
2911         to = JME_SMB_BUSY_TIMEOUT;
2912         while ((val & SMBINTF_HWCMD) && --to) {
2913                 msleep(1);
2914                 val = jread32(jme, JME_SMBINTF);
2915         }
2916         if (!to) {
2917                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2918                 return 0xFF;
2919         }
2920
2921         return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2922 }
2923
2924 static void
2925 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2926 {
2927         u32 val;
2928         int to;
2929
2930         val = jread32(jme, JME_SMBCSR);
2931         to = JME_SMB_BUSY_TIMEOUT;
2932         while ((val & SMBCSR_BUSY) && --to) {
2933                 msleep(1);
2934                 val = jread32(jme, JME_SMBCSR);
2935         }
2936         if (!to) {
2937                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2938                 return;
2939         }
2940
2941         jwrite32(jme, JME_SMBINTF,
2942                 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2943                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2944                 SMBINTF_HWRWN_WRITE |
2945                 SMBINTF_HWCMD);
2946
2947         val = jread32(jme, JME_SMBINTF);
2948         to = JME_SMB_BUSY_TIMEOUT;
2949         while ((val & SMBINTF_HWCMD) && --to) {
2950                 msleep(1);
2951                 val = jread32(jme, JME_SMBINTF);
2952         }
2953         if (!to) {
2954                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2955                 return;
2956         }
2957
2958         mdelay(2);
2959 }
2960
2961 static int
2962 jme_get_eeprom_len(struct net_device *netdev)
2963 {
2964         struct jme_adapter *jme = netdev_priv(netdev);
2965         u32 val;
2966         val = jread32(jme, JME_SMBCSR);
2967         return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2968 }
2969
2970 static int
2971 jme_get_eeprom(struct net_device *netdev,
2972                 struct ethtool_eeprom *eeprom, u8 *data)
2973 {
2974         struct jme_adapter *jme = netdev_priv(netdev);
2975         int i, offset = eeprom->offset, len = eeprom->len;
2976
2977         /*
2978          * ethtool will check the boundary for us
2979          */
2980         eeprom->magic = JME_EEPROM_MAGIC;
2981         for (i = 0 ; i < len ; ++i)
2982                 data[i] = jme_smb_read(jme, i + offset);
2983
2984         return 0;
2985 }
2986
2987 static int
2988 jme_set_eeprom(struct net_device *netdev,
2989                 struct ethtool_eeprom *eeprom, u8 *data)
2990 {
2991         struct jme_adapter *jme = netdev_priv(netdev);
2992         int i, offset = eeprom->offset, len = eeprom->len;
2993
2994         if (eeprom->magic != JME_EEPROM_MAGIC)
2995                 return -EINVAL;
2996
2997         /*
2998          * ethtool will check the boundary for us
2999          */
3000         for (i = 0 ; i < len ; ++i)
3001                 jme_smb_write(jme, i + offset, data[i]);
3002
3003         return 0;
3004 }
3005
3006 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
3007 static struct ethtool_ops jme_ethtool_ops = {
3008 #else
3009 static const struct ethtool_ops jme_ethtool_ops = {
3010 #endif
3011         .get_drvinfo            = jme_get_drvinfo,
3012         .get_regs_len           = jme_get_regs_len,
3013         .get_regs               = jme_get_regs,
3014         .get_coalesce           = jme_get_coalesce,
3015         .set_coalesce           = jme_set_coalesce,
3016         .get_pauseparam         = jme_get_pauseparam,
3017         .set_pauseparam         = jme_set_pauseparam,
3018         .get_wol                = jme_get_wol,
3019         .set_wol                = jme_set_wol,
3020         .get_settings           = jme_get_settings,
3021         .set_settings           = jme_set_settings,
3022         .get_link               = jme_get_link,
3023         .get_msglevel           = jme_get_msglevel,
3024         .set_msglevel           = jme_set_msglevel,
3025         .get_rx_csum            = jme_get_rx_csum,
3026         .set_rx_csum            = jme_set_rx_csum,
3027         .set_tx_csum            = jme_set_tx_csum,
3028         .set_tso                = jme_set_tso,
3029         .set_sg                 = ethtool_op_set_sg,
3030         .nway_reset             = jme_nway_reset,
3031         .get_eeprom_len         = jme_get_eeprom_len,
3032         .get_eeprom             = jme_get_eeprom,
3033         .set_eeprom             = jme_set_eeprom,
3034 };
3035
3036 static int
3037 jme_pci_dma64(struct pci_dev *pdev)
3038 {
3039         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
3040 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3041             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
3042 #else
3043             !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
3044 #endif
3045            )
3046 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3047                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
3048 #else
3049                 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
3050 #endif
3051                         return 1;
3052
3053         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
3054 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3055             !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
3056 #else
3057             !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
3058 #endif
3059            )
3060 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3061                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
3062 #else
3063                 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
3064 #endif
3065                         return 1;
3066
3067 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3068         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
3069                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
3070 #else
3071         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
3072                 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
3073 #endif
3074                         return 0;
3075
3076         return -1;
3077 }
3078
3079 static inline void
3080 jme_phy_init(struct jme_adapter *jme)
3081 {
3082         u16 reg26;
3083
3084         reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
3085         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
3086 }
3087
3088 static inline void
3089 jme_check_hw_ver(struct jme_adapter *jme)
3090 {
3091         u32 chipmode;
3092
3093         chipmode = jread32(jme, JME_CHIPMODE);
3094
3095         jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
3096         jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
3097         jme->chip_main_rev = jme->chiprev & 0xF;
3098         jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF;
3099 }
3100
3101 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3102 static const struct net_device_ops jme_netdev_ops = {
3103         .ndo_open               = jme_open,
3104         .ndo_stop               = jme_close,
3105         .ndo_validate_addr      = eth_validate_addr,
3106         .ndo_do_ioctl           = jme_ioctl,
3107         .ndo_start_xmit         = jme_start_xmit,
3108         .ndo_set_mac_address    = jme_set_macaddr,
3109         .ndo_set_multicast_list = jme_set_multi,
3110         .ndo_change_mtu         = jme_change_mtu,
3111         .ndo_tx_timeout         = jme_tx_timeout,
3112         .ndo_vlan_rx_register   = jme_vlan_rx_register,
3113 };
3114 #endif
3115
3116 static int __devinit
3117 jme_init_one(struct pci_dev *pdev,
3118              const struct pci_device_id *ent)
3119 {
3120         int rc = 0, using_dac, i;
3121         struct net_device *netdev;
3122         struct jme_adapter *jme;
3123         u16 bmcr, bmsr;
3124         u32 apmc;
3125
3126         /*
3127          * set up PCI device basics
3128          */
3129         rc = pci_enable_device(pdev);
3130         if (rc) {
3131                 pr_err("Cannot enable PCI device\n");
3132                 goto err_out;
3133         }
3134
3135         using_dac = jme_pci_dma64(pdev);
3136         if (using_dac < 0) {
3137                 pr_err("Cannot set PCI DMA Mask\n");
3138                 rc = -EIO;
3139                 goto err_out_disable_pdev;
3140         }
3141
3142         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
3143                 pr_err("No PCI resource region found\n");
3144                 rc = -ENOMEM;
3145                 goto err_out_disable_pdev;
3146         }
3147
3148         rc = pci_request_regions(pdev, DRV_NAME);
3149         if (rc) {
3150                 pr_err("Cannot obtain PCI resource region\n");
3151                 goto err_out_disable_pdev;
3152         }
3153
3154         pci_set_master(pdev);
3155
3156         /*
3157          * alloc and init net device
3158          */
3159         netdev = alloc_etherdev(sizeof(*jme));
3160         if (!netdev) {
3161                 pr_err("Cannot allocate netdev structure\n");
3162                 rc = -ENOMEM;
3163                 goto err_out_release_regions;
3164         }
3165 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3166         netdev->netdev_ops = &jme_netdev_ops;
3167 #else
3168         netdev->open                    = jme_open;
3169         netdev->stop                    = jme_close;
3170         netdev->do_ioctl                = jme_ioctl;
3171         netdev->hard_start_xmit         = jme_start_xmit;
3172         netdev->set_mac_address         = jme_set_macaddr;
3173         netdev->set_multicast_list      = jme_set_multi;
3174         netdev->change_mtu              = jme_change_mtu;
3175         netdev->tx_timeout              = jme_tx_timeout;
3176         netdev->vlan_rx_register        = jme_vlan_rx_register;
3177 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
3178         netdev->vlan_rx_kill_vid        = jme_vlan_rx_kill_vid;
3179 #endif
3180         NETDEV_GET_STATS(netdev, &jme_get_stats);
3181 #endif
3182         netdev->ethtool_ops             = &jme_ethtool_ops;
3183         netdev->watchdog_timeo          = TX_TIMEOUT;
3184         netdev->features                =       NETIF_F_IP_CSUM |
3185                                                 NETIF_F_IPV6_CSUM |
3186                                                 NETIF_F_SG |
3187                                                 NETIF_F_TSO |
3188                                                 NETIF_F_TSO6 |
3189                                                 NETIF_F_HW_VLAN_TX |
3190                                                 NETIF_F_HW_VLAN_RX;
3191         if (using_dac)
3192                 netdev->features        |=      NETIF_F_HIGHDMA;
3193
3194         SET_NETDEV_DEV(netdev, &pdev->dev);
3195         pci_set_drvdata(pdev, netdev);
3196
3197         /*
3198          * init adapter info
3199          */
3200         jme = netdev_priv(netdev);
3201         jme->pdev = pdev;
3202         jme->dev = netdev;
3203         jme->jme_rx = netif_rx;
3204         jme->jme_vlan_rx = vlan_hwaccel_rx;
3205         jme->old_mtu = netdev->mtu = 1500;
3206         jme->phylink = 0;
3207         jme->tx_ring_size = 1 << 10;
3208         jme->tx_ring_mask = jme->tx_ring_size - 1;
3209         jme->tx_wake_threshold = 1 << 9;
3210         jme->rx_ring_size = 1 << 9;
3211         jme->rx_ring_mask = jme->rx_ring_size - 1;
3212         jme->msg_enable = JME_DEF_MSG_ENABLE;
3213         jme->regs = ioremap(pci_resource_start(pdev, 0),
3214                              pci_resource_len(pdev, 0));
3215         if (!(jme->regs)) {
3216                 pr_err("Mapping PCI resource region error\n");
3217                 rc = -ENOMEM;
3218                 goto err_out_free_netdev;
3219         }
3220
3221         if (no_pseudohp) {
3222                 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
3223                 jwrite32(jme, JME_APMC, apmc);
3224         } else if (force_pseudohp) {
3225                 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
3226                 jwrite32(jme, JME_APMC, apmc);
3227         }
3228
3229         NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3230
3231         spin_lock_init(&jme->phy_lock);
3232         spin_lock_init(&jme->macaddr_lock);
3233         spin_lock_init(&jme->rxmcs_lock);
3234
3235         atomic_set(&jme->link_changing, 1);
3236         atomic_set(&jme->rx_cleaning, 1);
3237         atomic_set(&jme->tx_cleaning, 1);
3238         atomic_set(&jme->rx_empty, 1);
3239
3240         tasklet_init(&jme->pcc_task,
3241                      jme_pcc_tasklet,
3242                      (unsigned long) jme);
3243         tasklet_init(&jme->linkch_task,
3244                      jme_link_change_tasklet,
3245                      (unsigned long) jme);
3246         tasklet_init(&jme->txclean_task,
3247                      jme_tx_clean_tasklet,
3248                      (unsigned long) jme);
3249         tasklet_init(&jme->rxclean_task,
3250                      jme_rx_clean_tasklet,
3251                      (unsigned long) jme);
3252         tasklet_init(&jme->rxempty_task,
3253                      jme_rx_empty_tasklet,
3254                      (unsigned long) jme);
3255         tasklet_disable_nosync(&jme->linkch_task);
3256         tasklet_disable_nosync(&jme->txclean_task);
3257         tasklet_disable_nosync(&jme->rxclean_task);
3258         tasklet_disable_nosync(&jme->rxempty_task);
3259         jme->dpi.cur = PCC_P1;
3260
3261         jme->reg_ghc = 0;
3262         jme->reg_rxcs = RXCS_DEFAULT;
3263         jme->reg_rxmcs = RXMCS_DEFAULT;
3264         jme->reg_txpfc = 0;
3265         jme->reg_pmcs = PMCS_MFEN;
3266         jme->reg_gpreg1 = GPREG1_DEFAULT;
3267         set_bit(JME_FLAG_TXCSUM, &jme->flags);
3268         set_bit(JME_FLAG_TSO, &jme->flags);
3269
3270         /*
3271          * Get Max Read Req Size from PCI Config Space
3272          */
3273         pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3274         jme->mrrs &= PCI_DCSR_MRRS_MASK;
3275         switch (jme->mrrs) {
3276         case MRRS_128B:
3277                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3278                 break;
3279         case MRRS_256B:
3280                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3281                 break;
3282         default:
3283                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3284                 break;
3285         }
3286
3287         /*
3288          * Must check before reset_mac_processor
3289          */
3290         jme_check_hw_ver(jme);
3291         jme->mii_if.dev = netdev;
3292         if (jme->fpgaver) {
3293                 jme->mii_if.phy_id = 0;
3294                 for (i = 1 ; i < 32 ; ++i) {
3295                         bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3296                         bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3297                         if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3298                                 jme->mii_if.phy_id = i;
3299                                 break;
3300                         }
3301                 }
3302
3303                 if (!jme->mii_if.phy_id) {
3304                         rc = -EIO;
3305                         pr_err("Can not find phy_id\n");
3306                         goto err_out_unmap;
3307                 }
3308
3309                 jme->reg_ghc |= GHC_LINK_POLL;
3310         } else {
3311                 jme->mii_if.phy_id = 1;
3312         }
3313         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3314                 jme->mii_if.supports_gmii = true;
3315         else
3316                 jme->mii_if.supports_gmii = false;
3317         jme->mii_if.phy_id_mask = 0x1F;
3318         jme->mii_if.reg_num_mask = 0x1F;
3319         jme->mii_if.mdio_read = jme_mdio_read;
3320         jme->mii_if.mdio_write = jme_mdio_write;
3321
3322         jme_clear_pm(jme);
3323         jme_set_phyfifo_5level(jme);
3324         pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev);
3325         if (!jme->fpgaver)
3326                 jme_phy_init(jme);
3327         jme_phy_off(jme);
3328
3329         /*
3330          * Reset MAC processor and reload EEPROM for MAC Address
3331          */
3332         jme_reset_mac_processor(jme);
3333         rc = jme_reload_eeprom(jme);
3334         if (rc) {
3335                 pr_err("Reload eeprom for reading MAC Address error\n");
3336                 goto err_out_unmap;
3337         }
3338         jme_load_macaddr(netdev);
3339
3340         /*
3341          * Tell stack that we are not ready to work until open()
3342          */
3343         netif_carrier_off(netdev);
3344
3345         rc = register_netdev(netdev);
3346         if (rc) {
3347                 pr_err("Cannot register net device\n");
3348                 goto err_out_unmap;
3349         }
3350
3351         netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x "
3352                    "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3353                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3354                    "JMC250 Gigabit Ethernet" :
3355                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3356                    "JMC260 Fast Ethernet" : "Unknown",
3357                    (jme->fpgaver != 0) ? " (FPGA)" : "",
3358                    (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3359                    jme->pcirev,
3360                    netdev->dev_addr[0],
3361                    netdev->dev_addr[1],
3362                    netdev->dev_addr[2],
3363                    netdev->dev_addr[3],
3364                    netdev->dev_addr[4],
3365                    netdev->dev_addr[5]);
3366
3367         return 0;
3368
3369 err_out_unmap:
3370         iounmap(jme->regs);
3371 err_out_free_netdev:
3372         pci_set_drvdata(pdev, NULL);
3373         free_netdev(netdev);
3374 err_out_release_regions:
3375         pci_release_regions(pdev);
3376 err_out_disable_pdev:
3377         pci_disable_device(pdev);
3378 err_out:
3379         return rc;
3380 }
3381
3382 static void __devexit
3383 jme_remove_one(struct pci_dev *pdev)
3384 {
3385         struct net_device *netdev = pci_get_drvdata(pdev);
3386         struct jme_adapter *jme = netdev_priv(netdev);
3387
3388         unregister_netdev(netdev);
3389         iounmap(jme->regs);
3390         pci_set_drvdata(pdev, NULL);
3391         free_netdev(netdev);
3392         pci_release_regions(pdev);
3393         pci_disable_device(pdev);
3394
3395 }
3396
3397 static void
3398 jme_shutdown(struct pci_dev *pdev)
3399 {
3400         struct net_device *netdev = pci_get_drvdata(pdev);
3401         struct jme_adapter *jme = netdev_priv(netdev);
3402
3403         jme_powersave_phy(jme);
3404 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)
3405         pci_enable_wake(pdev, PCI_D3hot, true);
3406 #else
3407         pci_pme_active(pdev, true);
3408 #endif
3409 }
3410
3411 #ifdef CONFIG_PM
3412 static int
3413 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3414 {
3415         struct net_device *netdev = pci_get_drvdata(pdev);
3416         struct jme_adapter *jme = netdev_priv(netdev);
3417
3418         atomic_dec(&jme->link_changing);
3419
3420         netif_device_detach(netdev);
3421         netif_stop_queue(netdev);
3422         jme_stop_irq(jme);
3423
3424         tasklet_disable(&jme->txclean_task);
3425         tasklet_disable(&jme->rxclean_task);
3426         tasklet_disable(&jme->rxempty_task);
3427
3428         if (netif_carrier_ok(netdev)) {
3429                 if (test_bit(JME_FLAG_POLL, &jme->flags))
3430                         jme_polling_mode(jme);
3431
3432                 jme_stop_pcc_timer(jme);
3433                 jme_disable_rx_engine(jme);
3434                 jme_disable_tx_engine(jme);
3435                 jme_reset_mac_processor(jme);
3436                 jme_free_rx_resources(jme);
3437                 jme_free_tx_resources(jme);
3438                 netif_carrier_off(netdev);
3439                 jme->phylink = 0;
3440         }
3441
3442         tasklet_enable(&jme->txclean_task);
3443         tasklet_hi_enable(&jme->rxclean_task);
3444         tasklet_hi_enable(&jme->rxempty_task);
3445
3446         pci_save_state(pdev);
3447         jme_powersave_phy(jme);
3448 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)
3449         pci_enable_wake(pdev, PCI_D3hot, true);
3450 #else
3451         pci_pme_active(pdev, true);
3452 #endif
3453         pci_set_power_state(pdev, PCI_D3hot);
3454
3455         return 0;
3456 }
3457
3458 static int
3459 jme_resume(struct pci_dev *pdev)
3460 {
3461         struct net_device *netdev = pci_get_drvdata(pdev);
3462         struct jme_adapter *jme = netdev_priv(netdev);
3463
3464         jme_clear_pm(jme);
3465         pci_restore_state(pdev);
3466
3467         jme_phy_on(jme);
3468         if (test_bit(JME_FLAG_SSET, &jme->flags))
3469                 jme_set_settings(netdev, &jme->old_ecmd);
3470         else
3471                 jme_reset_phy_processor(jme);
3472
3473         jme_start_irq(jme);
3474         netif_device_attach(netdev);
3475
3476         atomic_inc(&jme->link_changing);
3477
3478         jme_reset_link(jme);
3479
3480         return 0;
3481 }
3482 #endif
3483
3484 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3485 static struct pci_device_id jme_pci_tbl[] = {
3486 #else
3487 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3488 #endif
3489         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3490         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3491         { }
3492 };
3493
3494 static struct pci_driver jme_driver = {
3495         .name           = DRV_NAME,
3496         .id_table       = jme_pci_tbl,
3497         .probe          = jme_init_one,
3498         .remove         = __devexit_p(jme_remove_one),
3499 #ifdef CONFIG_PM
3500         .suspend        = jme_suspend,
3501         .resume         = jme_resume,
3502 #endif /* CONFIG_PM */
3503         .shutdown       = jme_shutdown,
3504 };
3505
3506 static int __init
3507 jme_init_module(void)
3508 {
3509         pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION);
3510         return pci_register_driver(&jme_driver);
3511 }
3512
3513 static void __exit
3514 jme_cleanup_module(void)
3515 {
3516         pci_unregister_driver(&jme_driver);
3517 }
3518
3519 module_init(jme_init_module);
3520 module_exit(jme_cleanup_module);
3521
3522 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3523 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3524 MODULE_LICENSE("GPL");
3525 MODULE_VERSION(DRV_VERSION);
3526 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3527