jme.c

   1 /*
   2  * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
   3  *
   4  * Copyright 2008 JMicron Technology Corporation
   5  * http://www.jmicron.com/
   6  * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org>
   7  *
   8  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  */
  24
  25 #include <linux/version.h>
  26 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
  27 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  28 #endif
  29
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/pci.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/etherdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/mii.h>
  37 #include <linux/crc32.h>
  38 #include <linux/delay.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/in.h>
  41 #include <linux/ip.h>
  42 #include <linux/ipv6.h>
  43 #include <linux/tcp.h>
  44 #include <linux/udp.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/slab.h>
  47 #include <net/ip6_checksum.h>
  48 #include "jme.h"
  49
  50 static int force_pseudohp = -1;
  51 static int no_pseudohp = -1;
  52 static int no_extplug = -1;
  53 module_param(force_pseudohp, int, 0);
  54 MODULE_PARM_DESC(force_pseudohp,
  55         "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
  56 module_param(no_pseudohp, int, 0);
  57 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
  58 module_param(no_extplug, int, 0);
  59 MODULE_PARM_DESC(no_extplug,
  60         "Do not use external plug signal for pseudo hot-plug.");
  61
  62 #ifndef JME_NEW_PM_API
  63 static void
  64 jme_pci_wakeup_enable(struct jme_adapter *jme, int enable)
  65 {
  66 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)
  67         pci_enable_wake(jme->pdev, PCI_D1, enable);
  68         pci_enable_wake(jme->pdev, PCI_D2, enable);
  69         pci_enable_wake(jme->pdev, PCI_D3hot, enable);
  70         pci_enable_wake(jme->pdev, PCI_D3cold, enable);
  71 #else
  72         pci_pme_active(jme->pdev, enable);
  73 #endif
  74 }
  75 #endif
  76
  77 static int
  78 jme_mdio_read(struct net_device *netdev, int phy, int reg)
  79 {
  80         struct jme_adapter *jme = netdev_priv(netdev);
  81         int i, val, again = (reg == MII_BMSR) ? 1 : 0;
  82
  83 read_again:
  84         jwrite32(jme, JME_SMI, SMI_OP_REQ |
  85                                 smi_phy_addr(phy) |
  86                                 smi_reg_addr(reg));
  87
  88         wmb();
  89         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
  90                 udelay(20);
  91                 val = jread32(jme, JME_SMI);
  92                 if ((val & SMI_OP_REQ) == 0)
  93                         break;
  94         }
  95
  96         if (i == 0) {
  97                 pr_err("phy(%d) read timeout : %d\n", phy, reg);
  98                 return 0;
  99         }
 100
 101         if (again--)
 102                 goto read_again;
 103
 104         return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
 105 }
 106
 107 static void
 108 jme_mdio_write(struct net_device *netdev,
 109                                 int phy, int reg, int val)
 110 {
 111         struct jme_adapter *jme = netdev_priv(netdev);
 112         int i;
 113
 114         jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
 115                 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
 116                 smi_phy_addr(phy) | smi_reg_addr(reg));
 117
 118         wmb();
 119         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
 120                 udelay(20);
 121                 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
 122                         break;
 123         }
 124
 125         if (i == 0)
 126                 pr_err("phy(%d) write timeout : %d\n", phy, reg);
 127 }
 128
 129 static inline void
 130 jme_reset_phy_processor(struct jme_adapter *jme)
 131 {
 132         u32 val;
 133
 134         jme_mdio_write(jme->dev,
 135                         jme->mii_if.phy_id,
 136                         MII_ADVERTISE, ADVERTISE_ALL |
 137                         ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 138
 139         if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
 140                 jme_mdio_write(jme->dev,
 141                                 jme->mii_if.phy_id,
 142                                 MII_CTRL1000,
 143                                 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 144
 145         val = jme_mdio_read(jme->dev,
 146                                 jme->mii_if.phy_id,
 147                                 MII_BMCR);
 148
 149         jme_mdio_write(jme->dev,
 150                         jme->mii_if.phy_id,
 151                         MII_BMCR, val | BMCR_RESET);
 152 }
 153
 154 static void
 155 jme_setup_wakeup_frame(struct jme_adapter *jme,
 156                        const u32 *mask, u32 crc, int fnr)
 157 {
 158         int i;
 159
 160         /*
 161          * Setup CRC pattern
 162          */
 163         jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
 164         wmb();
 165         jwrite32(jme, JME_WFODP, crc);
 166         wmb();
 167
 168         /*
 169          * Setup Mask
 170          */
 171         for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
 172                 jwrite32(jme, JME_WFOI,
 173                                 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
 174                                 (fnr & WFOI_FRAME_SEL));
 175                 wmb();
 176                 jwrite32(jme, JME_WFODP, mask[i]);
 177                 wmb();
 178         }
 179 }
 180
 181 static inline void
 182 jme_mac_rxclk_off(struct jme_adapter *jme)
 183 {
 184         jme->reg_gpreg1 |= GPREG1_RXCLKOFF;
 185         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 186 }
 187
 188 static inline void
 189 jme_mac_rxclk_on(struct jme_adapter *jme)
 190 {
 191         jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF;
 192         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 193 }
 194
 195 static inline void
 196 jme_mac_txclk_off(struct jme_adapter *jme)
 197 {
 198         jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC);
 199         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 200 }
 201
 202 static inline void
 203 jme_mac_txclk_on(struct jme_adapter *jme)
 204 {
 205         u32 speed = jme->reg_ghc & GHC_SPEED;
 206         if (speed == GHC_SPEED_1000M)
 207                 jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
 208         else
 209                 jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
 210         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 211 }
 212
 213 static inline void
 214 jme_reset_ghc_speed(struct jme_adapter *jme)
 215 {
 216         jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX);
 217         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 218 }
 219
 220 static inline void
 221 jme_reset_250A2_workaround(struct jme_adapter *jme)
 222 {
 223         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 224                              GPREG1_RSSPATCH);
 225         jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 226 }
 227
 228 static inline void
 229 jme_assert_ghc_reset(struct jme_adapter *jme)
 230 {
 231         jme->reg_ghc |= GHC_SWRST;
 232         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 233 }
 234
 235 static inline void
 236 jme_clear_ghc_reset(struct jme_adapter *jme)
 237 {
 238         jme->reg_ghc &= ~GHC_SWRST;
 239         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 240 }
 241
 242 static inline void
 243 jme_reset_mac_processor(struct jme_adapter *jme)
 244 {
 245         static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
 246         u32 crc = 0xCDCDCDCD;
 247         u32 gpreg0;
 248         int i;
 249
 250         jme_reset_ghc_speed(jme);
 251         jme_reset_250A2_workaround(jme);
 252
 253         jme_mac_rxclk_on(jme);
 254         jme_mac_txclk_on(jme);
 255         udelay(1);
 256         jme_assert_ghc_reset(jme);
 257         udelay(1);
 258         jme_mac_rxclk_off(jme);
 259         jme_mac_txclk_off(jme);
 260         udelay(1);
 261         jme_clear_ghc_reset(jme);
 262         udelay(1);
 263         jme_mac_rxclk_on(jme);
 264         jme_mac_txclk_on(jme);
 265         udelay(1);
 266         jme_mac_rxclk_off(jme);
 267         jme_mac_txclk_off(jme);
 268
 269         jwrite32(jme, JME_RXDBA_LO, 0x00000000);
 270         jwrite32(jme, JME_RXDBA_HI, 0x00000000);
 271         jwrite32(jme, JME_RXQDC, 0x00000000);
 272         jwrite32(jme, JME_RXNDA, 0x00000000);
 273         jwrite32(jme, JME_TXDBA_LO, 0x00000000);
 274         jwrite32(jme, JME_TXDBA_HI, 0x00000000);
 275         jwrite32(jme, JME_TXQDC, 0x00000000);
 276         jwrite32(jme, JME_TXNDA, 0x00000000);
 277
 278         jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
 279         jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
 280         for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
 281                 jme_setup_wakeup_frame(jme, mask, crc, i);
 282         if (jme->fpgaver)
 283                 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
 284         else
 285                 gpreg0 = GPREG0_DEFAULT;
 286         jwrite32(jme, JME_GPREG0, gpreg0);
 287 }
 288
 289 static inline void
 290 jme_clear_pm(struct jme_adapter *jme)
 291 {
 292         jwrite32(jme, JME_PMCS, PMCS_STMASK | jme->reg_pmcs);
 293 }
 294
 295 static int
 296 jme_reload_eeprom(struct jme_adapter *jme)
 297 {
 298         u32 val;
 299         int i;
 300
 301         val = jread32(jme, JME_SMBCSR);
 302
 303         if (val & SMBCSR_EEPROMD) {
 304                 val |= SMBCSR_CNACK;
 305                 jwrite32(jme, JME_SMBCSR, val);
 306                 val |= SMBCSR_RELOAD;
 307                 jwrite32(jme, JME_SMBCSR, val);
 308                 mdelay(12);
 309
 310                 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
 311                         mdelay(1);
 312                         if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
 313                                 break;
 314                 }
 315
 316                 if (i == 0) {
 317                         pr_err("eeprom reload timeout\n");
 318                         return -EIO;
 319                 }
 320         }
 321
 322         return 0;
 323 }
 324
 325 static void
 326 jme_load_macaddr(struct net_device *netdev)
 327 {
 328         struct jme_adapter *jme = netdev_priv(netdev);
 329         unsigned char macaddr[6];
 330         u32 val;
 331
 332         spin_lock_bh(&jme->macaddr_lock);
 333         val = jread32(jme, JME_RXUMA_LO);
 334         macaddr[0] = (val >>  0) & 0xFF;
 335         macaddr[1] = (val >>  8) & 0xFF;
 336         macaddr[2] = (val >> 16) & 0xFF;
 337         macaddr[3] = (val >> 24) & 0xFF;
 338         val = jread32(jme, JME_RXUMA_HI);
 339         macaddr[4] = (val >>  0) & 0xFF;
 340         macaddr[5] = (val >>  8) & 0xFF;
 341         memcpy(netdev->dev_addr, macaddr, 6);
 342         spin_unlock_bh(&jme->macaddr_lock);
 343 }
 344
 345 static inline void
 346 jme_set_rx_pcc(struct jme_adapter *jme, int p)
 347 {
 348         switch (p) {
 349         case PCC_OFF:
 350                 jwrite32(jme, JME_PCCRX0,
 351                         ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 352                         ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 353                 break;
 354         case PCC_P1:
 355                 jwrite32(jme, JME_PCCRX0,
 356                         ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 357                         ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 358                 break;
 359         case PCC_P2:
 360                 jwrite32(jme, JME_PCCRX0,
 361                         ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 362                         ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 363                 break;
 364         case PCC_P3:
 365                 jwrite32(jme, JME_PCCRX0,
 366                         ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 367                         ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 368                 break;
 369         default:
 370                 break;
 371         }
 372         wmb();
 373
 374         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
 375                 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
 376 }
 377
 378 static void
 379 jme_start_irq(struct jme_adapter *jme)
 380 {
 381         register struct dynpcc_info *dpi = &(jme->dpi);
 382
 383         jme_set_rx_pcc(jme, PCC_P1);
 384         dpi->cur                = PCC_P1;
 385         dpi->attempt            = PCC_P1;
 386         dpi->cnt                = 0;
 387
 388         jwrite32(jme, JME_PCCTX,
 389                         ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
 390                         ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
 391                         PCCTXQ0_EN
 392                 );
 393
 394         /*
 395          * Enable Interrupts
 396          */
 397         jwrite32(jme, JME_IENS, INTR_ENABLE);
 398 }
 399
 400 static inline void
 401 jme_stop_irq(struct jme_adapter *jme)
 402 {
 403         /*
 404          * Disable Interrupts
 405          */
 406         jwrite32f(jme, JME_IENC, INTR_ENABLE);
 407 }
 408
 409 static u32
 410 jme_linkstat_from_phy(struct jme_adapter *jme)
 411 {
 412         u32 phylink, bmsr;
 413
 414         phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
 415         bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
 416         if (bmsr & BMSR_ANCOMP)
 417                 phylink |= PHY_LINK_AUTONEG_COMPLETE;
 418
 419         return phylink;
 420 }
 421
 422 static inline void
 423 jme_set_phyfifo_5level(struct jme_adapter *jme)
 424 {
 425         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
 426 }
 427
 428 static inline void
 429 jme_set_phyfifo_8level(struct jme_adapter *jme)
 430 {
 431         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
 432 }
 433
 434 static int
 435 jme_check_link(struct net_device *netdev, int testonly)
 436 {
 437         struct jme_adapter *jme = netdev_priv(netdev);
 438         u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr;
 439         char linkmsg[64];
 440         int rc = 0;
 441
 442         linkmsg[0] = '\0';
 443
 444         if (jme->fpgaver)
 445                 phylink = jme_linkstat_from_phy(jme);
 446         else
 447                 phylink = jread32(jme, JME_PHY_LINK);
 448
 449         if (phylink & PHY_LINK_UP) {
 450                 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
 451                         /*
 452                          * If we did not enable AN
 453                          * Speed/Duplex Info should be obtained from SMI
 454                          */
 455                         phylink = PHY_LINK_UP;
 456
 457                         bmcr = jme_mdio_read(jme->dev,
 458                                                 jme->mii_if.phy_id,
 459                                                 MII_BMCR);
 460
 461                         phylink |= ((bmcr & BMCR_SPEED1000) &&
 462                                         (bmcr & BMCR_SPEED100) == 0) ?
 463                                         PHY_LINK_SPEED_1000M :
 464                                         (bmcr & BMCR_SPEED100) ?
 465                                         PHY_LINK_SPEED_100M :
 466                                         PHY_LINK_SPEED_10M;
 467
 468                         phylink |= (bmcr & BMCR_FULLDPLX) ?
 469                                          PHY_LINK_DUPLEX : 0;
 470
 471                         strcat(linkmsg, "Forced: ");
 472                 } else {
 473                         /*
 474                          * Keep polling for speed/duplex resolve complete
 475                          */
 476                         while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
 477                                 --cnt) {
 478
 479                                 udelay(1);
 480
 481                                 if (jme->fpgaver)
 482                                         phylink = jme_linkstat_from_phy(jme);
 483                                 else
 484                                         phylink = jread32(jme, JME_PHY_LINK);
 485                         }
 486                         if (!cnt)
 487                                 pr_err("Waiting speed resolve timeout\n");
 488
 489                         strcat(linkmsg, "ANed: ");
 490                 }
 491
 492                 if (jme->phylink == phylink) {
 493                         rc = 1;
 494                         goto out;
 495                 }
 496                 if (testonly)
 497                         goto out;
 498
 499                 jme->phylink = phylink;
 500
 501                 /*
 502                  * The speed/duplex setting of jme->reg_ghc already cleared
 503                  * by jme_reset_mac_processor()
 504                  */
 505                 switch (phylink & PHY_LINK_SPEED_MASK) {
 506                 case PHY_LINK_SPEED_10M:
 507                         jme->reg_ghc |= GHC_SPEED_10M;
 508                         strcat(linkmsg, "10 Mbps, ");
 509                         break;
 510                 case PHY_LINK_SPEED_100M:
 511                         jme->reg_ghc |= GHC_SPEED_100M;
 512                         strcat(linkmsg, "100 Mbps, ");
 513                         break;
 514                 case PHY_LINK_SPEED_1000M:
 515                         jme->reg_ghc |= GHC_SPEED_1000M;
 516                         strcat(linkmsg, "1000 Mbps, ");
 517                         break;
 518                 default:
 519                         break;
 520                 }
 521
 522                 if (phylink & PHY_LINK_DUPLEX) {
 523                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
 524                         jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX);
 525                         jme->reg_ghc |= GHC_DPX;
 526                 } else {
 527                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
 528                                                 TXMCS_BACKOFF |
 529                                                 TXMCS_CARRIERSENSE |
 530                                                 TXMCS_COLLISION);
 531                         jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX);
 532                 }
 533
 534                 jwrite32(jme, JME_GHC, jme->reg_ghc);
 535
 536                 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
 537                         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 538                                              GPREG1_RSSPATCH);
 539                         if (!(phylink & PHY_LINK_DUPLEX))
 540                                 jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH;
 541                         switch (phylink & PHY_LINK_SPEED_MASK) {
 542                         case PHY_LINK_SPEED_10M:
 543                                 jme_set_phyfifo_8level(jme);
 544                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 545                                 break;
 546                         case PHY_LINK_SPEED_100M:
 547                                 jme_set_phyfifo_5level(jme);
 548                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 549                                 break;
 550                         case PHY_LINK_SPEED_1000M:
 551                                 jme_set_phyfifo_8level(jme);
 552                                 break;
 553                         default:
 554                                 break;
 555                         }
 556                 }
 557                 jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 558
 559                 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
 560                                         "Full-Duplex, " :
 561                                         "Half-Duplex, ");
 562                 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
 563                                         "MDI-X" :
 564                                         "MDI");
 565                 netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg);
 566                 netif_carrier_on(netdev);
 567         } else {
 568                 if (testonly)
 569                         goto out;
 570
 571                 netif_info(jme, link, jme->dev, "Link is down\n");
 572                 jme->phylink = 0;
 573                 netif_carrier_off(netdev);
 574         }
 575
 576 out:
 577         return rc;
 578 }
 579
 580 static int
 581 jme_setup_tx_resources(struct jme_adapter *jme)
 582 {
 583         struct jme_ring *txring = &(jme->txring[0]);
 584
 585         txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 586                                    TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 587                                    &(txring->dmaalloc),
 588                                    GFP_ATOMIC);
 589
 590         if (!txring->alloc)
 591                 goto err_set_null;
 592
 593         /*
 594          * 16 Bytes align
 595          */
 596         txring->desc            = (void *)ALIGN((unsigned long)(txring->alloc),
 597                                                 RING_DESC_ALIGN);
 598         txring->dma             = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
 599         txring->next_to_use     = 0;
 600         atomic_set(&txring->next_to_clean, 0);
 601         atomic_set(&txring->nr_free, jme->tx_ring_size);
 602
 603         txring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 604                                         jme->tx_ring_size, GFP_ATOMIC);
 605         if (unlikely(!(txring->bufinf)))
 606                 goto err_free_txring;
 607
 608         /*
 609          * Initialize Transmit Descriptors
 610          */
 611         memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
 612         memset(txring->bufinf, 0,
 613                 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
 614
 615         return 0;
 616
 617 err_free_txring:
 618         dma_free_coherent(&(jme->pdev->dev),
 619                           TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 620                           txring->alloc,
 621                           txring->dmaalloc);
 622
 623 err_set_null:
 624         txring->desc = NULL;
 625         txring->dmaalloc = 0;
 626         txring->dma = 0;
 627         txring->bufinf = NULL;
 628
 629         return -ENOMEM;
 630 }
 631
 632 static void
 633 jme_free_tx_resources(struct jme_adapter *jme)
 634 {
 635         int i;
 636         struct jme_ring *txring = &(jme->txring[0]);
 637         struct jme_buffer_info *txbi;
 638
 639         if (txring->alloc) {
 640                 if (txring->bufinf) {
 641                         for (i = 0 ; i < jme->tx_ring_size ; ++i) {
 642                                 txbi = txring->bufinf + i;
 643                                 if (txbi->skb) {
 644                                         dev_kfree_skb(txbi->skb);
 645                                         txbi->skb = NULL;
 646                                 }
 647                                 txbi->mapping           = 0;
 648                                 txbi->len               = 0;
 649                                 txbi->nr_desc           = 0;
 650                                 txbi->start_xmit        = 0;
 651                         }
 652                         kfree(txring->bufinf);
 653                 }
 654
 655                 dma_free_coherent(&(jme->pdev->dev),
 656                                   TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 657                                   txring->alloc,
 658                                   txring->dmaalloc);
 659
 660                 txring->alloc           = NULL;
 661                 txring->desc            = NULL;
 662                 txring->dmaalloc        = 0;
 663                 txring->dma             = 0;
 664                 txring->bufinf          = NULL;
 665         }
 666         txring->next_to_use     = 0;
 667         atomic_set(&txring->next_to_clean, 0);
 668         atomic_set(&txring->nr_free, 0);
 669 }
 670
 671 static inline void
 672 jme_enable_tx_engine(struct jme_adapter *jme)
 673 {
 674         /*
 675          * Select Queue 0
 676          */
 677         jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
 678         wmb();
 679
 680         /*
 681          * Setup TX Queue 0 DMA Bass Address
 682          */
 683         jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 684         jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
 685         jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 686
 687         /*
 688          * Setup TX Descptor Count
 689          */
 690         jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
 691
 692         /*
 693          * Enable TX Engine
 694          */
 695         wmb();
 696         jwrite32f(jme, JME_TXCS, jme->reg_txcs |
 697                                 TXCS_SELECT_QUEUE0 |
 698                                 TXCS_ENABLE);
 699
 700         /*
 701          * Start clock for TX MAC Processor
 702          */
 703         jme_mac_txclk_on(jme);
 704 }
 705
 706 static inline void
 707 jme_restart_tx_engine(struct jme_adapter *jme)
 708 {
 709         /*
 710          * Restart TX Engine
 711          */
 712         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 713                                 TXCS_SELECT_QUEUE0 |
 714                                 TXCS_ENABLE);
 715 }
 716
 717 static inline void
 718 jme_disable_tx_engine(struct jme_adapter *jme)
 719 {
 720         int i;
 721         u32 val;
 722
 723         /*
 724          * Disable TX Engine
 725          */
 726         jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
 727         wmb();
 728
 729         val = jread32(jme, JME_TXCS);
 730         for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
 731                 mdelay(1);
 732                 val = jread32(jme, JME_TXCS);
 733                 rmb();
 734         }
 735
 736         if (!i)
 737                 pr_err("Disable TX engine timeout\n");
 738
 739         /*
 740          * Stop clock for TX MAC Processor
 741          */
 742         jme_mac_txclk_off(jme);
 743 }
 744
 745 static void
 746 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
 747 {
 748         struct jme_ring *rxring = &(jme->rxring[0]);
 749         register struct rxdesc *rxdesc = rxring->desc;
 750         struct jme_buffer_info *rxbi = rxring->bufinf;
 751         rxdesc += i;
 752         rxbi += i;
 753
 754         rxdesc->dw[0] = 0;
 755         rxdesc->dw[1] = 0;
 756         rxdesc->desc1.bufaddrh  = cpu_to_le32((__u64)rxbi->mapping >> 32);
 757         rxdesc->desc1.bufaddrl  = cpu_to_le32(
 758                                         (__u64)rxbi->mapping & 0xFFFFFFFFUL);
 759         rxdesc->desc1.datalen   = cpu_to_le16(rxbi->len);
 760         if (jme->dev->features & NETIF_F_HIGHDMA)
 761                 rxdesc->desc1.flags = RXFLAG_64BIT;
 762         wmb();
 763         rxdesc->desc1.flags     |= RXFLAG_OWN | RXFLAG_INT;
 764 }
 765
 766 static int
 767 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
 768 {
 769         struct jme_ring *rxring = &(jme->rxring[0]);
 770         struct jme_buffer_info *rxbi = rxring->bufinf + i;
 771         struct sk_buff *skb;
 772         dma_addr_t mapping;
 773
 774         skb = netdev_alloc_skb(jme->dev,
 775                 jme->dev->mtu + RX_EXTRA_LEN);
 776         if (unlikely(!skb))
 777                 return -ENOMEM;
 778 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
 779         skb->dev = jme->dev;
 780 #endif
 781
 782         mapping = pci_map_page(jme->pdev, virt_to_page(skb->data),
 783                                offset_in_page(skb->data), skb_tailroom(skb),
 784                                PCI_DMA_FROMDEVICE);
 785 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26)
 786         if (unlikely(pci_dma_mapping_error(jme->pdev, mapping)))
 787 #else
 788         if (unlikely(pci_dma_mapping_error(mapping)))
 789 #endif
 790         {
 791                 dev_kfree_skb(skb);
 792                 return -ENOMEM;
 793         }
 794
 795         if (likely(rxbi->mapping))
 796                 pci_unmap_page(jme->pdev, rxbi->mapping,
 797                                rxbi->len, PCI_DMA_FROMDEVICE);
 798
 799         rxbi->skb = skb;
 800         rxbi->len = skb_tailroom(skb);
 801         rxbi->mapping = mapping;
 802         return 0;
 803 }
 804
 805 static void
 806 jme_free_rx_buf(struct jme_adapter *jme, int i)
 807 {
 808         struct jme_ring *rxring = &(jme->rxring[0]);
 809         struct jme_buffer_info *rxbi = rxring->bufinf;
 810         rxbi += i;
 811
 812         if (rxbi->skb) {
 813                 pci_unmap_page(jme->pdev,
 814                                  rxbi->mapping,
 815                                  rxbi->len,
 816                                  PCI_DMA_FROMDEVICE);
 817                 dev_kfree_skb(rxbi->skb);
 818                 rxbi->skb = NULL;
 819                 rxbi->mapping = 0;
 820                 rxbi->len = 0;
 821         }
 822 }
 823
 824 static void
 825 jme_free_rx_resources(struct jme_adapter *jme)
 826 {
 827         int i;
 828         struct jme_ring *rxring = &(jme->rxring[0]);
 829
 830         if (rxring->alloc) {
 831                 if (rxring->bufinf) {
 832                         for (i = 0 ; i < jme->rx_ring_size ; ++i)
 833                                 jme_free_rx_buf(jme, i);
 834                         kfree(rxring->bufinf);
 835                 }
 836
 837                 dma_free_coherent(&(jme->pdev->dev),
 838                                   RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 839                                   rxring->alloc,
 840                                   rxring->dmaalloc);
 841                 rxring->alloc    = NULL;
 842                 rxring->desc     = NULL;
 843                 rxring->dmaalloc = 0;
 844                 rxring->dma      = 0;
 845                 rxring->bufinf   = NULL;
 846         }
 847         rxring->next_to_use   = 0;
 848         atomic_set(&rxring->next_to_clean, 0);
 849 }
 850
 851 static int
 852 jme_setup_rx_resources(struct jme_adapter *jme)
 853 {
 854         int i;
 855         struct jme_ring *rxring = &(jme->rxring[0]);
 856
 857         rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 858                                    RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 859                                    &(rxring->dmaalloc),
 860                                    GFP_ATOMIC);
 861         if (!rxring->alloc)
 862                 goto err_set_null;
 863
 864         /*
 865          * 16 Bytes align
 866          */
 867         rxring->desc            = (void *)ALIGN((unsigned long)(rxring->alloc),
 868                                                 RING_DESC_ALIGN);
 869         rxring->dma             = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
 870         rxring->next_to_use     = 0;
 871         atomic_set(&rxring->next_to_clean, 0);
 872
 873         rxring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 874                                         jme->rx_ring_size, GFP_ATOMIC);
 875         if (unlikely(!(rxring->bufinf)))
 876                 goto err_free_rxring;
 877
 878         /*
 879          * Initiallize Receive Descriptors
 880          */
 881         memset(rxring->bufinf, 0,
 882                 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
 883         for (i = 0 ; i < jme->rx_ring_size ; ++i) {
 884                 if (unlikely(jme_make_new_rx_buf(jme, i))) {
 885                         jme_free_rx_resources(jme);
 886                         return -ENOMEM;
 887                 }
 888
 889                 jme_set_clean_rxdesc(jme, i);
 890         }
 891
 892         return 0;
 893
 894 err_free_rxring:
 895         dma_free_coherent(&(jme->pdev->dev),
 896                           RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 897                           rxring->alloc,
 898                           rxring->dmaalloc);
 899 err_set_null:
 900         rxring->desc = NULL;
 901         rxring->dmaalloc = 0;
 902         rxring->dma = 0;
 903         rxring->bufinf = NULL;
 904
 905         return -ENOMEM;
 906 }
 907
 908 static inline void
 909 jme_enable_rx_engine(struct jme_adapter *jme)
 910 {
 911         /*
 912          * Select Queue 0
 913          */
 914         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 915                                 RXCS_QUEUESEL_Q0);
 916         wmb();
 917
 918         /*
 919          * Setup RX DMA Bass Address
 920          */
 921         jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 922         jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
 923         jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 924
 925         /*
 926          * Setup RX Descriptor Count
 927          */
 928         jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
 929
 930         /*
 931          * Setup Unicast Filter
 932          */
 933         jme_set_unicastaddr(jme->dev);
 934         jme_set_multi(jme->dev);
 935
 936         /*
 937          * Enable RX Engine
 938          */
 939         wmb();
 940         jwrite32f(jme, JME_RXCS, jme->reg_rxcs |
 941                                 RXCS_QUEUESEL_Q0 |
 942                                 RXCS_ENABLE |
 943                                 RXCS_QST);
 944
 945         /*
 946          * Start clock for RX MAC Processor
 947          */
 948         jme_mac_rxclk_on(jme);
 949 }
 950
 951 static inline void
 952 jme_restart_rx_engine(struct jme_adapter *jme)
 953 {
 954         /*
 955          * Start RX Engine
 956          */
 957         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 958                                 RXCS_QUEUESEL_Q0 |
 959                                 RXCS_ENABLE |
 960                                 RXCS_QST);
 961 }
 962
 963 static inline void
 964 jme_disable_rx_engine(struct jme_adapter *jme)
 965 {
 966         int i;
 967         u32 val;
 968
 969         /*
 970          * Disable RX Engine
 971          */
 972         jwrite32(jme, JME_RXCS, jme->reg_rxcs);
 973         wmb();
 974
 975         val = jread32(jme, JME_RXCS);
 976         for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
 977                 mdelay(1);
 978                 val = jread32(jme, JME_RXCS);
 979                 rmb();
 980         }
 981
 982         if (!i)
 983                 pr_err("Disable RX engine timeout\n");
 984
 985         /*
 986          * Stop clock for RX MAC Processor
 987          */
 988         jme_mac_rxclk_off(jme);
 989 }
 990
 991 static u16
 992 jme_udpsum(struct sk_buff *skb)
 993 {
 994         u16 csum = 0xFFFFu;
 995 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
 996         struct iphdr *iph;
 997         int iphlen;
 998         struct udphdr *udph;
 999 #endif
1000
1001         if (skb->len < (ETH_HLEN + sizeof(struct iphdr)))
1002                 return csum;
1003         if (skb->protocol != htons(ETH_P_IP))
1004                 return csum;
1005 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1006         iph = (struct iphdr *)skb_pull(skb, ETH_HLEN);
1007         iphlen = (iph->ihl << 2);
1008         if ((iph->protocol != IPPROTO_UDP) ||
1009             (skb->len < (iphlen + sizeof(struct udphdr)))) {
1010                 skb_push(skb, ETH_HLEN);
1011                 return csum;
1012         }
1013         udph = (struct udphdr *)skb_pull(skb, iphlen);
1014         csum = udph->check;
1015         skb_push(skb, iphlen);
1016         skb_push(skb, ETH_HLEN);
1017 #else
1018         skb_set_network_header(skb, ETH_HLEN);
1019         if ((ip_hdr(skb)->protocol != IPPROTO_UDP) ||
1020             (skb->len < (ETH_HLEN +
1021                         (ip_hdr(skb)->ihl << 2) +
1022                         sizeof(struct udphdr)))) {
1023                 skb_reset_network_header(skb);
1024                 return csum;
1025         }
1026         skb_set_transport_header(skb,
1027                         ETH_HLEN + (ip_hdr(skb)->ihl << 2));
1028         csum = udp_hdr(skb)->check;
1029         skb_reset_transport_header(skb);
1030         skb_reset_network_header(skb);
1031 #endif
1032
1033         return csum;
1034 }
1035
1036 static int
1037 jme_rxsum_ok(struct jme_adapter *jme, u16 flags, struct sk_buff *skb)
1038 {
1039         if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
1040                 return false;
1041
1042         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
1043                         == RXWBFLAG_TCPON)) {
1044                 if (flags & RXWBFLAG_IPV4)
1045                         netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
1046                 return false;
1047         }
1048
1049         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
1050                         == RXWBFLAG_UDPON) && jme_udpsum(skb)) {
1051                 if (flags & RXWBFLAG_IPV4)
1052                         netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n");
1053                 return false;
1054         }
1055
1056         if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
1057                         == RXWBFLAG_IPV4)) {
1058                 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n");
1059                 return false;
1060         }
1061
1062         return true;
1063 }
1064
1065 static void
1066 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
1067 {
1068         struct jme_ring *rxring = &(jme->rxring[0]);
1069         struct rxdesc *rxdesc = rxring->desc;
1070         struct jme_buffer_info *rxbi = rxring->bufinf;
1071         struct sk_buff *skb;
1072         int framesize;
1073
1074         rxdesc += idx;
1075         rxbi += idx;
1076
1077         skb = rxbi->skb;
1078         pci_dma_sync_single_for_cpu(jme->pdev,
1079                                         rxbi->mapping,
1080                                         rxbi->len,
1081                                         PCI_DMA_FROMDEVICE);
1082
1083         if (unlikely(jme_make_new_rx_buf(jme, idx))) {
1084                 pci_dma_sync_single_for_device(jme->pdev,
1085                                                 rxbi->mapping,
1086                                                 rxbi->len,
1087                                                 PCI_DMA_FROMDEVICE);
1088
1089                 ++(NET_STAT(jme).rx_dropped);
1090         } else {
1091                 framesize = le16_to_cpu(rxdesc->descwb.framesize)
1092                                 - RX_PREPAD_SIZE;
1093
1094                 skb_reserve(skb, RX_PREPAD_SIZE);
1095                 skb_put(skb, framesize);
1096                 skb->protocol = eth_type_trans(skb, jme->dev);
1097
1098                 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags), skb))
1099                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1100                 else
1101 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,36)
1102                         skb->ip_summed = CHECKSUM_NONE;
1103 #else
1104                         skb_checksum_none_assert(skb);
1105 #endif
1106
1107 #ifndef __UNIFY_VLAN_RX_PATH__
1108                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
1109                         if (jme->vlgrp) {
1110                                 jme->jme_vlan_rx(skb, jme->vlgrp,
1111                                         le16_to_cpu(rxdesc->descwb.vlan));
1112                                 NET_STAT(jme).rx_bytes += 4;
1113                         } else {
1114                                 dev_kfree_skb(skb);
1115                         }
1116                 } else {
1117                         jme->jme_rx(skb);
1118                 }
1119 #else
1120                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
1121                         u16 vid = le16_to_cpu(rxdesc->descwb.vlan);
1122
1123                         __vlan_hwaccel_put_tag(skb, vid);
1124                         NET_STAT(jme).rx_bytes += 4;
1125                 }
1126                 jme->jme_rx(skb);
1127 #endif
1128
1129                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
1130                     cpu_to_le16(RXWBFLAG_DEST_MUL))
1131                         ++(NET_STAT(jme).multicast);
1132
1133                 NET_STAT(jme).rx_bytes += framesize;
1134                 ++(NET_STAT(jme).rx_packets);
1135         }
1136
1137         jme_set_clean_rxdesc(jme, idx);
1138
1139 }
1140
1141 static int
1142 jme_process_receive(struct jme_adapter *jme, int limit)
1143 {
1144         struct jme_ring *rxring = &(jme->rxring[0]);
1145         struct rxdesc *rxdesc = rxring->desc;
1146         int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1147
1148         if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1149                 goto out_inc;
1150
1151         if (unlikely(atomic_read(&jme->link_changing) != 1))
1152                 goto out_inc;
1153
1154         if (unlikely(!netif_carrier_ok(jme->dev)))
1155                 goto out_inc;
1156
1157         i = atomic_read(&rxring->next_to_clean);
1158         while (limit > 0) {
1159                 rxdesc = rxring->desc;
1160                 rxdesc += i;
1161
1162                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1163                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1164                         goto out;
1165                 --limit;
1166
1167                 rmb();
1168                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1169
1170                 if (unlikely(desccnt > 1 ||
1171                 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1172
1173                         if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1174                                 ++(NET_STAT(jme).rx_crc_errors);
1175                         else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1176                                 ++(NET_STAT(jme).rx_fifo_errors);
1177                         else
1178                                 ++(NET_STAT(jme).rx_errors);
1179
1180                         if (desccnt > 1)
1181                                 limit -= desccnt - 1;
1182
1183                         for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1184                                 jme_set_clean_rxdesc(jme, j);
1185                                 j = (j + 1) & (mask);
1186                         }
1187
1188                 } else {
1189                         jme_alloc_and_feed_skb(jme, i);
1190                 }
1191
1192                 i = (i + desccnt) & (mask);
1193         }
1194
1195 out:
1196         atomic_set(&rxring->next_to_clean, i);
1197
1198 out_inc:
1199         atomic_inc(&jme->rx_cleaning);
1200
1201         return limit > 0 ? limit : 0;
1202
1203 }
1204
1205 static void
1206 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1207 {
1208         if (likely(atmp == dpi->cur)) {
1209                 dpi->cnt = 0;
1210                 return;
1211         }
1212
1213         if (dpi->attempt == atmp) {
1214                 ++(dpi->cnt);
1215         } else {
1216                 dpi->attempt = atmp;
1217                 dpi->cnt = 0;
1218         }
1219
1220 }
1221
1222 static void
1223 jme_dynamic_pcc(struct jme_adapter *jme)
1224 {
1225         register struct dynpcc_info *dpi = &(jme->dpi);
1226
1227         if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1228                 jme_attempt_pcc(dpi, PCC_P3);
1229         else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1230                  dpi->intr_cnt > PCC_INTR_THRESHOLD)
1231                 jme_attempt_pcc(dpi, PCC_P2);
1232         else
1233                 jme_attempt_pcc(dpi, PCC_P1);
1234
1235         if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1236                 if (dpi->attempt < dpi->cur)
1237                         tasklet_schedule(&jme->rxclean_task);
1238                 jme_set_rx_pcc(jme, dpi->attempt);
1239                 dpi->cur = dpi->attempt;
1240                 dpi->cnt = 0;
1241         }
1242 }
1243
1244 static void
1245 jme_start_pcc_timer(struct jme_adapter *jme)
1246 {
1247         struct dynpcc_info *dpi = &(jme->dpi);
1248         dpi->last_bytes         = NET_STAT(jme).rx_bytes;
1249         dpi->last_pkts          = NET_STAT(jme).rx_packets;
1250         dpi->intr_cnt           = 0;
1251         jwrite32(jme, JME_TMCSR,
1252                 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1253 }
1254
1255 static inline void
1256 jme_stop_pcc_timer(struct jme_adapter *jme)
1257 {
1258         jwrite32(jme, JME_TMCSR, 0);
1259 }
1260
1261 static void
1262 jme_shutdown_nic(struct jme_adapter *jme)
1263 {
1264         u32 phylink;
1265
1266         phylink = jme_linkstat_from_phy(jme);
1267
1268         if (!(phylink & PHY_LINK_UP)) {
1269                 /*
1270                  * Disable all interrupt before issue timer
1271                  */
1272                 jme_stop_irq(jme);
1273                 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1274         }
1275 }
1276
1277 static void
1278 jme_pcc_tasklet(unsigned long arg)
1279 {
1280         struct jme_adapter *jme = (struct jme_adapter *)arg;
1281         struct net_device *netdev = jme->dev;
1282
1283         if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1284                 jme_shutdown_nic(jme);
1285                 return;
1286         }
1287
1288         if (unlikely(!netif_carrier_ok(netdev) ||
1289                 (atomic_read(&jme->link_changing) != 1)
1290         )) {
1291                 jme_stop_pcc_timer(jme);
1292                 return;
1293         }
1294
1295         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1296                 jme_dynamic_pcc(jme);
1297
1298         jme_start_pcc_timer(jme);
1299 }
1300
1301 static inline void
1302 jme_polling_mode(struct jme_adapter *jme)
1303 {
1304         jme_set_rx_pcc(jme, PCC_OFF);
1305 }
1306
1307 static inline void
1308 jme_interrupt_mode(struct jme_adapter *jme)
1309 {
1310         jme_set_rx_pcc(jme, PCC_P1);
1311 }
1312
1313 static inline int
1314 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1315 {
1316         u32 apmc;
1317         apmc = jread32(jme, JME_APMC);
1318         return apmc & JME_APMC_PSEUDO_HP_EN;
1319 }
1320
1321 static void
1322 jme_start_shutdown_timer(struct jme_adapter *jme)
1323 {
1324         u32 apmc;
1325
1326         apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1327         apmc &= ~JME_APMC_EPIEN_CTRL;
1328         if (!no_extplug) {
1329                 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1330                 wmb();
1331         }
1332         jwrite32f(jme, JME_APMC, apmc);
1333
1334         jwrite32f(jme, JME_TIMER2, 0);
1335         set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1336         jwrite32(jme, JME_TMCSR,
1337                 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1338 }
1339
1340 static void
1341 jme_stop_shutdown_timer(struct jme_adapter *jme)
1342 {
1343         u32 apmc;
1344
1345         jwrite32f(jme, JME_TMCSR, 0);
1346         jwrite32f(jme, JME_TIMER2, 0);
1347         clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1348
1349         apmc = jread32(jme, JME_APMC);
1350         apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1351         jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1352         wmb();
1353         jwrite32f(jme, JME_APMC, apmc);
1354 }
1355
1356 static void
1357 jme_link_change_tasklet(unsigned long arg)
1358 {
1359         struct jme_adapter *jme = (struct jme_adapter *)arg;
1360         struct net_device *netdev = jme->dev;
1361         int rc;
1362
1363         while (!atomic_dec_and_test(&jme->link_changing)) {
1364                 atomic_inc(&jme->link_changing);
1365                 netif_info(jme, intr, jme->dev, "Get link change lock failed\n");
1366                 while (atomic_read(&jme->link_changing) != 1)
1367                         netif_info(jme, intr, jme->dev, "Waiting link change lock\n");
1368         }
1369
1370         if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1371                 goto out;
1372
1373         jme->old_mtu = netdev->mtu;
1374         netif_stop_queue(netdev);
1375         if (jme_pseudo_hotplug_enabled(jme))
1376                 jme_stop_shutdown_timer(jme);
1377
1378         jme_stop_pcc_timer(jme);
1379         tasklet_disable(&jme->txclean_task);
1380         tasklet_disable(&jme->rxclean_task);
1381         tasklet_disable(&jme->rxempty_task);
1382
1383         if (netif_carrier_ok(netdev)) {
1384                 jme_disable_rx_engine(jme);
1385                 jme_disable_tx_engine(jme);
1386                 jme_reset_mac_processor(jme);
1387                 jme_free_rx_resources(jme);
1388                 jme_free_tx_resources(jme);
1389
1390                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1391                         jme_polling_mode(jme);
1392
1393                 netif_carrier_off(netdev);
1394         }
1395
1396         jme_check_link(netdev, 0);
1397         if (netif_carrier_ok(netdev)) {
1398                 rc = jme_setup_rx_resources(jme);
1399                 if (rc) {
1400                         pr_err("Allocating resources for RX error, Device STOPPED!\n");
1401                         goto out_enable_tasklet;
1402                 }
1403
1404                 rc = jme_setup_tx_resources(jme);
1405                 if (rc) {
1406                         pr_err("Allocating resources for TX error, Device STOPPED!\n");
1407                         goto err_out_free_rx_resources;
1408                 }
1409
1410                 jme_enable_rx_engine(jme);
1411                 jme_enable_tx_engine(jme);
1412
1413                 netif_start_queue(netdev);
1414
1415                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1416                         jme_interrupt_mode(jme);
1417
1418                 jme_start_pcc_timer(jme);
1419         } else if (jme_pseudo_hotplug_enabled(jme)) {
1420                 jme_start_shutdown_timer(jme);
1421         }
1422
1423         goto out_enable_tasklet;
1424
1425 err_out_free_rx_resources:
1426         jme_free_rx_resources(jme);
1427 out_enable_tasklet:
1428         tasklet_enable(&jme->txclean_task);
1429         tasklet_hi_enable(&jme->rxclean_task);
1430         tasklet_hi_enable(&jme->rxempty_task);
1431 out:
1432         atomic_inc(&jme->link_changing);
1433 }
1434
1435 static void
1436 jme_rx_clean_tasklet(unsigned long arg)
1437 {
1438         struct jme_adapter *jme = (struct jme_adapter *)arg;
1439         struct dynpcc_info *dpi = &(jme->dpi);
1440
1441         jme_process_receive(jme, jme->rx_ring_size);
1442         ++(dpi->intr_cnt);
1443
1444 }
1445
1446 static int
1447 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1448 {
1449         struct jme_adapter *jme = jme_napi_priv(holder);
1450         DECLARE_NETDEV
1451         int rest;
1452
1453         rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1454
1455         while (atomic_read(&jme->rx_empty) > 0) {
1456                 atomic_dec(&jme->rx_empty);
1457                 ++(NET_STAT(jme).rx_dropped);
1458                 jme_restart_rx_engine(jme);
1459         }
1460         atomic_inc(&jme->rx_empty);
1461
1462         if (rest) {
1463                 JME_RX_COMPLETE(netdev, holder);
1464                 jme_interrupt_mode(jme);
1465         }
1466
1467         JME_NAPI_WEIGHT_SET(budget, rest);
1468         return JME_NAPI_WEIGHT_VAL(budget) - rest;
1469 }
1470
1471 static void
1472 jme_rx_empty_tasklet(unsigned long arg)
1473 {
1474         struct jme_adapter *jme = (struct jme_adapter *)arg;
1475
1476         if (unlikely(atomic_read(&jme->link_changing) != 1))
1477                 return;
1478
1479         if (unlikely(!netif_carrier_ok(jme->dev)))
1480                 return;
1481
1482         netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1483
1484         jme_rx_clean_tasklet(arg);
1485
1486         while (atomic_read(&jme->rx_empty) > 0) {
1487                 atomic_dec(&jme->rx_empty);
1488                 ++(NET_STAT(jme).rx_dropped);
1489                 jme_restart_rx_engine(jme);
1490         }
1491         atomic_inc(&jme->rx_empty);
1492 }
1493
1494 static void
1495 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1496 {
1497         struct jme_ring *txring = &(jme->txring[0]);
1498
1499         smp_wmb();
1500         if (unlikely(netif_queue_stopped(jme->dev) &&
1501         atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1502                 netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n");
1503                 netif_wake_queue(jme->dev);
1504         }
1505
1506 }
1507
1508 static void
1509 jme_tx_clean_tasklet(unsigned long arg)
1510 {
1511         struct jme_adapter *jme = (struct jme_adapter *)arg;
1512         struct jme_ring *txring = &(jme->txring[0]);
1513         struct txdesc *txdesc = txring->desc;
1514         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1515         int i, j, cnt = 0, max, err, mask;
1516
1517         tx_dbg(jme, "Into txclean\n");
1518
1519         if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1520                 goto out;
1521
1522         if (unlikely(atomic_read(&jme->link_changing) != 1))
1523                 goto out;
1524
1525         if (unlikely(!netif_carrier_ok(jme->dev)))
1526                 goto out;
1527
1528         max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1529         mask = jme->tx_ring_mask;
1530
1531         for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1532
1533                 ctxbi = txbi + i;
1534
1535                 if (likely(ctxbi->skb &&
1536                 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1537
1538                         tx_dbg(jme, "txclean: %d+%d@%lu\n",
1539                                i, ctxbi->nr_desc, jiffies);
1540
1541                         err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1542
1543                         for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1544                                 ttxbi = txbi + ((i + j) & (mask));
1545                                 txdesc[(i + j) & (mask)].dw[0] = 0;
1546
1547                                 pci_unmap_page(jme->pdev,
1548                                                  ttxbi->mapping,
1549                                                  ttxbi->len,
1550                                                  PCI_DMA_TODEVICE);
1551
1552                                 ttxbi->mapping = 0;
1553                                 ttxbi->len = 0;
1554                         }
1555
1556                         dev_kfree_skb(ctxbi->skb);
1557
1558                         cnt += ctxbi->nr_desc;
1559
1560                         if (unlikely(err)) {
1561                                 ++(NET_STAT(jme).tx_carrier_errors);
1562                         } else {
1563                                 ++(NET_STAT(jme).tx_packets);
1564                                 NET_STAT(jme).tx_bytes += ctxbi->len;
1565                         }
1566
1567                         ctxbi->skb = NULL;
1568                         ctxbi->len = 0;
1569                         ctxbi->start_xmit = 0;
1570
1571                 } else {
1572                         break;
1573                 }
1574
1575                 i = (i + ctxbi->nr_desc) & mask;
1576
1577                 ctxbi->nr_desc = 0;
1578         }
1579
1580         tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies);
1581         atomic_set(&txring->next_to_clean, i);
1582         atomic_add(cnt, &txring->nr_free);
1583
1584         jme_wake_queue_if_stopped(jme);
1585
1586 out:
1587         atomic_inc(&jme->tx_cleaning);
1588 }
1589
1590 static void
1591 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1592 {
1593         /*
1594          * Disable interrupt
1595          */
1596         jwrite32f(jme, JME_IENC, INTR_ENABLE);
1597
1598         if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1599                 /*
1600                  * Link change event is critical
1601                  * all other events are ignored
1602                  */
1603                 jwrite32(jme, JME_IEVE, intrstat);
1604                 tasklet_schedule(&jme->linkch_task);
1605                 goto out_reenable;
1606         }
1607
1608         if (intrstat & INTR_TMINTR) {
1609                 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1610                 tasklet_schedule(&jme->pcc_task);
1611         }
1612
1613         if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1614                 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1615                 tasklet_schedule(&jme->txclean_task);
1616         }
1617
1618         if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1619                 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1620                                                      INTR_PCCRX0 |
1621                                                      INTR_RX0EMP)) |
1622                                         INTR_RX0);
1623         }
1624
1625         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1626                 if (intrstat & INTR_RX0EMP)
1627                         atomic_inc(&jme->rx_empty);
1628
1629                 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1630                         if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1631                                 jme_polling_mode(jme);
1632                                 JME_RX_SCHEDULE(jme);
1633                         }
1634                 }
1635         } else {
1636                 if (intrstat & INTR_RX0EMP) {
1637                         atomic_inc(&jme->rx_empty);
1638                         tasklet_hi_schedule(&jme->rxempty_task);
1639                 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1640                         tasklet_hi_schedule(&jme->rxclean_task);
1641                 }
1642         }
1643
1644 out_reenable:
1645         /*
1646          * Re-enable interrupt
1647          */
1648         jwrite32f(jme, JME_IENS, INTR_ENABLE);
1649 }
1650
1651 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1652 static irqreturn_t
1653 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1654 #else
1655 static irqreturn_t
1656 jme_intr(int irq, void *dev_id)
1657 #endif
1658 {
1659         struct net_device *netdev = dev_id;
1660         struct jme_adapter *jme = netdev_priv(netdev);
1661         u32 intrstat;
1662
1663         intrstat = jread32(jme, JME_IEVE);
1664
1665         /*
1666          * Check if it's really an interrupt for us
1667          */
1668         if (unlikely((intrstat & INTR_ENABLE) == 0))
1669                 return IRQ_NONE;
1670
1671         /*
1672          * Check if the device still exist
1673          */
1674         if (unlikely(intrstat == ~((typeof(intrstat))0)))
1675                 return IRQ_NONE;
1676
1677         jme_intr_msi(jme, intrstat);
1678
1679         return IRQ_HANDLED;
1680 }
1681
1682 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1683 static irqreturn_t
1684 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1685 #else
1686 static irqreturn_t
1687 jme_msi(int irq, void *dev_id)
1688 #endif
1689 {
1690         struct net_device *netdev = dev_id;
1691         struct jme_adapter *jme = netdev_priv(netdev);
1692         u32 intrstat;
1693
1694         intrstat = jread32(jme, JME_IEVE);
1695
1696         jme_intr_msi(jme, intrstat);
1697
1698         return IRQ_HANDLED;
1699 }
1700
1701 static void
1702 jme_reset_link(struct jme_adapter *jme)
1703 {
1704         jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1705 }
1706
1707 static void
1708 jme_restart_an(struct jme_adapter *jme)
1709 {
1710         u32 bmcr;
1711
1712         spin_lock_bh(&jme->phy_lock);
1713         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1714         bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1715         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1716         spin_unlock_bh(&jme->phy_lock);
1717 }
1718
1719 static int
1720 jme_request_irq(struct jme_adapter *jme)
1721 {
1722         int rc;
1723         struct net_device *netdev = jme->dev;
1724 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1725         irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1726         int irq_flags = SA_SHIRQ;
1727 #else
1728         irq_handler_t handler = jme_intr;
1729         int irq_flags = IRQF_SHARED;
1730 #endif
1731
1732         if (!pci_enable_msi(jme->pdev)) {
1733                 set_bit(JME_FLAG_MSI, &jme->flags);
1734                 handler = jme_msi;
1735                 irq_flags = 0;
1736         }
1737
1738         rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1739                           netdev);
1740         if (rc) {
1741                 netdev_err(netdev,
1742                            "Unable to request %s interrupt (return: %d)\n",
1743                            test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1744                            rc);
1745
1746                 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1747                         pci_disable_msi(jme->pdev);
1748                         clear_bit(JME_FLAG_MSI, &jme->flags);
1749                 }
1750         } else {
1751                 netdev->irq = jme->pdev->irq;
1752         }
1753
1754         return rc;
1755 }
1756
1757 static void
1758 jme_free_irq(struct jme_adapter *jme)
1759 {
1760         free_irq(jme->pdev->irq, jme->dev);
1761         if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1762                 pci_disable_msi(jme->pdev);
1763                 clear_bit(JME_FLAG_MSI, &jme->flags);
1764                 jme->dev->irq = jme->pdev->irq;
1765         }
1766 }
1767
1768 static inline void
1769 jme_new_phy_on(struct jme_adapter *jme)
1770 {
1771         u32 reg;
1772
1773         reg = jread32(jme, JME_PHY_PWR);
1774         reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1775                  PHY_PWR_DWN2 | PHY_PWR_CLKSEL);
1776         jwrite32(jme, JME_PHY_PWR, reg);
1777
1778         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1779         reg &= ~PE1_GPREG0_PBG;
1780         reg |= PE1_GPREG0_ENBG;
1781         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1782 }
1783
1784 static inline void
1785 jme_new_phy_off(struct jme_adapter *jme)
1786 {
1787         u32 reg;
1788
1789         reg = jread32(jme, JME_PHY_PWR);
1790         reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1791                PHY_PWR_DWN2 | PHY_PWR_CLKSEL;
1792         jwrite32(jme, JME_PHY_PWR, reg);
1793
1794         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1795         reg &= ~PE1_GPREG0_PBG;
1796         reg |= PE1_GPREG0_PDD3COLD;
1797         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1798 }
1799
1800 static inline void
1801 jme_phy_on(struct jme_adapter *jme)
1802 {
1803         u32 bmcr;
1804
1805         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1806         bmcr &= ~BMCR_PDOWN;
1807         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1808
1809         if (new_phy_power_ctrl(jme->chip_main_rev))
1810                 jme_new_phy_on(jme);
1811 }
1812
1813 static inline void
1814 jme_phy_off(struct jme_adapter *jme)
1815 {
1816         u32 bmcr;
1817
1818         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1819         bmcr |= BMCR_PDOWN;
1820         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1821
1822         if (new_phy_power_ctrl(jme->chip_main_rev))
1823                 jme_new_phy_off(jme);
1824 }
1825
1826 static int
1827 jme_phy_specreg_read(struct jme_adapter *jme, u32 specreg)
1828 {
1829         u32 phy_addr;
1830
1831         phy_addr = JM_PHY_SPEC_REG_READ | specreg;
1832         jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_ADDR_REG,
1833                         phy_addr);
1834         return jme_mdio_read(jme->dev, jme->mii_if.phy_id,
1835                         JM_PHY_SPEC_DATA_REG);
1836 }
1837
1838 static void
1839 jme_phy_specreg_write(struct jme_adapter *jme, u32 ext_reg, u32 phy_data)
1840 {
1841         u32 phy_addr;
1842
1843         phy_addr = JM_PHY_SPEC_REG_WRITE | ext_reg;
1844         jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_DATA_REG,
1845                         phy_data);
1846         jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_ADDR_REG,
1847                         phy_addr);
1848 }
1849
1850 static int
1851 jme_phy_calibration(struct jme_adapter *jme)
1852 {
1853         u32 ctrl1000, phy_data;
1854
1855         jme_phy_off(jme);
1856         jme_phy_on(jme);
1857         /*  Enabel PHY test mode 1 */
1858         ctrl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
1859         ctrl1000 &= ~PHY_GAD_TEST_MODE_MSK;
1860         ctrl1000 |= PHY_GAD_TEST_MODE_1;
1861         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, ctrl1000);
1862
1863         phy_data = jme_phy_specreg_read(jme, JM_PHY_EXT_COMM_2_REG);
1864         phy_data &= ~JM_PHY_EXT_COMM_2_CALI_MODE_0;
1865         phy_data |= JM_PHY_EXT_COMM_2_CALI_LATCH |
1866                         JM_PHY_EXT_COMM_2_CALI_ENABLE;
1867         jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_2_REG, phy_data);
1868         msleep(20);
1869         phy_data = jme_phy_specreg_read(jme, JM_PHY_EXT_COMM_2_REG);
1870         phy_data &= ~(JM_PHY_EXT_COMM_2_CALI_ENABLE |
1871                         JM_PHY_EXT_COMM_2_CALI_MODE_0 |
1872                         JM_PHY_EXT_COMM_2_CALI_LATCH);
1873         jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_2_REG, phy_data);
1874
1875         /*  Disable PHY test mode */
1876         ctrl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
1877         ctrl1000 &= ~PHY_GAD_TEST_MODE_MSK;
1878         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, ctrl1000);
1879         return 0;
1880 }
1881
1882 static int
1883 jme_phy_setEA(struct jme_adapter *jme)
1884 {
1885         u32 phy_comm0 = 0, phy_comm1 = 0;
1886         u8 nic_ctrl;
1887
1888         pci_read_config_byte(jme->pdev, PCI_PRIV_SHARE_NICCTRL, &nic_ctrl);
1889         if ((nic_ctrl & 0x3) == JME_FLAG_PHYEA_ENABLE)
1890                 return 0;
1891
1892         switch (jme->pdev->device) {
1893         case PCI_DEVICE_ID_JMICRON_JMC250:
1894                 if (((jme->chip_main_rev == 5) &&
1895                         ((jme->chip_sub_rev == 0) || (jme->chip_sub_rev == 1) ||
1896                         (jme->chip_sub_rev == 3))) ||
1897                         (jme->chip_main_rev >= 6)) {
1898                         phy_comm0 = 0x008A;
1899                         phy_comm1 = 0x4109;
1900                 }
1901                 if ((jme->chip_main_rev == 3) &&
1902                         ((jme->chip_sub_rev == 1) || (jme->chip_sub_rev == 2)))
1903                         phy_comm0 = 0xE088;
1904                 break;
1905         case PCI_DEVICE_ID_JMICRON_JMC260:
1906                 if (((jme->chip_main_rev == 5) &&
1907                         ((jme->chip_sub_rev == 0) || (jme->chip_sub_rev == 1) ||
1908                         (jme->chip_sub_rev == 3))) ||
1909                         (jme->chip_main_rev >= 6)) {
1910                         phy_comm0 = 0x008A;
1911                         phy_comm1 = 0x4109;
1912                 }
1913                 if ((jme->chip_main_rev == 3) &&
1914                         ((jme->chip_sub_rev == 1) || (jme->chip_sub_rev == 2)))
1915                         phy_comm0 = 0xE088;
1916                 if ((jme->chip_main_rev == 2) && (jme->chip_sub_rev == 0))
1917                         phy_comm0 = 0x608A;
1918                 if ((jme->chip_main_rev == 2) && (jme->chip_sub_rev == 2))
1919                         phy_comm0 = 0x408A;
1920                 break;
1921         default:
1922                 return -ENODEV;
1923         }
1924         if (phy_comm0)
1925                 jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_0_REG, phy_comm0);
1926         if (phy_comm1)
1927                 jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_1_REG, phy_comm1);
1928
1929         return 0;
1930 }
1931
1932 static int
1933 jme_open(struct net_device *netdev)
1934 {
1935         struct jme_adapter *jme = netdev_priv(netdev);
1936         int rc;
1937
1938         jme_clear_pm(jme);
1939         JME_NAPI_ENABLE(jme);
1940
1941         tasklet_enable(&jme->linkch_task);
1942         tasklet_enable(&jme->txclean_task);
1943         tasklet_hi_enable(&jme->rxclean_task);
1944         tasklet_hi_enable(&jme->rxempty_task);
1945
1946         rc = jme_request_irq(jme);
1947         if (rc)
1948                 goto err_out;
1949
1950         jme_start_irq(jme);
1951
1952         jme_phy_on(jme);
1953         if (test_bit(JME_FLAG_SSET, &jme->flags))
1954                 jme_set_settings(netdev, &jme->old_ecmd);
1955         else
1956                 jme_reset_phy_processor(jme);
1957         jme_phy_calibration(jme);
1958         jme_phy_setEA(jme);
1959         jme_reset_link(jme);
1960
1961         return 0;
1962
1963 err_out:
1964         netif_stop_queue(netdev);
1965         netif_carrier_off(netdev);
1966         return rc;
1967 }
1968
1969 static void
1970 jme_set_100m_half(struct jme_adapter *jme)
1971 {
1972         u32 bmcr, tmp;
1973
1974         jme_phy_on(jme);
1975         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1976         tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1977                        BMCR_SPEED1000 | BMCR_FULLDPLX);
1978         tmp |= BMCR_SPEED100;
1979
1980         if (bmcr != tmp)
1981                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1982
1983         if (jme->fpgaver)
1984                 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1985         else
1986                 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1987 }
1988
1989 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1990 static void
1991 jme_wait_link(struct jme_adapter *jme)
1992 {
1993         u32 phylink, to = JME_WAIT_LINK_TIME;
1994
1995         mdelay(1000);
1996         phylink = jme_linkstat_from_phy(jme);
1997         while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1998                 mdelay(10);
1999                 phylink = jme_linkstat_from_phy(jme);
2000         }
2001 }
2002
2003 static void
2004 jme_powersave_phy(struct jme_adapter *jme)
2005 {
2006         if (jme->reg_pmcs) {
2007                 jme_set_100m_half(jme);
2008                 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2009                         jme_wait_link(jme);
2010                 jme_clear_pm(jme);
2011         } else {
2012                 jme_phy_off(jme);
2013         }
2014 }
2015
2016 static int
2017 jme_close(struct net_device *netdev)
2018 {
2019         struct jme_adapter *jme = netdev_priv(netdev);
2020
2021         netif_stop_queue(netdev);
2022         netif_carrier_off(netdev);
2023
2024         jme_stop_irq(jme);
2025         jme_free_irq(jme);
2026
2027         JME_NAPI_DISABLE(jme);
2028
2029         tasklet_disable(&jme->linkch_task);
2030         tasklet_disable(&jme->txclean_task);
2031         tasklet_disable(&jme->rxclean_task);
2032         tasklet_disable(&jme->rxempty_task);
2033
2034         jme_disable_rx_engine(jme);
2035         jme_disable_tx_engine(jme);
2036         jme_reset_mac_processor(jme);
2037         jme_free_rx_resources(jme);
2038         jme_free_tx_resources(jme);
2039         jme->phylink = 0;
2040         jme_phy_off(jme);
2041
2042         return 0;
2043 }
2044
2045 static int
2046 jme_alloc_txdesc(struct jme_adapter *jme,
2047                         struct sk_buff *skb)
2048 {
2049         struct jme_ring *txring = &(jme->txring[0]);
2050         int idx, nr_alloc, mask = jme->tx_ring_mask;
2051
2052         idx = txring->next_to_use;
2053         nr_alloc = skb_shinfo(skb)->nr_frags + 2;
2054
2055         if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
2056                 return -1;
2057
2058         atomic_sub(nr_alloc, &txring->nr_free);
2059
2060         txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
2061
2062         return idx;
2063 }
2064
2065 static void
2066 jme_fill_tx_map(struct pci_dev *pdev,
2067                 struct txdesc *txdesc,
2068                 struct jme_buffer_info *txbi,
2069                 struct page *page,
2070                 u32 page_offset,
2071                 u32 len,
2072 #ifdef __NO_BOOL__
2073                 u8 hidma
2074 #else
2075                 bool hidma
2076 #endif
2077                 )
2078 {
2079         dma_addr_t dmaaddr;
2080
2081         dmaaddr = pci_map_page(pdev,
2082                                 page,
2083                                 page_offset,
2084                                 len,
2085                                 PCI_DMA_TODEVICE);
2086
2087         pci_dma_sync_single_for_device(pdev,
2088                                        dmaaddr,
2089                                        len,
2090                                        PCI_DMA_TODEVICE);
2091
2092         txdesc->dw[0] = 0;
2093         txdesc->dw[1] = 0;
2094         txdesc->desc2.flags     = TXFLAG_OWN;
2095         txdesc->desc2.flags     |= (hidma) ? TXFLAG_64BIT : 0;
2096         txdesc->desc2.datalen   = cpu_to_le16(len);
2097         txdesc->desc2.bufaddrh  = cpu_to_le32((__u64)dmaaddr >> 32);
2098         txdesc->desc2.bufaddrl  = cpu_to_le32(
2099                                         (__u64)dmaaddr & 0xFFFFFFFFUL);
2100
2101         txbi->mapping = dmaaddr;
2102         txbi->len = len;
2103 }
2104
2105 static void
2106 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
2107 {
2108         struct jme_ring *txring = &(jme->txring[0]);
2109         struct txdesc *txdesc = txring->desc, *ctxdesc;
2110         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
2111 #ifdef __NO_BOOL__
2112         u8 hidma = !!(jme->dev->features & NETIF_F_HIGHDMA);
2113 #else
2114         bool hidma = jme->dev->features & NETIF_F_HIGHDMA;
2115 #endif
2116         int i, nr_frags = skb_shinfo(skb)->nr_frags;
2117         int mask = jme->tx_ring_mask;
2118         const struct skb_frag_struct *frag;
2119         u32 len;
2120
2121         for (i = 0 ; i < nr_frags ; ++i) {
2122                 frag = &skb_shinfo(skb)->frags[i];
2123                 ctxdesc = txdesc + ((idx + i + 2) & (mask));
2124                 ctxbi = txbi + ((idx + i + 2) & (mask));
2125
2126 #ifndef __USE_SKB_FRAG_API__
2127                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
2128                                  frag->page_offset, frag->size, hidma);
2129 #else
2130                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi,
2131                                 skb_frag_page(frag),
2132                                 frag->page_offset, skb_frag_size(frag), hidma);
2133 #endif
2134         }
2135
2136         len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
2137         ctxdesc = txdesc + ((idx + 1) & (mask));
2138         ctxbi = txbi + ((idx + 1) & (mask));
2139         jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
2140                         offset_in_page(skb->data), len, hidma);
2141
2142 }
2143
2144 static int
2145 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
2146 {
2147         if (unlikely(
2148 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
2149         skb_shinfo(skb)->tso_size
2150 #else
2151         skb_shinfo(skb)->gso_size
2152 #endif
2153                         && skb_header_cloned(skb) &&
2154                         pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
2155                 dev_kfree_skb(skb);
2156                 return -1;
2157         }
2158
2159         return 0;
2160 }
2161
2162 static int
2163 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
2164 {
2165 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
2166         *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
2167 #else
2168         *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
2169 #endif
2170         if (*mss) {
2171                 *flags |= TXFLAG_LSEN;
2172
2173                 if (skb->protocol == htons(ETH_P_IP)) {
2174                         struct iphdr *iph = ip_hdr(skb);
2175
2176                         iph->check = 0;
2177                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2178                                                                 iph->daddr, 0,
2179                                                                 IPPROTO_TCP,
2180                                                                 0);
2181                 } else {
2182                         struct ipv6hdr *ip6h = ipv6_hdr(skb);
2183
2184                         tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
2185                                                                 &ip6h->daddr, 0,
2186                                                                 IPPROTO_TCP,
2187                                                                 0);
2188                 }
2189
2190                 return 0;
2191         }
2192
2193         return 1;
2194 }
2195
2196 static void
2197 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
2198 {
2199 #ifdef CHECKSUM_PARTIAL
2200         if (skb->ip_summed == CHECKSUM_PARTIAL)
2201 #else
2202         if (skb->ip_summed == CHECKSUM_HW)
2203 #endif
2204         {
2205                 u8 ip_proto;
2206
2207 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2208                 if (skb->protocol == htons(ETH_P_IP))
2209                         ip_proto = ip_hdr(skb)->protocol;
2210                 else if (skb->protocol == htons(ETH_P_IPV6))
2211                         ip_proto = ipv6_hdr(skb)->nexthdr;
2212                 else
2213                         ip_proto = 0;
2214 #else
2215                 switch (skb->protocol) {
2216                 case htons(ETH_P_IP):
2217                         ip_proto = ip_hdr(skb)->protocol;
2218                         break;
2219                 case htons(ETH_P_IPV6):
2220                         ip_proto = ipv6_hdr(skb)->nexthdr;
2221                         break;
2222                 default:
2223                         ip_proto = 0;
2224                         break;
2225                 }
2226 #endif
2227
2228                 switch (ip_proto) {
2229                 case IPPROTO_TCP:
2230                         *flags |= TXFLAG_TCPCS;
2231                         break;
2232                 case IPPROTO_UDP:
2233                         *flags |= TXFLAG_UDPCS;
2234                         break;
2235                 default:
2236                         netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n");
2237                         break;
2238                 }
2239         }
2240 }
2241
2242 static inline void
2243 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
2244 {
2245         if (vlan_tx_tag_present(skb)) {
2246                 *flags |= TXFLAG_TAGON;
2247                 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2248         }
2249 }
2250
2251 static int
2252 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
2253 {
2254         struct jme_ring *txring = &(jme->txring[0]);
2255         struct txdesc *txdesc;
2256         struct jme_buffer_info *txbi;
2257         u8 flags;
2258
2259         txdesc = (struct txdesc *)txring->desc + idx;
2260         txbi = txring->bufinf + idx;
2261
2262         txdesc->dw[0] = 0;
2263         txdesc->dw[1] = 0;
2264         txdesc->dw[2] = 0;
2265         txdesc->dw[3] = 0;
2266         txdesc->desc1.pktsize = cpu_to_le16(skb->len);
2267         /*
2268          * Set OWN bit at final.
2269          * When kernel transmit faster than NIC.
2270          * And NIC trying to send this descriptor before we tell
2271          * it to start sending this TX queue.
2272          * Other fields are already filled correctly.
2273          */
2274         wmb();
2275         flags = TXFLAG_OWN | TXFLAG_INT;
2276         /*
2277          * Set checksum flags while not tso
2278          */
2279         if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
2280                 jme_tx_csum(jme, skb, &flags);
2281         jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
2282         jme_map_tx_skb(jme, skb, idx);
2283         txdesc->desc1.flags = flags;
2284         /*
2285          * Set tx buffer info after telling NIC to send
2286          * For better tx_clean timing
2287          */
2288         wmb();
2289         txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
2290         txbi->skb = skb;
2291         txbi->len = skb->len;
2292         txbi->start_xmit = jiffies;
2293         if (!txbi->start_xmit)
2294                 txbi->start_xmit = (0UL-1);
2295
2296         return 0;
2297 }
2298
2299 static void
2300 jme_stop_queue_if_full(struct jme_adapter *jme)
2301 {
2302         struct jme_ring *txring = &(jme->txring[0]);
2303         struct jme_buffer_info *txbi = txring->bufinf;
2304         int idx = atomic_read(&txring->next_to_clean);
2305
2306         txbi += idx;
2307
2308         smp_wmb();
2309         if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2310                 netif_stop_queue(jme->dev);
2311                 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n");
2312                 smp_wmb();
2313                 if (atomic_read(&txring->nr_free)
2314                         >= (jme->tx_wake_threshold)) {
2315                         netif_wake_queue(jme->dev);
2316                         netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n");
2317                 }
2318         }
2319
2320         if (unlikely(txbi->start_xmit &&
2321                         (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2322                         txbi->skb)) {
2323                 netif_stop_queue(jme->dev);
2324                 netif_info(jme, tx_queued, jme->dev,
2325                            "TX Queue Stopped %d@%lu\n", idx, jiffies);
2326         }
2327 }
2328
2329 /*
2330  * This function is already protected by netif_tx_lock()
2331  */
2332
2333 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2334 static int
2335 #else
2336 static netdev_tx_t
2337 #endif
2338 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2339 {
2340         struct jme_adapter *jme = netdev_priv(netdev);
2341         int idx;
2342
2343         if (unlikely(jme_expand_header(jme, skb))) {
2344                 ++(NET_STAT(jme).tx_dropped);
2345                 return NETDEV_TX_OK;
2346         }
2347
2348         idx = jme_alloc_txdesc(jme, skb);
2349
2350         if (unlikely(idx < 0)) {
2351                 netif_stop_queue(netdev);
2352                 netif_err(jme, tx_err, jme->dev,
2353                           "BUG! Tx ring full when queue awake!\n");
2354
2355                 return NETDEV_TX_BUSY;
2356         }
2357
2358         jme_fill_tx_desc(jme, skb, idx);
2359
2360         jwrite32(jme, JME_TXCS, jme->reg_txcs |
2361                                 TXCS_SELECT_QUEUE0 |
2362                                 TXCS_QUEUE0S |
2363                                 TXCS_ENABLE);
2364 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2365         netdev->trans_start = jiffies;
2366 #endif
2367
2368         tx_dbg(jme, "xmit: %d+%d@%lu\n",
2369                idx, skb_shinfo(skb)->nr_frags + 2, jiffies);
2370         jme_stop_queue_if_full(jme);
2371
2372         return NETDEV_TX_OK;
2373 }
2374
2375 static void
2376 jme_set_unicastaddr(struct net_device *netdev)
2377 {
2378         struct jme_adapter *jme = netdev_priv(netdev);
2379         u32 val;
2380
2381         val = (netdev->dev_addr[3] & 0xff) << 24 |
2382               (netdev->dev_addr[2] & 0xff) << 16 |
2383               (netdev->dev_addr[1] & 0xff) <<  8 |
2384               (netdev->dev_addr[0] & 0xff);
2385         jwrite32(jme, JME_RXUMA_LO, val);
2386         val = (netdev->dev_addr[5] & 0xff) << 8 |
2387               (netdev->dev_addr[4] & 0xff);
2388         jwrite32(jme, JME_RXUMA_HI, val);
2389 }
2390
2391 static int
2392 jme_set_macaddr(struct net_device *netdev, void *p)
2393 {
2394         struct jme_adapter *jme = netdev_priv(netdev);
2395         struct sockaddr *addr = p;
2396
2397         if (netif_running(netdev))
2398                 return -EBUSY;
2399
2400         spin_lock_bh(&jme->macaddr_lock);
2401         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2402         jme_set_unicastaddr(netdev);
2403         spin_unlock_bh(&jme->macaddr_lock);
2404
2405         return 0;
2406 }
2407
2408 static void
2409 jme_set_multi(struct net_device *netdev)
2410 {
2411         struct jme_adapter *jme = netdev_priv(netdev);
2412         u32 mc_hash[2] = {};
2413 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2414         int i;
2415 #endif
2416
2417         spin_lock_bh(&jme->rxmcs_lock);
2418
2419         jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2420
2421         if (netdev->flags & IFF_PROMISC) {
2422                 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2423         } else if (netdev->flags & IFF_ALLMULTI) {
2424                 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2425         } else if (netdev->flags & IFF_MULTICAST) {
2426 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2427                 struct dev_mc_list *mclist;
2428 #else
2429                 struct netdev_hw_addr *ha;
2430 #endif
2431                 int bit_nr;
2432
2433                 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2434 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2435                 for (i = 0, mclist = netdev->mc_list;
2436                         mclist && i < netdev->mc_count;
2437                         ++i, mclist = mclist->next) {
2438 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2439                 netdev_for_each_mc_addr(mclist, netdev) {
2440 #else
2441                 netdev_for_each_mc_addr(ha, netdev) {
2442 #endif
2443 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2444                         bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2445 #else
2446                         bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2447 #endif
2448                         mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2449                 }
2450
2451                 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2452                 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2453         }
2454
2455         wmb();
2456         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2457
2458         spin_unlock_bh(&jme->rxmcs_lock);
2459 }
2460
2461 static int
2462 jme_change_mtu(struct net_device *netdev, int new_mtu)
2463 {
2464         struct jme_adapter *jme = netdev_priv(netdev);
2465
2466         if (new_mtu == jme->old_mtu)
2467                 return 0;
2468
2469         if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2470                 ((new_mtu) < IPV6_MIN_MTU))
2471                 return -EINVAL;
2472
2473
2474 #ifndef __USE_NDO_FIX_FEATURES__
2475         if (new_mtu > 1900) {
2476                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2477                                 NETIF_F_TSO | NETIF_F_TSO6);
2478         } else {
2479                 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2480                         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2481                 if (test_bit(JME_FLAG_TSO, &jme->flags))
2482                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2483         }
2484 #endif
2485
2486         netdev->mtu = new_mtu;
2487 #ifdef __USE_NDO_FIX_FEATURES__
2488         netdev_update_features(netdev);
2489 #endif
2490
2491         jme_restart_rx_engine(jme);
2492         jme_reset_link(jme);
2493
2494         return 0;
2495 }
2496
2497 static void
2498 jme_tx_timeout(struct net_device *netdev)
2499 {
2500         struct jme_adapter *jme = netdev_priv(netdev);
2501
2502         jme->phylink = 0;
2503         jme_reset_phy_processor(jme);
2504         if (test_bit(JME_FLAG_SSET, &jme->flags))
2505                 jme_set_settings(netdev, &jme->old_ecmd);
2506
2507         /*
2508          * Force to Reset the link again
2509          */
2510         jme_reset_link(jme);
2511 }
2512
2513 static inline void jme_pause_rx(struct jme_adapter *jme)
2514 {
2515         atomic_dec(&jme->link_changing);
2516
2517         jme_set_rx_pcc(jme, PCC_OFF);
2518         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2519                 JME_NAPI_DISABLE(jme);
2520         } else {
2521                 tasklet_disable(&jme->rxclean_task);
2522                 tasklet_disable(&jme->rxempty_task);
2523         }
2524 }
2525
2526 static inline void jme_resume_rx(struct jme_adapter *jme)
2527 {
2528         struct dynpcc_info *dpi = &(jme->dpi);
2529
2530         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2531                 JME_NAPI_ENABLE(jme);
2532         } else {
2533                 tasklet_hi_enable(&jme->rxclean_task);
2534                 tasklet_hi_enable(&jme->rxempty_task);
2535         }
2536         dpi->cur                = PCC_P1;
2537         dpi->attempt            = PCC_P1;
2538         dpi->cnt                = 0;
2539         jme_set_rx_pcc(jme, PCC_P1);
2540
2541         atomic_inc(&jme->link_changing);
2542 }
2543
2544 #ifndef __UNIFY_VLAN_RX_PATH__
2545 static void
2546 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2547 {
2548         struct jme_adapter *jme = netdev_priv(netdev);
2549
2550         jme_pause_rx(jme);
2551         jme->vlgrp = grp;
2552         jme_resume_rx(jme);
2553 }
2554 #endif
2555
2556 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2557 static void
2558 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2559 {
2560         struct jme_adapter *jme = netdev_priv(netdev);
2561
2562         if(jme->vlgrp) {
2563                 jme_pause_rx(jme);
2564 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2565                 jme->vlgrp->vlan_devices[vid] = NULL;
2566 #else
2567                 vlan_group_set_device(jme->vlgrp, vid, NULL);
2568 #endif
2569                 jme_resume_rx(jme);
2570         }
2571 }
2572 #endif
2573
2574 static void
2575 jme_get_drvinfo(struct net_device *netdev,
2576                      struct ethtool_drvinfo *info)
2577 {
2578         struct jme_adapter *jme = netdev_priv(netdev);
2579
2580         strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
2581         strlcpy(info->version, DRV_VERSION, sizeof(info->version));
2582         strlcpy(info->bus_info, pci_name(jme->pdev), sizeof(info->bus_info));
2583 }
2584
2585 static int
2586 jme_get_regs_len(struct net_device *netdev)
2587 {
2588         return JME_REG_LEN;
2589 }
2590
2591 static void
2592 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2593 {
2594         int i;
2595
2596         for (i = 0 ; i < len ; i += 4)
2597                 p[i >> 2] = jread32(jme, reg + i);
2598 }
2599
2600 static void
2601 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2602 {
2603         int i;
2604         u16 *p16 = (u16 *)p;
2605
2606         for (i = 0 ; i < reg_nr ; ++i)
2607                 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2608 }
2609
2610 static void
2611 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2612 {
2613         struct jme_adapter *jme = netdev_priv(netdev);
2614         u32 *p32 = (u32 *)p;
2615
2616         memset(p, 0xFF, JME_REG_LEN);
2617
2618         regs->version = 1;
2619         mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2620
2621         p32 += 0x100 >> 2;
2622         mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2623
2624         p32 += 0x100 >> 2;
2625         mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2626
2627         p32 += 0x100 >> 2;
2628         mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2629
2630         p32 += 0x100 >> 2;
2631         mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2632 }
2633
2634 static int
2635 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2636 {
2637         struct jme_adapter *jme = netdev_priv(netdev);
2638
2639         ecmd->tx_coalesce_usecs = PCC_TX_TO;
2640         ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2641
2642         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2643                 ecmd->use_adaptive_rx_coalesce = false;
2644                 ecmd->rx_coalesce_usecs = 0;
2645                 ecmd->rx_max_coalesced_frames = 0;
2646                 return 0;
2647         }
2648
2649         ecmd->use_adaptive_rx_coalesce = true;
2650
2651         switch (jme->dpi.cur) {
2652         case PCC_P1:
2653                 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2654                 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2655                 break;
2656         case PCC_P2:
2657                 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2658                 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2659                 break;
2660         case PCC_P3:
2661                 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2662                 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2663                 break;
2664         default:
2665                 break;
2666         }
2667
2668         return 0;
2669 }
2670
2671 static int
2672 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2673 {
2674         struct jme_adapter *jme = netdev_priv(netdev);
2675         struct dynpcc_info *dpi = &(jme->dpi);
2676
2677         if (netif_running(netdev))
2678                 return -EBUSY;
2679
2680         if (ecmd->use_adaptive_rx_coalesce &&
2681             test_bit(JME_FLAG_POLL, &jme->flags)) {
2682                 clear_bit(JME_FLAG_POLL, &jme->flags);
2683                 jme->jme_rx = netif_rx;
2684 #ifndef __UNIFY_VLAN_RX_PATH__
2685                 jme->jme_vlan_rx = vlan_hwaccel_rx;
2686 #endif
2687                 dpi->cur                = PCC_P1;
2688                 dpi->attempt            = PCC_P1;
2689                 dpi->cnt                = 0;
2690                 jme_set_rx_pcc(jme, PCC_P1);
2691                 jme_interrupt_mode(jme);
2692         } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2693                    !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2694                 set_bit(JME_FLAG_POLL, &jme->flags);
2695                 jme->jme_rx = netif_receive_skb;
2696 #ifndef __UNIFY_VLAN_RX_PATH__
2697                 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2698 #endif
2699                 jme_interrupt_mode(jme);
2700         }
2701
2702         return 0;
2703 }
2704
2705 static void
2706 jme_get_pauseparam(struct net_device *netdev,
2707                         struct ethtool_pauseparam *ecmd)
2708 {
2709         struct jme_adapter *jme = netdev_priv(netdev);
2710         u32 val;
2711
2712         ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2713         ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2714
2715         spin_lock_bh(&jme->phy_lock);
2716         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2717         spin_unlock_bh(&jme->phy_lock);
2718
2719         ecmd->autoneg =
2720                 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2721 }
2722
2723 static int
2724 jme_set_pauseparam(struct net_device *netdev,
2725                         struct ethtool_pauseparam *ecmd)
2726 {
2727         struct jme_adapter *jme = netdev_priv(netdev);
2728         u32 val;
2729
2730         if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2731                 (ecmd->tx_pause != 0)) {
2732
2733                 if (ecmd->tx_pause)
2734                         jme->reg_txpfc |= TXPFC_PF_EN;
2735                 else
2736                         jme->reg_txpfc &= ~TXPFC_PF_EN;
2737
2738                 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2739         }
2740
2741         spin_lock_bh(&jme->rxmcs_lock);
2742         if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2743                 (ecmd->rx_pause != 0)) {
2744
2745                 if (ecmd->rx_pause)
2746                         jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2747                 else
2748                         jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2749
2750                 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2751         }
2752         spin_unlock_bh(&jme->rxmcs_lock);
2753
2754         spin_lock_bh(&jme->phy_lock);
2755         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2756         if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2757                 (ecmd->autoneg != 0)) {
2758
2759                 if (ecmd->autoneg)
2760                         val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2761                 else
2762                         val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2763
2764                 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2765                                 MII_ADVERTISE, val);
2766         }
2767         spin_unlock_bh(&jme->phy_lock);
2768
2769         return 0;
2770 }
2771
2772 static void
2773 jme_get_wol(struct net_device *netdev,
2774                 struct ethtool_wolinfo *wol)
2775 {
2776         struct jme_adapter *jme = netdev_priv(netdev);
2777
2778         wol->supported = WAKE_MAGIC | WAKE_PHY;
2779
2780         wol->wolopts = 0;
2781
2782         if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2783                 wol->wolopts |= WAKE_PHY;
2784
2785         if (jme->reg_pmcs & PMCS_MFEN)
2786                 wol->wolopts |= WAKE_MAGIC;
2787
2788 }
2789
2790 static int
2791 jme_set_wol(struct net_device *netdev,
2792                 struct ethtool_wolinfo *wol)
2793 {
2794         struct jme_adapter *jme = netdev_priv(netdev);
2795
2796         if (wol->wolopts & (WAKE_MAGICSECURE |
2797                                 WAKE_UCAST |
2798                                 WAKE_MCAST |
2799                                 WAKE_BCAST |
2800                                 WAKE_ARP))
2801                 return -EOPNOTSUPP;
2802
2803         jme->reg_pmcs = 0;
2804
2805         if (wol->wolopts & WAKE_PHY)
2806                 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2807
2808         if (wol->wolopts & WAKE_MAGIC)
2809                 jme->reg_pmcs |= PMCS_MFEN;
2810
2811         jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2812 #ifndef JME_NEW_PM_API
2813         jme_pci_wakeup_enable(jme, !!(jme->reg_pmcs));
2814 #endif
2815 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
2816         device_set_wakeup_enable(&jme->pdev->dev, !!(jme->reg_pmcs));
2817 #endif
2818
2819         return 0;
2820 }
2821
2822 static int
2823 jme_get_settings(struct net_device *netdev,
2824                      struct ethtool_cmd *ecmd)
2825 {
2826         struct jme_adapter *jme = netdev_priv(netdev);
2827         int rc;
2828
2829         spin_lock_bh(&jme->phy_lock);
2830         rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2831         spin_unlock_bh(&jme->phy_lock);
2832         return rc;
2833 }
2834
2835 static int
2836 jme_set_settings(struct net_device *netdev,
2837                      struct ethtool_cmd *ecmd)
2838 {
2839         struct jme_adapter *jme = netdev_priv(netdev);
2840         int rc, fdc = 0;
2841
2842         if (ethtool_cmd_speed(ecmd) == SPEED_1000
2843             && ecmd->autoneg != AUTONEG_ENABLE)
2844                 return -EINVAL;
2845
2846         /*
2847          * Check If user changed duplex only while force_media.
2848          * Hardware would not generate link change interrupt.
2849          */
2850         if (jme->mii_if.force_media &&
2851         ecmd->autoneg != AUTONEG_ENABLE &&
2852         (jme->mii_if.full_duplex != ecmd->duplex))
2853                 fdc = 1;
2854
2855         spin_lock_bh(&jme->phy_lock);
2856         rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2857         spin_unlock_bh(&jme->phy_lock);
2858
2859         if (!rc) {
2860                 if (fdc)
2861                         jme_reset_link(jme);
2862                 jme->old_ecmd = *ecmd;
2863                 set_bit(JME_FLAG_SSET, &jme->flags);
2864         }
2865
2866         return rc;
2867 }
2868
2869 static int
2870 jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
2871 {
2872         int rc;
2873         struct jme_adapter *jme = netdev_priv(netdev);
2874         struct mii_ioctl_data *mii_data = if_mii(rq);
2875         unsigned int duplex_chg;
2876
2877         if (cmd == SIOCSMIIREG) {
2878                 u16 val = mii_data->val_in;
2879                 if (!(val & (BMCR_RESET|BMCR_ANENABLE)) &&
2880                     (val & BMCR_SPEED1000))
2881                         return -EINVAL;
2882         }
2883
2884         spin_lock_bh(&jme->phy_lock);
2885         rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg);
2886         spin_unlock_bh(&jme->phy_lock);
2887
2888         if (!rc && (cmd == SIOCSMIIREG)) {
2889                 if (duplex_chg)
2890                         jme_reset_link(jme);
2891                 jme_get_settings(netdev, &jme->old_ecmd);
2892                 set_bit(JME_FLAG_SSET, &jme->flags);
2893         }
2894
2895         return rc;
2896 }
2897
2898 static u32
2899 jme_get_link(struct net_device *netdev)
2900 {
2901         struct jme_adapter *jme = netdev_priv(netdev);
2902         return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2903 }
2904
2905 static u32
2906 jme_get_msglevel(struct net_device *netdev)
2907 {
2908         struct jme_adapter *jme = netdev_priv(netdev);
2909         return jme->msg_enable;
2910 }
2911
2912 static void
2913 jme_set_msglevel(struct net_device *netdev, u32 value)
2914 {
2915         struct jme_adapter *jme = netdev_priv(netdev);
2916         jme->msg_enable = value;
2917 }
2918
2919 #ifndef __USE_NDO_FIX_FEATURES__
2920 static u32
2921 jme_get_rx_csum(struct net_device *netdev)
2922 {
2923         struct jme_adapter *jme = netdev_priv(netdev);
2924         return jme->reg_rxmcs & RXMCS_CHECKSUM;
2925 }
2926
2927 static int
2928 jme_set_rx_csum(struct net_device *netdev, u32 on)
2929 {
2930         struct jme_adapter *jme = netdev_priv(netdev);
2931
2932         spin_lock_bh(&jme->rxmcs_lock);
2933         if (on)
2934                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2935         else
2936                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2937         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2938         spin_unlock_bh(&jme->rxmcs_lock);
2939
2940         return 0;
2941 }
2942
2943 static int
2944 jme_set_tx_csum(struct net_device *netdev, u32 on)
2945 {
2946         struct jme_adapter *jme = netdev_priv(netdev);
2947
2948         if (on) {
2949                 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2950                 if (netdev->mtu <= 1900)
2951                         netdev->features |=
2952                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2953         } else {
2954                 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2955                 netdev->features &=
2956                                 ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
2957         }
2958
2959         return 0;
2960 }
2961
2962 static int
2963 jme_set_tso(struct net_device *netdev, u32 on)
2964 {
2965         struct jme_adapter *jme = netdev_priv(netdev);
2966
2967         if (on) {
2968                 set_bit(JME_FLAG_TSO, &jme->flags);
2969                 if (netdev->mtu <= 1900)
2970                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2971         } else {
2972                 clear_bit(JME_FLAG_TSO, &jme->flags);
2973                 netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
2974         }
2975
2976         return 0;
2977 }
2978 #else
2979 #ifndef __NEW_FIX_FEATURES_TYPE__
2980 static u32
2981 jme_fix_features(struct net_device *netdev, u32 features)
2982 #else
2983 static netdev_features_t
2984 jme_fix_features(struct net_device *netdev, netdev_features_t features)
2985 #endif
2986 {
2987         if (netdev->mtu > 1900)
2988                 features &= ~(NETIF_F_ALL_TSO | NETIF_F_ALL_CSUM);
2989         return features;
2990 }
2991
2992 static int
2993 #ifndef __NEW_FIX_FEATURES_TYPE__
2994 jme_set_features(struct net_device *netdev, u32 features)
2995 #else
2996 jme_set_features(struct net_device *netdev, netdev_features_t features)
2997 #endif
2998 {
2999         struct jme_adapter *jme = netdev_priv(netdev);
3000
3001         spin_lock_bh(&jme->rxmcs_lock);
3002         if (features & NETIF_F_RXCSUM)
3003                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
3004         else
3005                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
3006         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
3007         spin_unlock_bh(&jme->rxmcs_lock);
3008
3009         return 0;
3010 }
3011 #endif
3012
3013 static int
3014 jme_nway_reset(struct net_device *netdev)
3015 {
3016         struct jme_adapter *jme = netdev_priv(netdev);
3017         jme_restart_an(jme);
3018         return 0;
3019 }
3020
3021 static u8
3022 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
3023 {
3024         u32 val;
3025         int to;
3026
3027         val = jread32(jme, JME_SMBCSR);
3028         to = JME_SMB_BUSY_TIMEOUT;
3029         while ((val & SMBCSR_BUSY) && --to) {
3030                 msleep(1);
3031                 val = jread32(jme, JME_SMBCSR);
3032         }
3033         if (!to) {
3034                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
3035                 return 0xFF;
3036         }
3037
3038         jwrite32(jme, JME_SMBINTF,
3039                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
3040                 SMBINTF_HWRWN_READ |
3041                 SMBINTF_HWCMD);
3042
3043         val = jread32(jme, JME_SMBINTF);
3044         to = JME_SMB_BUSY_TIMEOUT;
3045         while ((val & SMBINTF_HWCMD) && --to) {
3046                 msleep(1);
3047                 val = jread32(jme, JME_SMBINTF);
3048         }
3049         if (!to) {
3050                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
3051                 return 0xFF;
3052         }
3053
3054         return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
3055 }
3056
3057 static void
3058 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
3059 {
3060         u32 val;
3061         int to;
3062
3063         val = jread32(jme, JME_SMBCSR);
3064         to = JME_SMB_BUSY_TIMEOUT;
3065         while ((val & SMBCSR_BUSY) && --to) {
3066                 msleep(1);
3067                 val = jread32(jme, JME_SMBCSR);
3068         }
3069         if (!to) {
3070                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
3071                 return;
3072         }
3073
3074         jwrite32(jme, JME_SMBINTF,
3075                 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
3076                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
3077                 SMBINTF_HWRWN_WRITE |
3078                 SMBINTF_HWCMD);
3079
3080         val = jread32(jme, JME_SMBINTF);
3081         to = JME_SMB_BUSY_TIMEOUT;
3082         while ((val & SMBINTF_HWCMD) && --to) {
3083                 msleep(1);
3084                 val = jread32(jme, JME_SMBINTF);
3085         }
3086         if (!to) {
3087                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
3088                 return;
3089         }
3090
3091         mdelay(2);
3092 }
3093
3094 static int
3095 jme_get_eeprom_len(struct net_device *netdev)
3096 {
3097         struct jme_adapter *jme = netdev_priv(netdev);
3098         u32 val;
3099         val = jread32(jme, JME_SMBCSR);
3100         return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
3101 }
3102
3103 static int
3104 jme_get_eeprom(struct net_device *netdev,
3105                 struct ethtool_eeprom *eeprom, u8 *data)
3106 {
3107         struct jme_adapter *jme = netdev_priv(netdev);
3108         int i, offset = eeprom->offset, len = eeprom->len;
3109
3110         /*
3111          * ethtool will check the boundary for us
3112          */
3113         eeprom->magic = JME_EEPROM_MAGIC;
3114         for (i = 0 ; i < len ; ++i)
3115                 data[i] = jme_smb_read(jme, i + offset);
3116
3117         return 0;
3118 }
3119
3120 static int
3121 jme_set_eeprom(struct net_device *netdev,
3122                 struct ethtool_eeprom *eeprom, u8 *data)
3123 {
3124         struct jme_adapter *jme = netdev_priv(netdev);
3125         int i, offset = eeprom->offset, len = eeprom->len;
3126
3127         if (eeprom->magic != JME_EEPROM_MAGIC)
3128                 return -EINVAL;
3129
3130         /*
3131          * ethtool will check the boundary for us
3132          */
3133         for (i = 0 ; i < len ; ++i)
3134                 jme_smb_write(jme, i + offset, data[i]);
3135
3136         return 0;
3137 }
3138
3139 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
3140 static struct ethtool_ops jme_ethtool_ops = {
3141 #else
3142 static const struct ethtool_ops jme_ethtool_ops = {
3143 #endif
3144         .get_drvinfo            = jme_get_drvinfo,
3145         .get_regs_len           = jme_get_regs_len,
3146         .get_regs               = jme_get_regs,
3147         .get_coalesce           = jme_get_coalesce,
3148         .set_coalesce           = jme_set_coalesce,
3149         .get_pauseparam         = jme_get_pauseparam,
3150         .set_pauseparam         = jme_set_pauseparam,
3151         .get_wol                = jme_get_wol,
3152         .set_wol                = jme_set_wol,
3153         .get_settings           = jme_get_settings,
3154         .set_settings           = jme_set_settings,
3155         .get_link               = jme_get_link,
3156         .get_msglevel           = jme_get_msglevel,
3157         .set_msglevel           = jme_set_msglevel,
3158 #ifndef __USE_NDO_FIX_FEATURES__
3159         .get_rx_csum            = jme_get_rx_csum,
3160         .set_rx_csum            = jme_set_rx_csum,
3161         .set_tx_csum            = jme_set_tx_csum,
3162         .set_tso                = jme_set_tso,
3163         .set_sg                 = ethtool_op_set_sg,
3164 #endif
3165         .nway_reset             = jme_nway_reset,
3166         .get_eeprom_len         = jme_get_eeprom_len,
3167         .get_eeprom             = jme_get_eeprom,
3168         .set_eeprom             = jme_set_eeprom,
3169 };
3170
3171 static int
3172 jme_pci_dma64(struct pci_dev *pdev)
3173 {
3174         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
3175 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3176             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
3177 #else
3178             !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
3179 #endif
3180            )
3181 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3182                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
3183 #else
3184                 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
3185 #endif
3186                         return 1;
3187
3188         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
3189 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3190             !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
3191 #else
3192             !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
3193 #endif
3194            )
3195 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3196                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
3197 #else
3198                 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
3199 #endif
3200                         return 1;
3201
3202 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3203         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
3204                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
3205 #else
3206         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
3207                 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
3208 #endif
3209                         return 0;
3210
3211         return -1;
3212 }
3213
3214 static inline void
3215 jme_phy_init(struct jme_adapter *jme)
3216 {
3217         u16 reg26;
3218
3219         reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
3220         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
3221 }
3222
3223 static inline void
3224 jme_check_hw_ver(struct jme_adapter *jme)
3225 {
3226         u32 chipmode;
3227
3228         chipmode = jread32(jme, JME_CHIPMODE);
3229
3230         jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
3231         jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
3232         jme->chip_main_rev = jme->chiprev & 0xF;
3233         jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF;
3234 }
3235
3236 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3237 static const struct net_device_ops jme_netdev_ops = {
3238         .ndo_open               = jme_open,
3239         .ndo_stop               = jme_close,
3240         .ndo_validate_addr      = eth_validate_addr,
3241         .ndo_do_ioctl           = jme_ioctl,
3242         .ndo_start_xmit         = jme_start_xmit,
3243         .ndo_set_mac_address    = jme_set_macaddr,
3244 #ifndef __USE_NDO_SET_RX_MODE__
3245         .ndo_set_multicast_list = jme_set_multi,
3246 #else
3247         .ndo_set_rx_mode        = jme_set_multi,
3248 #endif
3249         .ndo_change_mtu         = jme_change_mtu,
3250         .ndo_tx_timeout         = jme_tx_timeout,
3251 #ifndef __UNIFY_VLAN_RX_PATH__
3252         .ndo_vlan_rx_register   = jme_vlan_rx_register,
3253 #endif
3254 #ifdef __USE_NDO_FIX_FEATURES__
3255         .ndo_fix_features       = jme_fix_features,
3256         .ndo_set_features       = jme_set_features,
3257 #endif
3258 };
3259 #endif
3260
3261 static int __devinit
3262 jme_init_one(struct pci_dev *pdev,
3263              const struct pci_device_id *ent)
3264 {
3265         int rc = 0, using_dac, i;
3266         struct net_device *netdev;
3267         struct jme_adapter *jme;
3268         u16 bmcr, bmsr;
3269         u32 apmc;
3270
3271         /*
3272          * set up PCI device basics
3273          */
3274         rc = pci_enable_device(pdev);
3275         if (rc) {
3276                 pr_err("Cannot enable PCI device\n");
3277                 goto err_out;
3278         }
3279
3280         using_dac = jme_pci_dma64(pdev);
3281         if (using_dac < 0) {
3282                 pr_err("Cannot set PCI DMA Mask\n");
3283                 rc = -EIO;
3284                 goto err_out_disable_pdev;
3285         }
3286
3287         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
3288                 pr_err("No PCI resource region found\n");
3289                 rc = -ENOMEM;
3290                 goto err_out_disable_pdev;
3291         }
3292
3293         rc = pci_request_regions(pdev, DRV_NAME);
3294         if (rc) {
3295                 pr_err("Cannot obtain PCI resource region\n");
3296                 goto err_out_disable_pdev;
3297         }
3298
3299         pci_set_master(pdev);
3300
3301         /*
3302          * alloc and init net device
3303          */
3304         netdev = alloc_etherdev(sizeof(*jme));
3305         if (!netdev) {
3306                 rc = -ENOMEM;
3307                 goto err_out_release_regions;
3308         }
3309 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3310         netdev->netdev_ops = &jme_netdev_ops;
3311 #else
3312         netdev->open                    = jme_open;
3313         netdev->stop                    = jme_close;
3314         netdev->do_ioctl                = jme_ioctl;
3315         netdev->hard_start_xmit         = jme_start_xmit;
3316         netdev->set_mac_address         = jme_set_macaddr;
3317         netdev->set_multicast_list      = jme_set_multi;
3318         netdev->change_mtu              = jme_change_mtu;
3319         netdev->tx_timeout              = jme_tx_timeout;
3320         netdev->vlan_rx_register        = jme_vlan_rx_register;
3321 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
3322         netdev->vlan_rx_kill_vid        = jme_vlan_rx_kill_vid;
3323 #endif
3324         NETDEV_GET_STATS(netdev, &jme_get_stats);
3325 #endif
3326         netdev->ethtool_ops             = &jme_ethtool_ops;
3327         netdev->watchdog_timeo          = TX_TIMEOUT;
3328 #ifdef __USE_NDO_FIX_FEATURES__
3329         netdev->hw_features             =       NETIF_F_IP_CSUM |
3330                                                 NETIF_F_IPV6_CSUM |
3331                                                 NETIF_F_SG |
3332                                                 NETIF_F_TSO |
3333                                                 NETIF_F_TSO6 |
3334                                                 NETIF_F_RXCSUM;
3335 #endif
3336         netdev->features                =       NETIF_F_IP_CSUM |
3337                                                 NETIF_F_IPV6_CSUM |
3338                                                 NETIF_F_SG |
3339                                                 NETIF_F_TSO |
3340                                                 NETIF_F_TSO6 |
3341                                                 NETIF_F_HW_VLAN_TX |
3342                                                 NETIF_F_HW_VLAN_RX;
3343         if (using_dac)
3344                 netdev->features        |=      NETIF_F_HIGHDMA;
3345
3346         SET_NETDEV_DEV(netdev, &pdev->dev);
3347         pci_set_drvdata(pdev, netdev);
3348
3349         /*
3350          * init adapter info
3351          */
3352         jme = netdev_priv(netdev);
3353         jme->pdev = pdev;
3354         jme->dev = netdev;
3355         jme->jme_rx = netif_rx;
3356 #ifndef __UNIFY_VLAN_RX_PATH__
3357         jme->jme_vlan_rx = vlan_hwaccel_rx;
3358 #endif
3359         jme->old_mtu = netdev->mtu = 1500;
3360         jme->phylink = 0;
3361         jme->tx_ring_size = 1 << 10;
3362         jme->tx_ring_mask = jme->tx_ring_size - 1;
3363         jme->tx_wake_threshold = 1 << 9;
3364         jme->rx_ring_size = 1 << 9;
3365         jme->rx_ring_mask = jme->rx_ring_size - 1;
3366         jme->msg_enable = JME_DEF_MSG_ENABLE;
3367         jme->regs = ioremap(pci_resource_start(pdev, 0),
3368                              pci_resource_len(pdev, 0));
3369         if (!(jme->regs)) {
3370                 pr_err("Mapping PCI resource region error\n");
3371                 rc = -ENOMEM;
3372                 goto err_out_free_netdev;
3373         }
3374
3375         if (no_pseudohp) {
3376                 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
3377                 jwrite32(jme, JME_APMC, apmc);
3378         } else if (force_pseudohp) {
3379                 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
3380                 jwrite32(jme, JME_APMC, apmc);
3381         }
3382
3383         NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3384
3385         spin_lock_init(&jme->phy_lock);
3386         spin_lock_init(&jme->macaddr_lock);
3387         spin_lock_init(&jme->rxmcs_lock);
3388
3389         atomic_set(&jme->link_changing, 1);
3390         atomic_set(&jme->rx_cleaning, 1);
3391         atomic_set(&jme->tx_cleaning, 1);
3392         atomic_set(&jme->rx_empty, 1);
3393
3394         tasklet_init(&jme->pcc_task,
3395                      jme_pcc_tasklet,
3396                      (unsigned long) jme);
3397         tasklet_init(&jme->linkch_task,
3398                      jme_link_change_tasklet,
3399                      (unsigned long) jme);
3400         tasklet_init(&jme->txclean_task,
3401                      jme_tx_clean_tasklet,
3402                      (unsigned long) jme);
3403         tasklet_init(&jme->rxclean_task,
3404                      jme_rx_clean_tasklet,
3405                      (unsigned long) jme);
3406         tasklet_init(&jme->rxempty_task,
3407                      jme_rx_empty_tasklet,
3408                      (unsigned long) jme);
3409         tasklet_disable_nosync(&jme->linkch_task);
3410         tasklet_disable_nosync(&jme->txclean_task);
3411         tasklet_disable_nosync(&jme->rxclean_task);
3412         tasklet_disable_nosync(&jme->rxempty_task);
3413         jme->dpi.cur = PCC_P1;
3414
3415         jme->reg_ghc = 0;
3416         jme->reg_rxcs = RXCS_DEFAULT;
3417         jme->reg_rxmcs = RXMCS_DEFAULT;
3418         jme->reg_txpfc = 0;
3419         jme->reg_pmcs = PMCS_MFEN;
3420         jme->reg_gpreg1 = GPREG1_DEFAULT;
3421 #ifndef __USE_NDO_FIX_FEATURES__
3422         set_bit(JME_FLAG_TXCSUM, &jme->flags);
3423         set_bit(JME_FLAG_TSO, &jme->flags);
3424 #else
3425
3426         if (jme->reg_rxmcs & RXMCS_CHECKSUM)
3427                 netdev->features |= NETIF_F_RXCSUM;
3428 #endif
3429
3430         /*
3431          * Get Max Read Req Size from PCI Config Space
3432          */
3433         pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3434         jme->mrrs &= PCI_DCSR_MRRS_MASK;
3435         switch (jme->mrrs) {
3436         case MRRS_128B:
3437                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3438                 break;
3439         case MRRS_256B:
3440                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3441                 break;
3442         default:
3443                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3444                 break;
3445         }
3446
3447         /*
3448          * Must check before reset_mac_processor
3449          */
3450         jme_check_hw_ver(jme);
3451         jme->mii_if.dev = netdev;
3452         if (jme->fpgaver) {
3453                 jme->mii_if.phy_id = 0;
3454                 for (i = 1 ; i < 32 ; ++i) {
3455                         bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3456                         bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3457                         if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3458                                 jme->mii_if.phy_id = i;
3459                                 break;
3460                         }
3461                 }
3462
3463                 if (!jme->mii_if.phy_id) {
3464                         rc = -EIO;
3465                         pr_err("Can not find phy_id\n");
3466                         goto err_out_unmap;
3467                 }
3468
3469                 jme->reg_ghc |= GHC_LINK_POLL;
3470         } else {
3471                 jme->mii_if.phy_id = 1;
3472         }
3473         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3474                 jme->mii_if.supports_gmii = true;
3475         else
3476                 jme->mii_if.supports_gmii = false;
3477         jme->mii_if.phy_id_mask = 0x1F;
3478         jme->mii_if.reg_num_mask = 0x1F;
3479         jme->mii_if.mdio_read = jme_mdio_read;
3480         jme->mii_if.mdio_write = jme_mdio_write;
3481
3482         jme_clear_pm(jme);
3483         pci_set_power_state(jme->pdev, PCI_D0);
3484 #ifndef JME_NEW_PM_API
3485         jme_pci_wakeup_enable(jme, true);
3486 #endif
3487 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
3488         device_set_wakeup_enable(&pdev->dev, true);
3489 #endif
3490
3491         jme_set_phyfifo_5level(jme);
3492 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,22)
3493         pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev);
3494 #else
3495         jme->pcirev = pdev->revision;
3496 #endif
3497         if (!jme->fpgaver)
3498                 jme_phy_init(jme);
3499         jme_phy_off(jme);
3500
3501         /*
3502          * Reset MAC processor and reload EEPROM for MAC Address
3503          */
3504         jme_reset_mac_processor(jme);
3505         rc = jme_reload_eeprom(jme);
3506         if (rc) {
3507                 pr_err("Reload eeprom for reading MAC Address error\n");
3508                 goto err_out_unmap;
3509         }
3510         jme_load_macaddr(netdev);
3511
3512         /*
3513          * Tell stack that we are not ready to work until open()
3514          */
3515         netif_carrier_off(netdev);
3516
3517         rc = register_netdev(netdev);
3518         if (rc) {
3519                 pr_err("Cannot register net device\n");
3520                 goto err_out_unmap;
3521         }
3522
3523         netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x "
3524                    "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3525                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3526                    "JMC250 Gigabit Ethernet" :
3527                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3528                    "JMC260 Fast Ethernet" : "Unknown",
3529                    (jme->fpgaver != 0) ? " (FPGA)" : "",
3530                    (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3531                    jme->pcirev,
3532                    netdev->dev_addr[0],
3533                    netdev->dev_addr[1],
3534                    netdev->dev_addr[2],
3535                    netdev->dev_addr[3],
3536                    netdev->dev_addr[4],
3537                    netdev->dev_addr[5]);
3538
3539         return 0;
3540
3541 err_out_unmap:
3542         iounmap(jme->regs);
3543 err_out_free_netdev:
3544         pci_set_drvdata(pdev, NULL);
3545         free_netdev(netdev);
3546 err_out_release_regions:
3547         pci_release_regions(pdev);
3548 err_out_disable_pdev:
3549         pci_disable_device(pdev);
3550 err_out:
3551         return rc;
3552 }
3553
3554 static void __devexit
3555 jme_remove_one(struct pci_dev *pdev)
3556 {
3557         struct net_device *netdev = pci_get_drvdata(pdev);
3558         struct jme_adapter *jme = netdev_priv(netdev);
3559
3560         unregister_netdev(netdev);
3561         iounmap(jme->regs);
3562         pci_set_drvdata(pdev, NULL);
3563         free_netdev(netdev);
3564         pci_release_regions(pdev);
3565         pci_disable_device(pdev);
3566
3567 }
3568
3569 static void
3570 jme_shutdown(struct pci_dev *pdev)
3571 {
3572         struct net_device *netdev = pci_get_drvdata(pdev);
3573         struct jme_adapter *jme = netdev_priv(netdev);
3574
3575         jme_powersave_phy(jme);
3576 #ifndef JME_NEW_PM_API
3577         jme_pci_wakeup_enable(jme, !!(jme->reg_pmcs));
3578 #endif
3579 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
3580         device_set_wakeup_enable(&jme->pdev->dev, !!(jme->reg_pmcs));
3581 #endif
3582 }
3583
3584 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
3585         #ifdef CONFIG_PM
3586                 #define JME_HAVE_PM
3587         #endif
3588 #else
3589         #ifdef CONFIG_PM_SLEEP
3590                 #define JME_HAVE_PM
3591         #endif
3592 #endif
3593
3594 #ifdef JME_HAVE_PM
3595 static int
3596 #ifdef JME_NEW_PM_API
3597 jme_suspend(struct device *dev)
3598 #else
3599 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3600 #endif
3601 {
3602 #ifdef JME_NEW_PM_API
3603         struct pci_dev *pdev = to_pci_dev(dev);
3604 #endif
3605         struct net_device *netdev = pci_get_drvdata(pdev);
3606         struct jme_adapter *jme = netdev_priv(netdev);
3607
3608         atomic_dec(&jme->link_changing);
3609
3610         netif_device_detach(netdev);
3611         netif_stop_queue(netdev);
3612         jme_stop_irq(jme);
3613
3614         tasklet_disable(&jme->txclean_task);
3615         tasklet_disable(&jme->rxclean_task);
3616         tasklet_disable(&jme->rxempty_task);
3617
3618         if (netif_carrier_ok(netdev)) {
3619                 if (test_bit(JME_FLAG_POLL, &jme->flags))
3620                         jme_polling_mode(jme);
3621
3622                 jme_stop_pcc_timer(jme);
3623                 jme_disable_rx_engine(jme);
3624                 jme_disable_tx_engine(jme);
3625                 jme_reset_mac_processor(jme);
3626                 jme_free_rx_resources(jme);
3627                 jme_free_tx_resources(jme);
3628                 netif_carrier_off(netdev);
3629                 jme->phylink = 0;
3630         }
3631
3632         tasklet_enable(&jme->txclean_task);
3633         tasklet_hi_enable(&jme->rxclean_task);
3634         tasklet_hi_enable(&jme->rxempty_task);
3635
3636         jme_powersave_phy(jme);
3637 #ifndef JME_NEW_PM_API
3638         pci_save_state(pdev);
3639         jme_pci_wakeup_enable(jme, !!(jme->reg_pmcs));
3640         pci_set_power_state(pdev, PCI_D3hot);
3641 #endif
3642
3643         return 0;
3644 }
3645
3646 static int
3647 #ifdef JME_NEW_PM_API
3648 jme_resume(struct device *dev)
3649 #else
3650 jme_resume(struct pci_dev *pdev)
3651 #endif
3652 {
3653 #ifdef JME_NEW_PM_API
3654         struct pci_dev *pdev = to_pci_dev(dev);
3655 #endif
3656         struct net_device *netdev = pci_get_drvdata(pdev);
3657         struct jme_adapter *jme = netdev_priv(netdev);
3658
3659         jme_clear_pm(jme);
3660 #ifndef JME_NEW_PM_API
3661         pci_set_power_state(pdev, PCI_D0);
3662         pci_restore_state(pdev);
3663 #endif
3664
3665         jme_phy_on(jme);
3666         if (test_bit(JME_FLAG_SSET, &jme->flags))
3667                 jme_set_settings(netdev, &jme->old_ecmd);
3668         else
3669                 jme_reset_phy_processor(jme);
3670         jme_phy_calibration(jme);
3671         jme_phy_setEA(jme);
3672         jme_start_irq(jme);
3673         netif_device_attach(netdev);
3674
3675         atomic_inc(&jme->link_changing);
3676
3677         jme_reset_link(jme);
3678
3679         return 0;
3680 }
3681
3682 #ifdef JME_NEW_PM_API
3683 static SIMPLE_DEV_PM_OPS(jme_pm_ops, jme_suspend, jme_resume);
3684 #define JME_PM_OPS (&jme_pm_ops)
3685 #endif
3686
3687 #else
3688
3689 #ifdef JME_NEW_PM_API
3690 #define JME_PM_OPS NULL
3691 #endif
3692 #endif
3693
3694 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3695 static struct pci_device_id jme_pci_tbl[] = {
3696 #else
3697 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3698 #endif
3699         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3700         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3701         { }
3702 };
3703
3704 static struct pci_driver jme_driver = {
3705         .name           = DRV_NAME,
3706         .id_table       = jme_pci_tbl,
3707         .probe          = jme_init_one,
3708         .remove         = __devexit_p(jme_remove_one),
3709         .shutdown       = jme_shutdown,
3710 #ifndef JME_NEW_PM_API
3711         .suspend        = jme_suspend,
3712         .resume         = jme_resume
3713 #else
3714         .driver.pm      = JME_PM_OPS,
3715 #endif
3716 };
3717
3718 static int __init
3719 jme_init_module(void)
3720 {
3721         pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION);
3722         return pci_register_driver(&jme_driver);
3723 }
3724
3725 static void __exit
3726 jme_cleanup_module(void)
3727 {
3728         pci_unregister_driver(&jme_driver);
3729 }
3730
3731 module_init(jme_init_module);
3732 module_exit(jme_cleanup_module);
3733
3734 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3735 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3736 MODULE_LICENSE("GPL");
3737 MODULE_VERSION(DRV_VERSION);
3738 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);