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1/*
2 * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
3 *
4 * Copyright 2008 JMicron Technology Corporation
5 * http://www.jmicron.com/
6 *
7 * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 */
23
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/pci.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/ethtool.h>
30#include <linux/mii.h>
31#include <linux/crc32.h>
32#include <linux/delay.h>
33#include <linux/spinlock.h>
34#include <linux/in.h>
35#include <linux/ip.h>
36#include <linux/ipv6.h>
37#include <linux/tcp.h>
38#include <linux/udp.h>
39#include <linux/if_vlan.h>
40#include <net/ip6_checksum.h>
41#include "jme.h"
42
43static int force_pseudohp = -1;
44static int no_pseudohp = -1;
45static int no_extplug = -1;
46module_param(force_pseudohp, int, 0);
47MODULE_PARM_DESC(force_pseudohp,
48 "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
49module_param(no_pseudohp, int, 0);
50MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
51module_param(no_extplug, int, 0);
52MODULE_PARM_DESC(no_extplug,
53 "Do not use external plug signal for pseudo hot-plug.");
54
55static int
56jme_mdio_read(struct net_device *netdev, int phy, int reg)
57{
58 struct jme_adapter *jme = netdev_priv(netdev);
59 int i, val, again = (reg == MII_BMSR) ? 1 : 0;
60
61read_again:
62 jwrite32(jme, JME_SMI, SMI_OP_REQ |
63 smi_phy_addr(phy) |
64 smi_reg_addr(reg));
65
66 wmb();
67 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
68 udelay(20);
69 val = jread32(jme, JME_SMI);
70 if ((val & SMI_OP_REQ) == 0)
71 break;
72 }
73
74 if (i == 0) {
75 jeprintk(jme->pdev, "phy(%d) read timeout : %d\n", phy, reg);
76 return 0;
77 }
78
79 if (again--)
80 goto read_again;
81
82 return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
83}
84
85static void
86jme_mdio_write(struct net_device *netdev,
87 int phy, int reg, int val)
88{
89 struct jme_adapter *jme = netdev_priv(netdev);
90 int i;
91
92 jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
93 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
94 smi_phy_addr(phy) | smi_reg_addr(reg));
95
96 wmb();
97 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
98 udelay(20);
99 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
100 break;
101 }
102
103 if (i == 0)
104 jeprintk(jme->pdev, "phy(%d) write timeout : %d\n", phy, reg);
105
106 return;
107}
108
109static inline void
110jme_reset_phy_processor(struct jme_adapter *jme)
111{
112 u32 val;
113
114 jme_mdio_write(jme->dev,
115 jme->mii_if.phy_id,
116 MII_ADVERTISE, ADVERTISE_ALL |
117 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
118
119 if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
120 jme_mdio_write(jme->dev,
121 jme->mii_if.phy_id,
122 MII_CTRL1000,
123 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
124
125 val = jme_mdio_read(jme->dev,
126 jme->mii_if.phy_id,
127 MII_BMCR);
128
129 jme_mdio_write(jme->dev,
130 jme->mii_if.phy_id,
131 MII_BMCR, val | BMCR_RESET);
132
133 return;
134}
135
136static void
137jme_setup_wakeup_frame(struct jme_adapter *jme,
138 u32 *mask, u32 crc, int fnr)
139{
140 int i;
141
142 /*
143 * Setup CRC pattern
144 */
145 jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
146 wmb();
147 jwrite32(jme, JME_WFODP, crc);
148 wmb();
149
150 /*
151 * Setup Mask
152 */
153 for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
154 jwrite32(jme, JME_WFOI,
155 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
156 (fnr & WFOI_FRAME_SEL));
157 wmb();
158 jwrite32(jme, JME_WFODP, mask[i]);
159 wmb();
160 }
161}
162
163static inline void
164jme_reset_mac_processor(struct jme_adapter *jme)
165{
166 u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
167 u32 crc = 0xCDCDCDCD;
168 u32 gpreg0;
169 int i;
170
171 jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
172 udelay(2);
173 jwrite32(jme, JME_GHC, jme->reg_ghc);
174
175 jwrite32(jme, JME_RXDBA_LO, 0x00000000);
176 jwrite32(jme, JME_RXDBA_HI, 0x00000000);
177 jwrite32(jme, JME_RXQDC, 0x00000000);
178 jwrite32(jme, JME_RXNDA, 0x00000000);
179 jwrite32(jme, JME_TXDBA_LO, 0x00000000);
180 jwrite32(jme, JME_TXDBA_HI, 0x00000000);
181 jwrite32(jme, JME_TXQDC, 0x00000000);
182 jwrite32(jme, JME_TXNDA, 0x00000000);
183
184 jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
185 jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
186 for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
187 jme_setup_wakeup_frame(jme, mask, crc, i);
188 if (jme->fpgaver)
189 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
190 else
191 gpreg0 = GPREG0_DEFAULT;
192 jwrite32(jme, JME_GPREG0, gpreg0);
193 jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
194}
195
196static inline void
197jme_reset_ghc_speed(struct jme_adapter *jme)
198{
199 jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX);
200 jwrite32(jme, JME_GHC, jme->reg_ghc);
201}
202
203static inline void
204jme_clear_pm(struct jme_adapter *jme)
205{
206 jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
207 pci_set_power_state(jme->pdev, PCI_D0);
208 pci_enable_wake(jme->pdev, PCI_D0, false);
209}
210
211static int
212jme_reload_eeprom(struct jme_adapter *jme)
213{
214 u32 val;
215 int i;
216
217 val = jread32(jme, JME_SMBCSR);
218
219 if (val & SMBCSR_EEPROMD) {
220 val |= SMBCSR_CNACK;
221 jwrite32(jme, JME_SMBCSR, val);
222 val |= SMBCSR_RELOAD;
223 jwrite32(jme, JME_SMBCSR, val);
224 mdelay(12);
225
226 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
227 mdelay(1);
228 if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
229 break;
230 }
231
232 if (i == 0) {
233 jeprintk(jme->pdev, "eeprom reload timeout\n");
234 return -EIO;
235 }
236 }
237
238 return 0;
239}
240
241static void
242jme_load_macaddr(struct net_device *netdev)
243{
244 struct jme_adapter *jme = netdev_priv(netdev);
245 unsigned char macaddr[6];
246 u32 val;
247
248 spin_lock_bh(&jme->macaddr_lock);
249 val = jread32(jme, JME_RXUMA_LO);
250 macaddr[0] = (val >> 0) & 0xFF;
251 macaddr[1] = (val >> 8) & 0xFF;
252 macaddr[2] = (val >> 16) & 0xFF;
253 macaddr[3] = (val >> 24) & 0xFF;
254 val = jread32(jme, JME_RXUMA_HI);
255 macaddr[4] = (val >> 0) & 0xFF;
256 macaddr[5] = (val >> 8) & 0xFF;
257 memcpy(netdev->dev_addr, macaddr, 6);
258 spin_unlock_bh(&jme->macaddr_lock);
259}
260
261static inline void
262jme_set_rx_pcc(struct jme_adapter *jme, int p)
263{
264 switch (p) {
265 case PCC_OFF:
266 jwrite32(jme, JME_PCCRX0,
267 ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
268 ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
269 break;
270 case PCC_P1:
271 jwrite32(jme, JME_PCCRX0,
272 ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
273 ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
274 break;
275 case PCC_P2:
276 jwrite32(jme, JME_PCCRX0,
277 ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
278 ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
279 break;
280 case PCC_P3:
281 jwrite32(jme, JME_PCCRX0,
282 ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
283 ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
284 break;
285 default:
286 break;
287 }
288 wmb();
289
290 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
291#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
292 msg_rx_status(jme, "Switched to PCC_P%d\n", p);
293#else
294 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
295#endif
296}
297
298static void
299jme_start_irq(struct jme_adapter *jme)
300{
301 register struct dynpcc_info *dpi = &(jme->dpi);
302
303 jme_set_rx_pcc(jme, PCC_P1);
304 dpi->cur = PCC_P1;
305 dpi->attempt = PCC_P1;
306 dpi->cnt = 0;
307
308 jwrite32(jme, JME_PCCTX,
309 ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
310 ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
311 PCCTXQ0_EN
312 );
313
314 /*
315 * Enable Interrupts
316 */
317 jwrite32(jme, JME_IENS, INTR_ENABLE);
318}
319
320static inline void
321jme_stop_irq(struct jme_adapter *jme)
322{
323 /*
324 * Disable Interrupts
325 */
326 jwrite32f(jme, JME_IENC, INTR_ENABLE);
327}
328
329static u32
330jme_linkstat_from_phy(struct jme_adapter *jme)
331{
332 u32 phylink, bmsr;
333
334 phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
335 bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
336 if (bmsr & BMSR_ANCOMP)
337 phylink |= PHY_LINK_AUTONEG_COMPLETE;
338
339 return phylink;
340}
341
342static inline void
343jme_set_phyfifoa(struct jme_adapter *jme)
344{
345 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
346}
347
348static inline void
349jme_set_phyfifob(struct jme_adapter *jme)
350{
351 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
352}
353
354static int
355jme_check_link(struct net_device *netdev, int testonly)
356{
357 struct jme_adapter *jme = netdev_priv(netdev);
358 u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
359 char linkmsg[64];
360 int rc = 0;
361
362 linkmsg[0] = '\0';
363
364 if (jme->fpgaver)
365 phylink = jme_linkstat_from_phy(jme);
366 else
367 phylink = jread32(jme, JME_PHY_LINK);
368
369 if (phylink & PHY_LINK_UP) {
370 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
371 /*
372 * If we did not enable AN
373 * Speed/Duplex Info should be obtained from SMI
374 */
375 phylink = PHY_LINK_UP;
376
377 bmcr = jme_mdio_read(jme->dev,
378 jme->mii_if.phy_id,
379 MII_BMCR);
380
381 phylink |= ((bmcr & BMCR_SPEED1000) &&
382 (bmcr & BMCR_SPEED100) == 0) ?
383 PHY_LINK_SPEED_1000M :
384 (bmcr & BMCR_SPEED100) ?
385 PHY_LINK_SPEED_100M :
386 PHY_LINK_SPEED_10M;
387
388 phylink |= (bmcr & BMCR_FULLDPLX) ?
389 PHY_LINK_DUPLEX : 0;
390
391 strcat(linkmsg, "Forced: ");
392 } else {
393 /*
394 * Keep polling for speed/duplex resolve complete
395 */
396 while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
397 --cnt) {
398
399 udelay(1);
400
401 if (jme->fpgaver)
402 phylink = jme_linkstat_from_phy(jme);
403 else
404 phylink = jread32(jme, JME_PHY_LINK);
405 }
406 if (!cnt)
407 jeprintk(jme->pdev,
408 "Waiting speed resolve timeout.\n");
409
410 strcat(linkmsg, "ANed: ");
411 }
412
413 if (jme->phylink == phylink) {
414 rc = 1;
415 goto out;
416 }
417 if (testonly)
418 goto out;
419
420 jme->phylink = phylink;
421
422 ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX |
423 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE |
424 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY);
425 switch (phylink & PHY_LINK_SPEED_MASK) {
426 case PHY_LINK_SPEED_10M:
427 ghc |= GHC_SPEED_10M |
428 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
429 strcat(linkmsg, "10 Mbps, ");
430 break;
431 case PHY_LINK_SPEED_100M:
432 ghc |= GHC_SPEED_100M |
433 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
434 strcat(linkmsg, "100 Mbps, ");
435 break;
436 case PHY_LINK_SPEED_1000M:
437 ghc |= GHC_SPEED_1000M |
438 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
439 strcat(linkmsg, "1000 Mbps, ");
440 break;
441 default:
442 break;
443 }
444
445 if (phylink & PHY_LINK_DUPLEX) {
446 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
447 ghc |= GHC_DPX;
448 } else {
449 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
450 TXMCS_BACKOFF |
451 TXMCS_CARRIERSENSE |
452 TXMCS_COLLISION);
453 jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
454 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
455 TXTRHD_TXREN |
456 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
457 }
458
459 gpreg1 = GPREG1_DEFAULT;
460 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
461 if (!(phylink & PHY_LINK_DUPLEX))
462 gpreg1 |= GPREG1_HALFMODEPATCH;
463 switch (phylink & PHY_LINK_SPEED_MASK) {
464 case PHY_LINK_SPEED_10M:
465 jme_set_phyfifoa(jme);
466 gpreg1 |= GPREG1_RSSPATCH;
467 break;
468 case PHY_LINK_SPEED_100M:
469 jme_set_phyfifob(jme);
470 gpreg1 |= GPREG1_RSSPATCH;
471 break;
472 case PHY_LINK_SPEED_1000M:
473 jme_set_phyfifoa(jme);
474 break;
475 default:
476 break;
477 }
478 }
479
480 jwrite32(jme, JME_GPREG1, gpreg1);
481 jwrite32(jme, JME_GHC, ghc);
482 jme->reg_ghc = ghc;
483
484 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
485 "Full-Duplex, " :
486 "Half-Duplex, ");
487 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
488 "MDI-X" :
489 "MDI");
490#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
491 msg_link(jme, "Link is up at %s.\n", linkmsg);
492#else
493 netif_info(jme, link, jme->dev, "Link is up at %s.\n", linkmsg);
494#endif
495 netif_carrier_on(netdev);
496 } else {
497 if (testonly)
498 goto out;
499
500#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
501 msg_link(jme, "Link is down.\n");
502#else
503 netif_info(jme, link, jme->dev, "Link is down.\n");
504#endif
505 jme->phylink = 0;
506 netif_carrier_off(netdev);
507 }
508
509out:
510 return rc;
511}
512
513static int
514jme_setup_tx_resources(struct jme_adapter *jme)
515{
516 struct jme_ring *txring = &(jme->txring[0]);
517
518 txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
519 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
520 &(txring->dmaalloc),
521 GFP_ATOMIC);
522
523 if (!txring->alloc)
524 goto err_set_null;
525
526 /*
527 * 16 Bytes align
528 */
529 txring->desc = (void *)ALIGN((unsigned long)(txring->alloc),
530 RING_DESC_ALIGN);
531 txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
532 txring->next_to_use = 0;
533 atomic_set(&txring->next_to_clean, 0);
534 atomic_set(&txring->nr_free, jme->tx_ring_size);
535
536 txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
537 jme->tx_ring_size, GFP_ATOMIC);
538 if (unlikely(!(txring->bufinf)))
539 goto err_free_txring;
540
541 /*
542 * Initialize Transmit Descriptors
543 */
544 memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
545 memset(txring->bufinf, 0,
546 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
547
548 return 0;
549
550err_free_txring:
551 dma_free_coherent(&(jme->pdev->dev),
552 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
553 txring->alloc,
554 txring->dmaalloc);
555
556err_set_null:
557 txring->desc = NULL;
558 txring->dmaalloc = 0;
559 txring->dma = 0;
560 txring->bufinf = NULL;
561
562 return -ENOMEM;
563}
564
565static void
566jme_free_tx_resources(struct jme_adapter *jme)
567{
568 int i;
569 struct jme_ring *txring = &(jme->txring[0]);
570 struct jme_buffer_info *txbi;
571
572 if (txring->alloc) {
573 if (txring->bufinf) {
574 for (i = 0 ; i < jme->tx_ring_size ; ++i) {
575 txbi = txring->bufinf + i;
576 if (txbi->skb) {
577 dev_kfree_skb(txbi->skb);
578 txbi->skb = NULL;
579 }
580 txbi->mapping = 0;
581 txbi->len = 0;
582 txbi->nr_desc = 0;
583 txbi->start_xmit = 0;
584 }
585 kfree(txring->bufinf);
586 }
587
588 dma_free_coherent(&(jme->pdev->dev),
589 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
590 txring->alloc,
591 txring->dmaalloc);
592
593 txring->alloc = NULL;
594 txring->desc = NULL;
595 txring->dmaalloc = 0;
596 txring->dma = 0;
597 txring->bufinf = NULL;
598 }
599 txring->next_to_use = 0;
600 atomic_set(&txring->next_to_clean, 0);
601 atomic_set(&txring->nr_free, 0);
602}
603
604static inline void
605jme_enable_tx_engine(struct jme_adapter *jme)
606{
607 /*
608 * Select Queue 0
609 */
610 jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
611 wmb();
612
613 /*
614 * Setup TX Queue 0 DMA Bass Address
615 */
616 jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
617 jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
618 jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
619
620 /*
621 * Setup TX Descptor Count
622 */
623 jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
624
625 /*
626 * Enable TX Engine
627 */
628 wmb();
629 jwrite32(jme, JME_TXCS, jme->reg_txcs |
630 TXCS_SELECT_QUEUE0 |
631 TXCS_ENABLE);
632
633}
634
635static inline void
636jme_restart_tx_engine(struct jme_adapter *jme)
637{
638 /*
639 * Restart TX Engine
640 */
641 jwrite32(jme, JME_TXCS, jme->reg_txcs |
642 TXCS_SELECT_QUEUE0 |
643 TXCS_ENABLE);
644}
645
646static inline void
647jme_disable_tx_engine(struct jme_adapter *jme)
648{
649 int i;
650 u32 val;
651
652 /*
653 * Disable TX Engine
654 */
655 jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
656 wmb();
657
658 val = jread32(jme, JME_TXCS);
659 for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
660 mdelay(1);
661 val = jread32(jme, JME_TXCS);
662 rmb();
663 }
664
665 if (!i)
666 jeprintk(jme->pdev, "Disable TX engine timeout.\n");
667}
668
669static void
670jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
671{
672 struct jme_ring *rxring = &(jme->rxring[0]);
673 register struct rxdesc *rxdesc = rxring->desc;
674 struct jme_buffer_info *rxbi = rxring->bufinf;
675 rxdesc += i;
676 rxbi += i;
677
678 rxdesc->dw[0] = 0;
679 rxdesc->dw[1] = 0;
680 rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32);
681 rxdesc->desc1.bufaddrl = cpu_to_le32(
682 (__u64)rxbi->mapping & 0xFFFFFFFFUL);
683 rxdesc->desc1.datalen = cpu_to_le16(rxbi->len);
684 if (jme->dev->features & NETIF_F_HIGHDMA)
685 rxdesc->desc1.flags = RXFLAG_64BIT;
686 wmb();
687 rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT;
688}
689
690static int
691jme_make_new_rx_buf(struct jme_adapter *jme, int i)
692{
693 struct jme_ring *rxring = &(jme->rxring[0]);
694 struct jme_buffer_info *rxbi = rxring->bufinf + i;
695 struct sk_buff *skb;
696
697 skb = netdev_alloc_skb(jme->dev,
698 jme->dev->mtu + RX_EXTRA_LEN);
699 if (unlikely(!skb))
700 return -ENOMEM;
701#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
702 skb->dev = jme->dev;
703#endif
704
705 rxbi->skb = skb;
706 rxbi->len = skb_tailroom(skb);
707 rxbi->mapping = pci_map_page(jme->pdev,
708 virt_to_page(skb->data),
709 offset_in_page(skb->data),
710 rxbi->len,
711 PCI_DMA_FROMDEVICE);
712
713 return 0;
714}
715
716static void
717jme_free_rx_buf(struct jme_adapter *jme, int i)
718{
719 struct jme_ring *rxring = &(jme->rxring[0]);
720 struct jme_buffer_info *rxbi = rxring->bufinf;
721 rxbi += i;
722
723 if (rxbi->skb) {
724 pci_unmap_page(jme->pdev,
725 rxbi->mapping,
726 rxbi->len,
727 PCI_DMA_FROMDEVICE);
728 dev_kfree_skb(rxbi->skb);
729 rxbi->skb = NULL;
730 rxbi->mapping = 0;
731 rxbi->len = 0;
732 }
733}
734
735static void
736jme_free_rx_resources(struct jme_adapter *jme)
737{
738 int i;
739 struct jme_ring *rxring = &(jme->rxring[0]);
740
741 if (rxring->alloc) {
742 if (rxring->bufinf) {
743 for (i = 0 ; i < jme->rx_ring_size ; ++i)
744 jme_free_rx_buf(jme, i);
745 kfree(rxring->bufinf);
746 }
747
748 dma_free_coherent(&(jme->pdev->dev),
749 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
750 rxring->alloc,
751 rxring->dmaalloc);
752 rxring->alloc = NULL;
753 rxring->desc = NULL;
754 rxring->dmaalloc = 0;
755 rxring->dma = 0;
756 rxring->bufinf = NULL;
757 }
758 rxring->next_to_use = 0;
759 atomic_set(&rxring->next_to_clean, 0);
760}
761
762static int
763jme_setup_rx_resources(struct jme_adapter *jme)
764{
765 int i;
766 struct jme_ring *rxring = &(jme->rxring[0]);
767
768 rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
769 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
770 &(rxring->dmaalloc),
771 GFP_ATOMIC);
772 if (!rxring->alloc)
773 goto err_set_null;
774
775 /*
776 * 16 Bytes align
777 */
778 rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc),
779 RING_DESC_ALIGN);
780 rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
781 rxring->next_to_use = 0;
782 atomic_set(&rxring->next_to_clean, 0);
783
784 rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
785 jme->rx_ring_size, GFP_ATOMIC);
786 if (unlikely(!(rxring->bufinf)))
787 goto err_free_rxring;
788
789 /*
790 * Initiallize Receive Descriptors
791 */
792 memset(rxring->bufinf, 0,
793 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
794 for (i = 0 ; i < jme->rx_ring_size ; ++i) {
795 if (unlikely(jme_make_new_rx_buf(jme, i))) {
796 jme_free_rx_resources(jme);
797 return -ENOMEM;
798 }
799
800 jme_set_clean_rxdesc(jme, i);
801 }
802
803 return 0;
804
805err_free_rxring:
806 dma_free_coherent(&(jme->pdev->dev),
807 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
808 rxring->alloc,
809 rxring->dmaalloc);
810err_set_null:
811 rxring->desc = NULL;
812 rxring->dmaalloc = 0;
813 rxring->dma = 0;
814 rxring->bufinf = NULL;
815
816 return -ENOMEM;
817}
818
819static inline void
820jme_enable_rx_engine(struct jme_adapter *jme)
821{
822 /*
823 * Select Queue 0
824 */
825 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
826 RXCS_QUEUESEL_Q0);
827 wmb();
828
829 /*
830 * Setup RX DMA Bass Address
831 */
832 jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
833 jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
834 jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
835
836 /*
837 * Setup RX Descriptor Count
838 */
839 jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
840
841 /*
842 * Setup Unicast Filter
843 */
844 jme_set_multi(jme->dev);
845
846 /*
847 * Enable RX Engine
848 */
849 wmb();
850 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
851 RXCS_QUEUESEL_Q0 |
852 RXCS_ENABLE |
853 RXCS_QST);
854}
855
856static inline void
857jme_restart_rx_engine(struct jme_adapter *jme)
858{
859 /*
860 * Start RX Engine
861 */
862 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
863 RXCS_QUEUESEL_Q0 |
864 RXCS_ENABLE |
865 RXCS_QST);
866}
867
868static inline void
869jme_disable_rx_engine(struct jme_adapter *jme)
870{
871 int i;
872 u32 val;
873
874 /*
875 * Disable RX Engine
876 */
877 jwrite32(jme, JME_RXCS, jme->reg_rxcs);
878 wmb();
879
880 val = jread32(jme, JME_RXCS);
881 for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
882 mdelay(1);
883 val = jread32(jme, JME_RXCS);
884 rmb();
885 }
886
887 if (!i)
888 jeprintk(jme->pdev, "Disable RX engine timeout.\n");
889
890}
891
892static int
893jme_rxsum_ok(struct jme_adapter *jme, u16 flags)
894{
895 if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
896 return false;
897
898 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
899 == RXWBFLAG_TCPON)) {
900 if (flags & RXWBFLAG_IPV4)
901#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
902 msg_rx_err(jme, "TCP Checksum error\n");
903#else
904 netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
905#endif
906 return false;
907 }
908
909 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
910 == RXWBFLAG_UDPON)) {
911 if (flags & RXWBFLAG_IPV4)
912#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
913 msg_rx_err(jme, "UDP Checksum error.\n");
914#else
915 netif_err(jme, rx_err, jme->dev, "UDP Checksum error.\n");
916#endif
917 return false;
918 }
919
920 if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
921 == RXWBFLAG_IPV4)) {
922#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
923 msg_rx_err(jme, "IPv4 Checksum error.\n");
924#else
925 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error.\n");
926#endif
927 return false;
928 }
929
930 return true;
931}
932
933static void
934jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
935{
936 struct jme_ring *rxring = &(jme->rxring[0]);
937 struct rxdesc *rxdesc = rxring->desc;
938 struct jme_buffer_info *rxbi = rxring->bufinf;
939 struct sk_buff *skb;
940 int framesize;
941
942 rxdesc += idx;
943 rxbi += idx;
944
945 skb = rxbi->skb;
946 pci_dma_sync_single_for_cpu(jme->pdev,
947 rxbi->mapping,
948 rxbi->len,
949 PCI_DMA_FROMDEVICE);
950
951 if (unlikely(jme_make_new_rx_buf(jme, idx))) {
952 pci_dma_sync_single_for_device(jme->pdev,
953 rxbi->mapping,
954 rxbi->len,
955 PCI_DMA_FROMDEVICE);
956
957 ++(NET_STAT(jme).rx_dropped);
958 } else {
959 framesize = le16_to_cpu(rxdesc->descwb.framesize)
960 - RX_PREPAD_SIZE;
961
962 skb_reserve(skb, RX_PREPAD_SIZE);
963 skb_put(skb, framesize);
964 skb->protocol = eth_type_trans(skb, jme->dev);
965
966 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags)))
967 skb->ip_summed = CHECKSUM_UNNECESSARY;
968 else
969 skb->ip_summed = CHECKSUM_NONE;
970
971 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
972 if (jme->vlgrp) {
973 jme->jme_vlan_rx(skb, jme->vlgrp,
974 le16_to_cpu(rxdesc->descwb.vlan));
975 NET_STAT(jme).rx_bytes += 4;
976 } else {
977 dev_kfree_skb(skb);
978 }
979 } else {
980 jme->jme_rx(skb);
981 }
982
983 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
984 cpu_to_le16(RXWBFLAG_DEST_MUL))
985 ++(NET_STAT(jme).multicast);
986
987 NET_STAT(jme).rx_bytes += framesize;
988 ++(NET_STAT(jme).rx_packets);
989 }
990
991 jme_set_clean_rxdesc(jme, idx);
992
993}
994
995static int
996jme_process_receive(struct jme_adapter *jme, int limit)
997{
998 struct jme_ring *rxring = &(jme->rxring[0]);
999 struct rxdesc *rxdesc = rxring->desc;
1000 int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1001
1002 if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1003 goto out_inc;
1004
1005 if (unlikely(atomic_read(&jme->link_changing) != 1))
1006 goto out_inc;
1007
1008 if (unlikely(!netif_carrier_ok(jme->dev)))
1009 goto out_inc;
1010
1011 i = atomic_read(&rxring->next_to_clean);
1012 while (limit > 0) {
1013 rxdesc = rxring->desc;
1014 rxdesc += i;
1015
1016 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1017 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1018 goto out;
1019 --limit;
1020
1021 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1022
1023 if (unlikely(desccnt > 1 ||
1024 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1025
1026 if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1027 ++(NET_STAT(jme).rx_crc_errors);
1028 else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1029 ++(NET_STAT(jme).rx_fifo_errors);
1030 else
1031 ++(NET_STAT(jme).rx_errors);
1032
1033 if (desccnt > 1)
1034 limit -= desccnt - 1;
1035
1036 for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1037 jme_set_clean_rxdesc(jme, j);
1038 j = (j + 1) & (mask);
1039 }
1040
1041 } else {
1042 jme_alloc_and_feed_skb(jme, i);
1043 }
1044
1045 i = (i + desccnt) & (mask);
1046 }
1047
1048out:
1049 atomic_set(&rxring->next_to_clean, i);
1050
1051out_inc:
1052 atomic_inc(&jme->rx_cleaning);
1053
1054 return limit > 0 ? limit : 0;
1055
1056}
1057
1058static void
1059jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1060{
1061 if (likely(atmp == dpi->cur)) {
1062 dpi->cnt = 0;
1063 return;
1064 }
1065
1066 if (dpi->attempt == atmp) {
1067 ++(dpi->cnt);
1068 } else {
1069 dpi->attempt = atmp;
1070 dpi->cnt = 0;
1071 }
1072
1073}
1074
1075static void
1076jme_dynamic_pcc(struct jme_adapter *jme)
1077{
1078 register struct dynpcc_info *dpi = &(jme->dpi);
1079
1080 if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1081 jme_attempt_pcc(dpi, PCC_P3);
1082 else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1083 dpi->intr_cnt > PCC_INTR_THRESHOLD)
1084 jme_attempt_pcc(dpi, PCC_P2);
1085 else
1086 jme_attempt_pcc(dpi, PCC_P1);
1087
1088 if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1089 if (dpi->attempt < dpi->cur)
1090 tasklet_schedule(&jme->rxclean_task);
1091 jme_set_rx_pcc(jme, dpi->attempt);
1092 dpi->cur = dpi->attempt;
1093 dpi->cnt = 0;
1094 }
1095}
1096
1097static void
1098jme_start_pcc_timer(struct jme_adapter *jme)
1099{
1100 struct dynpcc_info *dpi = &(jme->dpi);
1101 dpi->last_bytes = NET_STAT(jme).rx_bytes;
1102 dpi->last_pkts = NET_STAT(jme).rx_packets;
1103 dpi->intr_cnt = 0;
1104 jwrite32(jme, JME_TMCSR,
1105 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1106}
1107
1108static inline void
1109jme_stop_pcc_timer(struct jme_adapter *jme)
1110{
1111 jwrite32(jme, JME_TMCSR, 0);
1112}
1113
1114static void
1115jme_shutdown_nic(struct jme_adapter *jme)
1116{
1117 u32 phylink;
1118
1119 phylink = jme_linkstat_from_phy(jme);
1120
1121 if (!(phylink & PHY_LINK_UP)) {
1122 /*
1123 * Disable all interrupt before issue timer
1124 */
1125 jme_stop_irq(jme);
1126 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1127 }
1128}
1129
1130static void
1131jme_pcc_tasklet(unsigned long arg)
1132{
1133 struct jme_adapter *jme = (struct jme_adapter *)arg;
1134 struct net_device *netdev = jme->dev;
1135
1136 if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1137 jme_shutdown_nic(jme);
1138 return;
1139 }
1140
1141 if (unlikely(!netif_carrier_ok(netdev) ||
1142 (atomic_read(&jme->link_changing) != 1)
1143 )) {
1144 jme_stop_pcc_timer(jme);
1145 return;
1146 }
1147
1148 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1149 jme_dynamic_pcc(jme);
1150
1151 jme_start_pcc_timer(jme);
1152}
1153
1154static inline void
1155jme_polling_mode(struct jme_adapter *jme)
1156{
1157 jme_set_rx_pcc(jme, PCC_OFF);
1158}
1159
1160static inline void
1161jme_interrupt_mode(struct jme_adapter *jme)
1162{
1163 jme_set_rx_pcc(jme, PCC_P1);
1164}
1165
1166static inline int
1167jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1168{
1169 u32 apmc;
1170 apmc = jread32(jme, JME_APMC);
1171 return apmc & JME_APMC_PSEUDO_HP_EN;
1172}
1173
1174static void
1175jme_start_shutdown_timer(struct jme_adapter *jme)
1176{
1177 u32 apmc;
1178
1179 apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1180 apmc &= ~JME_APMC_EPIEN_CTRL;
1181 if (!no_extplug) {
1182 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1183 wmb();
1184 }
1185 jwrite32f(jme, JME_APMC, apmc);
1186
1187 jwrite32f(jme, JME_TIMER2, 0);
1188 set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1189 jwrite32(jme, JME_TMCSR,
1190 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1191}
1192
1193static void
1194jme_stop_shutdown_timer(struct jme_adapter *jme)
1195{
1196 u32 apmc;
1197
1198 jwrite32f(jme, JME_TMCSR, 0);
1199 jwrite32f(jme, JME_TIMER2, 0);
1200 clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1201
1202 apmc = jread32(jme, JME_APMC);
1203 apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1204 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1205 wmb();
1206 jwrite32f(jme, JME_APMC, apmc);
1207}
1208
1209static void
1210jme_link_change_tasklet(unsigned long arg)
1211{
1212 struct jme_adapter *jme = (struct jme_adapter *)arg;
1213 struct net_device *netdev = jme->dev;
1214 int rc;
1215
1216 while (!atomic_dec_and_test(&jme->link_changing)) {
1217 atomic_inc(&jme->link_changing);
1218#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1219 msg_intr(jme, "Get link change lock failed.\n");
1220#else
1221 netif_info(jme, intr, jme->dev, "Get link change lock failed.\n");
1222#endif
1223 while (atomic_read(&jme->link_changing) != 1)
1224#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1225 msg_intr(jme, "Waiting link change lock.\n");
1226#else
1227 netif_info(jme, intr, jme->dev, "Waiting link change lock.\n");
1228#endif
1229 }
1230
1231 if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1232 goto out;
1233
1234 jme->old_mtu = netdev->mtu;
1235 netif_stop_queue(netdev);
1236 if (jme_pseudo_hotplug_enabled(jme))
1237 jme_stop_shutdown_timer(jme);
1238
1239 jme_stop_pcc_timer(jme);
1240 tasklet_disable(&jme->txclean_task);
1241 tasklet_disable(&jme->rxclean_task);
1242 tasklet_disable(&jme->rxempty_task);
1243
1244 if (netif_carrier_ok(netdev)) {
1245 jme_reset_ghc_speed(jme);
1246 jme_disable_rx_engine(jme);
1247 jme_disable_tx_engine(jme);
1248 jme_reset_mac_processor(jme);
1249 jme_free_rx_resources(jme);
1250 jme_free_tx_resources(jme);
1251
1252 if (test_bit(JME_FLAG_POLL, &jme->flags))
1253 jme_polling_mode(jme);
1254
1255 netif_carrier_off(netdev);
1256 }
1257
1258 jme_check_link(netdev, 0);
1259 if (netif_carrier_ok(netdev)) {
1260 rc = jme_setup_rx_resources(jme);
1261 if (rc) {
1262 jeprintk(jme->pdev, "Allocating resources for RX error"
1263 ", Device STOPPED!\n");
1264 goto out_enable_tasklet;
1265 }
1266
1267 rc = jme_setup_tx_resources(jme);
1268 if (rc) {
1269 jeprintk(jme->pdev, "Allocating resources for TX error"
1270 ", Device STOPPED!\n");
1271 goto err_out_free_rx_resources;
1272 }
1273
1274 jme_enable_rx_engine(jme);
1275 jme_enable_tx_engine(jme);
1276
1277 netif_start_queue(netdev);
1278
1279 if (test_bit(JME_FLAG_POLL, &jme->flags))
1280 jme_interrupt_mode(jme);
1281
1282 jme_start_pcc_timer(jme);
1283 } else if (jme_pseudo_hotplug_enabled(jme)) {
1284 jme_start_shutdown_timer(jme);
1285 }
1286
1287 goto out_enable_tasklet;
1288
1289err_out_free_rx_resources:
1290 jme_free_rx_resources(jme);
1291out_enable_tasklet:
1292 tasklet_enable(&jme->txclean_task);
1293 tasklet_hi_enable(&jme->rxclean_task);
1294 tasklet_hi_enable(&jme->rxempty_task);
1295out:
1296 atomic_inc(&jme->link_changing);
1297}
1298
1299static void
1300jme_rx_clean_tasklet(unsigned long arg)
1301{
1302 struct jme_adapter *jme = (struct jme_adapter *)arg;
1303 struct dynpcc_info *dpi = &(jme->dpi);
1304
1305 jme_process_receive(jme, jme->rx_ring_size);
1306 ++(dpi->intr_cnt);
1307
1308}
1309
1310static int
1311jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1312{
1313 struct jme_adapter *jme = jme_napi_priv(holder);
1314 DECLARE_NETDEV
1315 int rest;
1316
1317 rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1318
1319 while (atomic_read(&jme->rx_empty) > 0) {
1320 atomic_dec(&jme->rx_empty);
1321 ++(NET_STAT(jme).rx_dropped);
1322 jme_restart_rx_engine(jme);
1323 }
1324 atomic_inc(&jme->rx_empty);
1325
1326 if (rest) {
1327 JME_RX_COMPLETE(netdev, holder);
1328 jme_interrupt_mode(jme);
1329 }
1330
1331 JME_NAPI_WEIGHT_SET(budget, rest);
1332 return JME_NAPI_WEIGHT_VAL(budget) - rest;
1333}
1334
1335static void
1336jme_rx_empty_tasklet(unsigned long arg)
1337{
1338 struct jme_adapter *jme = (struct jme_adapter *)arg;
1339
1340 if (unlikely(atomic_read(&jme->link_changing) != 1))
1341 return;
1342
1343 if (unlikely(!netif_carrier_ok(jme->dev)))
1344 return;
1345
1346#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1347 msg_rx_status(jme, "RX Queue Full!\n");
1348#else
1349 netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1350#endif
1351
1352 jme_rx_clean_tasklet(arg);
1353
1354 while (atomic_read(&jme->rx_empty) > 0) {
1355 atomic_dec(&jme->rx_empty);
1356 ++(NET_STAT(jme).rx_dropped);
1357 jme_restart_rx_engine(jme);
1358 }
1359 atomic_inc(&jme->rx_empty);
1360}
1361
1362static void
1363jme_wake_queue_if_stopped(struct jme_adapter *jme)
1364{
1365 struct jme_ring *txring = &(jme->txring[0]);
1366
1367 smp_wmb();
1368 if (unlikely(netif_queue_stopped(jme->dev) &&
1369 atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1370#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1371 msg_tx_done(jme, "TX Queue Waked.\n");
1372#else
1373 netif_info(jme, tx_done, jme->dev, "TX Queue Waked.\n");
1374#endif
1375 netif_wake_queue(jme->dev);
1376 }
1377
1378}
1379
1380static void
1381jme_tx_clean_tasklet(unsigned long arg)
1382{
1383 struct jme_adapter *jme = (struct jme_adapter *)arg;
1384 struct jme_ring *txring = &(jme->txring[0]);
1385 struct txdesc *txdesc = txring->desc;
1386 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1387 int i, j, cnt = 0, max, err, mask;
1388
1389 tx_dbg(jme, "Into txclean.\n");
1390
1391 if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1392 goto out;
1393
1394 if (unlikely(atomic_read(&jme->link_changing) != 1))
1395 goto out;
1396
1397 if (unlikely(!netif_carrier_ok(jme->dev)))
1398 goto out;
1399
1400 max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1401 mask = jme->tx_ring_mask;
1402
1403 for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1404
1405 ctxbi = txbi + i;
1406
1407 if (likely(ctxbi->skb &&
1408 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1409
1410 tx_dbg(jme, "txclean: %d+%d@%lu\n",
1411 i, ctxbi->nr_desc, jiffies);
1412
1413 err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1414
1415 for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1416 ttxbi = txbi + ((i + j) & (mask));
1417 txdesc[(i + j) & (mask)].dw[0] = 0;
1418
1419 pci_unmap_page(jme->pdev,
1420 ttxbi->mapping,
1421 ttxbi->len,
1422 PCI_DMA_TODEVICE);
1423
1424 ttxbi->mapping = 0;
1425 ttxbi->len = 0;
1426 }
1427
1428 dev_kfree_skb(ctxbi->skb);
1429
1430 cnt += ctxbi->nr_desc;
1431
1432 if (unlikely(err)) {
1433 ++(NET_STAT(jme).tx_carrier_errors);
1434 } else {
1435 ++(NET_STAT(jme).tx_packets);
1436 NET_STAT(jme).tx_bytes += ctxbi->len;
1437 }
1438
1439 ctxbi->skb = NULL;
1440 ctxbi->len = 0;
1441 ctxbi->start_xmit = 0;
1442
1443 } else {
1444 break;
1445 }
1446
1447 i = (i + ctxbi->nr_desc) & mask;
1448
1449 ctxbi->nr_desc = 0;
1450 }
1451
1452 tx_dbg(jme, "txclean: done %d@%lu.\n", i, jiffies);
1453 atomic_set(&txring->next_to_clean, i);
1454 atomic_add(cnt, &txring->nr_free);
1455
1456 jme_wake_queue_if_stopped(jme);
1457
1458out:
1459 atomic_inc(&jme->tx_cleaning);
1460}
1461
1462static void
1463jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1464{
1465 /*
1466 * Disable interrupt
1467 */
1468 jwrite32f(jme, JME_IENC, INTR_ENABLE);
1469
1470 if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1471 /*
1472 * Link change event is critical
1473 * all other events are ignored
1474 */
1475 jwrite32(jme, JME_IEVE, intrstat);
1476 tasklet_schedule(&jme->linkch_task);
1477 goto out_reenable;
1478 }
1479
1480 if (intrstat & INTR_TMINTR) {
1481 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1482 tasklet_schedule(&jme->pcc_task);
1483 }
1484
1485 if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1486 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1487 tasklet_schedule(&jme->txclean_task);
1488 }
1489
1490 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1491 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1492 INTR_PCCRX0 |
1493 INTR_RX0EMP)) |
1494 INTR_RX0);
1495 }
1496
1497 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1498 if (intrstat & INTR_RX0EMP)
1499 atomic_inc(&jme->rx_empty);
1500
1501 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1502 if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1503 jme_polling_mode(jme);
1504 JME_RX_SCHEDULE(jme);
1505 }
1506 }
1507 } else {
1508 if (intrstat & INTR_RX0EMP) {
1509 atomic_inc(&jme->rx_empty);
1510 tasklet_hi_schedule(&jme->rxempty_task);
1511 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1512 tasklet_hi_schedule(&jme->rxclean_task);
1513 }
1514 }
1515
1516out_reenable:
1517 /*
1518 * Re-enable interrupt
1519 */
1520 jwrite32f(jme, JME_IENS, INTR_ENABLE);
1521}
1522
1523#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1524static irqreturn_t
1525jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1526#else
1527static irqreturn_t
1528jme_intr(int irq, void *dev_id)
1529#endif
1530{
1531 struct net_device *netdev = dev_id;
1532 struct jme_adapter *jme = netdev_priv(netdev);
1533 u32 intrstat;
1534
1535 intrstat = jread32(jme, JME_IEVE);
1536
1537 /*
1538 * Check if it's really an interrupt for us
1539 */
1540 if (unlikely((intrstat & INTR_ENABLE) == 0))
1541 return IRQ_NONE;
1542
1543 /*
1544 * Check if the device still exist
1545 */
1546 if (unlikely(intrstat == ~((typeof(intrstat))0)))
1547 return IRQ_NONE;
1548
1549 jme_intr_msi(jme, intrstat);
1550
1551 return IRQ_HANDLED;
1552}
1553
1554#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1555static irqreturn_t
1556jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1557#else
1558static irqreturn_t
1559jme_msi(int irq, void *dev_id)
1560#endif
1561{
1562 struct net_device *netdev = dev_id;
1563 struct jme_adapter *jme = netdev_priv(netdev);
1564 u32 intrstat;
1565
1566 intrstat = jread32(jme, JME_IEVE);
1567
1568 jme_intr_msi(jme, intrstat);
1569
1570 return IRQ_HANDLED;
1571}
1572
1573static void
1574jme_reset_link(struct jme_adapter *jme)
1575{
1576 jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1577}
1578
1579static void
1580jme_restart_an(struct jme_adapter *jme)
1581{
1582 u32 bmcr;
1583
1584 spin_lock_bh(&jme->phy_lock);
1585 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1586 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1587 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1588 spin_unlock_bh(&jme->phy_lock);
1589}
1590
1591static int
1592jme_request_irq(struct jme_adapter *jme)
1593{
1594 int rc;
1595 struct net_device *netdev = jme->dev;
1596#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1597 irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1598 int irq_flags = SA_SHIRQ;
1599#else
1600 irq_handler_t handler = jme_intr;
1601 int irq_flags = IRQF_SHARED;
1602#endif
1603
1604 if (!pci_enable_msi(jme->pdev)) {
1605 set_bit(JME_FLAG_MSI, &jme->flags);
1606 handler = jme_msi;
1607 irq_flags = 0;
1608 }
1609
1610 rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1611 netdev);
1612 if (rc) {
1613 jeprintk(jme->pdev,
1614 "Unable to request %s interrupt (return: %d)\n",
1615 test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1616 rc);
1617
1618 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1619 pci_disable_msi(jme->pdev);
1620 clear_bit(JME_FLAG_MSI, &jme->flags);
1621 }
1622 } else {
1623 netdev->irq = jme->pdev->irq;
1624 }
1625
1626 return rc;
1627}
1628
1629static void
1630jme_free_irq(struct jme_adapter *jme)
1631{
1632 free_irq(jme->pdev->irq, jme->dev);
1633 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1634 pci_disable_msi(jme->pdev);
1635 clear_bit(JME_FLAG_MSI, &jme->flags);
1636 jme->dev->irq = jme->pdev->irq;
1637 }
1638}
1639
1640static int
1641jme_open(struct net_device *netdev)
1642{
1643 struct jme_adapter *jme = netdev_priv(netdev);
1644 int rc;
1645
1646 jme_clear_pm(jme);
1647 JME_NAPI_ENABLE(jme);
1648
1649 tasklet_enable(&jme->linkch_task);
1650 tasklet_enable(&jme->txclean_task);
1651 tasklet_hi_enable(&jme->rxclean_task);
1652 tasklet_hi_enable(&jme->rxempty_task);
1653
1654 rc = jme_request_irq(jme);
1655 if (rc)
1656 goto err_out;
1657
1658 jme_start_irq(jme);
1659
1660 if (test_bit(JME_FLAG_SSET, &jme->flags))
1661 jme_set_settings(netdev, &jme->old_ecmd);
1662 else
1663 jme_reset_phy_processor(jme);
1664
1665 jme_reset_link(jme);
1666
1667 return 0;
1668
1669err_out:
1670 netif_stop_queue(netdev);
1671 netif_carrier_off(netdev);
1672 return rc;
1673}
1674
1675#ifdef CONFIG_PM
1676static void
1677jme_set_100m_half(struct jme_adapter *jme)
1678{
1679 u32 bmcr, tmp;
1680
1681 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1682 tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1683 BMCR_SPEED1000 | BMCR_FULLDPLX);
1684 tmp |= BMCR_SPEED100;
1685
1686 if (bmcr != tmp)
1687 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1688
1689 if (jme->fpgaver)
1690 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1691 else
1692 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1693}
1694
1695#define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1696static void
1697jme_wait_link(struct jme_adapter *jme)
1698{
1699 u32 phylink, to = JME_WAIT_LINK_TIME;
1700
1701 mdelay(1000);
1702 phylink = jme_linkstat_from_phy(jme);
1703 while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1704 mdelay(10);
1705 phylink = jme_linkstat_from_phy(jme);
1706 }
1707}
1708#endif
1709
1710static inline void
1711jme_phy_off(struct jme_adapter *jme)
1712{
1713 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
1714}
1715
1716static int
1717jme_close(struct net_device *netdev)
1718{
1719 struct jme_adapter *jme = netdev_priv(netdev);
1720
1721 netif_stop_queue(netdev);
1722 netif_carrier_off(netdev);
1723
1724 jme_stop_irq(jme);
1725 jme_free_irq(jme);
1726
1727 JME_NAPI_DISABLE(jme);
1728
1729 tasklet_disable(&jme->linkch_task);
1730 tasklet_disable(&jme->txclean_task);
1731 tasklet_disable(&jme->rxclean_task);
1732 tasklet_disable(&jme->rxempty_task);
1733
1734 jme_reset_ghc_speed(jme);
1735 jme_disable_rx_engine(jme);
1736 jme_disable_tx_engine(jme);
1737 jme_reset_mac_processor(jme);
1738 jme_free_rx_resources(jme);
1739 jme_free_tx_resources(jme);
1740 jme->phylink = 0;
1741 jme_phy_off(jme);
1742
1743 return 0;
1744}
1745
1746static int
1747jme_alloc_txdesc(struct jme_adapter *jme,
1748 struct sk_buff *skb)
1749{
1750 struct jme_ring *txring = &(jme->txring[0]);
1751 int idx, nr_alloc, mask = jme->tx_ring_mask;
1752
1753 idx = txring->next_to_use;
1754 nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1755
1756 if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1757 return -1;
1758
1759 atomic_sub(nr_alloc, &txring->nr_free);
1760
1761 txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1762
1763 return idx;
1764}
1765
1766static void
1767jme_fill_tx_map(struct pci_dev *pdev,
1768 struct txdesc *txdesc,
1769 struct jme_buffer_info *txbi,
1770 struct page *page,
1771 u32 page_offset,
1772 u32 len,
1773 u8 hidma)
1774{
1775 dma_addr_t dmaaddr;
1776
1777 dmaaddr = pci_map_page(pdev,
1778 page,
1779 page_offset,
1780 len,
1781 PCI_DMA_TODEVICE);
1782
1783 pci_dma_sync_single_for_device(pdev,
1784 dmaaddr,
1785 len,
1786 PCI_DMA_TODEVICE);
1787
1788 txdesc->dw[0] = 0;
1789 txdesc->dw[1] = 0;
1790 txdesc->desc2.flags = TXFLAG_OWN;
1791 txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0;
1792 txdesc->desc2.datalen = cpu_to_le16(len);
1793 txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32);
1794 txdesc->desc2.bufaddrl = cpu_to_le32(
1795 (__u64)dmaaddr & 0xFFFFFFFFUL);
1796
1797 txbi->mapping = dmaaddr;
1798 txbi->len = len;
1799}
1800
1801static void
1802jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1803{
1804 struct jme_ring *txring = &(jme->txring[0]);
1805 struct txdesc *txdesc = txring->desc, *ctxdesc;
1806 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1807 u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1808 int i, nr_frags = skb_shinfo(skb)->nr_frags;
1809 int mask = jme->tx_ring_mask;
1810 struct skb_frag_struct *frag;
1811 u32 len;
1812
1813 for (i = 0 ; i < nr_frags ; ++i) {
1814 frag = &skb_shinfo(skb)->frags[i];
1815 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1816 ctxbi = txbi + ((idx + i + 2) & (mask));
1817
1818 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1819 frag->page_offset, frag->size, hidma);
1820 }
1821
1822 len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1823 ctxdesc = txdesc + ((idx + 1) & (mask));
1824 ctxbi = txbi + ((idx + 1) & (mask));
1825 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1826 offset_in_page(skb->data), len, hidma);
1827
1828}
1829
1830static int
1831jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1832{
1833 if (unlikely(
1834#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1835 skb_shinfo(skb)->tso_size
1836#else
1837 skb_shinfo(skb)->gso_size
1838#endif
1839 && skb_header_cloned(skb) &&
1840 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1841 dev_kfree_skb(skb);
1842 return -1;
1843 }
1844
1845 return 0;
1846}
1847
1848static int
1849jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
1850{
1851#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1852 *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1853#else
1854 *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1855#endif
1856 if (*mss) {
1857 *flags |= TXFLAG_LSEN;
1858
1859 if (skb->protocol == htons(ETH_P_IP)) {
1860 struct iphdr *iph = ip_hdr(skb);
1861
1862 iph->check = 0;
1863 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1864 iph->daddr, 0,
1865 IPPROTO_TCP,
1866 0);
1867 } else {
1868 struct ipv6hdr *ip6h = ipv6_hdr(skb);
1869
1870 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
1871 &ip6h->daddr, 0,
1872 IPPROTO_TCP,
1873 0);
1874 }
1875
1876 return 0;
1877 }
1878
1879 return 1;
1880}
1881
1882static void
1883jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
1884{
1885#ifdef CHECKSUM_PARTIAL
1886 if (skb->ip_summed == CHECKSUM_PARTIAL)
1887#else
1888 if (skb->ip_summed == CHECKSUM_HW)
1889#endif
1890 {
1891 u8 ip_proto;
1892
1893#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1894 if (skb->protocol == htons(ETH_P_IP))
1895 ip_proto = ip_hdr(skb)->protocol;
1896 else if (skb->protocol == htons(ETH_P_IPV6))
1897 ip_proto = ipv6_hdr(skb)->nexthdr;
1898 else
1899 ip_proto = 0;
1900#else
1901 switch (skb->protocol) {
1902 case htons(ETH_P_IP):
1903 ip_proto = ip_hdr(skb)->protocol;
1904 break;
1905 case htons(ETH_P_IPV6):
1906 ip_proto = ipv6_hdr(skb)->nexthdr;
1907 break;
1908 default:
1909 ip_proto = 0;
1910 break;
1911 }
1912#endif
1913
1914 switch (ip_proto) {
1915 case IPPROTO_TCP:
1916 *flags |= TXFLAG_TCPCS;
1917 break;
1918 case IPPROTO_UDP:
1919 *flags |= TXFLAG_UDPCS;
1920 break;
1921 default:
1922#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1923 msg_tx_err(jme, "Error upper layer protocol.\n");
1924#else
1925 netif_err(jme, tx_err, jme->dev, "Error upper layer protocol.\n");
1926#endif
1927 break;
1928 }
1929 }
1930}
1931
1932static inline void
1933jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
1934{
1935 if (vlan_tx_tag_present(skb)) {
1936 *flags |= TXFLAG_TAGON;
1937 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1938 }
1939}
1940
1941static int
1942jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1943{
1944 struct jme_ring *txring = &(jme->txring[0]);
1945 struct txdesc *txdesc;
1946 struct jme_buffer_info *txbi;
1947 u8 flags;
1948
1949 txdesc = (struct txdesc *)txring->desc + idx;
1950 txbi = txring->bufinf + idx;
1951
1952 txdesc->dw[0] = 0;
1953 txdesc->dw[1] = 0;
1954 txdesc->dw[2] = 0;
1955 txdesc->dw[3] = 0;
1956 txdesc->desc1.pktsize = cpu_to_le16(skb->len);
1957 /*
1958 * Set OWN bit at final.
1959 * When kernel transmit faster than NIC.
1960 * And NIC trying to send this descriptor before we tell
1961 * it to start sending this TX queue.
1962 * Other fields are already filled correctly.
1963 */
1964 wmb();
1965 flags = TXFLAG_OWN | TXFLAG_INT;
1966 /*
1967 * Set checksum flags while not tso
1968 */
1969 if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
1970 jme_tx_csum(jme, skb, &flags);
1971 jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
1972 jme_map_tx_skb(jme, skb, idx);
1973 txdesc->desc1.flags = flags;
1974 /*
1975 * Set tx buffer info after telling NIC to send
1976 * For better tx_clean timing
1977 */
1978 wmb();
1979 txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
1980 txbi->skb = skb;
1981 txbi->len = skb->len;
1982 txbi->start_xmit = jiffies;
1983 if (!txbi->start_xmit)
1984 txbi->start_xmit = (0UL-1);
1985
1986 return 0;
1987}
1988
1989static void
1990jme_stop_queue_if_full(struct jme_adapter *jme)
1991{
1992 struct jme_ring *txring = &(jme->txring[0]);
1993 struct jme_buffer_info *txbi = txring->bufinf;
1994 int idx = atomic_read(&txring->next_to_clean);
1995
1996 txbi += idx;
1997
1998 smp_wmb();
1999 if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2000 netif_stop_queue(jme->dev);
2001#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2002 msg_tx_queued(jme, "TX Queue Paused.\n");
2003#else
2004 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused.\n");
2005#endif
2006 smp_wmb();
2007 if (atomic_read(&txring->nr_free)
2008 >= (jme->tx_wake_threshold)) {
2009 netif_wake_queue(jme->dev);
2010#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2011 msg_tx_queued(jme, "TX Queue Fast Waked.\n");
2012#else
2013 netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked.\n");
2014#endif
2015 }
2016 }
2017
2018 if (unlikely(txbi->start_xmit &&
2019 (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2020 txbi->skb)) {
2021 netif_stop_queue(jme->dev);
2022#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2023 msg_tx_queued(jme, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2024#else
2025 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2026#endif
2027 }
2028}
2029
2030/*
2031 * This function is already protected by netif_tx_lock()
2032 */
2033
2034#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2035static int
2036#else
2037static netdev_tx_t
2038#endif
2039jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2040{
2041 struct jme_adapter *jme = netdev_priv(netdev);
2042 int idx;
2043
2044 if (unlikely(jme_expand_header(jme, skb))) {
2045 ++(NET_STAT(jme).tx_dropped);
2046 return NETDEV_TX_OK;
2047 }
2048
2049 idx = jme_alloc_txdesc(jme, skb);
2050
2051 if (unlikely(idx < 0)) {
2052 netif_stop_queue(netdev);
2053#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2054 msg_tx_err(jme, "BUG! Tx ring full when queue awake!\n");
2055#else
2056 netif_err(jme, tx_err, jme->dev, "BUG! Tx ring full when queue awake!\n");
2057#endif
2058
2059 return NETDEV_TX_BUSY;
2060 }
2061
2062 jme_fill_tx_desc(jme, skb, idx);
2063
2064 jwrite32(jme, JME_TXCS, jme->reg_txcs |
2065 TXCS_SELECT_QUEUE0 |
2066 TXCS_QUEUE0S |
2067 TXCS_ENABLE);
2068#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2069 netdev->trans_start = jiffies;
2070#endif
2071
2072 tx_dbg(jme, "xmit: %d+%d@%lu\n", idx,
2073 skb_shinfo(skb)->nr_frags + 2,
2074 jiffies);
2075 jme_stop_queue_if_full(jme);
2076
2077 return NETDEV_TX_OK;
2078}
2079
2080static int
2081jme_set_macaddr(struct net_device *netdev, void *p)
2082{
2083 struct jme_adapter *jme = netdev_priv(netdev);
2084 struct sockaddr *addr = p;
2085 u32 val;
2086
2087 if (netif_running(netdev))
2088 return -EBUSY;
2089
2090 spin_lock_bh(&jme->macaddr_lock);
2091 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2092
2093 val = (addr->sa_data[3] & 0xff) << 24 |
2094 (addr->sa_data[2] & 0xff) << 16 |
2095 (addr->sa_data[1] & 0xff) << 8 |
2096 (addr->sa_data[0] & 0xff);
2097 jwrite32(jme, JME_RXUMA_LO, val);
2098 val = (addr->sa_data[5] & 0xff) << 8 |
2099 (addr->sa_data[4] & 0xff);
2100 jwrite32(jme, JME_RXUMA_HI, val);
2101 spin_unlock_bh(&jme->macaddr_lock);
2102
2103 return 0;
2104}
2105
2106static void
2107jme_set_multi(struct net_device *netdev)
2108{
2109 struct jme_adapter *jme = netdev_priv(netdev);
2110 u32 mc_hash[2] = {};
2111#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2112 int i;
2113#endif
2114
2115 spin_lock_bh(&jme->rxmcs_lock);
2116
2117 jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2118
2119 if (netdev->flags & IFF_PROMISC) {
2120 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2121 } else if (netdev->flags & IFF_ALLMULTI) {
2122 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2123 } else if (netdev->flags & IFF_MULTICAST) {
2124 struct dev_mc_list *mclist;
2125 int bit_nr;
2126
2127 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2128#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2129 for (i = 0, mclist = netdev->mc_list;
2130 mclist && i < netdev->mc_count;
2131 ++i, mclist = mclist->next) {
2132#else
2133 netdev_for_each_mc_addr(mclist, netdev) {
2134#endif
2135 bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2136 mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2137 }
2138
2139 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2140 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2141 }
2142
2143 wmb();
2144 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2145
2146 spin_unlock_bh(&jme->rxmcs_lock);
2147}
2148
2149static int
2150jme_change_mtu(struct net_device *netdev, int new_mtu)
2151{
2152 struct jme_adapter *jme = netdev_priv(netdev);
2153
2154 if (new_mtu == jme->old_mtu)
2155 return 0;
2156
2157 if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2158 ((new_mtu) < IPV6_MIN_MTU))
2159 return -EINVAL;
2160
2161 if (new_mtu > 4000) {
2162 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2163 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2164 jme_restart_rx_engine(jme);
2165 } else {
2166 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2167 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2168 jme_restart_rx_engine(jme);
2169 }
2170
2171 if (new_mtu > 1900) {
2172 netdev->features &= ~(NETIF_F_HW_CSUM |
2173 NETIF_F_TSO
2174#ifdef NETIF_F_TSO6
2175 | NETIF_F_TSO6
2176#endif
2177 );
2178 } else {
2179 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2180 netdev->features |= NETIF_F_HW_CSUM;
2181 if (test_bit(JME_FLAG_TSO, &jme->flags))
2182 netdev->features |= NETIF_F_TSO
2183#ifdef NETIF_F_TSO6
2184 | NETIF_F_TSO6
2185#endif
2186 ;
2187 }
2188
2189 netdev->mtu = new_mtu;
2190 jme_reset_link(jme);
2191
2192 return 0;
2193}
2194
2195static void
2196jme_tx_timeout(struct net_device *netdev)
2197{
2198 struct jme_adapter *jme = netdev_priv(netdev);
2199
2200 jme->phylink = 0;
2201 jme_reset_phy_processor(jme);
2202 if (test_bit(JME_FLAG_SSET, &jme->flags))
2203 jme_set_settings(netdev, &jme->old_ecmd);
2204
2205 /*
2206 * Force to Reset the link again
2207 */
2208 jme_reset_link(jme);
2209}
2210
2211static inline void jme_pause_rx(struct jme_adapter *jme)
2212{
2213 atomic_dec(&jme->link_changing);
2214
2215 jme_set_rx_pcc(jme, PCC_OFF);
2216 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2217 JME_NAPI_DISABLE(jme);
2218 } else {
2219 tasklet_disable(&jme->rxclean_task);
2220 tasklet_disable(&jme->rxempty_task);
2221 }
2222}
2223
2224static inline void jme_resume_rx(struct jme_adapter *jme)
2225{
2226 struct dynpcc_info *dpi = &(jme->dpi);
2227
2228 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2229 JME_NAPI_ENABLE(jme);
2230 } else {
2231 tasklet_hi_enable(&jme->rxclean_task);
2232 tasklet_hi_enable(&jme->rxempty_task);
2233 }
2234 dpi->cur = PCC_P1;
2235 dpi->attempt = PCC_P1;
2236 dpi->cnt = 0;
2237 jme_set_rx_pcc(jme, PCC_P1);
2238
2239 atomic_inc(&jme->link_changing);
2240}
2241
2242static void
2243jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2244{
2245 struct jme_adapter *jme = netdev_priv(netdev);
2246
2247 jme_pause_rx(jme);
2248 jme->vlgrp = grp;
2249 jme_resume_rx(jme);
2250}
2251
2252#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2253static void
2254jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2255{
2256 struct jme_adapter *jme = netdev_priv(netdev);
2257
2258 if(jme->vlgrp) {
2259 jme_pause_rx(jme);
2260#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2261 jme->vlgrp->vlan_devices[vid] = NULL;
2262#else
2263 vlan_group_set_device(jme->vlgrp, vid, NULL);
2264#endif
2265 jme_resume_rx(jme);
2266 }
2267}
2268#endif
2269
2270static void
2271jme_get_drvinfo(struct net_device *netdev,
2272 struct ethtool_drvinfo *info)
2273{
2274 struct jme_adapter *jme = netdev_priv(netdev);
2275
2276 strcpy(info->driver, DRV_NAME);
2277 strcpy(info->version, DRV_VERSION);
2278 strcpy(info->bus_info, pci_name(jme->pdev));
2279}
2280
2281static int
2282jme_get_regs_len(struct net_device *netdev)
2283{
2284 return JME_REG_LEN;
2285}
2286
2287static void
2288mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2289{
2290 int i;
2291
2292 for (i = 0 ; i < len ; i += 4)
2293 p[i >> 2] = jread32(jme, reg + i);
2294}
2295
2296static void
2297mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2298{
2299 int i;
2300 u16 *p16 = (u16 *)p;
2301
2302 for (i = 0 ; i < reg_nr ; ++i)
2303 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2304}
2305
2306static void
2307jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2308{
2309 struct jme_adapter *jme = netdev_priv(netdev);
2310 u32 *p32 = (u32 *)p;
2311
2312 memset(p, 0xFF, JME_REG_LEN);
2313
2314 regs->version = 1;
2315 mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2316
2317 p32 += 0x100 >> 2;
2318 mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2319
2320 p32 += 0x100 >> 2;
2321 mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2322
2323 p32 += 0x100 >> 2;
2324 mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2325
2326 p32 += 0x100 >> 2;
2327 mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2328}
2329
2330static int
2331jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2332{
2333 struct jme_adapter *jme = netdev_priv(netdev);
2334
2335 ecmd->tx_coalesce_usecs = PCC_TX_TO;
2336 ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2337
2338 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2339 ecmd->use_adaptive_rx_coalesce = false;
2340 ecmd->rx_coalesce_usecs = 0;
2341 ecmd->rx_max_coalesced_frames = 0;
2342 return 0;
2343 }
2344
2345 ecmd->use_adaptive_rx_coalesce = true;
2346
2347 switch (jme->dpi.cur) {
2348 case PCC_P1:
2349 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2350 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2351 break;
2352 case PCC_P2:
2353 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2354 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2355 break;
2356 case PCC_P3:
2357 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2358 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2359 break;
2360 default:
2361 break;
2362 }
2363
2364 return 0;
2365}
2366
2367static int
2368jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2369{
2370 struct jme_adapter *jme = netdev_priv(netdev);
2371 struct dynpcc_info *dpi = &(jme->dpi);
2372
2373 if (netif_running(netdev))
2374 return -EBUSY;
2375
2376 if (ecmd->use_adaptive_rx_coalesce &&
2377 test_bit(JME_FLAG_POLL, &jme->flags)) {
2378 clear_bit(JME_FLAG_POLL, &jme->flags);
2379 jme->jme_rx = netif_rx;
2380 jme->jme_vlan_rx = vlan_hwaccel_rx;
2381 dpi->cur = PCC_P1;
2382 dpi->attempt = PCC_P1;
2383 dpi->cnt = 0;
2384 jme_set_rx_pcc(jme, PCC_P1);
2385 jme_interrupt_mode(jme);
2386 } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2387 !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2388 set_bit(JME_FLAG_POLL, &jme->flags);
2389 jme->jme_rx = netif_receive_skb;
2390 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2391 jme_interrupt_mode(jme);
2392 }
2393
2394 return 0;
2395}
2396
2397static void
2398jme_get_pauseparam(struct net_device *netdev,
2399 struct ethtool_pauseparam *ecmd)
2400{
2401 struct jme_adapter *jme = netdev_priv(netdev);
2402 u32 val;
2403
2404 ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2405 ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2406
2407 spin_lock_bh(&jme->phy_lock);
2408 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2409 spin_unlock_bh(&jme->phy_lock);
2410
2411 ecmd->autoneg =
2412 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2413}
2414
2415static int
2416jme_set_pauseparam(struct net_device *netdev,
2417 struct ethtool_pauseparam *ecmd)
2418{
2419 struct jme_adapter *jme = netdev_priv(netdev);
2420 u32 val;
2421
2422 if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2423 (ecmd->tx_pause != 0)) {
2424
2425 if (ecmd->tx_pause)
2426 jme->reg_txpfc |= TXPFC_PF_EN;
2427 else
2428 jme->reg_txpfc &= ~TXPFC_PF_EN;
2429
2430 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2431 }
2432
2433 spin_lock_bh(&jme->rxmcs_lock);
2434 if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2435 (ecmd->rx_pause != 0)) {
2436
2437 if (ecmd->rx_pause)
2438 jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2439 else
2440 jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2441
2442 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2443 }
2444 spin_unlock_bh(&jme->rxmcs_lock);
2445
2446 spin_lock_bh(&jme->phy_lock);
2447 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2448 if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2449 (ecmd->autoneg != 0)) {
2450
2451 if (ecmd->autoneg)
2452 val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2453 else
2454 val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2455
2456 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2457 MII_ADVERTISE, val);
2458 }
2459 spin_unlock_bh(&jme->phy_lock);
2460
2461 return 0;
2462}
2463
2464static void
2465jme_get_wol(struct net_device *netdev,
2466 struct ethtool_wolinfo *wol)
2467{
2468 struct jme_adapter *jme = netdev_priv(netdev);
2469
2470 wol->supported = WAKE_MAGIC | WAKE_PHY;
2471
2472 wol->wolopts = 0;
2473
2474 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2475 wol->wolopts |= WAKE_PHY;
2476
2477 if (jme->reg_pmcs & PMCS_MFEN)
2478 wol->wolopts |= WAKE_MAGIC;
2479
2480}
2481
2482static int
2483jme_set_wol(struct net_device *netdev,
2484 struct ethtool_wolinfo *wol)
2485{
2486 struct jme_adapter *jme = netdev_priv(netdev);
2487
2488 if (wol->wolopts & (WAKE_MAGICSECURE |
2489 WAKE_UCAST |
2490 WAKE_MCAST |
2491 WAKE_BCAST |
2492 WAKE_ARP))
2493 return -EOPNOTSUPP;
2494
2495 jme->reg_pmcs = 0;
2496
2497 if (wol->wolopts & WAKE_PHY)
2498 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2499
2500 if (wol->wolopts & WAKE_MAGIC)
2501 jme->reg_pmcs |= PMCS_MFEN;
2502
2503 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2504
2505 return 0;
2506}
2507
2508static int
2509jme_get_settings(struct net_device *netdev,
2510 struct ethtool_cmd *ecmd)
2511{
2512 struct jme_adapter *jme = netdev_priv(netdev);
2513 int rc;
2514
2515 spin_lock_bh(&jme->phy_lock);
2516 rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2517 spin_unlock_bh(&jme->phy_lock);
2518 return rc;
2519}
2520
2521static int
2522jme_set_settings(struct net_device *netdev,
2523 struct ethtool_cmd *ecmd)
2524{
2525 struct jme_adapter *jme = netdev_priv(netdev);
2526 int rc, fdc = 0;
2527
2528 if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2529 return -EINVAL;
2530
2531 if (jme->mii_if.force_media &&
2532 ecmd->autoneg != AUTONEG_ENABLE &&
2533 (jme->mii_if.full_duplex != ecmd->duplex))
2534 fdc = 1;
2535
2536 spin_lock_bh(&jme->phy_lock);
2537 rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2538 spin_unlock_bh(&jme->phy_lock);
2539
2540 if (!rc && fdc)
2541 jme_reset_link(jme);
2542
2543 if (!rc) {
2544 set_bit(JME_FLAG_SSET, &jme->flags);
2545 jme->old_ecmd = *ecmd;
2546 }
2547
2548 return rc;
2549}
2550
2551static u32
2552jme_get_link(struct net_device *netdev)
2553{
2554 struct jme_adapter *jme = netdev_priv(netdev);
2555 return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2556}
2557
2558static u32
2559jme_get_msglevel(struct net_device *netdev)
2560{
2561 struct jme_adapter *jme = netdev_priv(netdev);
2562 return jme->msg_enable;
2563}
2564
2565static void
2566jme_set_msglevel(struct net_device *netdev, u32 value)
2567{
2568 struct jme_adapter *jme = netdev_priv(netdev);
2569 jme->msg_enable = value;
2570}
2571
2572static u32
2573jme_get_rx_csum(struct net_device *netdev)
2574{
2575 struct jme_adapter *jme = netdev_priv(netdev);
2576 return jme->reg_rxmcs & RXMCS_CHECKSUM;
2577}
2578
2579static int
2580jme_set_rx_csum(struct net_device *netdev, u32 on)
2581{
2582 struct jme_adapter *jme = netdev_priv(netdev);
2583
2584 spin_lock_bh(&jme->rxmcs_lock);
2585 if (on)
2586 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2587 else
2588 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2589 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2590 spin_unlock_bh(&jme->rxmcs_lock);
2591
2592 return 0;
2593}
2594
2595static int
2596jme_set_tx_csum(struct net_device *netdev, u32 on)
2597{
2598 struct jme_adapter *jme = netdev_priv(netdev);
2599
2600 if (on) {
2601 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2602 if (netdev->mtu <= 1900)
2603 netdev->features |= NETIF_F_HW_CSUM;
2604 } else {
2605 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2606 netdev->features &= ~NETIF_F_HW_CSUM;
2607 }
2608
2609 return 0;
2610}
2611
2612static int
2613jme_set_tso(struct net_device *netdev, u32 on)
2614{
2615 struct jme_adapter *jme = netdev_priv(netdev);
2616
2617 if (on) {
2618 set_bit(JME_FLAG_TSO, &jme->flags);
2619 if (netdev->mtu <= 1900)
2620 netdev->features |= NETIF_F_TSO
2621#ifdef NETIF_F_TSO6
2622 | NETIF_F_TSO6
2623#endif
2624 ;
2625 } else {
2626 clear_bit(JME_FLAG_TSO, &jme->flags);
2627 netdev->features &= ~(NETIF_F_TSO
2628#ifdef NETIF_F_TSO6
2629 | NETIF_F_TSO6
2630#endif
2631 );
2632 }
2633
2634 return 0;
2635}
2636
2637static int
2638jme_nway_reset(struct net_device *netdev)
2639{
2640 struct jme_adapter *jme = netdev_priv(netdev);
2641 jme_restart_an(jme);
2642 return 0;
2643}
2644
2645static u8
2646jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2647{
2648 u32 val;
2649 int to;
2650
2651 val = jread32(jme, JME_SMBCSR);
2652 to = JME_SMB_BUSY_TIMEOUT;
2653 while ((val & SMBCSR_BUSY) && --to) {
2654 msleep(1);
2655 val = jread32(jme, JME_SMBCSR);
2656 }
2657 if (!to) {
2658#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2659 msg_hw(jme, "SMB Bus Busy.\n");
2660#else
2661 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2662#endif
2663 return 0xFF;
2664 }
2665
2666 jwrite32(jme, JME_SMBINTF,
2667 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2668 SMBINTF_HWRWN_READ |
2669 SMBINTF_HWCMD);
2670
2671 val = jread32(jme, JME_SMBINTF);
2672 to = JME_SMB_BUSY_TIMEOUT;
2673 while ((val & SMBINTF_HWCMD) && --to) {
2674 msleep(1);
2675 val = jread32(jme, JME_SMBINTF);
2676 }
2677 if (!to) {
2678#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2679 msg_hw(jme, "SMB Bus Busy.\n");
2680#else
2681 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2682#endif
2683 return 0xFF;
2684 }
2685
2686 return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2687}
2688
2689static void
2690jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2691{
2692 u32 val;
2693 int to;
2694
2695 val = jread32(jme, JME_SMBCSR);
2696 to = JME_SMB_BUSY_TIMEOUT;
2697 while ((val & SMBCSR_BUSY) && --to) {
2698 msleep(1);
2699 val = jread32(jme, JME_SMBCSR);
2700 }
2701 if (!to) {
2702#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2703 msg_hw(jme, "SMB Bus Busy.\n");
2704#else
2705 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2706#endif
2707 return;
2708 }
2709
2710 jwrite32(jme, JME_SMBINTF,
2711 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2712 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2713 SMBINTF_HWRWN_WRITE |
2714 SMBINTF_HWCMD);
2715
2716 val = jread32(jme, JME_SMBINTF);
2717 to = JME_SMB_BUSY_TIMEOUT;
2718 while ((val & SMBINTF_HWCMD) && --to) {
2719 msleep(1);
2720 val = jread32(jme, JME_SMBINTF);
2721 }
2722 if (!to) {
2723#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2724 msg_hw(jme, "SMB Bus Busy.\n");
2725#else
2726 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2727#endif
2728 return;
2729 }
2730
2731 mdelay(2);
2732}
2733
2734static int
2735jme_get_eeprom_len(struct net_device *netdev)
2736{
2737 struct jme_adapter *jme = netdev_priv(netdev);
2738 u32 val;
2739 val = jread32(jme, JME_SMBCSR);
2740 return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2741}
2742
2743static int
2744jme_get_eeprom(struct net_device *netdev,
2745 struct ethtool_eeprom *eeprom, u8 *data)
2746{
2747 struct jme_adapter *jme = netdev_priv(netdev);
2748 int i, offset = eeprom->offset, len = eeprom->len;
2749
2750 /*
2751 * ethtool will check the boundary for us
2752 */
2753 eeprom->magic = JME_EEPROM_MAGIC;
2754 for (i = 0 ; i < len ; ++i)
2755 data[i] = jme_smb_read(jme, i + offset);
2756
2757 return 0;
2758}
2759
2760static int
2761jme_set_eeprom(struct net_device *netdev,
2762 struct ethtool_eeprom *eeprom, u8 *data)
2763{
2764 struct jme_adapter *jme = netdev_priv(netdev);
2765 int i, offset = eeprom->offset, len = eeprom->len;
2766
2767 if (eeprom->magic != JME_EEPROM_MAGIC)
2768 return -EINVAL;
2769
2770 /*
2771 * ethtool will check the boundary for us
2772 */
2773 for (i = 0 ; i < len ; ++i)
2774 jme_smb_write(jme, i + offset, data[i]);
2775
2776 return 0;
2777}
2778
2779#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2780static struct ethtool_ops jme_ethtool_ops = {
2781#else
2782static const struct ethtool_ops jme_ethtool_ops = {
2783#endif
2784 .get_drvinfo = jme_get_drvinfo,
2785 .get_regs_len = jme_get_regs_len,
2786 .get_regs = jme_get_regs,
2787 .get_coalesce = jme_get_coalesce,
2788 .set_coalesce = jme_set_coalesce,
2789 .get_pauseparam = jme_get_pauseparam,
2790 .set_pauseparam = jme_set_pauseparam,
2791 .get_wol = jme_get_wol,
2792 .set_wol = jme_set_wol,
2793 .get_settings = jme_get_settings,
2794 .set_settings = jme_set_settings,
2795 .get_link = jme_get_link,
2796 .get_msglevel = jme_get_msglevel,
2797 .set_msglevel = jme_set_msglevel,
2798 .get_rx_csum = jme_get_rx_csum,
2799 .set_rx_csum = jme_set_rx_csum,
2800 .set_tx_csum = jme_set_tx_csum,
2801 .set_tso = jme_set_tso,
2802 .set_sg = ethtool_op_set_sg,
2803 .nway_reset = jme_nway_reset,
2804 .get_eeprom_len = jme_get_eeprom_len,
2805 .get_eeprom = jme_get_eeprom,
2806 .set_eeprom = jme_set_eeprom,
2807};
2808
2809static int
2810jme_pci_dma64(struct pci_dev *pdev)
2811{
2812 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2813#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2814 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2815#else
2816 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2817#endif
2818 )
2819#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2820 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2821#else
2822 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2823#endif
2824 return 1;
2825
2826 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2827#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2828 !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2829#else
2830 !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2831#endif
2832 )
2833#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2834 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2835#else
2836 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2837#endif
2838 return 1;
2839
2840#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2841 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2842 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2843#else
2844 if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2845 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
2846#endif
2847 return 0;
2848
2849 return -1;
2850}
2851
2852static inline void
2853jme_phy_init(struct jme_adapter *jme)
2854{
2855 u16 reg26;
2856
2857 reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2858 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2859}
2860
2861static inline void
2862jme_check_hw_ver(struct jme_adapter *jme)
2863{
2864 u32 chipmode;
2865
2866 chipmode = jread32(jme, JME_CHIPMODE);
2867
2868 jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
2869 jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
2870}
2871
2872#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2873static const struct net_device_ops jme_netdev_ops = {
2874 .ndo_open = jme_open,
2875 .ndo_stop = jme_close,
2876 .ndo_validate_addr = eth_validate_addr,
2877 .ndo_start_xmit = jme_start_xmit,
2878 .ndo_set_mac_address = jme_set_macaddr,
2879 .ndo_set_multicast_list = jme_set_multi,
2880 .ndo_change_mtu = jme_change_mtu,
2881 .ndo_tx_timeout = jme_tx_timeout,
2882 .ndo_vlan_rx_register = jme_vlan_rx_register,
2883};
2884#endif
2885
2886static int __devinit
2887jme_init_one(struct pci_dev *pdev,
2888 const struct pci_device_id *ent)
2889{
2890 int rc = 0, using_dac, i;
2891 struct net_device *netdev;
2892 struct jme_adapter *jme;
2893 u16 bmcr, bmsr;
2894 u32 apmc;
2895
2896 /*
2897 * set up PCI device basics
2898 */
2899 rc = pci_enable_device(pdev);
2900 if (rc) {
2901 jeprintk(pdev, "Cannot enable PCI device.\n");
2902 goto err_out;
2903 }
2904
2905 using_dac = jme_pci_dma64(pdev);
2906 if (using_dac < 0) {
2907 jeprintk(pdev, "Cannot set PCI DMA Mask.\n");
2908 rc = -EIO;
2909 goto err_out_disable_pdev;
2910 }
2911
2912 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2913 jeprintk(pdev, "No PCI resource region found.\n");
2914 rc = -ENOMEM;
2915 goto err_out_disable_pdev;
2916 }
2917
2918 rc = pci_request_regions(pdev, DRV_NAME);
2919 if (rc) {
2920 jeprintk(pdev, "Cannot obtain PCI resource region.\n");
2921 goto err_out_disable_pdev;
2922 }
2923
2924 pci_set_master(pdev);
2925
2926 /*
2927 * alloc and init net device
2928 */
2929 netdev = alloc_etherdev(sizeof(*jme));
2930 if (!netdev) {
2931 jeprintk(pdev, "Cannot allocate netdev structure.\n");
2932 rc = -ENOMEM;
2933 goto err_out_release_regions;
2934 }
2935#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2936 netdev->netdev_ops = &jme_netdev_ops;
2937#else
2938 netdev->open = jme_open;
2939 netdev->stop = jme_close;
2940 netdev->hard_start_xmit = jme_start_xmit;
2941 netdev->set_mac_address = jme_set_macaddr;
2942 netdev->set_multicast_list = jme_set_multi;
2943 netdev->change_mtu = jme_change_mtu;
2944 netdev->tx_timeout = jme_tx_timeout;
2945 netdev->vlan_rx_register = jme_vlan_rx_register;
2946#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2947 netdev->vlan_rx_kill_vid = jme_vlan_rx_kill_vid;
2948#endif
2949 NETDEV_GET_STATS(netdev, &jme_get_stats);
2950#endif
2951 netdev->ethtool_ops = &jme_ethtool_ops;
2952 netdev->watchdog_timeo = TX_TIMEOUT;
2953 netdev->features = NETIF_F_HW_CSUM |
2954 NETIF_F_SG |
2955 NETIF_F_TSO |
2956#ifdef NETIF_F_TSO6
2957 NETIF_F_TSO6 |
2958#endif
2959 NETIF_F_HW_VLAN_TX |
2960 NETIF_F_HW_VLAN_RX;
2961 if (using_dac)
2962 netdev->features |= NETIF_F_HIGHDMA;
2963
2964 SET_NETDEV_DEV(netdev, &pdev->dev);
2965 pci_set_drvdata(pdev, netdev);
2966
2967 /*
2968 * init adapter info
2969 */
2970 jme = netdev_priv(netdev);
2971 jme->pdev = pdev;
2972 jme->dev = netdev;
2973 jme->jme_rx = netif_rx;
2974 jme->jme_vlan_rx = vlan_hwaccel_rx;
2975 jme->old_mtu = netdev->mtu = 1500;
2976 jme->phylink = 0;
2977 jme->tx_ring_size = 1 << 10;
2978 jme->tx_ring_mask = jme->tx_ring_size - 1;
2979 jme->tx_wake_threshold = 1 << 9;
2980 jme->rx_ring_size = 1 << 9;
2981 jme->rx_ring_mask = jme->rx_ring_size - 1;
2982 jme->msg_enable = JME_DEF_MSG_ENABLE;
2983 jme->regs = ioremap(pci_resource_start(pdev, 0),
2984 pci_resource_len(pdev, 0));
2985 if (!(jme->regs)) {
2986 jeprintk(pdev, "Mapping PCI resource region error.\n");
2987 rc = -ENOMEM;
2988 goto err_out_free_netdev;
2989 }
2990
2991 if (no_pseudohp) {
2992 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
2993 jwrite32(jme, JME_APMC, apmc);
2994 } else if (force_pseudohp) {
2995 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
2996 jwrite32(jme, JME_APMC, apmc);
2997 }
2998
2999 NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3000
3001 spin_lock_init(&jme->phy_lock);
3002 spin_lock_init(&jme->macaddr_lock);
3003 spin_lock_init(&jme->rxmcs_lock);
3004
3005 atomic_set(&jme->link_changing, 1);
3006 atomic_set(&jme->rx_cleaning, 1);
3007 atomic_set(&jme->tx_cleaning, 1);
3008 atomic_set(&jme->rx_empty, 1);
3009
3010 tasklet_init(&jme->pcc_task,
3011 jme_pcc_tasklet,
3012 (unsigned long) jme);
3013 tasklet_init(&jme->linkch_task,
3014 jme_link_change_tasklet,
3015 (unsigned long) jme);
3016 tasklet_init(&jme->txclean_task,
3017 jme_tx_clean_tasklet,
3018 (unsigned long) jme);
3019 tasklet_init(&jme->rxclean_task,
3020 jme_rx_clean_tasklet,
3021 (unsigned long) jme);
3022 tasklet_init(&jme->rxempty_task,
3023 jme_rx_empty_tasklet,
3024 (unsigned long) jme);
3025 tasklet_disable_nosync(&jme->linkch_task);
3026 tasklet_disable_nosync(&jme->txclean_task);
3027 tasklet_disable_nosync(&jme->rxclean_task);
3028 tasklet_disable_nosync(&jme->rxempty_task);
3029 jme->dpi.cur = PCC_P1;
3030
3031 jme->reg_ghc = 0;
3032 jme->reg_rxcs = RXCS_DEFAULT;
3033 jme->reg_rxmcs = RXMCS_DEFAULT;
3034 jme->reg_txpfc = 0;
3035 jme->reg_pmcs = PMCS_MFEN;
3036 set_bit(JME_FLAG_TXCSUM, &jme->flags);
3037 set_bit(JME_FLAG_TSO, &jme->flags);
3038
3039 /*
3040 * Get Max Read Req Size from PCI Config Space
3041 */
3042 pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3043 jme->mrrs &= PCI_DCSR_MRRS_MASK;
3044 switch (jme->mrrs) {
3045 case MRRS_128B:
3046 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3047 break;
3048 case MRRS_256B:
3049 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3050 break;
3051 default:
3052 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3053 break;
3054 };
3055
3056 /*
3057 * Must check before reset_mac_processor
3058 */
3059 jme_check_hw_ver(jme);
3060 jme->mii_if.dev = netdev;
3061 if (jme->fpgaver) {
3062 jme->mii_if.phy_id = 0;
3063 for (i = 1 ; i < 32 ; ++i) {
3064 bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3065 bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3066 if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3067 jme->mii_if.phy_id = i;
3068 break;
3069 }
3070 }
3071
3072 if (!jme->mii_if.phy_id) {
3073 rc = -EIO;
3074 jeprintk(pdev, "Can not find phy_id.\n");
3075 goto err_out_unmap;
3076 }
3077
3078 jme->reg_ghc |= GHC_LINK_POLL;
3079 } else {
3080 jme->mii_if.phy_id = 1;
3081 }
3082 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3083 jme->mii_if.supports_gmii = true;
3084 else
3085 jme->mii_if.supports_gmii = false;
3086 jme->mii_if.mdio_read = jme_mdio_read;
3087 jme->mii_if.mdio_write = jme_mdio_write;
3088
3089 jme_clear_pm(jme);
3090 jme_set_phyfifoa(jme);
3091 pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
3092 if (!jme->fpgaver)
3093 jme_phy_init(jme);
3094 jme_phy_off(jme);
3095
3096 /*
3097 * Reset MAC processor and reload EEPROM for MAC Address
3098 */
3099 jme_reset_mac_processor(jme);
3100 rc = jme_reload_eeprom(jme);
3101 if (rc) {
3102 jeprintk(pdev,
3103 "Reload eeprom for reading MAC Address error.\n");
3104 goto err_out_unmap;
3105 }
3106 jme_load_macaddr(netdev);
3107
3108 /*
3109 * Tell stack that we are not ready to work until open()
3110 */
3111 netif_carrier_off(netdev);
3112 netif_stop_queue(netdev);
3113
3114 /*
3115 * Register netdev
3116 */
3117 rc = register_netdev(netdev);
3118 if (rc) {
3119 jeprintk(pdev, "Cannot register net device.\n");
3120 goto err_out_unmap;
3121 }
3122
3123#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
3124 msg_probe(jme, "%s%s ver:%x rev:%x "
3125 "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3126 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3127 "JMC250 Gigabit Ethernet" :
3128 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3129 "JMC260 Fast Ethernet" : "Unknown",
3130 (jme->fpgaver != 0) ? " (FPGA)" : "",
3131 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3132 jme->rev,
3133 netdev->dev_addr[0],
3134 netdev->dev_addr[1],
3135 netdev->dev_addr[2],
3136 netdev->dev_addr[3],
3137 netdev->dev_addr[4],
3138 netdev->dev_addr[5]);
3139#else
3140 netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x macaddr:%pM\n",
3141 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3142 "JMC250 Gigabit Ethernet" :
3143 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3144 "JMC260 Fast Ethernet" : "Unknown",
3145 (jme->fpgaver != 0) ? " (FPGA)" : "",
3146 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3147 jme->rev, netdev->dev_addr);
3148#endif
3149
3150 return 0;
3151
3152err_out_unmap:
3153 iounmap(jme->regs);
3154err_out_free_netdev:
3155 pci_set_drvdata(pdev, NULL);
3156 free_netdev(netdev);
3157err_out_release_regions:
3158 pci_release_regions(pdev);
3159err_out_disable_pdev:
3160 pci_disable_device(pdev);
3161err_out:
3162 return rc;
3163}
3164
3165static void __devexit
3166jme_remove_one(struct pci_dev *pdev)
3167{
3168 struct net_device *netdev = pci_get_drvdata(pdev);
3169 struct jme_adapter *jme = netdev_priv(netdev);
3170
3171 unregister_netdev(netdev);
3172 iounmap(jme->regs);
3173 pci_set_drvdata(pdev, NULL);
3174 free_netdev(netdev);
3175 pci_release_regions(pdev);
3176 pci_disable_device(pdev);
3177
3178}
3179
3180#ifdef CONFIG_PM
3181static int
3182jme_suspend(struct pci_dev *pdev, pm_message_t state)
3183{
3184 struct net_device *netdev = pci_get_drvdata(pdev);
3185 struct jme_adapter *jme = netdev_priv(netdev);
3186
3187 atomic_dec(&jme->link_changing);
3188
3189 netif_device_detach(netdev);
3190 netif_stop_queue(netdev);
3191 jme_stop_irq(jme);
3192
3193 tasklet_disable(&jme->txclean_task);
3194 tasklet_disable(&jme->rxclean_task);
3195 tasklet_disable(&jme->rxempty_task);
3196
3197 if (netif_carrier_ok(netdev)) {
3198 if (test_bit(JME_FLAG_POLL, &jme->flags))
3199 jme_polling_mode(jme);
3200
3201 jme_stop_pcc_timer(jme);
3202 jme_reset_ghc_speed(jme);
3203 jme_disable_rx_engine(jme);
3204 jme_disable_tx_engine(jme);
3205 jme_reset_mac_processor(jme);
3206 jme_free_rx_resources(jme);
3207 jme_free_tx_resources(jme);
3208 netif_carrier_off(netdev);
3209 jme->phylink = 0;
3210 }
3211
3212 tasklet_enable(&jme->txclean_task);
3213 tasklet_hi_enable(&jme->rxclean_task);
3214 tasklet_hi_enable(&jme->rxempty_task);
3215
3216 pci_save_state(pdev);
3217 if (jme->reg_pmcs) {
3218 jme_set_100m_half(jme);
3219
3220 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
3221 jme_wait_link(jme);
3222
3223 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
3224
3225 pci_enable_wake(pdev, PCI_D3cold, true);
3226 } else {
3227 jme_phy_off(jme);
3228 }
3229 pci_set_power_state(pdev, PCI_D3cold);
3230
3231 return 0;
3232}
3233
3234static int
3235jme_resume(struct pci_dev *pdev)
3236{
3237 struct net_device *netdev = pci_get_drvdata(pdev);
3238 struct jme_adapter *jme = netdev_priv(netdev);
3239
3240 jme_clear_pm(jme);
3241 pci_restore_state(pdev);
3242
3243 if (test_bit(JME_FLAG_SSET, &jme->flags))
3244 jme_set_settings(netdev, &jme->old_ecmd);
3245 else
3246 jme_reset_phy_processor(jme);
3247
3248 jme_start_irq(jme);
3249 netif_device_attach(netdev);
3250
3251 atomic_inc(&jme->link_changing);
3252
3253 jme_reset_link(jme);
3254
3255 return 0;
3256}
3257#endif
3258
3259#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3260static struct pci_device_id jme_pci_tbl[] = {
3261#else
3262static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3263#endif
3264 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3265 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3266 { }
3267};
3268
3269static struct pci_driver jme_driver = {
3270 .name = DRV_NAME,
3271 .id_table = jme_pci_tbl,
3272 .probe = jme_init_one,
3273 .remove = __devexit_p(jme_remove_one),
3274#ifdef CONFIG_PM
3275 .suspend = jme_suspend,
3276 .resume = jme_resume,
3277#endif /* CONFIG_PM */
3278};
3279
3280static int __init
3281jme_init_module(void)
3282{
3283 printk(KERN_INFO PFX "JMicron JMC2XX ethernet "
3284 "driver version %s\n", DRV_VERSION);
3285 return pci_register_driver(&jme_driver);
3286}
3287
3288static void __exit
3289jme_cleanup_module(void)
3290{
3291 pci_unregister_driver(&jme_driver);
3292}
3293
3294module_init(jme_init_module);
3295module_exit(jme_cleanup_module);
3296
3297MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3298MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3299MODULE_LICENSE("GPL");
3300MODULE_VERSION(DRV_VERSION);
3301MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3302
JMicron Ethernet Linux driver