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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
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1/*
2 * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
3 *
4 * Copyright 2008 JMicron Technology Corporation
5 * http://www.jmicron.com/
6 *
7 * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 */
23
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/pci.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/ethtool.h>
30#include <linux/mii.h>
31#include <linux/crc32.h>
32#include <linux/delay.h>
33#include <linux/spinlock.h>
34#include <linux/in.h>
35#include <linux/ip.h>
36#include <linux/ipv6.h>
37#include <linux/tcp.h>
38#include <linux/udp.h>
39#include <linux/if_vlan.h>
40#include <linux/slab.h>
41#include <net/ip6_checksum.h>
42#include "jme.h"
43
44static int force_pseudohp = -1;
45static int no_pseudohp = -1;
46static int no_extplug = -1;
47module_param(force_pseudohp, int, 0);
48MODULE_PARM_DESC(force_pseudohp,
49 "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
50module_param(no_pseudohp, int, 0);
51MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
52module_param(no_extplug, int, 0);
53MODULE_PARM_DESC(no_extplug,
54 "Do not use external plug signal for pseudo hot-plug.");
55
56static int
57jme_mdio_read(struct net_device *netdev, int phy, int reg)
58{
59 struct jme_adapter *jme = netdev_priv(netdev);
60 int i, val, again = (reg == MII_BMSR) ? 1 : 0;
61
62read_again:
63 jwrite32(jme, JME_SMI, SMI_OP_REQ |
64 smi_phy_addr(phy) |
65 smi_reg_addr(reg));
66
67 wmb();
68 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
69 udelay(20);
70 val = jread32(jme, JME_SMI);
71 if ((val & SMI_OP_REQ) == 0)
72 break;
73 }
74
75 if (i == 0) {
76 jeprintk(jme->pdev, "phy(%d) read timeout : %d\n", phy, reg);
77 return 0;
78 }
79
80 if (again--)
81 goto read_again;
82
83 return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
84}
85
86static void
87jme_mdio_write(struct net_device *netdev,
88 int phy, int reg, int val)
89{
90 struct jme_adapter *jme = netdev_priv(netdev);
91 int i;
92
93 jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
94 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
95 smi_phy_addr(phy) | smi_reg_addr(reg));
96
97 wmb();
98 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
99 udelay(20);
100 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
101 break;
102 }
103
104 if (i == 0)
105 jeprintk(jme->pdev, "phy(%d) write timeout : %d\n", phy, reg);
106
107 return;
108}
109
110static inline void
111jme_reset_phy_processor(struct jme_adapter *jme)
112{
113 u32 val;
114
115 jme_mdio_write(jme->dev,
116 jme->mii_if.phy_id,
117 MII_ADVERTISE, ADVERTISE_ALL |
118 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
119
120 if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
121 jme_mdio_write(jme->dev,
122 jme->mii_if.phy_id,
123 MII_CTRL1000,
124 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
125
126 val = jme_mdio_read(jme->dev,
127 jme->mii_if.phy_id,
128 MII_BMCR);
129
130 jme_mdio_write(jme->dev,
131 jme->mii_if.phy_id,
132 MII_BMCR, val | BMCR_RESET);
133
134 return;
135}
136
137static void
138jme_setup_wakeup_frame(struct jme_adapter *jme,
139 u32 *mask, u32 crc, int fnr)
140{
141 int i;
142
143 /*
144 * Setup CRC pattern
145 */
146 jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
147 wmb();
148 jwrite32(jme, JME_WFODP, crc);
149 wmb();
150
151 /*
152 * Setup Mask
153 */
154 for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
155 jwrite32(jme, JME_WFOI,
156 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
157 (fnr & WFOI_FRAME_SEL));
158 wmb();
159 jwrite32(jme, JME_WFODP, mask[i]);
160 wmb();
161 }
162}
163
164static inline void
165jme_reset_mac_processor(struct jme_adapter *jme)
166{
167 u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
168 u32 crc = 0xCDCDCDCD;
169 u32 gpreg0;
170 int i;
171
172 jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
173 udelay(2);
174 jwrite32(jme, JME_GHC, jme->reg_ghc);
175
176 jwrite32(jme, JME_RXDBA_LO, 0x00000000);
177 jwrite32(jme, JME_RXDBA_HI, 0x00000000);
178 jwrite32(jme, JME_RXQDC, 0x00000000);
179 jwrite32(jme, JME_RXNDA, 0x00000000);
180 jwrite32(jme, JME_TXDBA_LO, 0x00000000);
181 jwrite32(jme, JME_TXDBA_HI, 0x00000000);
182 jwrite32(jme, JME_TXQDC, 0x00000000);
183 jwrite32(jme, JME_TXNDA, 0x00000000);
184
185 jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
186 jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
187 for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
188 jme_setup_wakeup_frame(jme, mask, crc, i);
189 if (jme->fpgaver)
190 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
191 else
192 gpreg0 = GPREG0_DEFAULT;
193 jwrite32(jme, JME_GPREG0, gpreg0);
194 jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
195}
196
197static inline void
198jme_reset_ghc_speed(struct jme_adapter *jme)
199{
200 jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX);
201 jwrite32(jme, JME_GHC, jme->reg_ghc);
202}
203
204static inline void
205jme_clear_pm(struct jme_adapter *jme)
206{
207 jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
208 pci_set_power_state(jme->pdev, PCI_D0);
209 pci_enable_wake(jme->pdev, PCI_D0, false);
210}
211
212static int
213jme_reload_eeprom(struct jme_adapter *jme)
214{
215 u32 val;
216 int i;
217
218 val = jread32(jme, JME_SMBCSR);
219
220 if (val & SMBCSR_EEPROMD) {
221 val |= SMBCSR_CNACK;
222 jwrite32(jme, JME_SMBCSR, val);
223 val |= SMBCSR_RELOAD;
224 jwrite32(jme, JME_SMBCSR, val);
225 mdelay(12);
226
227 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
228 mdelay(1);
229 if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
230 break;
231 }
232
233 if (i == 0) {
234 jeprintk(jme->pdev, "eeprom reload timeout\n");
235 return -EIO;
236 }
237 }
238
239 return 0;
240}
241
242static void
243jme_load_macaddr(struct net_device *netdev)
244{
245 struct jme_adapter *jme = netdev_priv(netdev);
246 unsigned char macaddr[6];
247 u32 val;
248
249 spin_lock_bh(&jme->macaddr_lock);
250 val = jread32(jme, JME_RXUMA_LO);
251 macaddr[0] = (val >> 0) & 0xFF;
252 macaddr[1] = (val >> 8) & 0xFF;
253 macaddr[2] = (val >> 16) & 0xFF;
254 macaddr[3] = (val >> 24) & 0xFF;
255 val = jread32(jme, JME_RXUMA_HI);
256 macaddr[4] = (val >> 0) & 0xFF;
257 macaddr[5] = (val >> 8) & 0xFF;
258 memcpy(netdev->dev_addr, macaddr, 6);
259 spin_unlock_bh(&jme->macaddr_lock);
260}
261
262static inline void
263jme_set_rx_pcc(struct jme_adapter *jme, int p)
264{
265 switch (p) {
266 case PCC_OFF:
267 jwrite32(jme, JME_PCCRX0,
268 ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
269 ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
270 break;
271 case PCC_P1:
272 jwrite32(jme, JME_PCCRX0,
273 ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
274 ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
275 break;
276 case PCC_P2:
277 jwrite32(jme, JME_PCCRX0,
278 ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
279 ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
280 break;
281 case PCC_P3:
282 jwrite32(jme, JME_PCCRX0,
283 ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
284 ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
285 break;
286 default:
287 break;
288 }
289 wmb();
290
291 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
292#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
293 msg_rx_status(jme, "Switched to PCC_P%d\n", p);
294#else
295 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
296#endif
297}
298
299static void
300jme_start_irq(struct jme_adapter *jme)
301{
302 register struct dynpcc_info *dpi = &(jme->dpi);
303
304 jme_set_rx_pcc(jme, PCC_P1);
305 dpi->cur = PCC_P1;
306 dpi->attempt = PCC_P1;
307 dpi->cnt = 0;
308
309 jwrite32(jme, JME_PCCTX,
310 ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
311 ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
312 PCCTXQ0_EN
313 );
314
315 /*
316 * Enable Interrupts
317 */
318 jwrite32(jme, JME_IENS, INTR_ENABLE);
319}
320
321static inline void
322jme_stop_irq(struct jme_adapter *jme)
323{
324 /*
325 * Disable Interrupts
326 */
327 jwrite32f(jme, JME_IENC, INTR_ENABLE);
328}
329
330static u32
331jme_linkstat_from_phy(struct jme_adapter *jme)
332{
333 u32 phylink, bmsr;
334
335 phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
336 bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
337 if (bmsr & BMSR_ANCOMP)
338 phylink |= PHY_LINK_AUTONEG_COMPLETE;
339
340 return phylink;
341}
342
343static inline void
344jme_set_phyfifoa(struct jme_adapter *jme)
345{
346 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
347}
348
349static inline void
350jme_set_phyfifob(struct jme_adapter *jme)
351{
352 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
353}
354
355static int
356jme_check_link(struct net_device *netdev, int testonly)
357{
358 struct jme_adapter *jme = netdev_priv(netdev);
359 u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
360 char linkmsg[64];
361 int rc = 0;
362
363 linkmsg[0] = '\0';
364
365 if (jme->fpgaver)
366 phylink = jme_linkstat_from_phy(jme);
367 else
368 phylink = jread32(jme, JME_PHY_LINK);
369
370 if (phylink & PHY_LINK_UP) {
371 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
372 /*
373 * If we did not enable AN
374 * Speed/Duplex Info should be obtained from SMI
375 */
376 phylink = PHY_LINK_UP;
377
378 bmcr = jme_mdio_read(jme->dev,
379 jme->mii_if.phy_id,
380 MII_BMCR);
381
382 phylink |= ((bmcr & BMCR_SPEED1000) &&
383 (bmcr & BMCR_SPEED100) == 0) ?
384 PHY_LINK_SPEED_1000M :
385 (bmcr & BMCR_SPEED100) ?
386 PHY_LINK_SPEED_100M :
387 PHY_LINK_SPEED_10M;
388
389 phylink |= (bmcr & BMCR_FULLDPLX) ?
390 PHY_LINK_DUPLEX : 0;
391
392 strcat(linkmsg, "Forced: ");
393 } else {
394 /*
395 * Keep polling for speed/duplex resolve complete
396 */
397 while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
398 --cnt) {
399
400 udelay(1);
401
402 if (jme->fpgaver)
403 phylink = jme_linkstat_from_phy(jme);
404 else
405 phylink = jread32(jme, JME_PHY_LINK);
406 }
407 if (!cnt)
408 jeprintk(jme->pdev,
409 "Waiting speed resolve timeout.\n");
410
411 strcat(linkmsg, "ANed: ");
412 }
413
414 if (jme->phylink == phylink) {
415 rc = 1;
416 goto out;
417 }
418 if (testonly)
419 goto out;
420
421 jme->phylink = phylink;
422
423 ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX |
424 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE |
425 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY);
426 switch (phylink & PHY_LINK_SPEED_MASK) {
427 case PHY_LINK_SPEED_10M:
428 ghc |= GHC_SPEED_10M |
429 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
430 strcat(linkmsg, "10 Mbps, ");
431 break;
432 case PHY_LINK_SPEED_100M:
433 ghc |= GHC_SPEED_100M |
434 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
435 strcat(linkmsg, "100 Mbps, ");
436 break;
437 case PHY_LINK_SPEED_1000M:
438 ghc |= GHC_SPEED_1000M |
439 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
440 strcat(linkmsg, "1000 Mbps, ");
441 break;
442 default:
443 break;
444 }
445
446 if (phylink & PHY_LINK_DUPLEX) {
447 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
448 ghc |= GHC_DPX;
449 } else {
450 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
451 TXMCS_BACKOFF |
452 TXMCS_CARRIERSENSE |
453 TXMCS_COLLISION);
454 jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
455 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
456 TXTRHD_TXREN |
457 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
458 }
459
460 gpreg1 = GPREG1_DEFAULT;
461 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
462 if (!(phylink & PHY_LINK_DUPLEX))
463 gpreg1 |= GPREG1_HALFMODEPATCH;
464 switch (phylink & PHY_LINK_SPEED_MASK) {
465 case PHY_LINK_SPEED_10M:
466 jme_set_phyfifoa(jme);
467 gpreg1 |= GPREG1_RSSPATCH;
468 break;
469 case PHY_LINK_SPEED_100M:
470 jme_set_phyfifob(jme);
471 gpreg1 |= GPREG1_RSSPATCH;
472 break;
473 case PHY_LINK_SPEED_1000M:
474 jme_set_phyfifoa(jme);
475 break;
476 default:
477 break;
478 }
479 }
480
481 jwrite32(jme, JME_GPREG1, gpreg1);
482 jwrite32(jme, JME_GHC, ghc);
483 jme->reg_ghc = ghc;
484
485 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
486 "Full-Duplex, " :
487 "Half-Duplex, ");
488 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
489 "MDI-X" :
490 "MDI");
491#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
492 msg_link(jme, "Link is up at %s.\n", linkmsg);
493#else
494 netif_info(jme, link, jme->dev, "Link is up at %s.\n", linkmsg);
495#endif
496 netif_carrier_on(netdev);
497 } else {
498 if (testonly)
499 goto out;
500
501#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
502 msg_link(jme, "Link is down.\n");
503#else
504 netif_info(jme, link, jme->dev, "Link is down.\n");
505#endif
506 jme->phylink = 0;
507 netif_carrier_off(netdev);
508 }
509
510out:
511 return rc;
512}
513
514static int
515jme_setup_tx_resources(struct jme_adapter *jme)
516{
517 struct jme_ring *txring = &(jme->txring[0]);
518
519 txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
520 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
521 &(txring->dmaalloc),
522 GFP_ATOMIC);
523
524 if (!txring->alloc)
525 goto err_set_null;
526
527 /*
528 * 16 Bytes align
529 */
530 txring->desc = (void *)ALIGN((unsigned long)(txring->alloc),
531 RING_DESC_ALIGN);
532 txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
533 txring->next_to_use = 0;
534 atomic_set(&txring->next_to_clean, 0);
535 atomic_set(&txring->nr_free, jme->tx_ring_size);
536
537 txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
538 jme->tx_ring_size, GFP_ATOMIC);
539 if (unlikely(!(txring->bufinf)))
540 goto err_free_txring;
541
542 /*
543 * Initialize Transmit Descriptors
544 */
545 memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
546 memset(txring->bufinf, 0,
547 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
548
549 return 0;
550
551err_free_txring:
552 dma_free_coherent(&(jme->pdev->dev),
553 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
554 txring->alloc,
555 txring->dmaalloc);
556
557err_set_null:
558 txring->desc = NULL;
559 txring->dmaalloc = 0;
560 txring->dma = 0;
561 txring->bufinf = NULL;
562
563 return -ENOMEM;
564}
565
566static void
567jme_free_tx_resources(struct jme_adapter *jme)
568{
569 int i;
570 struct jme_ring *txring = &(jme->txring[0]);
571 struct jme_buffer_info *txbi;
572
573 if (txring->alloc) {
574 if (txring->bufinf) {
575 for (i = 0 ; i < jme->tx_ring_size ; ++i) {
576 txbi = txring->bufinf + i;
577 if (txbi->skb) {
578 dev_kfree_skb(txbi->skb);
579 txbi->skb = NULL;
580 }
581 txbi->mapping = 0;
582 txbi->len = 0;
583 txbi->nr_desc = 0;
584 txbi->start_xmit = 0;
585 }
586 kfree(txring->bufinf);
587 }
588
589 dma_free_coherent(&(jme->pdev->dev),
590 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
591 txring->alloc,
592 txring->dmaalloc);
593
594 txring->alloc = NULL;
595 txring->desc = NULL;
596 txring->dmaalloc = 0;
597 txring->dma = 0;
598 txring->bufinf = NULL;
599 }
600 txring->next_to_use = 0;
601 atomic_set(&txring->next_to_clean, 0);
602 atomic_set(&txring->nr_free, 0);
603}
604
605static inline void
606jme_enable_tx_engine(struct jme_adapter *jme)
607{
608 /*
609 * Select Queue 0
610 */
611 jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
612 wmb();
613
614 /*
615 * Setup TX Queue 0 DMA Bass Address
616 */
617 jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
618 jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
619 jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
620
621 /*
622 * Setup TX Descptor Count
623 */
624 jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
625
626 /*
627 * Enable TX Engine
628 */
629 wmb();
630 jwrite32(jme, JME_TXCS, jme->reg_txcs |
631 TXCS_SELECT_QUEUE0 |
632 TXCS_ENABLE);
633
634}
635
636static inline void
637jme_restart_tx_engine(struct jme_adapter *jme)
638{
639 /*
640 * Restart TX Engine
641 */
642 jwrite32(jme, JME_TXCS, jme->reg_txcs |
643 TXCS_SELECT_QUEUE0 |
644 TXCS_ENABLE);
645}
646
647static inline void
648jme_disable_tx_engine(struct jme_adapter *jme)
649{
650 int i;
651 u32 val;
652
653 /*
654 * Disable TX Engine
655 */
656 jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
657 wmb();
658
659 val = jread32(jme, JME_TXCS);
660 for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
661 mdelay(1);
662 val = jread32(jme, JME_TXCS);
663 rmb();
664 }
665
666 if (!i)
667 jeprintk(jme->pdev, "Disable TX engine timeout.\n");
668}
669
670static void
671jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
672{
673 struct jme_ring *rxring = &(jme->rxring[0]);
674 register struct rxdesc *rxdesc = rxring->desc;
675 struct jme_buffer_info *rxbi = rxring->bufinf;
676 rxdesc += i;
677 rxbi += i;
678
679 rxdesc->dw[0] = 0;
680 rxdesc->dw[1] = 0;
681 rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32);
682 rxdesc->desc1.bufaddrl = cpu_to_le32(
683 (__u64)rxbi->mapping & 0xFFFFFFFFUL);
684 rxdesc->desc1.datalen = cpu_to_le16(rxbi->len);
685 if (jme->dev->features & NETIF_F_HIGHDMA)
686 rxdesc->desc1.flags = RXFLAG_64BIT;
687 wmb();
688 rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT;
689}
690
691static int
692jme_make_new_rx_buf(struct jme_adapter *jme, int i)
693{
694 struct jme_ring *rxring = &(jme->rxring[0]);
695 struct jme_buffer_info *rxbi = rxring->bufinf + i;
696 struct sk_buff *skb;
697
698 skb = netdev_alloc_skb(jme->dev,
699 jme->dev->mtu + RX_EXTRA_LEN);
700 if (unlikely(!skb))
701 return -ENOMEM;
702#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
703 skb->dev = jme->dev;
704#endif
705
706 rxbi->skb = skb;
707 rxbi->len = skb_tailroom(skb);
708 rxbi->mapping = pci_map_page(jme->pdev,
709 virt_to_page(skb->data),
710 offset_in_page(skb->data),
711 rxbi->len,
712 PCI_DMA_FROMDEVICE);
713
714 return 0;
715}
716
717static void
718jme_free_rx_buf(struct jme_adapter *jme, int i)
719{
720 struct jme_ring *rxring = &(jme->rxring[0]);
721 struct jme_buffer_info *rxbi = rxring->bufinf;
722 rxbi += i;
723
724 if (rxbi->skb) {
725 pci_unmap_page(jme->pdev,
726 rxbi->mapping,
727 rxbi->len,
728 PCI_DMA_FROMDEVICE);
729 dev_kfree_skb(rxbi->skb);
730 rxbi->skb = NULL;
731 rxbi->mapping = 0;
732 rxbi->len = 0;
733 }
734}
735
736static void
737jme_free_rx_resources(struct jme_adapter *jme)
738{
739 int i;
740 struct jme_ring *rxring = &(jme->rxring[0]);
741
742 if (rxring->alloc) {
743 if (rxring->bufinf) {
744 for (i = 0 ; i < jme->rx_ring_size ; ++i)
745 jme_free_rx_buf(jme, i);
746 kfree(rxring->bufinf);
747 }
748
749 dma_free_coherent(&(jme->pdev->dev),
750 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
751 rxring->alloc,
752 rxring->dmaalloc);
753 rxring->alloc = NULL;
754 rxring->desc = NULL;
755 rxring->dmaalloc = 0;
756 rxring->dma = 0;
757 rxring->bufinf = NULL;
758 }
759 rxring->next_to_use = 0;
760 atomic_set(&rxring->next_to_clean, 0);
761}
762
763static int
764jme_setup_rx_resources(struct jme_adapter *jme)
765{
766 int i;
767 struct jme_ring *rxring = &(jme->rxring[0]);
768
769 rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
770 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
771 &(rxring->dmaalloc),
772 GFP_ATOMIC);
773 if (!rxring->alloc)
774 goto err_set_null;
775
776 /*
777 * 16 Bytes align
778 */
779 rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc),
780 RING_DESC_ALIGN);
781 rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
782 rxring->next_to_use = 0;
783 atomic_set(&rxring->next_to_clean, 0);
784
785 rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
786 jme->rx_ring_size, GFP_ATOMIC);
787 if (unlikely(!(rxring->bufinf)))
788 goto err_free_rxring;
789
790 /*
791 * Initiallize Receive Descriptors
792 */
793 memset(rxring->bufinf, 0,
794 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
795 for (i = 0 ; i < jme->rx_ring_size ; ++i) {
796 if (unlikely(jme_make_new_rx_buf(jme, i))) {
797 jme_free_rx_resources(jme);
798 return -ENOMEM;
799 }
800
801 jme_set_clean_rxdesc(jme, i);
802 }
803
804 return 0;
805
806err_free_rxring:
807 dma_free_coherent(&(jme->pdev->dev),
808 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
809 rxring->alloc,
810 rxring->dmaalloc);
811err_set_null:
812 rxring->desc = NULL;
813 rxring->dmaalloc = 0;
814 rxring->dma = 0;
815 rxring->bufinf = NULL;
816
817 return -ENOMEM;
818}
819
820static inline void
821jme_enable_rx_engine(struct jme_adapter *jme)
822{
823 /*
824 * Select Queue 0
825 */
826 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
827 RXCS_QUEUESEL_Q0);
828 wmb();
829
830 /*
831 * Setup RX DMA Bass Address
832 */
833 jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
834 jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
835 jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
836
837 /*
838 * Setup RX Descriptor Count
839 */
840 jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
841
842 /*
843 * Setup Unicast Filter
844 */
845 jme_set_multi(jme->dev);
846
847 /*
848 * Enable RX Engine
849 */
850 wmb();
851 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
852 RXCS_QUEUESEL_Q0 |
853 RXCS_ENABLE |
854 RXCS_QST);
855}
856
857static inline void
858jme_restart_rx_engine(struct jme_adapter *jme)
859{
860 /*
861 * Start RX Engine
862 */
863 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
864 RXCS_QUEUESEL_Q0 |
865 RXCS_ENABLE |
866 RXCS_QST);
867}
868
869static inline void
870jme_disable_rx_engine(struct jme_adapter *jme)
871{
872 int i;
873 u32 val;
874
875 /*
876 * Disable RX Engine
877 */
878 jwrite32(jme, JME_RXCS, jme->reg_rxcs);
879 wmb();
880
881 val = jread32(jme, JME_RXCS);
882 for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
883 mdelay(1);
884 val = jread32(jme, JME_RXCS);
885 rmb();
886 }
887
888 if (!i)
889 jeprintk(jme->pdev, "Disable RX engine timeout.\n");
890
891}
892
893static int
894jme_rxsum_ok(struct jme_adapter *jme, u16 flags)
895{
896 if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
897 return false;
898
899 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
900 == RXWBFLAG_TCPON)) {
901 if (flags & RXWBFLAG_IPV4)
902#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
903 msg_rx_err(jme, "TCP Checksum error\n");
904#else
905 netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
906#endif
907 return false;
908 }
909
910 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
911 == RXWBFLAG_UDPON)) {
912 if (flags & RXWBFLAG_IPV4)
913#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
914 msg_rx_err(jme, "UDP Checksum error.\n");
915#else
916 netif_err(jme, rx_err, jme->dev, "UDP Checksum error.\n");
917#endif
918 return false;
919 }
920
921 if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
922 == RXWBFLAG_IPV4)) {
923#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
924 msg_rx_err(jme, "IPv4 Checksum error.\n");
925#else
926 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error.\n");
927#endif
928 return false;
929 }
930
931 return true;
932}
933
934static void
935jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
936{
937 struct jme_ring *rxring = &(jme->rxring[0]);
938 struct rxdesc *rxdesc = rxring->desc;
939 struct jme_buffer_info *rxbi = rxring->bufinf;
940 struct sk_buff *skb;
941 int framesize;
942
943 rxdesc += idx;
944 rxbi += idx;
945
946 skb = rxbi->skb;
947 pci_dma_sync_single_for_cpu(jme->pdev,
948 rxbi->mapping,
949 rxbi->len,
950 PCI_DMA_FROMDEVICE);
951
952 if (unlikely(jme_make_new_rx_buf(jme, idx))) {
953 pci_dma_sync_single_for_device(jme->pdev,
954 rxbi->mapping,
955 rxbi->len,
956 PCI_DMA_FROMDEVICE);
957
958 ++(NET_STAT(jme).rx_dropped);
959 } else {
960 framesize = le16_to_cpu(rxdesc->descwb.framesize)
961 - RX_PREPAD_SIZE;
962
963 skb_reserve(skb, RX_PREPAD_SIZE);
964 skb_put(skb, framesize);
965 skb->protocol = eth_type_trans(skb, jme->dev);
966
967 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags)))
968 skb->ip_summed = CHECKSUM_UNNECESSARY;
969 else
970 skb->ip_summed = CHECKSUM_NONE;
971
972 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
973 if (jme->vlgrp) {
974 jme->jme_vlan_rx(skb, jme->vlgrp,
975 le16_to_cpu(rxdesc->descwb.vlan));
976 NET_STAT(jme).rx_bytes += 4;
977 } else {
978 dev_kfree_skb(skb);
979 }
980 } else {
981 jme->jme_rx(skb);
982 }
983
984 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
985 cpu_to_le16(RXWBFLAG_DEST_MUL))
986 ++(NET_STAT(jme).multicast);
987
988 NET_STAT(jme).rx_bytes += framesize;
989 ++(NET_STAT(jme).rx_packets);
990 }
991
992 jme_set_clean_rxdesc(jme, idx);
993
994}
995
996static int
997jme_process_receive(struct jme_adapter *jme, int limit)
998{
999 struct jme_ring *rxring = &(jme->rxring[0]);
1000 struct rxdesc *rxdesc = rxring->desc;
1001 int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1002
1003 if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1004 goto out_inc;
1005
1006 if (unlikely(atomic_read(&jme->link_changing) != 1))
1007 goto out_inc;
1008
1009 if (unlikely(!netif_carrier_ok(jme->dev)))
1010 goto out_inc;
1011
1012 i = atomic_read(&rxring->next_to_clean);
1013 while (limit > 0) {
1014 rxdesc = rxring->desc;
1015 rxdesc += i;
1016
1017 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1018 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1019 goto out;
1020 --limit;
1021
1022 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1023
1024 if (unlikely(desccnt > 1 ||
1025 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1026
1027 if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1028 ++(NET_STAT(jme).rx_crc_errors);
1029 else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1030 ++(NET_STAT(jme).rx_fifo_errors);
1031 else
1032 ++(NET_STAT(jme).rx_errors);
1033
1034 if (desccnt > 1)
1035 limit -= desccnt - 1;
1036
1037 for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1038 jme_set_clean_rxdesc(jme, j);
1039 j = (j + 1) & (mask);
1040 }
1041
1042 } else {
1043 jme_alloc_and_feed_skb(jme, i);
1044 }
1045
1046 i = (i + desccnt) & (mask);
1047 }
1048
1049out:
1050 atomic_set(&rxring->next_to_clean, i);
1051
1052out_inc:
1053 atomic_inc(&jme->rx_cleaning);
1054
1055 return limit > 0 ? limit : 0;
1056
1057}
1058
1059static void
1060jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1061{
1062 if (likely(atmp == dpi->cur)) {
1063 dpi->cnt = 0;
1064 return;
1065 }
1066
1067 if (dpi->attempt == atmp) {
1068 ++(dpi->cnt);
1069 } else {
1070 dpi->attempt = atmp;
1071 dpi->cnt = 0;
1072 }
1073
1074}
1075
1076static void
1077jme_dynamic_pcc(struct jme_adapter *jme)
1078{
1079 register struct dynpcc_info *dpi = &(jme->dpi);
1080
1081 if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1082 jme_attempt_pcc(dpi, PCC_P3);
1083 else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1084 dpi->intr_cnt > PCC_INTR_THRESHOLD)
1085 jme_attempt_pcc(dpi, PCC_P2);
1086 else
1087 jme_attempt_pcc(dpi, PCC_P1);
1088
1089 if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1090 if (dpi->attempt < dpi->cur)
1091 tasklet_schedule(&jme->rxclean_task);
1092 jme_set_rx_pcc(jme, dpi->attempt);
1093 dpi->cur = dpi->attempt;
1094 dpi->cnt = 0;
1095 }
1096}
1097
1098static void
1099jme_start_pcc_timer(struct jme_adapter *jme)
1100{
1101 struct dynpcc_info *dpi = &(jme->dpi);
1102 dpi->last_bytes = NET_STAT(jme).rx_bytes;
1103 dpi->last_pkts = NET_STAT(jme).rx_packets;
1104 dpi->intr_cnt = 0;
1105 jwrite32(jme, JME_TMCSR,
1106 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1107}
1108
1109static inline void
1110jme_stop_pcc_timer(struct jme_adapter *jme)
1111{
1112 jwrite32(jme, JME_TMCSR, 0);
1113}
1114
1115static void
1116jme_shutdown_nic(struct jme_adapter *jme)
1117{
1118 u32 phylink;
1119
1120 phylink = jme_linkstat_from_phy(jme);
1121
1122 if (!(phylink & PHY_LINK_UP)) {
1123 /*
1124 * Disable all interrupt before issue timer
1125 */
1126 jme_stop_irq(jme);
1127 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1128 }
1129}
1130
1131static void
1132jme_pcc_tasklet(unsigned long arg)
1133{
1134 struct jme_adapter *jme = (struct jme_adapter *)arg;
1135 struct net_device *netdev = jme->dev;
1136
1137 if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1138 jme_shutdown_nic(jme);
1139 return;
1140 }
1141
1142 if (unlikely(!netif_carrier_ok(netdev) ||
1143 (atomic_read(&jme->link_changing) != 1)
1144 )) {
1145 jme_stop_pcc_timer(jme);
1146 return;
1147 }
1148
1149 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1150 jme_dynamic_pcc(jme);
1151
1152 jme_start_pcc_timer(jme);
1153}
1154
1155static inline void
1156jme_polling_mode(struct jme_adapter *jme)
1157{
1158 jme_set_rx_pcc(jme, PCC_OFF);
1159}
1160
1161static inline void
1162jme_interrupt_mode(struct jme_adapter *jme)
1163{
1164 jme_set_rx_pcc(jme, PCC_P1);
1165}
1166
1167static inline int
1168jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1169{
1170 u32 apmc;
1171 apmc = jread32(jme, JME_APMC);
1172 return apmc & JME_APMC_PSEUDO_HP_EN;
1173}
1174
1175static void
1176jme_start_shutdown_timer(struct jme_adapter *jme)
1177{
1178 u32 apmc;
1179
1180 apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1181 apmc &= ~JME_APMC_EPIEN_CTRL;
1182 if (!no_extplug) {
1183 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1184 wmb();
1185 }
1186 jwrite32f(jme, JME_APMC, apmc);
1187
1188 jwrite32f(jme, JME_TIMER2, 0);
1189 set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1190 jwrite32(jme, JME_TMCSR,
1191 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1192}
1193
1194static void
1195jme_stop_shutdown_timer(struct jme_adapter *jme)
1196{
1197 u32 apmc;
1198
1199 jwrite32f(jme, JME_TMCSR, 0);
1200 jwrite32f(jme, JME_TIMER2, 0);
1201 clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1202
1203 apmc = jread32(jme, JME_APMC);
1204 apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1205 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1206 wmb();
1207 jwrite32f(jme, JME_APMC, apmc);
1208}
1209
1210static void
1211jme_link_change_tasklet(unsigned long arg)
1212{
1213 struct jme_adapter *jme = (struct jme_adapter *)arg;
1214 struct net_device *netdev = jme->dev;
1215 int rc;
1216
1217 while (!atomic_dec_and_test(&jme->link_changing)) {
1218 atomic_inc(&jme->link_changing);
1219#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1220 msg_intr(jme, "Get link change lock failed.\n");
1221#else
1222 netif_info(jme, intr, jme->dev, "Get link change lock failed.\n");
1223#endif
1224 while (atomic_read(&jme->link_changing) != 1)
1225#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1226 msg_intr(jme, "Waiting link change lock.\n");
1227#else
1228 netif_info(jme, intr, jme->dev, "Waiting link change lock.\n");
1229#endif
1230 }
1231
1232 if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1233 goto out;
1234
1235 jme->old_mtu = netdev->mtu;
1236 netif_stop_queue(netdev);
1237 if (jme_pseudo_hotplug_enabled(jme))
1238 jme_stop_shutdown_timer(jme);
1239
1240 jme_stop_pcc_timer(jme);
1241 tasklet_disable(&jme->txclean_task);
1242 tasklet_disable(&jme->rxclean_task);
1243 tasklet_disable(&jme->rxempty_task);
1244
1245 if (netif_carrier_ok(netdev)) {
1246 jme_reset_ghc_speed(jme);
1247 jme_disable_rx_engine(jme);
1248 jme_disable_tx_engine(jme);
1249 jme_reset_mac_processor(jme);
1250 jme_free_rx_resources(jme);
1251 jme_free_tx_resources(jme);
1252
1253 if (test_bit(JME_FLAG_POLL, &jme->flags))
1254 jme_polling_mode(jme);
1255
1256 netif_carrier_off(netdev);
1257 }
1258
1259 jme_check_link(netdev, 0);
1260 if (netif_carrier_ok(netdev)) {
1261 rc = jme_setup_rx_resources(jme);
1262 if (rc) {
1263 jeprintk(jme->pdev, "Allocating resources for RX error"
1264 ", Device STOPPED!\n");
1265 goto out_enable_tasklet;
1266 }
1267
1268 rc = jme_setup_tx_resources(jme);
1269 if (rc) {
1270 jeprintk(jme->pdev, "Allocating resources for TX error"
1271 ", Device STOPPED!\n");
1272 goto err_out_free_rx_resources;
1273 }
1274
1275 jme_enable_rx_engine(jme);
1276 jme_enable_tx_engine(jme);
1277
1278 netif_start_queue(netdev);
1279
1280 if (test_bit(JME_FLAG_POLL, &jme->flags))
1281 jme_interrupt_mode(jme);
1282
1283 jme_start_pcc_timer(jme);
1284 } else if (jme_pseudo_hotplug_enabled(jme)) {
1285 jme_start_shutdown_timer(jme);
1286 }
1287
1288 goto out_enable_tasklet;
1289
1290err_out_free_rx_resources:
1291 jme_free_rx_resources(jme);
1292out_enable_tasklet:
1293 tasklet_enable(&jme->txclean_task);
1294 tasklet_hi_enable(&jme->rxclean_task);
1295 tasklet_hi_enable(&jme->rxempty_task);
1296out:
1297 atomic_inc(&jme->link_changing);
1298}
1299
1300static void
1301jme_rx_clean_tasklet(unsigned long arg)
1302{
1303 struct jme_adapter *jme = (struct jme_adapter *)arg;
1304 struct dynpcc_info *dpi = &(jme->dpi);
1305
1306 jme_process_receive(jme, jme->rx_ring_size);
1307 ++(dpi->intr_cnt);
1308
1309}
1310
1311static int
1312jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1313{
1314 struct jme_adapter *jme = jme_napi_priv(holder);
1315 DECLARE_NETDEV
1316 int rest;
1317
1318 rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1319
1320 while (atomic_read(&jme->rx_empty) > 0) {
1321 atomic_dec(&jme->rx_empty);
1322 ++(NET_STAT(jme).rx_dropped);
1323 jme_restart_rx_engine(jme);
1324 }
1325 atomic_inc(&jme->rx_empty);
1326
1327 if (rest) {
1328 JME_RX_COMPLETE(netdev, holder);
1329 jme_interrupt_mode(jme);
1330 }
1331
1332 JME_NAPI_WEIGHT_SET(budget, rest);
1333 return JME_NAPI_WEIGHT_VAL(budget) - rest;
1334}
1335
1336static void
1337jme_rx_empty_tasklet(unsigned long arg)
1338{
1339 struct jme_adapter *jme = (struct jme_adapter *)arg;
1340
1341 if (unlikely(atomic_read(&jme->link_changing) != 1))
1342 return;
1343
1344 if (unlikely(!netif_carrier_ok(jme->dev)))
1345 return;
1346
1347#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1348 msg_rx_status(jme, "RX Queue Full!\n");
1349#else
1350 netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1351#endif
1352
1353 jme_rx_clean_tasklet(arg);
1354
1355 while (atomic_read(&jme->rx_empty) > 0) {
1356 atomic_dec(&jme->rx_empty);
1357 ++(NET_STAT(jme).rx_dropped);
1358 jme_restart_rx_engine(jme);
1359 }
1360 atomic_inc(&jme->rx_empty);
1361}
1362
1363static void
1364jme_wake_queue_if_stopped(struct jme_adapter *jme)
1365{
1366 struct jme_ring *txring = &(jme->txring[0]);
1367
1368 smp_wmb();
1369 if (unlikely(netif_queue_stopped(jme->dev) &&
1370 atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1371#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1372 msg_tx_done(jme, "TX Queue Waked.\n");
1373#else
1374 netif_info(jme, tx_done, jme->dev, "TX Queue Waked.\n");
1375#endif
1376 netif_wake_queue(jme->dev);
1377 }
1378
1379}
1380
1381static void
1382jme_tx_clean_tasklet(unsigned long arg)
1383{
1384 struct jme_adapter *jme = (struct jme_adapter *)arg;
1385 struct jme_ring *txring = &(jme->txring[0]);
1386 struct txdesc *txdesc = txring->desc;
1387 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1388 int i, j, cnt = 0, max, err, mask;
1389
1390 tx_dbg(jme, "Into txclean.\n");
1391
1392 if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1393 goto out;
1394
1395 if (unlikely(atomic_read(&jme->link_changing) != 1))
1396 goto out;
1397
1398 if (unlikely(!netif_carrier_ok(jme->dev)))
1399 goto out;
1400
1401 max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1402 mask = jme->tx_ring_mask;
1403
1404 for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1405
1406 ctxbi = txbi + i;
1407
1408 if (likely(ctxbi->skb &&
1409 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1410
1411 tx_dbg(jme, "txclean: %d+%d@%lu\n",
1412 i, ctxbi->nr_desc, jiffies);
1413
1414 err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1415
1416 for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1417 ttxbi = txbi + ((i + j) & (mask));
1418 txdesc[(i + j) & (mask)].dw[0] = 0;
1419
1420 pci_unmap_page(jme->pdev,
1421 ttxbi->mapping,
1422 ttxbi->len,
1423 PCI_DMA_TODEVICE);
1424
1425 ttxbi->mapping = 0;
1426 ttxbi->len = 0;
1427 }
1428
1429 dev_kfree_skb(ctxbi->skb);
1430
1431 cnt += ctxbi->nr_desc;
1432
1433 if (unlikely(err)) {
1434 ++(NET_STAT(jme).tx_carrier_errors);
1435 } else {
1436 ++(NET_STAT(jme).tx_packets);
1437 NET_STAT(jme).tx_bytes += ctxbi->len;
1438 }
1439
1440 ctxbi->skb = NULL;
1441 ctxbi->len = 0;
1442 ctxbi->start_xmit = 0;
1443
1444 } else {
1445 break;
1446 }
1447
1448 i = (i + ctxbi->nr_desc) & mask;
1449
1450 ctxbi->nr_desc = 0;
1451 }
1452
1453 tx_dbg(jme, "txclean: done %d@%lu.\n", i, jiffies);
1454 atomic_set(&txring->next_to_clean, i);
1455 atomic_add(cnt, &txring->nr_free);
1456
1457 jme_wake_queue_if_stopped(jme);
1458
1459out:
1460 atomic_inc(&jme->tx_cleaning);
1461}
1462
1463static void
1464jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1465{
1466 /*
1467 * Disable interrupt
1468 */
1469 jwrite32f(jme, JME_IENC, INTR_ENABLE);
1470
1471 if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1472 /*
1473 * Link change event is critical
1474 * all other events are ignored
1475 */
1476 jwrite32(jme, JME_IEVE, intrstat);
1477 tasklet_schedule(&jme->linkch_task);
1478 goto out_reenable;
1479 }
1480
1481 if (intrstat & INTR_TMINTR) {
1482 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1483 tasklet_schedule(&jme->pcc_task);
1484 }
1485
1486 if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1487 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1488 tasklet_schedule(&jme->txclean_task);
1489 }
1490
1491 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1492 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1493 INTR_PCCRX0 |
1494 INTR_RX0EMP)) |
1495 INTR_RX0);
1496 }
1497
1498 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1499 if (intrstat & INTR_RX0EMP)
1500 atomic_inc(&jme->rx_empty);
1501
1502 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1503 if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1504 jme_polling_mode(jme);
1505 JME_RX_SCHEDULE(jme);
1506 }
1507 }
1508 } else {
1509 if (intrstat & INTR_RX0EMP) {
1510 atomic_inc(&jme->rx_empty);
1511 tasklet_hi_schedule(&jme->rxempty_task);
1512 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1513 tasklet_hi_schedule(&jme->rxclean_task);
1514 }
1515 }
1516
1517out_reenable:
1518 /*
1519 * Re-enable interrupt
1520 */
1521 jwrite32f(jme, JME_IENS, INTR_ENABLE);
1522}
1523
1524#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1525static irqreturn_t
1526jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1527#else
1528static irqreturn_t
1529jme_intr(int irq, void *dev_id)
1530#endif
1531{
1532 struct net_device *netdev = dev_id;
1533 struct jme_adapter *jme = netdev_priv(netdev);
1534 u32 intrstat;
1535
1536 intrstat = jread32(jme, JME_IEVE);
1537
1538 /*
1539 * Check if it's really an interrupt for us
1540 */
1541 if (unlikely((intrstat & INTR_ENABLE) == 0))
1542 return IRQ_NONE;
1543
1544 /*
1545 * Check if the device still exist
1546 */
1547 if (unlikely(intrstat == ~((typeof(intrstat))0)))
1548 return IRQ_NONE;
1549
1550 jme_intr_msi(jme, intrstat);
1551
1552 return IRQ_HANDLED;
1553}
1554
1555#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1556static irqreturn_t
1557jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1558#else
1559static irqreturn_t
1560jme_msi(int irq, void *dev_id)
1561#endif
1562{
1563 struct net_device *netdev = dev_id;
1564 struct jme_adapter *jme = netdev_priv(netdev);
1565 u32 intrstat;
1566
1567 intrstat = jread32(jme, JME_IEVE);
1568
1569 jme_intr_msi(jme, intrstat);
1570
1571 return IRQ_HANDLED;
1572}
1573
1574static void
1575jme_reset_link(struct jme_adapter *jme)
1576{
1577 jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1578}
1579
1580static void
1581jme_restart_an(struct jme_adapter *jme)
1582{
1583 u32 bmcr;
1584
1585 spin_lock_bh(&jme->phy_lock);
1586 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1587 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1588 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1589 spin_unlock_bh(&jme->phy_lock);
1590}
1591
1592static int
1593jme_request_irq(struct jme_adapter *jme)
1594{
1595 int rc;
1596 struct net_device *netdev = jme->dev;
1597#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1598 irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1599 int irq_flags = SA_SHIRQ;
1600#else
1601 irq_handler_t handler = jme_intr;
1602 int irq_flags = IRQF_SHARED;
1603#endif
1604
1605 if (!pci_enable_msi(jme->pdev)) {
1606 set_bit(JME_FLAG_MSI, &jme->flags);
1607 handler = jme_msi;
1608 irq_flags = 0;
1609 }
1610
1611 rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1612 netdev);
1613 if (rc) {
1614 jeprintk(jme->pdev,
1615 "Unable to request %s interrupt (return: %d)\n",
1616 test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1617 rc);
1618
1619 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1620 pci_disable_msi(jme->pdev);
1621 clear_bit(JME_FLAG_MSI, &jme->flags);
1622 }
1623 } else {
1624 netdev->irq = jme->pdev->irq;
1625 }
1626
1627 return rc;
1628}
1629
1630static void
1631jme_free_irq(struct jme_adapter *jme)
1632{
1633 free_irq(jme->pdev->irq, jme->dev);
1634 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1635 pci_disable_msi(jme->pdev);
1636 clear_bit(JME_FLAG_MSI, &jme->flags);
1637 jme->dev->irq = jme->pdev->irq;
1638 }
1639}
1640
1641static int
1642jme_open(struct net_device *netdev)
1643{
1644 struct jme_adapter *jme = netdev_priv(netdev);
1645 int rc;
1646
1647 jme_clear_pm(jme);
1648 JME_NAPI_ENABLE(jme);
1649
1650 tasklet_enable(&jme->linkch_task);
1651 tasklet_enable(&jme->txclean_task);
1652 tasklet_hi_enable(&jme->rxclean_task);
1653 tasklet_hi_enable(&jme->rxempty_task);
1654
1655 rc = jme_request_irq(jme);
1656 if (rc)
1657 goto err_out;
1658
1659 jme_start_irq(jme);
1660
1661 if (test_bit(JME_FLAG_SSET, &jme->flags))
1662 jme_set_settings(netdev, &jme->old_ecmd);
1663 else
1664 jme_reset_phy_processor(jme);
1665
1666 jme_reset_link(jme);
1667
1668 return 0;
1669
1670err_out:
1671 netif_stop_queue(netdev);
1672 netif_carrier_off(netdev);
1673 return rc;
1674}
1675
1676#ifdef CONFIG_PM
1677static void
1678jme_set_100m_half(struct jme_adapter *jme)
1679{
1680 u32 bmcr, tmp;
1681
1682 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1683 tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1684 BMCR_SPEED1000 | BMCR_FULLDPLX);
1685 tmp |= BMCR_SPEED100;
1686
1687 if (bmcr != tmp)
1688 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1689
1690 if (jme->fpgaver)
1691 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1692 else
1693 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1694}
1695
1696#define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1697static void
1698jme_wait_link(struct jme_adapter *jme)
1699{
1700 u32 phylink, to = JME_WAIT_LINK_TIME;
1701
1702 mdelay(1000);
1703 phylink = jme_linkstat_from_phy(jme);
1704 while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1705 mdelay(10);
1706 phylink = jme_linkstat_from_phy(jme);
1707 }
1708}
1709#endif
1710
1711static inline void
1712jme_phy_off(struct jme_adapter *jme)
1713{
1714 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
1715}
1716
1717static int
1718jme_close(struct net_device *netdev)
1719{
1720 struct jme_adapter *jme = netdev_priv(netdev);
1721
1722 netif_stop_queue(netdev);
1723 netif_carrier_off(netdev);
1724
1725 jme_stop_irq(jme);
1726 jme_free_irq(jme);
1727
1728 JME_NAPI_DISABLE(jme);
1729
1730 tasklet_disable(&jme->linkch_task);
1731 tasklet_disable(&jme->txclean_task);
1732 tasklet_disable(&jme->rxclean_task);
1733 tasklet_disable(&jme->rxempty_task);
1734
1735 jme_reset_ghc_speed(jme);
1736 jme_disable_rx_engine(jme);
1737 jme_disable_tx_engine(jme);
1738 jme_reset_mac_processor(jme);
1739 jme_free_rx_resources(jme);
1740 jme_free_tx_resources(jme);
1741 jme->phylink = 0;
1742 jme_phy_off(jme);
1743
1744 return 0;
1745}
1746
1747static int
1748jme_alloc_txdesc(struct jme_adapter *jme,
1749 struct sk_buff *skb)
1750{
1751 struct jme_ring *txring = &(jme->txring[0]);
1752 int idx, nr_alloc, mask = jme->tx_ring_mask;
1753
1754 idx = txring->next_to_use;
1755 nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1756
1757 if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1758 return -1;
1759
1760 atomic_sub(nr_alloc, &txring->nr_free);
1761
1762 txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1763
1764 return idx;
1765}
1766
1767static void
1768jme_fill_tx_map(struct pci_dev *pdev,
1769 struct txdesc *txdesc,
1770 struct jme_buffer_info *txbi,
1771 struct page *page,
1772 u32 page_offset,
1773 u32 len,
1774 u8 hidma)
1775{
1776 dma_addr_t dmaaddr;
1777
1778 dmaaddr = pci_map_page(pdev,
1779 page,
1780 page_offset,
1781 len,
1782 PCI_DMA_TODEVICE);
1783
1784 pci_dma_sync_single_for_device(pdev,
1785 dmaaddr,
1786 len,
1787 PCI_DMA_TODEVICE);
1788
1789 txdesc->dw[0] = 0;
1790 txdesc->dw[1] = 0;
1791 txdesc->desc2.flags = TXFLAG_OWN;
1792 txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0;
1793 txdesc->desc2.datalen = cpu_to_le16(len);
1794 txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32);
1795 txdesc->desc2.bufaddrl = cpu_to_le32(
1796 (__u64)dmaaddr & 0xFFFFFFFFUL);
1797
1798 txbi->mapping = dmaaddr;
1799 txbi->len = len;
1800}
1801
1802static void
1803jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1804{
1805 struct jme_ring *txring = &(jme->txring[0]);
1806 struct txdesc *txdesc = txring->desc, *ctxdesc;
1807 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1808 u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1809 int i, nr_frags = skb_shinfo(skb)->nr_frags;
1810 int mask = jme->tx_ring_mask;
1811 struct skb_frag_struct *frag;
1812 u32 len;
1813
1814 for (i = 0 ; i < nr_frags ; ++i) {
1815 frag = &skb_shinfo(skb)->frags[i];
1816 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1817 ctxbi = txbi + ((idx + i + 2) & (mask));
1818
1819 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1820 frag->page_offset, frag->size, hidma);
1821 }
1822
1823 len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1824 ctxdesc = txdesc + ((idx + 1) & (mask));
1825 ctxbi = txbi + ((idx + 1) & (mask));
1826 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1827 offset_in_page(skb->data), len, hidma);
1828
1829}
1830
1831static int
1832jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1833{
1834 if (unlikely(
1835#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1836 skb_shinfo(skb)->tso_size
1837#else
1838 skb_shinfo(skb)->gso_size
1839#endif
1840 && skb_header_cloned(skb) &&
1841 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1842 dev_kfree_skb(skb);
1843 return -1;
1844 }
1845
1846 return 0;
1847}
1848
1849static int
1850jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
1851{
1852#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1853 *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1854#else
1855 *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1856#endif
1857 if (*mss) {
1858 *flags |= TXFLAG_LSEN;
1859
1860 if (skb->protocol == htons(ETH_P_IP)) {
1861 struct iphdr *iph = ip_hdr(skb);
1862
1863 iph->check = 0;
1864 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1865 iph->daddr, 0,
1866 IPPROTO_TCP,
1867 0);
1868 } else {
1869 struct ipv6hdr *ip6h = ipv6_hdr(skb);
1870
1871 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
1872 &ip6h->daddr, 0,
1873 IPPROTO_TCP,
1874 0);
1875 }
1876
1877 return 0;
1878 }
1879
1880 return 1;
1881}
1882
1883static void
1884jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
1885{
1886#ifdef CHECKSUM_PARTIAL
1887 if (skb->ip_summed == CHECKSUM_PARTIAL)
1888#else
1889 if (skb->ip_summed == CHECKSUM_HW)
1890#endif
1891 {
1892 u8 ip_proto;
1893
1894#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1895 if (skb->protocol == htons(ETH_P_IP))
1896 ip_proto = ip_hdr(skb)->protocol;
1897 else if (skb->protocol == htons(ETH_P_IPV6))
1898 ip_proto = ipv6_hdr(skb)->nexthdr;
1899 else
1900 ip_proto = 0;
1901#else
1902 switch (skb->protocol) {
1903 case htons(ETH_P_IP):
1904 ip_proto = ip_hdr(skb)->protocol;
1905 break;
1906 case htons(ETH_P_IPV6):
1907 ip_proto = ipv6_hdr(skb)->nexthdr;
1908 break;
1909 default:
1910 ip_proto = 0;
1911 break;
1912 }
1913#endif
1914
1915 switch (ip_proto) {
1916 case IPPROTO_TCP:
1917 *flags |= TXFLAG_TCPCS;
1918 break;
1919 case IPPROTO_UDP:
1920 *flags |= TXFLAG_UDPCS;
1921 break;
1922 default:
1923#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
1924 msg_tx_err(jme, "Error upper layer protocol.\n");
1925#else
1926 netif_err(jme, tx_err, jme->dev, "Error upper layer protocol.\n");
1927#endif
1928 break;
1929 }
1930 }
1931}
1932
1933static inline void
1934jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
1935{
1936 if (vlan_tx_tag_present(skb)) {
1937 *flags |= TXFLAG_TAGON;
1938 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1939 }
1940}
1941
1942static int
1943jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1944{
1945 struct jme_ring *txring = &(jme->txring[0]);
1946 struct txdesc *txdesc;
1947 struct jme_buffer_info *txbi;
1948 u8 flags;
1949
1950 txdesc = (struct txdesc *)txring->desc + idx;
1951 txbi = txring->bufinf + idx;
1952
1953 txdesc->dw[0] = 0;
1954 txdesc->dw[1] = 0;
1955 txdesc->dw[2] = 0;
1956 txdesc->dw[3] = 0;
1957 txdesc->desc1.pktsize = cpu_to_le16(skb->len);
1958 /*
1959 * Set OWN bit at final.
1960 * When kernel transmit faster than NIC.
1961 * And NIC trying to send this descriptor before we tell
1962 * it to start sending this TX queue.
1963 * Other fields are already filled correctly.
1964 */
1965 wmb();
1966 flags = TXFLAG_OWN | TXFLAG_INT;
1967 /*
1968 * Set checksum flags while not tso
1969 */
1970 if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
1971 jme_tx_csum(jme, skb, &flags);
1972 jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
1973 jme_map_tx_skb(jme, skb, idx);
1974 txdesc->desc1.flags = flags;
1975 /*
1976 * Set tx buffer info after telling NIC to send
1977 * For better tx_clean timing
1978 */
1979 wmb();
1980 txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
1981 txbi->skb = skb;
1982 txbi->len = skb->len;
1983 txbi->start_xmit = jiffies;
1984 if (!txbi->start_xmit)
1985 txbi->start_xmit = (0UL-1);
1986
1987 return 0;
1988}
1989
1990static void
1991jme_stop_queue_if_full(struct jme_adapter *jme)
1992{
1993 struct jme_ring *txring = &(jme->txring[0]);
1994 struct jme_buffer_info *txbi = txring->bufinf;
1995 int idx = atomic_read(&txring->next_to_clean);
1996
1997 txbi += idx;
1998
1999 smp_wmb();
2000 if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2001 netif_stop_queue(jme->dev);
2002#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2003 msg_tx_queued(jme, "TX Queue Paused.\n");
2004#else
2005 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused.\n");
2006#endif
2007 smp_wmb();
2008 if (atomic_read(&txring->nr_free)
2009 >= (jme->tx_wake_threshold)) {
2010 netif_wake_queue(jme->dev);
2011#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2012 msg_tx_queued(jme, "TX Queue Fast Waked.\n");
2013#else
2014 netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked.\n");
2015#endif
2016 }
2017 }
2018
2019 if (unlikely(txbi->start_xmit &&
2020 (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2021 txbi->skb)) {
2022 netif_stop_queue(jme->dev);
2023#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2024 msg_tx_queued(jme, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2025#else
2026 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2027#endif
2028 }
2029}
2030
2031/*
2032 * This function is already protected by netif_tx_lock()
2033 */
2034
2035#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2036static int
2037#else
2038static netdev_tx_t
2039#endif
2040jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2041{
2042 struct jme_adapter *jme = netdev_priv(netdev);
2043 int idx;
2044
2045 if (unlikely(jme_expand_header(jme, skb))) {
2046 ++(NET_STAT(jme).tx_dropped);
2047 return NETDEV_TX_OK;
2048 }
2049
2050 idx = jme_alloc_txdesc(jme, skb);
2051
2052 if (unlikely(idx < 0)) {
2053 netif_stop_queue(netdev);
2054#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2055 msg_tx_err(jme, "BUG! Tx ring full when queue awake!\n");
2056#else
2057 netif_err(jme, tx_err, jme->dev, "BUG! Tx ring full when queue awake!\n");
2058#endif
2059
2060 return NETDEV_TX_BUSY;
2061 }
2062
2063 jme_fill_tx_desc(jme, skb, idx);
2064
2065 jwrite32(jme, JME_TXCS, jme->reg_txcs |
2066 TXCS_SELECT_QUEUE0 |
2067 TXCS_QUEUE0S |
2068 TXCS_ENABLE);
2069#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2070 netdev->trans_start = jiffies;
2071#endif
2072
2073 tx_dbg(jme, "xmit: %d+%d@%lu\n", idx,
2074 skb_shinfo(skb)->nr_frags + 2,
2075 jiffies);
2076 jme_stop_queue_if_full(jme);
2077
2078 return NETDEV_TX_OK;
2079}
2080
2081static int
2082jme_set_macaddr(struct net_device *netdev, void *p)
2083{
2084 struct jme_adapter *jme = netdev_priv(netdev);
2085 struct sockaddr *addr = p;
2086 u32 val;
2087
2088 if (netif_running(netdev))
2089 return -EBUSY;
2090
2091 spin_lock_bh(&jme->macaddr_lock);
2092 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2093
2094 val = (addr->sa_data[3] & 0xff) << 24 |
2095 (addr->sa_data[2] & 0xff) << 16 |
2096 (addr->sa_data[1] & 0xff) << 8 |
2097 (addr->sa_data[0] & 0xff);
2098 jwrite32(jme, JME_RXUMA_LO, val);
2099 val = (addr->sa_data[5] & 0xff) << 8 |
2100 (addr->sa_data[4] & 0xff);
2101 jwrite32(jme, JME_RXUMA_HI, val);
2102 spin_unlock_bh(&jme->macaddr_lock);
2103
2104 return 0;
2105}
2106
2107static void
2108jme_set_multi(struct net_device *netdev)
2109{
2110 struct jme_adapter *jme = netdev_priv(netdev);
2111 u32 mc_hash[2] = {};
2112#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2113 int i;
2114#endif
2115
2116 spin_lock_bh(&jme->rxmcs_lock);
2117
2118 jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2119
2120 if (netdev->flags & IFF_PROMISC) {
2121 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2122 } else if (netdev->flags & IFF_ALLMULTI) {
2123 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2124 } else if (netdev->flags & IFF_MULTICAST) {
2125 struct dev_mc_list *mclist;
2126 int bit_nr;
2127
2128 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2129#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2130 for (i = 0, mclist = netdev->mc_list;
2131 mclist && i < netdev->mc_count;
2132 ++i, mclist = mclist->next) {
2133#else
2134 netdev_for_each_mc_addr(mclist, netdev) {
2135#endif
2136 bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2137 mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2138 }
2139
2140 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2141 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2142 }
2143
2144 wmb();
2145 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2146
2147 spin_unlock_bh(&jme->rxmcs_lock);
2148}
2149
2150static int
2151jme_change_mtu(struct net_device *netdev, int new_mtu)
2152{
2153 struct jme_adapter *jme = netdev_priv(netdev);
2154
2155 if (new_mtu == jme->old_mtu)
2156 return 0;
2157
2158 if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2159 ((new_mtu) < IPV6_MIN_MTU))
2160 return -EINVAL;
2161
2162 if (new_mtu > 4000) {
2163 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2164 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2165 jme_restart_rx_engine(jme);
2166 } else {
2167 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2168 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2169 jme_restart_rx_engine(jme);
2170 }
2171
2172 if (new_mtu > 1900) {
2173 netdev->features &= ~(NETIF_F_HW_CSUM |
2174 NETIF_F_TSO
2175#ifdef NETIF_F_TSO6
2176 | NETIF_F_TSO6
2177#endif
2178 );
2179 } else {
2180 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2181 netdev->features |= NETIF_F_HW_CSUM;
2182 if (test_bit(JME_FLAG_TSO, &jme->flags))
2183 netdev->features |= NETIF_F_TSO
2184#ifdef NETIF_F_TSO6
2185 | NETIF_F_TSO6
2186#endif
2187 ;
2188 }
2189
2190 netdev->mtu = new_mtu;
2191 jme_reset_link(jme);
2192
2193 return 0;
2194}
2195
2196static void
2197jme_tx_timeout(struct net_device *netdev)
2198{
2199 struct jme_adapter *jme = netdev_priv(netdev);
2200
2201 jme->phylink = 0;
2202 jme_reset_phy_processor(jme);
2203 if (test_bit(JME_FLAG_SSET, &jme->flags))
2204 jme_set_settings(netdev, &jme->old_ecmd);
2205
2206 /*
2207 * Force to Reset the link again
2208 */
2209 jme_reset_link(jme);
2210}
2211
2212static inline void jme_pause_rx(struct jme_adapter *jme)
2213{
2214 atomic_dec(&jme->link_changing);
2215
2216 jme_set_rx_pcc(jme, PCC_OFF);
2217 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2218 JME_NAPI_DISABLE(jme);
2219 } else {
2220 tasklet_disable(&jme->rxclean_task);
2221 tasklet_disable(&jme->rxempty_task);
2222 }
2223}
2224
2225static inline void jme_resume_rx(struct jme_adapter *jme)
2226{
2227 struct dynpcc_info *dpi = &(jme->dpi);
2228
2229 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2230 JME_NAPI_ENABLE(jme);
2231 } else {
2232 tasklet_hi_enable(&jme->rxclean_task);
2233 tasklet_hi_enable(&jme->rxempty_task);
2234 }
2235 dpi->cur = PCC_P1;
2236 dpi->attempt = PCC_P1;
2237 dpi->cnt = 0;
2238 jme_set_rx_pcc(jme, PCC_P1);
2239
2240 atomic_inc(&jme->link_changing);
2241}
2242
2243static void
2244jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2245{
2246 struct jme_adapter *jme = netdev_priv(netdev);
2247
2248 jme_pause_rx(jme);
2249 jme->vlgrp = grp;
2250 jme_resume_rx(jme);
2251}
2252
2253#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2254static void
2255jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2256{
2257 struct jme_adapter *jme = netdev_priv(netdev);
2258
2259 if(jme->vlgrp) {
2260 jme_pause_rx(jme);
2261#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2262 jme->vlgrp->vlan_devices[vid] = NULL;
2263#else
2264 vlan_group_set_device(jme->vlgrp, vid, NULL);
2265#endif
2266 jme_resume_rx(jme);
2267 }
2268}
2269#endif
2270
2271static void
2272jme_get_drvinfo(struct net_device *netdev,
2273 struct ethtool_drvinfo *info)
2274{
2275 struct jme_adapter *jme = netdev_priv(netdev);
2276
2277 strcpy(info->driver, DRV_NAME);
2278 strcpy(info->version, DRV_VERSION);
2279 strcpy(info->bus_info, pci_name(jme->pdev));
2280}
2281
2282static int
2283jme_get_regs_len(struct net_device *netdev)
2284{
2285 return JME_REG_LEN;
2286}
2287
2288static void
2289mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2290{
2291 int i;
2292
2293 for (i = 0 ; i < len ; i += 4)
2294 p[i >> 2] = jread32(jme, reg + i);
2295}
2296
2297static void
2298mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2299{
2300 int i;
2301 u16 *p16 = (u16 *)p;
2302
2303 for (i = 0 ; i < reg_nr ; ++i)
2304 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2305}
2306
2307static void
2308jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2309{
2310 struct jme_adapter *jme = netdev_priv(netdev);
2311 u32 *p32 = (u32 *)p;
2312
2313 memset(p, 0xFF, JME_REG_LEN);
2314
2315 regs->version = 1;
2316 mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2317
2318 p32 += 0x100 >> 2;
2319 mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2320
2321 p32 += 0x100 >> 2;
2322 mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2323
2324 p32 += 0x100 >> 2;
2325 mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2326
2327 p32 += 0x100 >> 2;
2328 mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2329}
2330
2331static int
2332jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2333{
2334 struct jme_adapter *jme = netdev_priv(netdev);
2335
2336 ecmd->tx_coalesce_usecs = PCC_TX_TO;
2337 ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2338
2339 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2340 ecmd->use_adaptive_rx_coalesce = false;
2341 ecmd->rx_coalesce_usecs = 0;
2342 ecmd->rx_max_coalesced_frames = 0;
2343 return 0;
2344 }
2345
2346 ecmd->use_adaptive_rx_coalesce = true;
2347
2348 switch (jme->dpi.cur) {
2349 case PCC_P1:
2350 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2351 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2352 break;
2353 case PCC_P2:
2354 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2355 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2356 break;
2357 case PCC_P3:
2358 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2359 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2360 break;
2361 default:
2362 break;
2363 }
2364
2365 return 0;
2366}
2367
2368static int
2369jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2370{
2371 struct jme_adapter *jme = netdev_priv(netdev);
2372 struct dynpcc_info *dpi = &(jme->dpi);
2373
2374 if (netif_running(netdev))
2375 return -EBUSY;
2376
2377 if (ecmd->use_adaptive_rx_coalesce &&
2378 test_bit(JME_FLAG_POLL, &jme->flags)) {
2379 clear_bit(JME_FLAG_POLL, &jme->flags);
2380 jme->jme_rx = netif_rx;
2381 jme->jme_vlan_rx = vlan_hwaccel_rx;
2382 dpi->cur = PCC_P1;
2383 dpi->attempt = PCC_P1;
2384 dpi->cnt = 0;
2385 jme_set_rx_pcc(jme, PCC_P1);
2386 jme_interrupt_mode(jme);
2387 } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2388 !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2389 set_bit(JME_FLAG_POLL, &jme->flags);
2390 jme->jme_rx = netif_receive_skb;
2391 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2392 jme_interrupt_mode(jme);
2393 }
2394
2395 return 0;
2396}
2397
2398static void
2399jme_get_pauseparam(struct net_device *netdev,
2400 struct ethtool_pauseparam *ecmd)
2401{
2402 struct jme_adapter *jme = netdev_priv(netdev);
2403 u32 val;
2404
2405 ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2406 ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2407
2408 spin_lock_bh(&jme->phy_lock);
2409 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2410 spin_unlock_bh(&jme->phy_lock);
2411
2412 ecmd->autoneg =
2413 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2414}
2415
2416static int
2417jme_set_pauseparam(struct net_device *netdev,
2418 struct ethtool_pauseparam *ecmd)
2419{
2420 struct jme_adapter *jme = netdev_priv(netdev);
2421 u32 val;
2422
2423 if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2424 (ecmd->tx_pause != 0)) {
2425
2426 if (ecmd->tx_pause)
2427 jme->reg_txpfc |= TXPFC_PF_EN;
2428 else
2429 jme->reg_txpfc &= ~TXPFC_PF_EN;
2430
2431 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2432 }
2433
2434 spin_lock_bh(&jme->rxmcs_lock);
2435 if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2436 (ecmd->rx_pause != 0)) {
2437
2438 if (ecmd->rx_pause)
2439 jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2440 else
2441 jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2442
2443 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2444 }
2445 spin_unlock_bh(&jme->rxmcs_lock);
2446
2447 spin_lock_bh(&jme->phy_lock);
2448 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2449 if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2450 (ecmd->autoneg != 0)) {
2451
2452 if (ecmd->autoneg)
2453 val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2454 else
2455 val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2456
2457 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2458 MII_ADVERTISE, val);
2459 }
2460 spin_unlock_bh(&jme->phy_lock);
2461
2462 return 0;
2463}
2464
2465static void
2466jme_get_wol(struct net_device *netdev,
2467 struct ethtool_wolinfo *wol)
2468{
2469 struct jme_adapter *jme = netdev_priv(netdev);
2470
2471 wol->supported = WAKE_MAGIC | WAKE_PHY;
2472
2473 wol->wolopts = 0;
2474
2475 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2476 wol->wolopts |= WAKE_PHY;
2477
2478 if (jme->reg_pmcs & PMCS_MFEN)
2479 wol->wolopts |= WAKE_MAGIC;
2480
2481}
2482
2483static int
2484jme_set_wol(struct net_device *netdev,
2485 struct ethtool_wolinfo *wol)
2486{
2487 struct jme_adapter *jme = netdev_priv(netdev);
2488
2489 if (wol->wolopts & (WAKE_MAGICSECURE |
2490 WAKE_UCAST |
2491 WAKE_MCAST |
2492 WAKE_BCAST |
2493 WAKE_ARP))
2494 return -EOPNOTSUPP;
2495
2496 jme->reg_pmcs = 0;
2497
2498 if (wol->wolopts & WAKE_PHY)
2499 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2500
2501 if (wol->wolopts & WAKE_MAGIC)
2502 jme->reg_pmcs |= PMCS_MFEN;
2503
2504 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2505
2506 return 0;
2507}
2508
2509static int
2510jme_get_settings(struct net_device *netdev,
2511 struct ethtool_cmd *ecmd)
2512{
2513 struct jme_adapter *jme = netdev_priv(netdev);
2514 int rc;
2515
2516 spin_lock_bh(&jme->phy_lock);
2517 rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2518 spin_unlock_bh(&jme->phy_lock);
2519 return rc;
2520}
2521
2522static int
2523jme_set_settings(struct net_device *netdev,
2524 struct ethtool_cmd *ecmd)
2525{
2526 struct jme_adapter *jme = netdev_priv(netdev);
2527 int rc, fdc = 0;
2528
2529 if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2530 return -EINVAL;
2531
2532 if (jme->mii_if.force_media &&
2533 ecmd->autoneg != AUTONEG_ENABLE &&
2534 (jme->mii_if.full_duplex != ecmd->duplex))
2535 fdc = 1;
2536
2537 spin_lock_bh(&jme->phy_lock);
2538 rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2539 spin_unlock_bh(&jme->phy_lock);
2540
2541 if (!rc && fdc)
2542 jme_reset_link(jme);
2543
2544 if (!rc) {
2545 set_bit(JME_FLAG_SSET, &jme->flags);
2546 jme->old_ecmd = *ecmd;
2547 }
2548
2549 return rc;
2550}
2551
2552static u32
2553jme_get_link(struct net_device *netdev)
2554{
2555 struct jme_adapter *jme = netdev_priv(netdev);
2556 return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2557}
2558
2559static u32
2560jme_get_msglevel(struct net_device *netdev)
2561{
2562 struct jme_adapter *jme = netdev_priv(netdev);
2563 return jme->msg_enable;
2564}
2565
2566static void
2567jme_set_msglevel(struct net_device *netdev, u32 value)
2568{
2569 struct jme_adapter *jme = netdev_priv(netdev);
2570 jme->msg_enable = value;
2571}
2572
2573static u32
2574jme_get_rx_csum(struct net_device *netdev)
2575{
2576 struct jme_adapter *jme = netdev_priv(netdev);
2577 return jme->reg_rxmcs & RXMCS_CHECKSUM;
2578}
2579
2580static int
2581jme_set_rx_csum(struct net_device *netdev, u32 on)
2582{
2583 struct jme_adapter *jme = netdev_priv(netdev);
2584
2585 spin_lock_bh(&jme->rxmcs_lock);
2586 if (on)
2587 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2588 else
2589 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2590 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2591 spin_unlock_bh(&jme->rxmcs_lock);
2592
2593 return 0;
2594}
2595
2596static int
2597jme_set_tx_csum(struct net_device *netdev, u32 on)
2598{
2599 struct jme_adapter *jme = netdev_priv(netdev);
2600
2601 if (on) {
2602 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2603 if (netdev->mtu <= 1900)
2604 netdev->features |= NETIF_F_HW_CSUM;
2605 } else {
2606 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2607 netdev->features &= ~NETIF_F_HW_CSUM;
2608 }
2609
2610 return 0;
2611}
2612
2613static int
2614jme_set_tso(struct net_device *netdev, u32 on)
2615{
2616 struct jme_adapter *jme = netdev_priv(netdev);
2617
2618 if (on) {
2619 set_bit(JME_FLAG_TSO, &jme->flags);
2620 if (netdev->mtu <= 1900)
2621 netdev->features |= NETIF_F_TSO
2622#ifdef NETIF_F_TSO6
2623 | NETIF_F_TSO6
2624#endif
2625 ;
2626 } else {
2627 clear_bit(JME_FLAG_TSO, &jme->flags);
2628 netdev->features &= ~(NETIF_F_TSO
2629#ifdef NETIF_F_TSO6
2630 | NETIF_F_TSO6
2631#endif
2632 );
2633 }
2634
2635 return 0;
2636}
2637
2638static int
2639jme_nway_reset(struct net_device *netdev)
2640{
2641 struct jme_adapter *jme = netdev_priv(netdev);
2642 jme_restart_an(jme);
2643 return 0;
2644}
2645
2646static u8
2647jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2648{
2649 u32 val;
2650 int to;
2651
2652 val = jread32(jme, JME_SMBCSR);
2653 to = JME_SMB_BUSY_TIMEOUT;
2654 while ((val & SMBCSR_BUSY) && --to) {
2655 msleep(1);
2656 val = jread32(jme, JME_SMBCSR);
2657 }
2658 if (!to) {
2659#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2660 msg_hw(jme, "SMB Bus Busy.\n");
2661#else
2662 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2663#endif
2664 return 0xFF;
2665 }
2666
2667 jwrite32(jme, JME_SMBINTF,
2668 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2669 SMBINTF_HWRWN_READ |
2670 SMBINTF_HWCMD);
2671
2672 val = jread32(jme, JME_SMBINTF);
2673 to = JME_SMB_BUSY_TIMEOUT;
2674 while ((val & SMBINTF_HWCMD) && --to) {
2675 msleep(1);
2676 val = jread32(jme, JME_SMBINTF);
2677 }
2678 if (!to) {
2679#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2680 msg_hw(jme, "SMB Bus Busy.\n");
2681#else
2682 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2683#endif
2684 return 0xFF;
2685 }
2686
2687 return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2688}
2689
2690static void
2691jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2692{
2693 u32 val;
2694 int to;
2695
2696 val = jread32(jme, JME_SMBCSR);
2697 to = JME_SMB_BUSY_TIMEOUT;
2698 while ((val & SMBCSR_BUSY) && --to) {
2699 msleep(1);
2700 val = jread32(jme, JME_SMBCSR);
2701 }
2702 if (!to) {
2703#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2704 msg_hw(jme, "SMB Bus Busy.\n");
2705#else
2706 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2707#endif
2708 return;
2709 }
2710
2711 jwrite32(jme, JME_SMBINTF,
2712 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2713 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2714 SMBINTF_HWRWN_WRITE |
2715 SMBINTF_HWCMD);
2716
2717 val = jread32(jme, JME_SMBINTF);
2718 to = JME_SMB_BUSY_TIMEOUT;
2719 while ((val & SMBINTF_HWCMD) && --to) {
2720 msleep(1);
2721 val = jread32(jme, JME_SMBINTF);
2722 }
2723 if (!to) {
2724#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2725 msg_hw(jme, "SMB Bus Busy.\n");
2726#else
2727 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2728#endif
2729 return;
2730 }
2731
2732 mdelay(2);
2733}
2734
2735static int
2736jme_get_eeprom_len(struct net_device *netdev)
2737{
2738 struct jme_adapter *jme = netdev_priv(netdev);
2739 u32 val;
2740 val = jread32(jme, JME_SMBCSR);
2741 return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2742}
2743
2744static int
2745jme_get_eeprom(struct net_device *netdev,
2746 struct ethtool_eeprom *eeprom, u8 *data)
2747{
2748 struct jme_adapter *jme = netdev_priv(netdev);
2749 int i, offset = eeprom->offset, len = eeprom->len;
2750
2751 /*
2752 * ethtool will check the boundary for us
2753 */
2754 eeprom->magic = JME_EEPROM_MAGIC;
2755 for (i = 0 ; i < len ; ++i)
2756 data[i] = jme_smb_read(jme, i + offset);
2757
2758 return 0;
2759}
2760
2761static int
2762jme_set_eeprom(struct net_device *netdev,
2763 struct ethtool_eeprom *eeprom, u8 *data)
2764{
2765 struct jme_adapter *jme = netdev_priv(netdev);
2766 int i, offset = eeprom->offset, len = eeprom->len;
2767
2768 if (eeprom->magic != JME_EEPROM_MAGIC)
2769 return -EINVAL;
2770
2771 /*
2772 * ethtool will check the boundary for us
2773 */
2774 for (i = 0 ; i < len ; ++i)
2775 jme_smb_write(jme, i + offset, data[i]);
2776
2777 return 0;
2778}
2779
2780#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2781static struct ethtool_ops jme_ethtool_ops = {
2782#else
2783static const struct ethtool_ops jme_ethtool_ops = {
2784#endif
2785 .get_drvinfo = jme_get_drvinfo,
2786 .get_regs_len = jme_get_regs_len,
2787 .get_regs = jme_get_regs,
2788 .get_coalesce = jme_get_coalesce,
2789 .set_coalesce = jme_set_coalesce,
2790 .get_pauseparam = jme_get_pauseparam,
2791 .set_pauseparam = jme_set_pauseparam,
2792 .get_wol = jme_get_wol,
2793 .set_wol = jme_set_wol,
2794 .get_settings = jme_get_settings,
2795 .set_settings = jme_set_settings,
2796 .get_link = jme_get_link,
2797 .get_msglevel = jme_get_msglevel,
2798 .set_msglevel = jme_set_msglevel,
2799 .get_rx_csum = jme_get_rx_csum,
2800 .set_rx_csum = jme_set_rx_csum,
2801 .set_tx_csum = jme_set_tx_csum,
2802 .set_tso = jme_set_tso,
2803 .set_sg = ethtool_op_set_sg,
2804 .nway_reset = jme_nway_reset,
2805 .get_eeprom_len = jme_get_eeprom_len,
2806 .get_eeprom = jme_get_eeprom,
2807 .set_eeprom = jme_set_eeprom,
2808};
2809
2810static int
2811jme_pci_dma64(struct pci_dev *pdev)
2812{
2813 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2814#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2815 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2816#else
2817 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2818#endif
2819 )
2820#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2821 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2822#else
2823 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2824#endif
2825 return 1;
2826
2827 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2828#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2829 !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2830#else
2831 !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2832#endif
2833 )
2834#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2835 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2836#else
2837 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2838#endif
2839 return 1;
2840
2841#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2842 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2843 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2844#else
2845 if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2846 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
2847#endif
2848 return 0;
2849
2850 return -1;
2851}
2852
2853static inline void
2854jme_phy_init(struct jme_adapter *jme)
2855{
2856 u16 reg26;
2857
2858 reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2859 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2860}
2861
2862static inline void
2863jme_check_hw_ver(struct jme_adapter *jme)
2864{
2865 u32 chipmode;
2866
2867 chipmode = jread32(jme, JME_CHIPMODE);
2868
2869 jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
2870 jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
2871}
2872
2873#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2874static const struct net_device_ops jme_netdev_ops = {
2875 .ndo_open = jme_open,
2876 .ndo_stop = jme_close,
2877 .ndo_validate_addr = eth_validate_addr,
2878 .ndo_start_xmit = jme_start_xmit,
2879 .ndo_set_mac_address = jme_set_macaddr,
2880 .ndo_set_multicast_list = jme_set_multi,
2881 .ndo_change_mtu = jme_change_mtu,
2882 .ndo_tx_timeout = jme_tx_timeout,
2883 .ndo_vlan_rx_register = jme_vlan_rx_register,
2884};
2885#endif
2886
2887static int __devinit
2888jme_init_one(struct pci_dev *pdev,
2889 const struct pci_device_id *ent)
2890{
2891 int rc = 0, using_dac, i;
2892 struct net_device *netdev;
2893 struct jme_adapter *jme;
2894 u16 bmcr, bmsr;
2895 u32 apmc;
2896
2897 /*
2898 * set up PCI device basics
2899 */
2900 rc = pci_enable_device(pdev);
2901 if (rc) {
2902 jeprintk(pdev, "Cannot enable PCI device.\n");
2903 goto err_out;
2904 }
2905
2906 using_dac = jme_pci_dma64(pdev);
2907 if (using_dac < 0) {
2908 jeprintk(pdev, "Cannot set PCI DMA Mask.\n");
2909 rc = -EIO;
2910 goto err_out_disable_pdev;
2911 }
2912
2913 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2914 jeprintk(pdev, "No PCI resource region found.\n");
2915 rc = -ENOMEM;
2916 goto err_out_disable_pdev;
2917 }
2918
2919 rc = pci_request_regions(pdev, DRV_NAME);
2920 if (rc) {
2921 jeprintk(pdev, "Cannot obtain PCI resource region.\n");
2922 goto err_out_disable_pdev;
2923 }
2924
2925 pci_set_master(pdev);
2926
2927 /*
2928 * alloc and init net device
2929 */
2930 netdev = alloc_etherdev(sizeof(*jme));
2931 if (!netdev) {
2932 jeprintk(pdev, "Cannot allocate netdev structure.\n");
2933 rc = -ENOMEM;
2934 goto err_out_release_regions;
2935 }
2936#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2937 netdev->netdev_ops = &jme_netdev_ops;
2938#else
2939 netdev->open = jme_open;
2940 netdev->stop = jme_close;
2941 netdev->hard_start_xmit = jme_start_xmit;
2942 netdev->set_mac_address = jme_set_macaddr;
2943 netdev->set_multicast_list = jme_set_multi;
2944 netdev->change_mtu = jme_change_mtu;
2945 netdev->tx_timeout = jme_tx_timeout;
2946 netdev->vlan_rx_register = jme_vlan_rx_register;
2947#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2948 netdev->vlan_rx_kill_vid = jme_vlan_rx_kill_vid;
2949#endif
2950 NETDEV_GET_STATS(netdev, &jme_get_stats);
2951#endif
2952 netdev->ethtool_ops = &jme_ethtool_ops;
2953 netdev->watchdog_timeo = TX_TIMEOUT;
2954 netdev->features = NETIF_F_HW_CSUM |
2955 NETIF_F_SG |
2956 NETIF_F_TSO |
2957#ifdef NETIF_F_TSO6
2958 NETIF_F_TSO6 |
2959#endif
2960 NETIF_F_HW_VLAN_TX |
2961 NETIF_F_HW_VLAN_RX;
2962 if (using_dac)
2963 netdev->features |= NETIF_F_HIGHDMA;
2964
2965 SET_NETDEV_DEV(netdev, &pdev->dev);
2966 pci_set_drvdata(pdev, netdev);
2967
2968 /*
2969 * init adapter info
2970 */
2971 jme = netdev_priv(netdev);
2972 jme->pdev = pdev;
2973 jme->dev = netdev;
2974 jme->jme_rx = netif_rx;
2975 jme->jme_vlan_rx = vlan_hwaccel_rx;
2976 jme->old_mtu = netdev->mtu = 1500;
2977 jme->phylink = 0;
2978 jme->tx_ring_size = 1 << 10;
2979 jme->tx_ring_mask = jme->tx_ring_size - 1;
2980 jme->tx_wake_threshold = 1 << 9;
2981 jme->rx_ring_size = 1 << 9;
2982 jme->rx_ring_mask = jme->rx_ring_size - 1;
2983 jme->msg_enable = JME_DEF_MSG_ENABLE;
2984 jme->regs = ioremap(pci_resource_start(pdev, 0),
2985 pci_resource_len(pdev, 0));
2986 if (!(jme->regs)) {
2987 jeprintk(pdev, "Mapping PCI resource region error.\n");
2988 rc = -ENOMEM;
2989 goto err_out_free_netdev;
2990 }
2991
2992 if (no_pseudohp) {
2993 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
2994 jwrite32(jme, JME_APMC, apmc);
2995 } else if (force_pseudohp) {
2996 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
2997 jwrite32(jme, JME_APMC, apmc);
2998 }
2999
3000 NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3001
3002 spin_lock_init(&jme->phy_lock);
3003 spin_lock_init(&jme->macaddr_lock);
3004 spin_lock_init(&jme->rxmcs_lock);
3005
3006 atomic_set(&jme->link_changing, 1);
3007 atomic_set(&jme->rx_cleaning, 1);
3008 atomic_set(&jme->tx_cleaning, 1);
3009 atomic_set(&jme->rx_empty, 1);
3010
3011 tasklet_init(&jme->pcc_task,
3012 jme_pcc_tasklet,
3013 (unsigned long) jme);
3014 tasklet_init(&jme->linkch_task,
3015 jme_link_change_tasklet,
3016 (unsigned long) jme);
3017 tasklet_init(&jme->txclean_task,
3018 jme_tx_clean_tasklet,
3019 (unsigned long) jme);
3020 tasklet_init(&jme->rxclean_task,
3021 jme_rx_clean_tasklet,
3022 (unsigned long) jme);
3023 tasklet_init(&jme->rxempty_task,
3024 jme_rx_empty_tasklet,
3025 (unsigned long) jme);
3026 tasklet_disable_nosync(&jme->linkch_task);
3027 tasklet_disable_nosync(&jme->txclean_task);
3028 tasklet_disable_nosync(&jme->rxclean_task);
3029 tasklet_disable_nosync(&jme->rxempty_task);
3030 jme->dpi.cur = PCC_P1;
3031
3032 jme->reg_ghc = 0;
3033 jme->reg_rxcs = RXCS_DEFAULT;
3034 jme->reg_rxmcs = RXMCS_DEFAULT;
3035 jme->reg_txpfc = 0;
3036 jme->reg_pmcs = PMCS_MFEN;
3037 set_bit(JME_FLAG_TXCSUM, &jme->flags);
3038 set_bit(JME_FLAG_TSO, &jme->flags);
3039
3040 /*
3041 * Get Max Read Req Size from PCI Config Space
3042 */
3043 pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3044 jme->mrrs &= PCI_DCSR_MRRS_MASK;
3045 switch (jme->mrrs) {
3046 case MRRS_128B:
3047 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3048 break;
3049 case MRRS_256B:
3050 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3051 break;
3052 default:
3053 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3054 break;
3055 };
3056
3057 /*
3058 * Must check before reset_mac_processor
3059 */
3060 jme_check_hw_ver(jme);
3061 jme->mii_if.dev = netdev;
3062 if (jme->fpgaver) {
3063 jme->mii_if.phy_id = 0;
3064 for (i = 1 ; i < 32 ; ++i) {
3065 bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3066 bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3067 if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3068 jme->mii_if.phy_id = i;
3069 break;
3070 }
3071 }
3072
3073 if (!jme->mii_if.phy_id) {
3074 rc = -EIO;
3075 jeprintk(pdev, "Can not find phy_id.\n");
3076 goto err_out_unmap;
3077 }
3078
3079 jme->reg_ghc |= GHC_LINK_POLL;
3080 } else {
3081 jme->mii_if.phy_id = 1;
3082 }
3083 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3084 jme->mii_if.supports_gmii = true;
3085 else
3086 jme->mii_if.supports_gmii = false;
3087 jme->mii_if.mdio_read = jme_mdio_read;
3088 jme->mii_if.mdio_write = jme_mdio_write;
3089
3090 jme_clear_pm(jme);
3091 jme_set_phyfifoa(jme);
3092 pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
3093 if (!jme->fpgaver)
3094 jme_phy_init(jme);
3095 jme_phy_off(jme);
3096
3097 /*
3098 * Reset MAC processor and reload EEPROM for MAC Address
3099 */
3100 jme_reset_mac_processor(jme);
3101 rc = jme_reload_eeprom(jme);
3102 if (rc) {
3103 jeprintk(pdev,
3104 "Reload eeprom for reading MAC Address error.\n");
3105 goto err_out_unmap;
3106 }
3107 jme_load_macaddr(netdev);
3108
3109 /*
3110 * Tell stack that we are not ready to work until open()
3111 */
3112 netif_carrier_off(netdev);
3113 netif_stop_queue(netdev);
3114
3115 /*
3116 * Register netdev
3117 */
3118 rc = register_netdev(netdev);
3119 if (rc) {
3120 jeprintk(pdev, "Cannot register net device.\n");
3121 goto err_out_unmap;
3122 }
3123
3124#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
3125 msg_probe(jme, "%s%s ver:%x rev:%x "
3126 "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3127 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3128 "JMC250 Gigabit Ethernet" :
3129 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3130 "JMC260 Fast Ethernet" : "Unknown",
3131 (jme->fpgaver != 0) ? " (FPGA)" : "",
3132 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3133 jme->rev,
3134 netdev->dev_addr[0],
3135 netdev->dev_addr[1],
3136 netdev->dev_addr[2],
3137 netdev->dev_addr[3],
3138 netdev->dev_addr[4],
3139 netdev->dev_addr[5]);
3140#else
3141 netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x macaddr:%pM\n",
3142 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3143 "JMC250 Gigabit Ethernet" :
3144 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3145 "JMC260 Fast Ethernet" : "Unknown",
3146 (jme->fpgaver != 0) ? " (FPGA)" : "",
3147 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3148 jme->rev, netdev->dev_addr);
3149#endif
3150
3151 return 0;
3152
3153err_out_unmap:
3154 iounmap(jme->regs);
3155err_out_free_netdev:
3156 pci_set_drvdata(pdev, NULL);
3157 free_netdev(netdev);
3158err_out_release_regions:
3159 pci_release_regions(pdev);
3160err_out_disable_pdev:
3161 pci_disable_device(pdev);
3162err_out:
3163 return rc;
3164}
3165
3166static void __devexit
3167jme_remove_one(struct pci_dev *pdev)
3168{
3169 struct net_device *netdev = pci_get_drvdata(pdev);
3170 struct jme_adapter *jme = netdev_priv(netdev);
3171
3172 unregister_netdev(netdev);
3173 iounmap(jme->regs);
3174 pci_set_drvdata(pdev, NULL);
3175 free_netdev(netdev);
3176 pci_release_regions(pdev);
3177 pci_disable_device(pdev);
3178
3179}
3180
3181#ifdef CONFIG_PM
3182static int
3183jme_suspend(struct pci_dev *pdev, pm_message_t state)
3184{
3185 struct net_device *netdev = pci_get_drvdata(pdev);
3186 struct jme_adapter *jme = netdev_priv(netdev);
3187
3188 atomic_dec(&jme->link_changing);
3189
3190 netif_device_detach(netdev);
3191 netif_stop_queue(netdev);
3192 jme_stop_irq(jme);
3193
3194 tasklet_disable(&jme->txclean_task);
3195 tasklet_disable(&jme->rxclean_task);
3196 tasklet_disable(&jme->rxempty_task);
3197
3198 if (netif_carrier_ok(netdev)) {
3199 if (test_bit(JME_FLAG_POLL, &jme->flags))
3200 jme_polling_mode(jme);
3201
3202 jme_stop_pcc_timer(jme);
3203 jme_reset_ghc_speed(jme);
3204 jme_disable_rx_engine(jme);
3205 jme_disable_tx_engine(jme);
3206 jme_reset_mac_processor(jme);
3207 jme_free_rx_resources(jme);
3208 jme_free_tx_resources(jme);
3209 netif_carrier_off(netdev);
3210 jme->phylink = 0;
3211 }
3212
3213 tasklet_enable(&jme->txclean_task);
3214 tasklet_hi_enable(&jme->rxclean_task);
3215 tasklet_hi_enable(&jme->rxempty_task);
3216
3217 pci_save_state(pdev);
3218 if (jme->reg_pmcs) {
3219 jme_set_100m_half(jme);
3220
3221 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
3222 jme_wait_link(jme);
3223
3224 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
3225
3226 pci_enable_wake(pdev, PCI_D3cold, true);
3227 } else {
3228 jme_phy_off(jme);
3229 }
3230 pci_set_power_state(pdev, PCI_D3cold);
3231
3232 return 0;
3233}
3234
3235static int
3236jme_resume(struct pci_dev *pdev)
3237{
3238 struct net_device *netdev = pci_get_drvdata(pdev);
3239 struct jme_adapter *jme = netdev_priv(netdev);
3240
3241 jme_clear_pm(jme);
3242 pci_restore_state(pdev);
3243
3244 if (test_bit(JME_FLAG_SSET, &jme->flags))
3245 jme_set_settings(netdev, &jme->old_ecmd);
3246 else
3247 jme_reset_phy_processor(jme);
3248
3249 jme_start_irq(jme);
3250 netif_device_attach(netdev);
3251
3252 atomic_inc(&jme->link_changing);
3253
3254 jme_reset_link(jme);
3255
3256 return 0;
3257}
3258#endif
3259
3260#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3261static struct pci_device_id jme_pci_tbl[] = {
3262#else
3263static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3264#endif
3265 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3266 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3267 { }
3268};
3269
3270static struct pci_driver jme_driver = {
3271 .name = DRV_NAME,
3272 .id_table = jme_pci_tbl,
3273 .probe = jme_init_one,
3274 .remove = __devexit_p(jme_remove_one),
3275#ifdef CONFIG_PM
3276 .suspend = jme_suspend,
3277 .resume = jme_resume,
3278#endif /* CONFIG_PM */
3279};
3280
3281static int __init
3282jme_init_module(void)
3283{
3284 printk(KERN_INFO PFX "JMicron JMC2XX ethernet "
3285 "driver version %s\n", DRV_VERSION);
3286 return pci_register_driver(&jme_driver);
3287}
3288
3289static void __exit
3290jme_cleanup_module(void)
3291{
3292 pci_unregister_driver(&jme_driver);
3293}
3294
3295module_init(jme_init_module);
3296module_exit(jme_cleanup_module);
3297
3298MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3299MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3300MODULE_LICENSE("GPL");
3301MODULE_VERSION(DRV_VERSION);
3302MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3303
JMicron Ethernet Linux driver