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Commit | Line | Data |
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d7699f87 GFT |
1 | /* |
2 | * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver | |
3 | * | |
4 | * Copyright 2008 JMicron Technology Corporation | |
5 | * http://www.jmicron.com/ | |
6 | * | |
3bf61c55 GFT |
7 | * Author: Guo-Fu Tseng <cooldavid@cooldavid.org> |
8 | * | |
d7699f87 GFT |
9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | * | |
22 | */ | |
23 | ||
d7699f87 GFT |
24 | #include <linux/module.h> |
25 | #include <linux/kernel.h> | |
26 | #include <linux/pci.h> | |
27 | #include <linux/netdevice.h> | |
28 | #include <linux/etherdevice.h> | |
29 | #include <linux/ethtool.h> | |
30 | #include <linux/mii.h> | |
31 | #include <linux/crc32.h> | |
4330c2f2 | 32 | #include <linux/delay.h> |
29bdd921 | 33 | #include <linux/spinlock.h> |
8c198884 GFT |
34 | #include <linux/in.h> |
35 | #include <linux/ip.h> | |
79ce639c GFT |
36 | #include <linux/ipv6.h> |
37 | #include <linux/tcp.h> | |
38 | #include <linux/udp.h> | |
42b1055e | 39 | #include <linux/if_vlan.h> |
6d641c63 | 40 | #include <linux/slab.h> |
94c5ea02 | 41 | #include <net/ip6_checksum.h> |
d7699f87 GFT |
42 | #include "jme.h" |
43 | ||
cd0ff491 GFT |
44 | static int force_pseudohp = -1; |
45 | static int no_pseudohp = -1; | |
46 | static int no_extplug = -1; | |
47 | module_param(force_pseudohp, int, 0); | |
48 | MODULE_PARM_DESC(force_pseudohp, | |
49 | "Enable pseudo hot-plug feature manually by driver instead of BIOS."); | |
50 | module_param(no_pseudohp, int, 0); | |
51 | MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); | |
52 | module_param(no_extplug, int, 0); | |
53 | MODULE_PARM_DESC(no_extplug, | |
54 | "Do not use external plug signal for pseudo hot-plug."); | |
4330c2f2 | 55 | |
3bf61c55 GFT |
56 | static int |
57 | jme_mdio_read(struct net_device *netdev, int phy, int reg) | |
d7699f87 GFT |
58 | { |
59 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 60 | int i, val, again = (reg == MII_BMSR) ? 1 : 0; |
d7699f87 | 61 | |
186fc259 | 62 | read_again: |
cd0ff491 | 63 | jwrite32(jme, JME_SMI, SMI_OP_REQ | |
3bf61c55 GFT |
64 | smi_phy_addr(phy) | |
65 | smi_reg_addr(reg)); | |
d7699f87 GFT |
66 | |
67 | wmb(); | |
cd0ff491 | 68 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
cdcdc9eb | 69 | udelay(20); |
b3821cc5 GFT |
70 | val = jread32(jme, JME_SMI); |
71 | if ((val & SMI_OP_REQ) == 0) | |
3bf61c55 | 72 | break; |
cd0ff491 | 73 | } |
d7699f87 | 74 | |
cd0ff491 GFT |
75 | if (i == 0) { |
76 | jeprintk(jme->pdev, "phy(%d) read timeout : %d\n", phy, reg); | |
3bf61c55 | 77 | return 0; |
cd0ff491 | 78 | } |
d7699f87 | 79 | |
cd0ff491 | 80 | if (again--) |
186fc259 GFT |
81 | goto read_again; |
82 | ||
cd0ff491 | 83 | return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT; |
d7699f87 GFT |
84 | } |
85 | ||
3bf61c55 GFT |
86 | static void |
87 | jme_mdio_write(struct net_device *netdev, | |
88 | int phy, int reg, int val) | |
d7699f87 GFT |
89 | { |
90 | struct jme_adapter *jme = netdev_priv(netdev); | |
91 | int i; | |
92 | ||
3bf61c55 GFT |
93 | jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ | |
94 | ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | | |
95 | smi_phy_addr(phy) | smi_reg_addr(reg)); | |
d7699f87 GFT |
96 | |
97 | wmb(); | |
cdcdc9eb GFT |
98 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
99 | udelay(20); | |
8d27293f | 100 | if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0) |
3bf61c55 GFT |
101 | break; |
102 | } | |
d7699f87 | 103 | |
3bf61c55 | 104 | if (i == 0) |
cd0ff491 | 105 | jeprintk(jme->pdev, "phy(%d) write timeout : %d\n", phy, reg); |
d7699f87 | 106 | |
3bf61c55 | 107 | return; |
d7699f87 GFT |
108 | } |
109 | ||
cd0ff491 | 110 | static inline void |
3bf61c55 | 111 | jme_reset_phy_processor(struct jme_adapter *jme) |
d7699f87 | 112 | { |
cd0ff491 | 113 | u32 val; |
3bf61c55 GFT |
114 | |
115 | jme_mdio_write(jme->dev, | |
116 | jme->mii_if.phy_id, | |
8c198884 GFT |
117 | MII_ADVERTISE, ADVERTISE_ALL | |
118 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
3bf61c55 | 119 | |
cd0ff491 | 120 | if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
121 | jme_mdio_write(jme->dev, |
122 | jme->mii_if.phy_id, | |
123 | MII_CTRL1000, | |
124 | ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
3bf61c55 | 125 | |
fcf45b4c GFT |
126 | val = jme_mdio_read(jme->dev, |
127 | jme->mii_if.phy_id, | |
128 | MII_BMCR); | |
129 | ||
130 | jme_mdio_write(jme->dev, | |
131 | jme->mii_if.phy_id, | |
132 | MII_BMCR, val | BMCR_RESET); | |
133 | ||
3bf61c55 GFT |
134 | return; |
135 | } | |
136 | ||
b3821cc5 GFT |
137 | static void |
138 | jme_setup_wakeup_frame(struct jme_adapter *jme, | |
cd0ff491 | 139 | u32 *mask, u32 crc, int fnr) |
b3821cc5 GFT |
140 | { |
141 | int i; | |
142 | ||
143 | /* | |
144 | * Setup CRC pattern | |
145 | */ | |
146 | jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL)); | |
147 | wmb(); | |
148 | jwrite32(jme, JME_WFODP, crc); | |
149 | wmb(); | |
150 | ||
151 | /* | |
152 | * Setup Mask | |
153 | */ | |
cd0ff491 | 154 | for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { |
b3821cc5 GFT |
155 | jwrite32(jme, JME_WFOI, |
156 | ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) | | |
157 | (fnr & WFOI_FRAME_SEL)); | |
158 | wmb(); | |
159 | jwrite32(jme, JME_WFODP, mask[i]); | |
160 | wmb(); | |
161 | } | |
162 | } | |
3bf61c55 | 163 | |
cd0ff491 | 164 | static inline void |
3bf61c55 GFT |
165 | jme_reset_mac_processor(struct jme_adapter *jme) |
166 | { | |
cd0ff491 GFT |
167 | u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; |
168 | u32 crc = 0xCDCDCDCD; | |
169 | u32 gpreg0; | |
b3821cc5 GFT |
170 | int i; |
171 | ||
3bf61c55 | 172 | jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST); |
d7699f87 | 173 | udelay(2); |
3bf61c55 | 174 | jwrite32(jme, JME_GHC, jme->reg_ghc); |
cd0ff491 GFT |
175 | |
176 | jwrite32(jme, JME_RXDBA_LO, 0x00000000); | |
177 | jwrite32(jme, JME_RXDBA_HI, 0x00000000); | |
178 | jwrite32(jme, JME_RXQDC, 0x00000000); | |
179 | jwrite32(jme, JME_RXNDA, 0x00000000); | |
180 | jwrite32(jme, JME_TXDBA_LO, 0x00000000); | |
181 | jwrite32(jme, JME_TXDBA_HI, 0x00000000); | |
182 | jwrite32(jme, JME_TXQDC, 0x00000000); | |
183 | jwrite32(jme, JME_TXNDA, 0x00000000); | |
184 | ||
4330c2f2 GFT |
185 | jwrite32(jme, JME_RXMCHT_LO, 0x00000000); |
186 | jwrite32(jme, JME_RXMCHT_HI, 0x00000000); | |
cd0ff491 | 187 | for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i) |
b3821cc5 | 188 | jme_setup_wakeup_frame(jme, mask, crc, i); |
cd0ff491 | 189 | if (jme->fpgaver) |
cdcdc9eb GFT |
190 | gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL; |
191 | else | |
192 | gpreg0 = GPREG0_DEFAULT; | |
193 | jwrite32(jme, JME_GPREG0, gpreg0); | |
9b9d55de | 194 | jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT); |
d7699f87 GFT |
195 | } |
196 | ||
cd0ff491 GFT |
197 | static inline void |
198 | jme_reset_ghc_speed(struct jme_adapter *jme) | |
199 | { | |
200 | jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX); | |
201 | jwrite32(jme, JME_GHC, jme->reg_ghc); | |
202 | } | |
203 | ||
204 | static inline void | |
3bf61c55 | 205 | jme_clear_pm(struct jme_adapter *jme) |
d7699f87 | 206 | { |
29bdd921 | 207 | jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs); |
4330c2f2 | 208 | pci_set_power_state(jme->pdev, PCI_D0); |
42b1055e | 209 | pci_enable_wake(jme->pdev, PCI_D0, false); |
d7699f87 GFT |
210 | } |
211 | ||
3bf61c55 GFT |
212 | static int |
213 | jme_reload_eeprom(struct jme_adapter *jme) | |
d7699f87 | 214 | { |
cd0ff491 | 215 | u32 val; |
d7699f87 GFT |
216 | int i; |
217 | ||
218 | val = jread32(jme, JME_SMBCSR); | |
219 | ||
cd0ff491 | 220 | if (val & SMBCSR_EEPROMD) { |
d7699f87 GFT |
221 | val |= SMBCSR_CNACK; |
222 | jwrite32(jme, JME_SMBCSR, val); | |
223 | val |= SMBCSR_RELOAD; | |
224 | jwrite32(jme, JME_SMBCSR, val); | |
225 | mdelay(12); | |
226 | ||
cd0ff491 | 227 | for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) { |
d7699f87 GFT |
228 | mdelay(1); |
229 | if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0) | |
230 | break; | |
231 | } | |
232 | ||
cd0ff491 GFT |
233 | if (i == 0) { |
234 | jeprintk(jme->pdev, "eeprom reload timeout\n"); | |
d7699f87 GFT |
235 | return -EIO; |
236 | } | |
237 | } | |
3bf61c55 | 238 | |
d7699f87 GFT |
239 | return 0; |
240 | } | |
241 | ||
3bf61c55 GFT |
242 | static void |
243 | jme_load_macaddr(struct net_device *netdev) | |
d7699f87 GFT |
244 | { |
245 | struct jme_adapter *jme = netdev_priv(netdev); | |
246 | unsigned char macaddr[6]; | |
cd0ff491 | 247 | u32 val; |
d7699f87 | 248 | |
cd0ff491 | 249 | spin_lock_bh(&jme->macaddr_lock); |
4330c2f2 | 250 | val = jread32(jme, JME_RXUMA_LO); |
d7699f87 GFT |
251 | macaddr[0] = (val >> 0) & 0xFF; |
252 | macaddr[1] = (val >> 8) & 0xFF; | |
253 | macaddr[2] = (val >> 16) & 0xFF; | |
254 | macaddr[3] = (val >> 24) & 0xFF; | |
4330c2f2 | 255 | val = jread32(jme, JME_RXUMA_HI); |
d7699f87 GFT |
256 | macaddr[4] = (val >> 0) & 0xFF; |
257 | macaddr[5] = (val >> 8) & 0xFF; | |
cd0ff491 GFT |
258 | memcpy(netdev->dev_addr, macaddr, 6); |
259 | spin_unlock_bh(&jme->macaddr_lock); | |
3bf61c55 GFT |
260 | } |
261 | ||
cd0ff491 | 262 | static inline void |
3bf61c55 GFT |
263 | jme_set_rx_pcc(struct jme_adapter *jme, int p) |
264 | { | |
cd0ff491 | 265 | switch (p) { |
192570e0 GFT |
266 | case PCC_OFF: |
267 | jwrite32(jme, JME_PCCRX0, | |
268 | ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
269 | ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
270 | break; | |
3bf61c55 GFT |
271 | case PCC_P1: |
272 | jwrite32(jme, JME_PCCRX0, | |
273 | ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
274 | ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
275 | break; | |
276 | case PCC_P2: | |
277 | jwrite32(jme, JME_PCCRX0, | |
278 | ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
279 | ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
280 | break; | |
281 | case PCC_P3: | |
282 | jwrite32(jme, JME_PCCRX0, | |
283 | ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
284 | ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
285 | break; | |
286 | default: | |
287 | break; | |
288 | } | |
192570e0 | 289 | wmb(); |
3bf61c55 | 290 | |
cd0ff491 | 291 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
c97b5740 | 292 | netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p); |
d7699f87 GFT |
293 | } |
294 | ||
fcf45b4c | 295 | static void |
3bf61c55 | 296 | jme_start_irq(struct jme_adapter *jme) |
d7699f87 | 297 | { |
3bf61c55 GFT |
298 | register struct dynpcc_info *dpi = &(jme->dpi); |
299 | ||
300 | jme_set_rx_pcc(jme, PCC_P1); | |
3bf61c55 GFT |
301 | dpi->cur = PCC_P1; |
302 | dpi->attempt = PCC_P1; | |
303 | dpi->cnt = 0; | |
304 | ||
305 | jwrite32(jme, JME_PCCTX, | |
8c198884 GFT |
306 | ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) | |
307 | ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) | | |
3bf61c55 GFT |
308 | PCCTXQ0_EN |
309 | ); | |
310 | ||
d7699f87 GFT |
311 | /* |
312 | * Enable Interrupts | |
313 | */ | |
314 | jwrite32(jme, JME_IENS, INTR_ENABLE); | |
315 | } | |
316 | ||
cd0ff491 | 317 | static inline void |
3bf61c55 | 318 | jme_stop_irq(struct jme_adapter *jme) |
d7699f87 GFT |
319 | { |
320 | /* | |
321 | * Disable Interrupts | |
322 | */ | |
cd0ff491 | 323 | jwrite32f(jme, JME_IENC, INTR_ENABLE); |
d7699f87 GFT |
324 | } |
325 | ||
cd0ff491 | 326 | static u32 |
cdcdc9eb GFT |
327 | jme_linkstat_from_phy(struct jme_adapter *jme) |
328 | { | |
cd0ff491 | 329 | u32 phylink, bmsr; |
cdcdc9eb GFT |
330 | |
331 | phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17); | |
332 | bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR); | |
cd0ff491 | 333 | if (bmsr & BMSR_ANCOMP) |
cdcdc9eb GFT |
334 | phylink |= PHY_LINK_AUTONEG_COMPLETE; |
335 | ||
336 | return phylink; | |
337 | } | |
338 | ||
cd0ff491 | 339 | static inline void |
e882564f | 340 | jme_set_phyfifoa(struct jme_adapter *jme) |
cd0ff491 GFT |
341 | { |
342 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); | |
343 | } | |
344 | ||
345 | static inline void | |
e882564f | 346 | jme_set_phyfifob(struct jme_adapter *jme) |
cd0ff491 GFT |
347 | { |
348 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); | |
349 | } | |
350 | ||
fcf45b4c GFT |
351 | static int |
352 | jme_check_link(struct net_device *netdev, int testonly) | |
d7699f87 GFT |
353 | { |
354 | struct jme_adapter *jme = netdev_priv(netdev); | |
9b9d55de | 355 | u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1; |
79ce639c | 356 | char linkmsg[64]; |
fcf45b4c | 357 | int rc = 0; |
d7699f87 | 358 | |
b3821cc5 | 359 | linkmsg[0] = '\0'; |
cdcdc9eb | 360 | |
cd0ff491 | 361 | if (jme->fpgaver) |
cdcdc9eb GFT |
362 | phylink = jme_linkstat_from_phy(jme); |
363 | else | |
364 | phylink = jread32(jme, JME_PHY_LINK); | |
d7699f87 | 365 | |
cd0ff491 GFT |
366 | if (phylink & PHY_LINK_UP) { |
367 | if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { | |
8c198884 GFT |
368 | /* |
369 | * If we did not enable AN | |
370 | * Speed/Duplex Info should be obtained from SMI | |
371 | */ | |
372 | phylink = PHY_LINK_UP; | |
373 | ||
374 | bmcr = jme_mdio_read(jme->dev, | |
375 | jme->mii_if.phy_id, | |
376 | MII_BMCR); | |
377 | ||
378 | phylink |= ((bmcr & BMCR_SPEED1000) && | |
379 | (bmcr & BMCR_SPEED100) == 0) ? | |
380 | PHY_LINK_SPEED_1000M : | |
381 | (bmcr & BMCR_SPEED100) ? | |
382 | PHY_LINK_SPEED_100M : | |
383 | PHY_LINK_SPEED_10M; | |
384 | ||
385 | phylink |= (bmcr & BMCR_FULLDPLX) ? | |
386 | PHY_LINK_DUPLEX : 0; | |
79ce639c | 387 | |
b3821cc5 | 388 | strcat(linkmsg, "Forced: "); |
cd0ff491 | 389 | } else { |
8c198884 GFT |
390 | /* |
391 | * Keep polling for speed/duplex resolve complete | |
392 | */ | |
cd0ff491 | 393 | while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && |
8c198884 GFT |
394 | --cnt) { |
395 | ||
396 | udelay(1); | |
8c198884 | 397 | |
cd0ff491 | 398 | if (jme->fpgaver) |
cdcdc9eb GFT |
399 | phylink = jme_linkstat_from_phy(jme); |
400 | else | |
401 | phylink = jread32(jme, JME_PHY_LINK); | |
8c198884 | 402 | } |
cd0ff491 GFT |
403 | if (!cnt) |
404 | jeprintk(jme->pdev, | |
8c198884 | 405 | "Waiting speed resolve timeout.\n"); |
79ce639c | 406 | |
b3821cc5 | 407 | strcat(linkmsg, "ANed: "); |
d7699f87 GFT |
408 | } |
409 | ||
cd0ff491 | 410 | if (jme->phylink == phylink) { |
fcf45b4c GFT |
411 | rc = 1; |
412 | goto out; | |
413 | } | |
cd0ff491 | 414 | if (testonly) |
fcf45b4c GFT |
415 | goto out; |
416 | ||
417 | jme->phylink = phylink; | |
418 | ||
94c5ea02 GFT |
419 | ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX | |
420 | GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE | | |
421 | GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY); | |
cd0ff491 GFT |
422 | switch (phylink & PHY_LINK_SPEED_MASK) { |
423 | case PHY_LINK_SPEED_10M: | |
94c5ea02 GFT |
424 | ghc |= GHC_SPEED_10M | |
425 | GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; | |
cd0ff491 | 426 | strcat(linkmsg, "10 Mbps, "); |
cd0ff491 GFT |
427 | break; |
428 | case PHY_LINK_SPEED_100M: | |
94c5ea02 GFT |
429 | ghc |= GHC_SPEED_100M | |
430 | GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; | |
cd0ff491 | 431 | strcat(linkmsg, "100 Mbps, "); |
cd0ff491 GFT |
432 | break; |
433 | case PHY_LINK_SPEED_1000M: | |
94c5ea02 GFT |
434 | ghc |= GHC_SPEED_1000M | |
435 | GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY; | |
cd0ff491 | 436 | strcat(linkmsg, "1000 Mbps, "); |
cd0ff491 GFT |
437 | break; |
438 | default: | |
439 | break; | |
d7699f87 | 440 | } |
d7699f87 | 441 | |
cd0ff491 | 442 | if (phylink & PHY_LINK_DUPLEX) { |
d7699f87 | 443 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); |
9b9d55de | 444 | ghc |= GHC_DPX; |
cd0ff491 | 445 | } else { |
d7699f87 | 446 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | |
3bf61c55 GFT |
447 | TXMCS_BACKOFF | |
448 | TXMCS_CARRIERSENSE | | |
449 | TXMCS_COLLISION); | |
8c198884 GFT |
450 | jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN | |
451 | ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) | | |
452 | TXTRHD_TXREN | | |
453 | ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL)); | |
454 | } | |
9b9d55de GFT |
455 | |
456 | gpreg1 = GPREG1_DEFAULT; | |
457 | if (is_buggy250(jme->pdev->device, jme->chiprev)) { | |
458 | if (!(phylink & PHY_LINK_DUPLEX)) | |
459 | gpreg1 |= GPREG1_HALFMODEPATCH; | |
460 | switch (phylink & PHY_LINK_SPEED_MASK) { | |
461 | case PHY_LINK_SPEED_10M: | |
462 | jme_set_phyfifoa(jme); | |
463 | gpreg1 |= GPREG1_RSSPATCH; | |
464 | break; | |
465 | case PHY_LINK_SPEED_100M: | |
466 | jme_set_phyfifob(jme); | |
467 | gpreg1 |= GPREG1_RSSPATCH; | |
468 | break; | |
469 | case PHY_LINK_SPEED_1000M: | |
470 | jme_set_phyfifoa(jme); | |
471 | break; | |
472 | default: | |
473 | break; | |
474 | } | |
475 | } | |
d7699f87 | 476 | |
94c5ea02 | 477 | jwrite32(jme, JME_GPREG1, gpreg1); |
fcf45b4c | 478 | jwrite32(jme, JME_GHC, ghc); |
94c5ea02 | 479 | jme->reg_ghc = ghc; |
fcf45b4c | 480 | |
94c5ea02 GFT |
481 | strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? |
482 | "Full-Duplex, " : | |
483 | "Half-Duplex, "); | |
484 | strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ? | |
485 | "MDI-X" : | |
486 | "MDI"); | |
c97b5740 | 487 | netif_info(jme, link, jme->dev, "Link is up at %s.\n", linkmsg); |
cd0ff491 GFT |
488 | netif_carrier_on(netdev); |
489 | } else { | |
490 | if (testonly) | |
fcf45b4c GFT |
491 | goto out; |
492 | ||
c97b5740 | 493 | netif_info(jme, link, jme->dev, "Link is down.\n"); |
fcf45b4c | 494 | jme->phylink = 0; |
cd0ff491 | 495 | netif_carrier_off(netdev); |
d7699f87 | 496 | } |
fcf45b4c GFT |
497 | |
498 | out: | |
499 | return rc; | |
d7699f87 GFT |
500 | } |
501 | ||
3bf61c55 GFT |
502 | static int |
503 | jme_setup_tx_resources(struct jme_adapter *jme) | |
d7699f87 | 504 | { |
d7699f87 GFT |
505 | struct jme_ring *txring = &(jme->txring[0]); |
506 | ||
507 | txring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
508 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
509 | &(txring->dmaalloc), | |
510 | GFP_ATOMIC); | |
fcf45b4c | 511 | |
fa97b924 GFT |
512 | if (!txring->alloc) |
513 | goto err_set_null; | |
d7699f87 GFT |
514 | |
515 | /* | |
516 | * 16 Bytes align | |
517 | */ | |
cd0ff491 | 518 | txring->desc = (void *)ALIGN((unsigned long)(txring->alloc), |
3bf61c55 | 519 | RING_DESC_ALIGN); |
4330c2f2 | 520 | txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 521 | txring->next_to_use = 0; |
cdcdc9eb | 522 | atomic_set(&txring->next_to_clean, 0); |
b3821cc5 | 523 | atomic_set(&txring->nr_free, jme->tx_ring_size); |
d7699f87 | 524 | |
fa97b924 GFT |
525 | txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
526 | jme->tx_ring_size, GFP_ATOMIC); | |
527 | if (unlikely(!(txring->bufinf))) | |
528 | goto err_free_txring; | |
529 | ||
d7699f87 | 530 | /* |
b3821cc5 | 531 | * Initialize Transmit Descriptors |
d7699f87 | 532 | */ |
b3821cc5 | 533 | memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size)); |
3bf61c55 | 534 | memset(txring->bufinf, 0, |
b3821cc5 | 535 | sizeof(struct jme_buffer_info) * jme->tx_ring_size); |
d7699f87 GFT |
536 | |
537 | return 0; | |
fa97b924 GFT |
538 | |
539 | err_free_txring: | |
540 | dma_free_coherent(&(jme->pdev->dev), | |
541 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), | |
542 | txring->alloc, | |
543 | txring->dmaalloc); | |
544 | ||
545 | err_set_null: | |
546 | txring->desc = NULL; | |
547 | txring->dmaalloc = 0; | |
548 | txring->dma = 0; | |
549 | txring->bufinf = NULL; | |
550 | ||
551 | return -ENOMEM; | |
d7699f87 GFT |
552 | } |
553 | ||
3bf61c55 GFT |
554 | static void |
555 | jme_free_tx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
556 | { |
557 | int i; | |
558 | struct jme_ring *txring = &(jme->txring[0]); | |
fa97b924 | 559 | struct jme_buffer_info *txbi; |
d7699f87 | 560 | |
cd0ff491 | 561 | if (txring->alloc) { |
fa97b924 GFT |
562 | if (txring->bufinf) { |
563 | for (i = 0 ; i < jme->tx_ring_size ; ++i) { | |
564 | txbi = txring->bufinf + i; | |
565 | if (txbi->skb) { | |
566 | dev_kfree_skb(txbi->skb); | |
567 | txbi->skb = NULL; | |
568 | } | |
569 | txbi->mapping = 0; | |
570 | txbi->len = 0; | |
571 | txbi->nr_desc = 0; | |
572 | txbi->start_xmit = 0; | |
d7699f87 | 573 | } |
fa97b924 | 574 | kfree(txring->bufinf); |
d7699f87 GFT |
575 | } |
576 | ||
577 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 578 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
d7699f87 GFT |
579 | txring->alloc, |
580 | txring->dmaalloc); | |
3bf61c55 GFT |
581 | |
582 | txring->alloc = NULL; | |
583 | txring->desc = NULL; | |
584 | txring->dmaalloc = 0; | |
585 | txring->dma = 0; | |
fa97b924 | 586 | txring->bufinf = NULL; |
d7699f87 | 587 | } |
3bf61c55 | 588 | txring->next_to_use = 0; |
cdcdc9eb | 589 | atomic_set(&txring->next_to_clean, 0); |
79ce639c | 590 | atomic_set(&txring->nr_free, 0); |
d7699f87 GFT |
591 | } |
592 | ||
cd0ff491 | 593 | static inline void |
3bf61c55 | 594 | jme_enable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
595 | { |
596 | /* | |
597 | * Select Queue 0 | |
598 | */ | |
599 | jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0); | |
cd0ff491 | 600 | wmb(); |
d7699f87 GFT |
601 | |
602 | /* | |
603 | * Setup TX Queue 0 DMA Bass Address | |
604 | */ | |
fcf45b4c | 605 | jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
3bf61c55 | 606 | jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32); |
fcf45b4c | 607 | jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
d7699f87 GFT |
608 | |
609 | /* | |
610 | * Setup TX Descptor Count | |
611 | */ | |
b3821cc5 | 612 | jwrite32(jme, JME_TXQDC, jme->tx_ring_size); |
d7699f87 GFT |
613 | |
614 | /* | |
615 | * Enable TX Engine | |
616 | */ | |
617 | wmb(); | |
4330c2f2 GFT |
618 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
619 | TXCS_SELECT_QUEUE0 | | |
620 | TXCS_ENABLE); | |
d7699f87 GFT |
621 | |
622 | } | |
623 | ||
cd0ff491 | 624 | static inline void |
29bdd921 GFT |
625 | jme_restart_tx_engine(struct jme_adapter *jme) |
626 | { | |
627 | /* | |
628 | * Restart TX Engine | |
629 | */ | |
630 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | |
631 | TXCS_SELECT_QUEUE0 | | |
632 | TXCS_ENABLE); | |
633 | } | |
634 | ||
cd0ff491 | 635 | static inline void |
3bf61c55 | 636 | jme_disable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
637 | { |
638 | int i; | |
cd0ff491 | 639 | u32 val; |
d7699f87 GFT |
640 | |
641 | /* | |
642 | * Disable TX Engine | |
643 | */ | |
fcf45b4c | 644 | jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0); |
cd0ff491 | 645 | wmb(); |
d7699f87 GFT |
646 | |
647 | val = jread32(jme, JME_TXCS); | |
cd0ff491 | 648 | for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) { |
fcf45b4c | 649 | mdelay(1); |
d7699f87 | 650 | val = jread32(jme, JME_TXCS); |
cd0ff491 | 651 | rmb(); |
d7699f87 GFT |
652 | } |
653 | ||
cd0ff491 GFT |
654 | if (!i) |
655 | jeprintk(jme->pdev, "Disable TX engine timeout.\n"); | |
d7699f87 GFT |
656 | } |
657 | ||
3bf61c55 GFT |
658 | static void |
659 | jme_set_clean_rxdesc(struct jme_adapter *jme, int i) | |
d7699f87 | 660 | { |
fa97b924 | 661 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 662 | register struct rxdesc *rxdesc = rxring->desc; |
4330c2f2 GFT |
663 | struct jme_buffer_info *rxbi = rxring->bufinf; |
664 | rxdesc += i; | |
665 | rxbi += i; | |
666 | ||
667 | rxdesc->dw[0] = 0; | |
668 | rxdesc->dw[1] = 0; | |
3bf61c55 | 669 | rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32); |
fcf45b4c GFT |
670 | rxdesc->desc1.bufaddrl = cpu_to_le32( |
671 | (__u64)rxbi->mapping & 0xFFFFFFFFUL); | |
3bf61c55 | 672 | rxdesc->desc1.datalen = cpu_to_le16(rxbi->len); |
cd0ff491 | 673 | if (jme->dev->features & NETIF_F_HIGHDMA) |
3bf61c55 | 674 | rxdesc->desc1.flags = RXFLAG_64BIT; |
d7699f87 | 675 | wmb(); |
3bf61c55 | 676 | rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT; |
d7699f87 GFT |
677 | } |
678 | ||
3bf61c55 GFT |
679 | static int |
680 | jme_make_new_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
681 | { |
682 | struct jme_ring *rxring = &(jme->rxring[0]); | |
b3821cc5 | 683 | struct jme_buffer_info *rxbi = rxring->bufinf + i; |
cd0ff491 | 684 | struct sk_buff *skb; |
4330c2f2 | 685 | |
79ce639c GFT |
686 | skb = netdev_alloc_skb(jme->dev, |
687 | jme->dev->mtu + RX_EXTRA_LEN); | |
cd0ff491 | 688 | if (unlikely(!skb)) |
4330c2f2 | 689 | return -ENOMEM; |
3bf61c55 | 690 | |
4330c2f2 | 691 | rxbi->skb = skb; |
3bf61c55 | 692 | rxbi->len = skb_tailroom(skb); |
b3821cc5 GFT |
693 | rxbi->mapping = pci_map_page(jme->pdev, |
694 | virt_to_page(skb->data), | |
695 | offset_in_page(skb->data), | |
696 | rxbi->len, | |
697 | PCI_DMA_FROMDEVICE); | |
4330c2f2 GFT |
698 | |
699 | return 0; | |
700 | } | |
701 | ||
3bf61c55 GFT |
702 | static void |
703 | jme_free_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
704 | { |
705 | struct jme_ring *rxring = &(jme->rxring[0]); | |
706 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
707 | rxbi += i; | |
708 | ||
cd0ff491 | 709 | if (rxbi->skb) { |
b3821cc5 | 710 | pci_unmap_page(jme->pdev, |
4330c2f2 | 711 | rxbi->mapping, |
3bf61c55 | 712 | rxbi->len, |
4330c2f2 GFT |
713 | PCI_DMA_FROMDEVICE); |
714 | dev_kfree_skb(rxbi->skb); | |
715 | rxbi->skb = NULL; | |
716 | rxbi->mapping = 0; | |
3bf61c55 | 717 | rxbi->len = 0; |
4330c2f2 GFT |
718 | } |
719 | } | |
720 | ||
3bf61c55 GFT |
721 | static void |
722 | jme_free_rx_resources(struct jme_adapter *jme) | |
723 | { | |
724 | int i; | |
725 | struct jme_ring *rxring = &(jme->rxring[0]); | |
726 | ||
cd0ff491 | 727 | if (rxring->alloc) { |
fa97b924 GFT |
728 | if (rxring->bufinf) { |
729 | for (i = 0 ; i < jme->rx_ring_size ; ++i) | |
730 | jme_free_rx_buf(jme, i); | |
731 | kfree(rxring->bufinf); | |
732 | } | |
3bf61c55 GFT |
733 | |
734 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 735 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
3bf61c55 GFT |
736 | rxring->alloc, |
737 | rxring->dmaalloc); | |
738 | rxring->alloc = NULL; | |
739 | rxring->desc = NULL; | |
740 | rxring->dmaalloc = 0; | |
741 | rxring->dma = 0; | |
fa97b924 | 742 | rxring->bufinf = NULL; |
3bf61c55 GFT |
743 | } |
744 | rxring->next_to_use = 0; | |
cdcdc9eb | 745 | atomic_set(&rxring->next_to_clean, 0); |
3bf61c55 GFT |
746 | } |
747 | ||
748 | static int | |
749 | jme_setup_rx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
750 | { |
751 | int i; | |
752 | struct jme_ring *rxring = &(jme->rxring[0]); | |
753 | ||
754 | rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
755 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
756 | &(rxring->dmaalloc), | |
757 | GFP_ATOMIC); | |
fa97b924 GFT |
758 | if (!rxring->alloc) |
759 | goto err_set_null; | |
d7699f87 GFT |
760 | |
761 | /* | |
762 | * 16 Bytes align | |
763 | */ | |
cd0ff491 | 764 | rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc), |
3bf61c55 | 765 | RING_DESC_ALIGN); |
4330c2f2 | 766 | rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 767 | rxring->next_to_use = 0; |
cdcdc9eb | 768 | atomic_set(&rxring->next_to_clean, 0); |
d7699f87 | 769 | |
fa97b924 GFT |
770 | rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
771 | jme->rx_ring_size, GFP_ATOMIC); | |
772 | if (unlikely(!(rxring->bufinf))) | |
773 | goto err_free_rxring; | |
774 | ||
d7699f87 GFT |
775 | /* |
776 | * Initiallize Receive Descriptors | |
777 | */ | |
fa97b924 GFT |
778 | memset(rxring->bufinf, 0, |
779 | sizeof(struct jme_buffer_info) * jme->rx_ring_size); | |
cd0ff491 GFT |
780 | for (i = 0 ; i < jme->rx_ring_size ; ++i) { |
781 | if (unlikely(jme_make_new_rx_buf(jme, i))) { | |
3bf61c55 GFT |
782 | jme_free_rx_resources(jme); |
783 | return -ENOMEM; | |
784 | } | |
d7699f87 GFT |
785 | |
786 | jme_set_clean_rxdesc(jme, i); | |
787 | } | |
788 | ||
d7699f87 | 789 | return 0; |
fa97b924 GFT |
790 | |
791 | err_free_rxring: | |
792 | dma_free_coherent(&(jme->pdev->dev), | |
793 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), | |
794 | rxring->alloc, | |
795 | rxring->dmaalloc); | |
796 | err_set_null: | |
797 | rxring->desc = NULL; | |
798 | rxring->dmaalloc = 0; | |
799 | rxring->dma = 0; | |
800 | rxring->bufinf = NULL; | |
801 | ||
802 | return -ENOMEM; | |
d7699f87 GFT |
803 | } |
804 | ||
cd0ff491 | 805 | static inline void |
3bf61c55 | 806 | jme_enable_rx_engine(struct jme_adapter *jme) |
d7699f87 | 807 | { |
cd0ff491 GFT |
808 | /* |
809 | * Select Queue 0 | |
810 | */ | |
811 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | | |
812 | RXCS_QUEUESEL_Q0); | |
813 | wmb(); | |
814 | ||
d7699f87 GFT |
815 | /* |
816 | * Setup RX DMA Bass Address | |
817 | */ | |
fa97b924 | 818 | jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
3bf61c55 | 819 | jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32); |
fa97b924 | 820 | jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
d7699f87 GFT |
821 | |
822 | /* | |
b3821cc5 | 823 | * Setup RX Descriptor Count |
d7699f87 | 824 | */ |
b3821cc5 | 825 | jwrite32(jme, JME_RXQDC, jme->rx_ring_size); |
d7699f87 | 826 | |
3bf61c55 | 827 | /* |
d7699f87 GFT |
828 | * Setup Unicast Filter |
829 | */ | |
830 | jme_set_multi(jme->dev); | |
831 | ||
832 | /* | |
833 | * Enable RX Engine | |
834 | */ | |
835 | wmb(); | |
79ce639c | 836 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
837 | RXCS_QUEUESEL_Q0 | |
838 | RXCS_ENABLE | | |
839 | RXCS_QST); | |
d7699f87 GFT |
840 | } |
841 | ||
cd0ff491 | 842 | static inline void |
3bf61c55 | 843 | jme_restart_rx_engine(struct jme_adapter *jme) |
4330c2f2 GFT |
844 | { |
845 | /* | |
3bf61c55 | 846 | * Start RX Engine |
4330c2f2 | 847 | */ |
79ce639c | 848 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
849 | RXCS_QUEUESEL_Q0 | |
850 | RXCS_ENABLE | | |
851 | RXCS_QST); | |
852 | } | |
853 | ||
cd0ff491 | 854 | static inline void |
3bf61c55 | 855 | jme_disable_rx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
856 | { |
857 | int i; | |
cd0ff491 | 858 | u32 val; |
d7699f87 GFT |
859 | |
860 | /* | |
861 | * Disable RX Engine | |
862 | */ | |
29bdd921 | 863 | jwrite32(jme, JME_RXCS, jme->reg_rxcs); |
cd0ff491 | 864 | wmb(); |
d7699f87 GFT |
865 | |
866 | val = jread32(jme, JME_RXCS); | |
cd0ff491 | 867 | for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) { |
29bdd921 | 868 | mdelay(1); |
d7699f87 | 869 | val = jread32(jme, JME_RXCS); |
cd0ff491 | 870 | rmb(); |
d7699f87 GFT |
871 | } |
872 | ||
cd0ff491 GFT |
873 | if (!i) |
874 | jeprintk(jme->pdev, "Disable RX engine timeout.\n"); | |
d7699f87 GFT |
875 | |
876 | } | |
877 | ||
192570e0 | 878 | static int |
cd0ff491 | 879 | jme_rxsum_ok(struct jme_adapter *jme, u16 flags) |
192570e0 | 880 | { |
cd0ff491 | 881 | if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) |
192570e0 GFT |
882 | return false; |
883 | ||
fa97b924 GFT |
884 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS)) |
885 | == RXWBFLAG_TCPON)) { | |
886 | if (flags & RXWBFLAG_IPV4) | |
c97b5740 | 887 | netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n"); |
fa97b924 | 888 | return false; |
192570e0 GFT |
889 | } |
890 | ||
fa97b924 GFT |
891 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS)) |
892 | == RXWBFLAG_UDPON)) { | |
893 | if (flags & RXWBFLAG_IPV4) | |
c97b5740 | 894 | netif_err(jme, rx_err, jme->dev, "UDP Checksum error.\n"); |
fa97b924 | 895 | return false; |
192570e0 GFT |
896 | } |
897 | ||
fa97b924 GFT |
898 | if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS)) |
899 | == RXWBFLAG_IPV4)) { | |
c97b5740 | 900 | netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error.\n"); |
fa97b924 | 901 | return false; |
192570e0 GFT |
902 | } |
903 | ||
904 | return true; | |
905 | } | |
906 | ||
3bf61c55 | 907 | static void |
42b1055e | 908 | jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) |
d7699f87 | 909 | { |
d7699f87 | 910 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 911 | struct rxdesc *rxdesc = rxring->desc; |
3bf61c55 | 912 | struct jme_buffer_info *rxbi = rxring->bufinf; |
d7699f87 | 913 | struct sk_buff *skb; |
3bf61c55 | 914 | int framesize; |
d7699f87 | 915 | |
3bf61c55 GFT |
916 | rxdesc += idx; |
917 | rxbi += idx; | |
d7699f87 | 918 | |
3bf61c55 GFT |
919 | skb = rxbi->skb; |
920 | pci_dma_sync_single_for_cpu(jme->pdev, | |
921 | rxbi->mapping, | |
922 | rxbi->len, | |
923 | PCI_DMA_FROMDEVICE); | |
924 | ||
cd0ff491 | 925 | if (unlikely(jme_make_new_rx_buf(jme, idx))) { |
3bf61c55 GFT |
926 | pci_dma_sync_single_for_device(jme->pdev, |
927 | rxbi->mapping, | |
928 | rxbi->len, | |
929 | PCI_DMA_FROMDEVICE); | |
930 | ||
931 | ++(NET_STAT(jme).rx_dropped); | |
cd0ff491 | 932 | } else { |
3bf61c55 GFT |
933 | framesize = le16_to_cpu(rxdesc->descwb.framesize) |
934 | - RX_PREPAD_SIZE; | |
935 | ||
936 | skb_reserve(skb, RX_PREPAD_SIZE); | |
937 | skb_put(skb, framesize); | |
938 | skb->protocol = eth_type_trans(skb, jme->dev); | |
939 | ||
94c5ea02 | 940 | if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags))) |
8c198884 | 941 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
29bdd921 GFT |
942 | else |
943 | skb->ip_summed = CHECKSUM_NONE; | |
8c198884 | 944 | |
94c5ea02 | 945 | if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) { |
cd0ff491 | 946 | if (jme->vlgrp) { |
cdcdc9eb | 947 | jme->jme_vlan_rx(skb, jme->vlgrp, |
94c5ea02 | 948 | le16_to_cpu(rxdesc->descwb.vlan)); |
b3821cc5 | 949 | NET_STAT(jme).rx_bytes += 4; |
c97b5740 | 950 | } else { |
c97b5740 | 951 | dev_kfree_skb(skb); |
b3821cc5 | 952 | } |
cd0ff491 | 953 | } else { |
cdcdc9eb | 954 | jme->jme_rx(skb); |
b3821cc5 | 955 | } |
3bf61c55 | 956 | |
94c5ea02 GFT |
957 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) == |
958 | cpu_to_le16(RXWBFLAG_DEST_MUL)) | |
3bf61c55 GFT |
959 | ++(NET_STAT(jme).multicast); |
960 | ||
3bf61c55 GFT |
961 | NET_STAT(jme).rx_bytes += framesize; |
962 | ++(NET_STAT(jme).rx_packets); | |
963 | } | |
964 | ||
965 | jme_set_clean_rxdesc(jme, idx); | |
966 | ||
967 | } | |
968 | ||
969 | static int | |
970 | jme_process_receive(struct jme_adapter *jme, int limit) | |
971 | { | |
972 | struct jme_ring *rxring = &(jme->rxring[0]); | |
cd0ff491 | 973 | struct rxdesc *rxdesc = rxring->desc; |
b3821cc5 | 974 | int i, j, ccnt, desccnt, mask = jme->rx_ring_mask; |
3bf61c55 | 975 | |
cd0ff491 | 976 | if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) |
192570e0 GFT |
977 | goto out_inc; |
978 | ||
cd0ff491 | 979 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
192570e0 GFT |
980 | goto out_inc; |
981 | ||
cd0ff491 | 982 | if (unlikely(!netif_carrier_ok(jme->dev))) |
192570e0 GFT |
983 | goto out_inc; |
984 | ||
cdcdc9eb | 985 | i = atomic_read(&rxring->next_to_clean); |
fa97b924 | 986 | while (limit > 0) { |
3bf61c55 GFT |
987 | rxdesc = rxring->desc; |
988 | rxdesc += i; | |
989 | ||
94c5ea02 | 990 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) || |
3bf61c55 GFT |
991 | !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL)) |
992 | goto out; | |
fa97b924 | 993 | --limit; |
d7699f87 | 994 | |
4330c2f2 GFT |
995 | desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; |
996 | ||
cd0ff491 | 997 | if (unlikely(desccnt > 1 || |
192570e0 | 998 | rxdesc->descwb.errstat & RXWBERR_ALLERR)) { |
d7699f87 | 999 | |
cd0ff491 | 1000 | if (rxdesc->descwb.errstat & RXWBERR_CRCERR) |
3bf61c55 | 1001 | ++(NET_STAT(jme).rx_crc_errors); |
cd0ff491 | 1002 | else if (rxdesc->descwb.errstat & RXWBERR_OVERUN) |
3bf61c55 GFT |
1003 | ++(NET_STAT(jme).rx_fifo_errors); |
1004 | else | |
1005 | ++(NET_STAT(jme).rx_errors); | |
4330c2f2 | 1006 | |
cd0ff491 | 1007 | if (desccnt > 1) |
3bf61c55 | 1008 | limit -= desccnt - 1; |
4330c2f2 | 1009 | |
cd0ff491 | 1010 | for (j = i, ccnt = desccnt ; ccnt-- ; ) { |
4330c2f2 | 1011 | jme_set_clean_rxdesc(jme, j); |
b3821cc5 | 1012 | j = (j + 1) & (mask); |
4330c2f2 | 1013 | } |
3bf61c55 | 1014 | |
cd0ff491 | 1015 | } else { |
42b1055e | 1016 | jme_alloc_and_feed_skb(jme, i); |
3bf61c55 | 1017 | } |
4330c2f2 | 1018 | |
b3821cc5 | 1019 | i = (i + desccnt) & (mask); |
3bf61c55 | 1020 | } |
4330c2f2 | 1021 | |
3bf61c55 | 1022 | out: |
cdcdc9eb | 1023 | atomic_set(&rxring->next_to_clean, i); |
4330c2f2 | 1024 | |
192570e0 GFT |
1025 | out_inc: |
1026 | atomic_inc(&jme->rx_cleaning); | |
1027 | ||
3bf61c55 | 1028 | return limit > 0 ? limit : 0; |
4330c2f2 | 1029 | |
3bf61c55 | 1030 | } |
d7699f87 | 1031 | |
79ce639c GFT |
1032 | static void |
1033 | jme_attempt_pcc(struct dynpcc_info *dpi, int atmp) | |
1034 | { | |
cd0ff491 | 1035 | if (likely(atmp == dpi->cur)) { |
192570e0 | 1036 | dpi->cnt = 0; |
79ce639c | 1037 | return; |
192570e0 | 1038 | } |
79ce639c | 1039 | |
cd0ff491 | 1040 | if (dpi->attempt == atmp) { |
79ce639c | 1041 | ++(dpi->cnt); |
cd0ff491 | 1042 | } else { |
79ce639c GFT |
1043 | dpi->attempt = atmp; |
1044 | dpi->cnt = 0; | |
1045 | } | |
1046 | ||
1047 | } | |
1048 | ||
1049 | static void | |
1050 | jme_dynamic_pcc(struct jme_adapter *jme) | |
1051 | { | |
1052 | register struct dynpcc_info *dpi = &(jme->dpi); | |
1053 | ||
cd0ff491 | 1054 | if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) |
79ce639c | 1055 | jme_attempt_pcc(dpi, PCC_P3); |
c97b5740 GFT |
1056 | else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD || |
1057 | dpi->intr_cnt > PCC_INTR_THRESHOLD) | |
79ce639c GFT |
1058 | jme_attempt_pcc(dpi, PCC_P2); |
1059 | else | |
1060 | jme_attempt_pcc(dpi, PCC_P1); | |
1061 | ||
cd0ff491 GFT |
1062 | if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { |
1063 | if (dpi->attempt < dpi->cur) | |
1064 | tasklet_schedule(&jme->rxclean_task); | |
79ce639c GFT |
1065 | jme_set_rx_pcc(jme, dpi->attempt); |
1066 | dpi->cur = dpi->attempt; | |
1067 | dpi->cnt = 0; | |
1068 | } | |
1069 | } | |
1070 | ||
1071 | static void | |
1072 | jme_start_pcc_timer(struct jme_adapter *jme) | |
1073 | { | |
1074 | struct dynpcc_info *dpi = &(jme->dpi); | |
1075 | dpi->last_bytes = NET_STAT(jme).rx_bytes; | |
1076 | dpi->last_pkts = NET_STAT(jme).rx_packets; | |
1077 | dpi->intr_cnt = 0; | |
1078 | jwrite32(jme, JME_TMCSR, | |
1079 | TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT)); | |
1080 | } | |
1081 | ||
cd0ff491 | 1082 | static inline void |
29bdd921 GFT |
1083 | jme_stop_pcc_timer(struct jme_adapter *jme) |
1084 | { | |
1085 | jwrite32(jme, JME_TMCSR, 0); | |
1086 | } | |
1087 | ||
cd0ff491 GFT |
1088 | static void |
1089 | jme_shutdown_nic(struct jme_adapter *jme) | |
1090 | { | |
1091 | u32 phylink; | |
1092 | ||
1093 | phylink = jme_linkstat_from_phy(jme); | |
1094 | ||
1095 | if (!(phylink & PHY_LINK_UP)) { | |
1096 | /* | |
1097 | * Disable all interrupt before issue timer | |
1098 | */ | |
1099 | jme_stop_irq(jme); | |
1100 | jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE); | |
1101 | } | |
1102 | } | |
1103 | ||
79ce639c GFT |
1104 | static void |
1105 | jme_pcc_tasklet(unsigned long arg) | |
1106 | { | |
cd0ff491 | 1107 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c GFT |
1108 | struct net_device *netdev = jme->dev; |
1109 | ||
cd0ff491 GFT |
1110 | if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) { |
1111 | jme_shutdown_nic(jme); | |
1112 | return; | |
1113 | } | |
29bdd921 | 1114 | |
cd0ff491 | 1115 | if (unlikely(!netif_carrier_ok(netdev) || |
29bdd921 GFT |
1116 | (atomic_read(&jme->link_changing) != 1) |
1117 | )) { | |
1118 | jme_stop_pcc_timer(jme); | |
79ce639c GFT |
1119 | return; |
1120 | } | |
29bdd921 | 1121 | |
cd0ff491 | 1122 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
192570e0 GFT |
1123 | jme_dynamic_pcc(jme); |
1124 | ||
79ce639c GFT |
1125 | jme_start_pcc_timer(jme); |
1126 | } | |
1127 | ||
cd0ff491 | 1128 | static inline void |
192570e0 GFT |
1129 | jme_polling_mode(struct jme_adapter *jme) |
1130 | { | |
1131 | jme_set_rx_pcc(jme, PCC_OFF); | |
1132 | } | |
1133 | ||
cd0ff491 | 1134 | static inline void |
192570e0 GFT |
1135 | jme_interrupt_mode(struct jme_adapter *jme) |
1136 | { | |
1137 | jme_set_rx_pcc(jme, PCC_P1); | |
1138 | } | |
1139 | ||
cd0ff491 GFT |
1140 | static inline int |
1141 | jme_pseudo_hotplug_enabled(struct jme_adapter *jme) | |
1142 | { | |
1143 | u32 apmc; | |
1144 | apmc = jread32(jme, JME_APMC); | |
1145 | return apmc & JME_APMC_PSEUDO_HP_EN; | |
1146 | } | |
1147 | ||
1148 | static void | |
1149 | jme_start_shutdown_timer(struct jme_adapter *jme) | |
1150 | { | |
1151 | u32 apmc; | |
1152 | ||
1153 | apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN; | |
1154 | apmc &= ~JME_APMC_EPIEN_CTRL; | |
1155 | if (!no_extplug) { | |
1156 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN); | |
1157 | wmb(); | |
1158 | } | |
1159 | jwrite32f(jme, JME_APMC, apmc); | |
1160 | ||
1161 | jwrite32f(jme, JME_TIMER2, 0); | |
1162 | set_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1163 | jwrite32(jme, JME_TMCSR, | |
1164 | TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT)); | |
1165 | } | |
1166 | ||
1167 | static void | |
1168 | jme_stop_shutdown_timer(struct jme_adapter *jme) | |
1169 | { | |
1170 | u32 apmc; | |
1171 | ||
1172 | jwrite32f(jme, JME_TMCSR, 0); | |
1173 | jwrite32f(jme, JME_TIMER2, 0); | |
1174 | clear_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1175 | ||
1176 | apmc = jread32(jme, JME_APMC); | |
1177 | apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL); | |
1178 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS); | |
1179 | wmb(); | |
1180 | jwrite32f(jme, JME_APMC, apmc); | |
1181 | } | |
1182 | ||
3bf61c55 GFT |
1183 | static void |
1184 | jme_link_change_tasklet(unsigned long arg) | |
1185 | { | |
cd0ff491 | 1186 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1187 | struct net_device *netdev = jme->dev; |
fcf45b4c GFT |
1188 | int rc; |
1189 | ||
cd0ff491 GFT |
1190 | while (!atomic_dec_and_test(&jme->link_changing)) { |
1191 | atomic_inc(&jme->link_changing); | |
c97b5740 | 1192 | netif_info(jme, intr, jme->dev, "Get link change lock failed.\n"); |
e882564f | 1193 | while (atomic_read(&jme->link_changing) != 1) |
c97b5740 | 1194 | netif_info(jme, intr, jme->dev, "Waiting link change lock.\n"); |
cd0ff491 | 1195 | } |
fcf45b4c | 1196 | |
cd0ff491 | 1197 | if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) |
fcf45b4c GFT |
1198 | goto out; |
1199 | ||
29bdd921 | 1200 | jme->old_mtu = netdev->mtu; |
fcf45b4c | 1201 | netif_stop_queue(netdev); |
cd0ff491 GFT |
1202 | if (jme_pseudo_hotplug_enabled(jme)) |
1203 | jme_stop_shutdown_timer(jme); | |
1204 | ||
1205 | jme_stop_pcc_timer(jme); | |
1206 | tasklet_disable(&jme->txclean_task); | |
1207 | tasklet_disable(&jme->rxclean_task); | |
1208 | tasklet_disable(&jme->rxempty_task); | |
1209 | ||
1210 | if (netif_carrier_ok(netdev)) { | |
1211 | jme_reset_ghc_speed(jme); | |
1212 | jme_disable_rx_engine(jme); | |
1213 | jme_disable_tx_engine(jme); | |
fcf45b4c GFT |
1214 | jme_reset_mac_processor(jme); |
1215 | jme_free_rx_resources(jme); | |
1216 | jme_free_tx_resources(jme); | |
192570e0 | 1217 | |
cd0ff491 | 1218 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1219 | jme_polling_mode(jme); |
cd0ff491 GFT |
1220 | |
1221 | netif_carrier_off(netdev); | |
fcf45b4c GFT |
1222 | } |
1223 | ||
1224 | jme_check_link(netdev, 0); | |
cd0ff491 | 1225 | if (netif_carrier_ok(netdev)) { |
fcf45b4c | 1226 | rc = jme_setup_rx_resources(jme); |
cd0ff491 GFT |
1227 | if (rc) { |
1228 | jeprintk(jme->pdev, "Allocating resources for RX error" | |
fcf45b4c | 1229 | ", Device STOPPED!\n"); |
cd0ff491 | 1230 | goto out_enable_tasklet; |
fcf45b4c GFT |
1231 | } |
1232 | ||
fcf45b4c | 1233 | rc = jme_setup_tx_resources(jme); |
cd0ff491 GFT |
1234 | if (rc) { |
1235 | jeprintk(jme->pdev, "Allocating resources for TX error" | |
fcf45b4c GFT |
1236 | ", Device STOPPED!\n"); |
1237 | goto err_out_free_rx_resources; | |
1238 | } | |
1239 | ||
1240 | jme_enable_rx_engine(jme); | |
1241 | jme_enable_tx_engine(jme); | |
1242 | ||
1243 | netif_start_queue(netdev); | |
192570e0 | 1244 | |
cd0ff491 | 1245 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1246 | jme_interrupt_mode(jme); |
192570e0 | 1247 | |
79ce639c | 1248 | jme_start_pcc_timer(jme); |
cd0ff491 GFT |
1249 | } else if (jme_pseudo_hotplug_enabled(jme)) { |
1250 | jme_start_shutdown_timer(jme); | |
fcf45b4c GFT |
1251 | } |
1252 | ||
cd0ff491 | 1253 | goto out_enable_tasklet; |
fcf45b4c GFT |
1254 | |
1255 | err_out_free_rx_resources: | |
1256 | jme_free_rx_resources(jme); | |
cd0ff491 GFT |
1257 | out_enable_tasklet: |
1258 | tasklet_enable(&jme->txclean_task); | |
1259 | tasklet_hi_enable(&jme->rxclean_task); | |
1260 | tasklet_hi_enable(&jme->rxempty_task); | |
fcf45b4c GFT |
1261 | out: |
1262 | atomic_inc(&jme->link_changing); | |
3bf61c55 | 1263 | } |
d7699f87 | 1264 | |
3bf61c55 GFT |
1265 | static void |
1266 | jme_rx_clean_tasklet(unsigned long arg) | |
1267 | { | |
cd0ff491 | 1268 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c | 1269 | struct dynpcc_info *dpi = &(jme->dpi); |
d7699f87 | 1270 | |
192570e0 GFT |
1271 | jme_process_receive(jme, jme->rx_ring_size); |
1272 | ++(dpi->intr_cnt); | |
42b1055e | 1273 | |
192570e0 | 1274 | } |
fcf45b4c | 1275 | |
192570e0 | 1276 | static int |
cdcdc9eb | 1277 | jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) |
192570e0 | 1278 | { |
cdcdc9eb | 1279 | struct jme_adapter *jme = jme_napi_priv(holder); |
192570e0 | 1280 | int rest; |
fcf45b4c | 1281 | |
cdcdc9eb | 1282 | rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget)); |
fcf45b4c | 1283 | |
cd0ff491 | 1284 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb | 1285 | atomic_dec(&jme->rx_empty); |
192570e0 GFT |
1286 | ++(NET_STAT(jme).rx_dropped); |
1287 | jme_restart_rx_engine(jme); | |
1288 | } | |
1289 | atomic_inc(&jme->rx_empty); | |
1290 | ||
cd0ff491 | 1291 | if (rest) { |
cdcdc9eb | 1292 | JME_RX_COMPLETE(netdev, holder); |
192570e0 GFT |
1293 | jme_interrupt_mode(jme); |
1294 | } | |
1295 | ||
cdcdc9eb GFT |
1296 | JME_NAPI_WEIGHT_SET(budget, rest); |
1297 | return JME_NAPI_WEIGHT_VAL(budget) - rest; | |
fcf45b4c GFT |
1298 | } |
1299 | ||
1300 | static void | |
1301 | jme_rx_empty_tasklet(unsigned long arg) | |
1302 | { | |
cd0ff491 | 1303 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1304 | |
cd0ff491 | 1305 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1306 | return; |
1307 | ||
cd0ff491 | 1308 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1309 | return; |
1310 | ||
c97b5740 | 1311 | netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n"); |
29bdd921 | 1312 | |
fcf45b4c | 1313 | jme_rx_clean_tasklet(arg); |
cdcdc9eb | 1314 | |
cd0ff491 | 1315 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb GFT |
1316 | atomic_dec(&jme->rx_empty); |
1317 | ++(NET_STAT(jme).rx_dropped); | |
1318 | jme_restart_rx_engine(jme); | |
1319 | } | |
1320 | atomic_inc(&jme->rx_empty); | |
4330c2f2 GFT |
1321 | } |
1322 | ||
b3821cc5 GFT |
1323 | static void |
1324 | jme_wake_queue_if_stopped(struct jme_adapter *jme) | |
1325 | { | |
fa97b924 | 1326 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1327 | |
1328 | smp_wmb(); | |
cd0ff491 | 1329 | if (unlikely(netif_queue_stopped(jme->dev) && |
b3821cc5 | 1330 | atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) { |
c97b5740 | 1331 | netif_info(jme, tx_done, jme->dev, "TX Queue Waked.\n"); |
b3821cc5 | 1332 | netif_wake_queue(jme->dev); |
b3821cc5 GFT |
1333 | } |
1334 | ||
1335 | } | |
1336 | ||
3bf61c55 GFT |
1337 | static void |
1338 | jme_tx_clean_tasklet(unsigned long arg) | |
4330c2f2 | 1339 | { |
cd0ff491 | 1340 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
3bf61c55 | 1341 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1342 | struct txdesc *txdesc = txring->desc; |
3bf61c55 | 1343 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi; |
b3821cc5 | 1344 | int i, j, cnt = 0, max, err, mask; |
3bf61c55 | 1345 | |
cd0ff491 GFT |
1346 | tx_dbg(jme, "Into txclean.\n"); |
1347 | ||
1348 | if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) | |
fcf45b4c GFT |
1349 | goto out; |
1350 | ||
cd0ff491 | 1351 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1352 | goto out; |
1353 | ||
cd0ff491 | 1354 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1355 | goto out; |
1356 | ||
b3821cc5 GFT |
1357 | max = jme->tx_ring_size - atomic_read(&txring->nr_free); |
1358 | mask = jme->tx_ring_mask; | |
3bf61c55 | 1359 | |
cd0ff491 | 1360 | for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { |
3bf61c55 GFT |
1361 | |
1362 | ctxbi = txbi + i; | |
1363 | ||
cd0ff491 | 1364 | if (likely(ctxbi->skb && |
b3821cc5 | 1365 | !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) { |
8c198884 | 1366 | |
cd0ff491 GFT |
1367 | tx_dbg(jme, "txclean: %d+%d@%lu\n", |
1368 | i, ctxbi->nr_desc, jiffies); | |
3bf61c55 | 1369 | |
cd0ff491 | 1370 | err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; |
3bf61c55 | 1371 | |
cd0ff491 | 1372 | for (j = 1 ; j < ctxbi->nr_desc ; ++j) { |
b3821cc5 GFT |
1373 | ttxbi = txbi + ((i + j) & (mask)); |
1374 | txdesc[(i + j) & (mask)].dw[0] = 0; | |
3bf61c55 | 1375 | |
b3821cc5 | 1376 | pci_unmap_page(jme->pdev, |
3bf61c55 GFT |
1377 | ttxbi->mapping, |
1378 | ttxbi->len, | |
1379 | PCI_DMA_TODEVICE); | |
1380 | ||
3bf61c55 GFT |
1381 | ttxbi->mapping = 0; |
1382 | ttxbi->len = 0; | |
1383 | } | |
1384 | ||
1385 | dev_kfree_skb(ctxbi->skb); | |
3bf61c55 GFT |
1386 | |
1387 | cnt += ctxbi->nr_desc; | |
1388 | ||
cd0ff491 | 1389 | if (unlikely(err)) { |
8c198884 | 1390 | ++(NET_STAT(jme).tx_carrier_errors); |
cd0ff491 | 1391 | } else { |
8c198884 | 1392 | ++(NET_STAT(jme).tx_packets); |
b3821cc5 GFT |
1393 | NET_STAT(jme).tx_bytes += ctxbi->len; |
1394 | } | |
1395 | ||
1396 | ctxbi->skb = NULL; | |
1397 | ctxbi->len = 0; | |
cdcdc9eb | 1398 | ctxbi->start_xmit = 0; |
cd0ff491 GFT |
1399 | |
1400 | } else { | |
3bf61c55 GFT |
1401 | break; |
1402 | } | |
1403 | ||
b3821cc5 | 1404 | i = (i + ctxbi->nr_desc) & mask; |
3bf61c55 GFT |
1405 | |
1406 | ctxbi->nr_desc = 0; | |
d7699f87 GFT |
1407 | } |
1408 | ||
cd0ff491 | 1409 | tx_dbg(jme, "txclean: done %d@%lu.\n", i, jiffies); |
cdcdc9eb | 1410 | atomic_set(&txring->next_to_clean, i); |
79ce639c | 1411 | atomic_add(cnt, &txring->nr_free); |
3bf61c55 | 1412 | |
b3821cc5 GFT |
1413 | jme_wake_queue_if_stopped(jme); |
1414 | ||
fcf45b4c GFT |
1415 | out: |
1416 | atomic_inc(&jme->tx_cleaning); | |
d7699f87 GFT |
1417 | } |
1418 | ||
79ce639c | 1419 | static void |
cd0ff491 | 1420 | jme_intr_msi(struct jme_adapter *jme, u32 intrstat) |
d7699f87 | 1421 | { |
3bf61c55 GFT |
1422 | /* |
1423 | * Disable interrupt | |
1424 | */ | |
1425 | jwrite32f(jme, JME_IENC, INTR_ENABLE); | |
d7699f87 | 1426 | |
cd0ff491 | 1427 | if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { |
47220951 GFT |
1428 | /* |
1429 | * Link change event is critical | |
1430 | * all other events are ignored | |
1431 | */ | |
1432 | jwrite32(jme, JME_IEVE, intrstat); | |
3bf61c55 | 1433 | tasklet_schedule(&jme->linkch_task); |
29bdd921 | 1434 | goto out_reenable; |
fcf45b4c | 1435 | } |
d7699f87 | 1436 | |
cd0ff491 | 1437 | if (intrstat & INTR_TMINTR) { |
47220951 | 1438 | jwrite32(jme, JME_IEVE, INTR_TMINTR); |
79ce639c | 1439 | tasklet_schedule(&jme->pcc_task); |
47220951 | 1440 | } |
79ce639c | 1441 | |
cd0ff491 | 1442 | if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { |
47220951 | 1443 | jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0); |
4330c2f2 | 1444 | tasklet_schedule(&jme->txclean_task); |
47220951 GFT |
1445 | } |
1446 | ||
cd0ff491 | 1447 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
47220951 GFT |
1448 | jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO | |
1449 | INTR_PCCRX0 | | |
1450 | INTR_RX0EMP)) | | |
1451 | INTR_RX0); | |
1452 | } | |
d7699f87 | 1453 | |
cd0ff491 GFT |
1454 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
1455 | if (intrstat & INTR_RX0EMP) | |
192570e0 GFT |
1456 | atomic_inc(&jme->rx_empty); |
1457 | ||
cd0ff491 GFT |
1458 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
1459 | if (likely(JME_RX_SCHEDULE_PREP(jme))) { | |
192570e0 | 1460 | jme_polling_mode(jme); |
cdcdc9eb | 1461 | JME_RX_SCHEDULE(jme); |
192570e0 GFT |
1462 | } |
1463 | } | |
cd0ff491 GFT |
1464 | } else { |
1465 | if (intrstat & INTR_RX0EMP) { | |
cdcdc9eb | 1466 | atomic_inc(&jme->rx_empty); |
cd0ff491 GFT |
1467 | tasklet_hi_schedule(&jme->rxempty_task); |
1468 | } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) { | |
1469 | tasklet_hi_schedule(&jme->rxclean_task); | |
cdcdc9eb | 1470 | } |
4330c2f2 | 1471 | } |
d7699f87 | 1472 | |
29bdd921 | 1473 | out_reenable: |
3bf61c55 | 1474 | /* |
fcf45b4c | 1475 | * Re-enable interrupt |
3bf61c55 | 1476 | */ |
fcf45b4c | 1477 | jwrite32f(jme, JME_IENS, INTR_ENABLE); |
79ce639c GFT |
1478 | } |
1479 | ||
1480 | static irqreturn_t | |
1481 | jme_intr(int irq, void *dev_id) | |
1482 | { | |
cd0ff491 GFT |
1483 | struct net_device *netdev = dev_id; |
1484 | struct jme_adapter *jme = netdev_priv(netdev); | |
1485 | u32 intrstat; | |
79ce639c GFT |
1486 | |
1487 | intrstat = jread32(jme, JME_IEVE); | |
1488 | ||
1489 | /* | |
1490 | * Check if it's really an interrupt for us | |
1491 | */ | |
9b9d55de | 1492 | if (unlikely((intrstat & INTR_ENABLE) == 0)) |
29bdd921 | 1493 | return IRQ_NONE; |
79ce639c GFT |
1494 | |
1495 | /* | |
1496 | * Check if the device still exist | |
1497 | */ | |
cd0ff491 GFT |
1498 | if (unlikely(intrstat == ~((typeof(intrstat))0))) |
1499 | return IRQ_NONE; | |
79ce639c GFT |
1500 | |
1501 | jme_intr_msi(jme, intrstat); | |
1502 | ||
cd0ff491 | 1503 | return IRQ_HANDLED; |
d7699f87 GFT |
1504 | } |
1505 | ||
79ce639c GFT |
1506 | static irqreturn_t |
1507 | jme_msi(int irq, void *dev_id) | |
1508 | { | |
cd0ff491 GFT |
1509 | struct net_device *netdev = dev_id; |
1510 | struct jme_adapter *jme = netdev_priv(netdev); | |
1511 | u32 intrstat; | |
79ce639c | 1512 | |
fa97b924 | 1513 | intrstat = jread32(jme, JME_IEVE); |
79ce639c GFT |
1514 | |
1515 | jme_intr_msi(jme, intrstat); | |
1516 | ||
cd0ff491 | 1517 | return IRQ_HANDLED; |
79ce639c GFT |
1518 | } |
1519 | ||
79ce639c GFT |
1520 | static void |
1521 | jme_reset_link(struct jme_adapter *jme) | |
1522 | { | |
1523 | jwrite32(jme, JME_TMCSR, TMCSR_SWIT); | |
1524 | } | |
1525 | ||
fcf45b4c GFT |
1526 | static void |
1527 | jme_restart_an(struct jme_adapter *jme) | |
1528 | { | |
cd0ff491 | 1529 | u32 bmcr; |
fcf45b4c | 1530 | |
cd0ff491 | 1531 | spin_lock_bh(&jme->phy_lock); |
fcf45b4c GFT |
1532 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1533 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
1534 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
cd0ff491 | 1535 | spin_unlock_bh(&jme->phy_lock); |
79ce639c GFT |
1536 | } |
1537 | ||
1538 | static int | |
1539 | jme_request_irq(struct jme_adapter *jme) | |
1540 | { | |
1541 | int rc; | |
cd0ff491 GFT |
1542 | struct net_device *netdev = jme->dev; |
1543 | irq_handler_t handler = jme_intr; | |
1544 | int irq_flags = IRQF_SHARED; | |
1545 | ||
1546 | if (!pci_enable_msi(jme->pdev)) { | |
1547 | set_bit(JME_FLAG_MSI, &jme->flags); | |
1548 | handler = jme_msi; | |
1549 | irq_flags = 0; | |
1550 | } | |
1551 | ||
1552 | rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, | |
1553 | netdev); | |
1554 | if (rc) { | |
1555 | jeprintk(jme->pdev, | |
b3821cc5 | 1556 | "Unable to request %s interrupt (return: %d)\n", |
cd0ff491 GFT |
1557 | test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx", |
1558 | rc); | |
79ce639c | 1559 | |
cd0ff491 GFT |
1560 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { |
1561 | pci_disable_msi(jme->pdev); | |
1562 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1563 | } |
cd0ff491 | 1564 | } else { |
79ce639c GFT |
1565 | netdev->irq = jme->pdev->irq; |
1566 | } | |
1567 | ||
cd0ff491 | 1568 | return rc; |
79ce639c GFT |
1569 | } |
1570 | ||
1571 | static void | |
1572 | jme_free_irq(struct jme_adapter *jme) | |
1573 | { | |
cd0ff491 GFT |
1574 | free_irq(jme->pdev->irq, jme->dev); |
1575 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { | |
1576 | pci_disable_msi(jme->pdev); | |
1577 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1578 | jme->dev->irq = jme->pdev->irq; |
cd0ff491 | 1579 | } |
fcf45b4c GFT |
1580 | } |
1581 | ||
3bf61c55 GFT |
1582 | static int |
1583 | jme_open(struct net_device *netdev) | |
d7699f87 GFT |
1584 | { |
1585 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 1586 | int rc; |
79ce639c | 1587 | |
42b1055e | 1588 | jme_clear_pm(jme); |
cdcdc9eb | 1589 | JME_NAPI_ENABLE(jme); |
d7699f87 | 1590 | |
fa97b924 | 1591 | tasklet_enable(&jme->linkch_task); |
cd0ff491 GFT |
1592 | tasklet_enable(&jme->txclean_task); |
1593 | tasklet_hi_enable(&jme->rxclean_task); | |
1594 | tasklet_hi_enable(&jme->rxempty_task); | |
1595 | ||
79ce639c | 1596 | rc = jme_request_irq(jme); |
cd0ff491 | 1597 | if (rc) |
4330c2f2 | 1598 | goto err_out; |
79ce639c | 1599 | |
d7699f87 | 1600 | jme_start_irq(jme); |
42b1055e | 1601 | |
cd0ff491 | 1602 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
42b1055e GFT |
1603 | jme_set_settings(netdev, &jme->old_ecmd); |
1604 | else | |
1605 | jme_reset_phy_processor(jme); | |
1606 | ||
29bdd921 | 1607 | jme_reset_link(jme); |
d7699f87 GFT |
1608 | |
1609 | return 0; | |
1610 | ||
d7699f87 GFT |
1611 | err_out: |
1612 | netif_stop_queue(netdev); | |
1613 | netif_carrier_off(netdev); | |
4330c2f2 | 1614 | return rc; |
d7699f87 GFT |
1615 | } |
1616 | ||
9b9d55de | 1617 | #ifdef CONFIG_PM |
42b1055e GFT |
1618 | static void |
1619 | jme_set_100m_half(struct jme_adapter *jme) | |
1620 | { | |
cd0ff491 | 1621 | u32 bmcr, tmp; |
42b1055e GFT |
1622 | |
1623 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1624 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | | |
1625 | BMCR_SPEED1000 | BMCR_FULLDPLX); | |
1626 | tmp |= BMCR_SPEED100; | |
1627 | ||
1628 | if (bmcr != tmp) | |
1629 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp); | |
1630 | ||
cd0ff491 | 1631 | if (jme->fpgaver) |
cdcdc9eb GFT |
1632 | jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL); |
1633 | else | |
1634 | jwrite32(jme, JME_GHC, GHC_SPEED_100M); | |
42b1055e GFT |
1635 | } |
1636 | ||
47220951 GFT |
1637 | #define JME_WAIT_LINK_TIME 2000 /* 2000ms */ |
1638 | static void | |
1639 | jme_wait_link(struct jme_adapter *jme) | |
1640 | { | |
cd0ff491 | 1641 | u32 phylink, to = JME_WAIT_LINK_TIME; |
47220951 GFT |
1642 | |
1643 | mdelay(1000); | |
1644 | phylink = jme_linkstat_from_phy(jme); | |
cd0ff491 | 1645 | while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { |
47220951 GFT |
1646 | mdelay(10); |
1647 | phylink = jme_linkstat_from_phy(jme); | |
1648 | } | |
1649 | } | |
9b9d55de | 1650 | #endif |
47220951 | 1651 | |
cd0ff491 | 1652 | static inline void |
42b1055e GFT |
1653 | jme_phy_off(struct jme_adapter *jme) |
1654 | { | |
1655 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN); | |
1656 | } | |
1657 | ||
3bf61c55 GFT |
1658 | static int |
1659 | jme_close(struct net_device *netdev) | |
d7699f87 GFT |
1660 | { |
1661 | struct jme_adapter *jme = netdev_priv(netdev); | |
1662 | ||
1663 | netif_stop_queue(netdev); | |
1664 | netif_carrier_off(netdev); | |
1665 | ||
1666 | jme_stop_irq(jme); | |
79ce639c | 1667 | jme_free_irq(jme); |
d7699f87 | 1668 | |
cdcdc9eb | 1669 | JME_NAPI_DISABLE(jme); |
192570e0 | 1670 | |
fa97b924 GFT |
1671 | tasklet_disable(&jme->linkch_task); |
1672 | tasklet_disable(&jme->txclean_task); | |
1673 | tasklet_disable(&jme->rxclean_task); | |
1674 | tasklet_disable(&jme->rxempty_task); | |
8c198884 | 1675 | |
cd0ff491 GFT |
1676 | jme_reset_ghc_speed(jme); |
1677 | jme_disable_rx_engine(jme); | |
1678 | jme_disable_tx_engine(jme); | |
8c198884 | 1679 | jme_reset_mac_processor(jme); |
d7699f87 GFT |
1680 | jme_free_rx_resources(jme); |
1681 | jme_free_tx_resources(jme); | |
42b1055e | 1682 | jme->phylink = 0; |
b3821cc5 GFT |
1683 | jme_phy_off(jme); |
1684 | ||
1685 | return 0; | |
1686 | } | |
1687 | ||
1688 | static int | |
1689 | jme_alloc_txdesc(struct jme_adapter *jme, | |
1690 | struct sk_buff *skb) | |
1691 | { | |
fa97b924 | 1692 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1693 | int idx, nr_alloc, mask = jme->tx_ring_mask; |
1694 | ||
1695 | idx = txring->next_to_use; | |
1696 | nr_alloc = skb_shinfo(skb)->nr_frags + 2; | |
1697 | ||
cd0ff491 | 1698 | if (unlikely(atomic_read(&txring->nr_free) < nr_alloc)) |
b3821cc5 GFT |
1699 | return -1; |
1700 | ||
1701 | atomic_sub(nr_alloc, &txring->nr_free); | |
42b1055e | 1702 | |
b3821cc5 GFT |
1703 | txring->next_to_use = (txring->next_to_use + nr_alloc) & mask; |
1704 | ||
1705 | return idx; | |
1706 | } | |
1707 | ||
1708 | static void | |
1709 | jme_fill_tx_map(struct pci_dev *pdev, | |
cd0ff491 | 1710 | struct txdesc *txdesc, |
b3821cc5 GFT |
1711 | struct jme_buffer_info *txbi, |
1712 | struct page *page, | |
cd0ff491 GFT |
1713 | u32 page_offset, |
1714 | u32 len, | |
1715 | u8 hidma) | |
b3821cc5 GFT |
1716 | { |
1717 | dma_addr_t dmaaddr; | |
1718 | ||
1719 | dmaaddr = pci_map_page(pdev, | |
1720 | page, | |
1721 | page_offset, | |
1722 | len, | |
1723 | PCI_DMA_TODEVICE); | |
1724 | ||
1725 | pci_dma_sync_single_for_device(pdev, | |
1726 | dmaaddr, | |
1727 | len, | |
1728 | PCI_DMA_TODEVICE); | |
1729 | ||
1730 | txdesc->dw[0] = 0; | |
1731 | txdesc->dw[1] = 0; | |
1732 | txdesc->desc2.flags = TXFLAG_OWN; | |
cd0ff491 | 1733 | txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0; |
b3821cc5 GFT |
1734 | txdesc->desc2.datalen = cpu_to_le16(len); |
1735 | txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32); | |
1736 | txdesc->desc2.bufaddrl = cpu_to_le32( | |
1737 | (__u64)dmaaddr & 0xFFFFFFFFUL); | |
1738 | ||
1739 | txbi->mapping = dmaaddr; | |
1740 | txbi->len = len; | |
1741 | } | |
1742 | ||
1743 | static void | |
1744 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
1745 | { | |
fa97b924 | 1746 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1747 | struct txdesc *txdesc = txring->desc, *ctxdesc; |
b3821cc5 | 1748 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; |
cd0ff491 | 1749 | u8 hidma = jme->dev->features & NETIF_F_HIGHDMA; |
b3821cc5 GFT |
1750 | int i, nr_frags = skb_shinfo(skb)->nr_frags; |
1751 | int mask = jme->tx_ring_mask; | |
1752 | struct skb_frag_struct *frag; | |
cd0ff491 | 1753 | u32 len; |
b3821cc5 | 1754 | |
cd0ff491 GFT |
1755 | for (i = 0 ; i < nr_frags ; ++i) { |
1756 | frag = &skb_shinfo(skb)->frags[i]; | |
b3821cc5 GFT |
1757 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); |
1758 | ctxbi = txbi + ((idx + i + 2) & (mask)); | |
1759 | ||
1760 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page, | |
1761 | frag->page_offset, frag->size, hidma); | |
42b1055e | 1762 | } |
b3821cc5 | 1763 | |
cd0ff491 | 1764 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
b3821cc5 GFT |
1765 | ctxdesc = txdesc + ((idx + 1) & (mask)); |
1766 | ctxbi = txbi + ((idx + 1) & (mask)); | |
1767 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
1768 | offset_in_page(skb->data), len, hidma); | |
1769 | ||
1770 | } | |
1771 | ||
1772 | static int | |
1773 | jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) | |
1774 | { | |
cd0ff491 | 1775 | if (unlikely(skb_shinfo(skb)->gso_size && |
b3821cc5 GFT |
1776 | skb_header_cloned(skb) && |
1777 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) { | |
1778 | dev_kfree_skb(skb); | |
1779 | return -1; | |
1780 | } | |
1781 | ||
1782 | return 0; | |
1783 | } | |
1784 | ||
1785 | static int | |
94c5ea02 | 1786 | jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags) |
b3821cc5 | 1787 | { |
94c5ea02 | 1788 | *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT); |
cd0ff491 | 1789 | if (*mss) { |
b3821cc5 GFT |
1790 | *flags |= TXFLAG_LSEN; |
1791 | ||
cd0ff491 | 1792 | if (skb->protocol == htons(ETH_P_IP)) { |
b3821cc5 GFT |
1793 | struct iphdr *iph = ip_hdr(skb); |
1794 | ||
1795 | iph->check = 0; | |
cd0ff491 | 1796 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
b3821cc5 GFT |
1797 | iph->daddr, 0, |
1798 | IPPROTO_TCP, | |
1799 | 0); | |
cd0ff491 | 1800 | } else { |
b3821cc5 GFT |
1801 | struct ipv6hdr *ip6h = ipv6_hdr(skb); |
1802 | ||
cd0ff491 | 1803 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, |
b3821cc5 GFT |
1804 | &ip6h->daddr, 0, |
1805 | IPPROTO_TCP, | |
1806 | 0); | |
1807 | } | |
1808 | ||
1809 | return 0; | |
1810 | } | |
1811 | ||
1812 | return 1; | |
1813 | } | |
1814 | ||
1815 | static void | |
cd0ff491 | 1816 | jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags) |
b3821cc5 | 1817 | { |
cd0ff491 GFT |
1818 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
1819 | u8 ip_proto; | |
b3821cc5 GFT |
1820 | |
1821 | switch (skb->protocol) { | |
cd0ff491 | 1822 | case htons(ETH_P_IP): |
b3821cc5 GFT |
1823 | ip_proto = ip_hdr(skb)->protocol; |
1824 | break; | |
cd0ff491 | 1825 | case htons(ETH_P_IPV6): |
b3821cc5 GFT |
1826 | ip_proto = ipv6_hdr(skb)->nexthdr; |
1827 | break; | |
1828 | default: | |
1829 | ip_proto = 0; | |
1830 | break; | |
1831 | } | |
1832 | ||
cd0ff491 | 1833 | switch (ip_proto) { |
b3821cc5 GFT |
1834 | case IPPROTO_TCP: |
1835 | *flags |= TXFLAG_TCPCS; | |
1836 | break; | |
1837 | case IPPROTO_UDP: | |
1838 | *flags |= TXFLAG_UDPCS; | |
1839 | break; | |
1840 | default: | |
c97b5740 | 1841 | netif_err(jme, tx_err, jme->dev, "Error upper layer protocol.\n"); |
b3821cc5 GFT |
1842 | break; |
1843 | } | |
1844 | } | |
1845 | } | |
1846 | ||
cd0ff491 | 1847 | static inline void |
94c5ea02 | 1848 | jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags) |
b3821cc5 | 1849 | { |
cd0ff491 | 1850 | if (vlan_tx_tag_present(skb)) { |
b3821cc5 | 1851 | *flags |= TXFLAG_TAGON; |
94c5ea02 | 1852 | *vlan = cpu_to_le16(vlan_tx_tag_get(skb)); |
42b1055e | 1853 | } |
b3821cc5 GFT |
1854 | } |
1855 | ||
1856 | static int | |
94c5ea02 | 1857 | jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) |
b3821cc5 | 1858 | { |
fa97b924 | 1859 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1860 | struct txdesc *txdesc; |
b3821cc5 | 1861 | struct jme_buffer_info *txbi; |
cd0ff491 | 1862 | u8 flags; |
b3821cc5 | 1863 | |
cd0ff491 | 1864 | txdesc = (struct txdesc *)txring->desc + idx; |
b3821cc5 GFT |
1865 | txbi = txring->bufinf + idx; |
1866 | ||
1867 | txdesc->dw[0] = 0; | |
1868 | txdesc->dw[1] = 0; | |
1869 | txdesc->dw[2] = 0; | |
1870 | txdesc->dw[3] = 0; | |
1871 | txdesc->desc1.pktsize = cpu_to_le16(skb->len); | |
1872 | /* | |
1873 | * Set OWN bit at final. | |
1874 | * When kernel transmit faster than NIC. | |
1875 | * And NIC trying to send this descriptor before we tell | |
1876 | * it to start sending this TX queue. | |
1877 | * Other fields are already filled correctly. | |
1878 | */ | |
1879 | wmb(); | |
1880 | flags = TXFLAG_OWN | TXFLAG_INT; | |
cd0ff491 GFT |
1881 | /* |
1882 | * Set checksum flags while not tso | |
1883 | */ | |
1884 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) | |
1885 | jme_tx_csum(jme, skb, &flags); | |
b3821cc5 | 1886 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); |
94c5ea02 | 1887 | jme_map_tx_skb(jme, skb, idx); |
b3821cc5 GFT |
1888 | txdesc->desc1.flags = flags; |
1889 | /* | |
1890 | * Set tx buffer info after telling NIC to send | |
1891 | * For better tx_clean timing | |
1892 | */ | |
1893 | wmb(); | |
1894 | txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2; | |
1895 | txbi->skb = skb; | |
1896 | txbi->len = skb->len; | |
cd0ff491 GFT |
1897 | txbi->start_xmit = jiffies; |
1898 | if (!txbi->start_xmit) | |
8d27293f | 1899 | txbi->start_xmit = (0UL-1); |
d7699f87 GFT |
1900 | |
1901 | return 0; | |
1902 | } | |
1903 | ||
b3821cc5 GFT |
1904 | static void |
1905 | jme_stop_queue_if_full(struct jme_adapter *jme) | |
1906 | { | |
fa97b924 | 1907 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 GFT |
1908 | struct jme_buffer_info *txbi = txring->bufinf; |
1909 | int idx = atomic_read(&txring->next_to_clean); | |
cdcdc9eb | 1910 | |
cd0ff491 | 1911 | txbi += idx; |
b3821cc5 GFT |
1912 | |
1913 | smp_wmb(); | |
cd0ff491 | 1914 | if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { |
b3821cc5 | 1915 | netif_stop_queue(jme->dev); |
c97b5740 | 1916 | netif_info(jme, tx_queued, jme->dev, "TX Queue Paused.\n"); |
b3821cc5 | 1917 | smp_wmb(); |
cd0ff491 GFT |
1918 | if (atomic_read(&txring->nr_free) |
1919 | >= (jme->tx_wake_threshold)) { | |
b3821cc5 | 1920 | netif_wake_queue(jme->dev); |
c97b5740 | 1921 | netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked.\n"); |
b3821cc5 GFT |
1922 | } |
1923 | } | |
1924 | ||
cd0ff491 | 1925 | if (unlikely(txbi->start_xmit && |
cdcdc9eb GFT |
1926 | (jiffies - txbi->start_xmit) >= TX_TIMEOUT && |
1927 | txbi->skb)) { | |
1928 | netif_stop_queue(jme->dev); | |
c97b5740 | 1929 | netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu.\n", idx, jiffies); |
cdcdc9eb | 1930 | } |
b3821cc5 GFT |
1931 | } |
1932 | ||
3bf61c55 GFT |
1933 | /* |
1934 | * This function is already protected by netif_tx_lock() | |
1935 | */ | |
cd0ff491 | 1936 | |
c97b5740 | 1937 | static netdev_tx_t |
3bf61c55 | 1938 | jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) |
d7699f87 | 1939 | { |
cd0ff491 | 1940 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 1941 | int idx; |
d7699f87 | 1942 | |
cd0ff491 | 1943 | if (unlikely(jme_expand_header(jme, skb))) { |
b3821cc5 GFT |
1944 | ++(NET_STAT(jme).tx_dropped); |
1945 | return NETDEV_TX_OK; | |
1946 | } | |
1947 | ||
1948 | idx = jme_alloc_txdesc(jme, skb); | |
79ce639c | 1949 | |
cd0ff491 | 1950 | if (unlikely(idx < 0)) { |
b3821cc5 | 1951 | netif_stop_queue(netdev); |
c97b5740 | 1952 | netif_err(jme, tx_err, jme->dev, "BUG! Tx ring full when queue awake!\n"); |
d7699f87 | 1953 | |
cd0ff491 | 1954 | return NETDEV_TX_BUSY; |
b3821cc5 GFT |
1955 | } |
1956 | ||
94c5ea02 | 1957 | jme_fill_tx_desc(jme, skb, idx); |
b3821cc5 | 1958 | |
4330c2f2 GFT |
1959 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
1960 | TXCS_SELECT_QUEUE0 | | |
1961 | TXCS_QUEUE0S | | |
1962 | TXCS_ENABLE); | |
d7699f87 | 1963 | |
cd0ff491 GFT |
1964 | tx_dbg(jme, "xmit: %d+%d@%lu\n", idx, |
1965 | skb_shinfo(skb)->nr_frags + 2, | |
1966 | jiffies); | |
b3821cc5 GFT |
1967 | jme_stop_queue_if_full(jme); |
1968 | ||
cd0ff491 | 1969 | return NETDEV_TX_OK; |
d7699f87 GFT |
1970 | } |
1971 | ||
3bf61c55 GFT |
1972 | static int |
1973 | jme_set_macaddr(struct net_device *netdev, void *p) | |
d7699f87 | 1974 | { |
cd0ff491 | 1975 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 1976 | struct sockaddr *addr = p; |
cd0ff491 | 1977 | u32 val; |
d7699f87 | 1978 | |
cd0ff491 | 1979 | if (netif_running(netdev)) |
d7699f87 GFT |
1980 | return -EBUSY; |
1981 | ||
cd0ff491 | 1982 | spin_lock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
1983 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
1984 | ||
186fc259 GFT |
1985 | val = (addr->sa_data[3] & 0xff) << 24 | |
1986 | (addr->sa_data[2] & 0xff) << 16 | | |
1987 | (addr->sa_data[1] & 0xff) << 8 | | |
1988 | (addr->sa_data[0] & 0xff); | |
4330c2f2 | 1989 | jwrite32(jme, JME_RXUMA_LO, val); |
186fc259 GFT |
1990 | val = (addr->sa_data[5] & 0xff) << 8 | |
1991 | (addr->sa_data[4] & 0xff); | |
4330c2f2 | 1992 | jwrite32(jme, JME_RXUMA_HI, val); |
cd0ff491 | 1993 | spin_unlock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
1994 | |
1995 | return 0; | |
1996 | } | |
1997 | ||
3bf61c55 GFT |
1998 | static void |
1999 | jme_set_multi(struct net_device *netdev) | |
d7699f87 | 2000 | { |
3bf61c55 | 2001 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2002 | u32 mc_hash[2] = {}; |
d7699f87 | 2003 | |
cd0ff491 | 2004 | spin_lock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2005 | |
2006 | jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME; | |
d7699f87 | 2007 | |
cd0ff491 | 2008 | if (netdev->flags & IFF_PROMISC) { |
8c198884 | 2009 | jme->reg_rxmcs |= RXMCS_ALLFRAME; |
cd0ff491 | 2010 | } else if (netdev->flags & IFF_ALLMULTI) { |
8c198884 | 2011 | jme->reg_rxmcs |= RXMCS_ALLMULFRAME; |
cd0ff491 | 2012 | } else if (netdev->flags & IFF_MULTICAST) { |
3bf61c55 GFT |
2013 | struct dev_mc_list *mclist; |
2014 | int bit_nr; | |
d7699f87 | 2015 | |
8c198884 | 2016 | jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED; |
c97b5740 | 2017 | netdev_for_each_mc_addr(mclist, netdev) { |
cd0ff491 GFT |
2018 | bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F; |
2019 | mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); | |
2020 | } | |
d7699f87 | 2021 | |
4330c2f2 GFT |
2022 | jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]); |
2023 | jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]); | |
d7699f87 GFT |
2024 | } |
2025 | ||
d7699f87 | 2026 | wmb(); |
8c198884 GFT |
2027 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); |
2028 | ||
cd0ff491 | 2029 | spin_unlock_bh(&jme->rxmcs_lock); |
d7699f87 GFT |
2030 | } |
2031 | ||
3bf61c55 | 2032 | static int |
8c198884 | 2033 | jme_change_mtu(struct net_device *netdev, int new_mtu) |
d7699f87 | 2034 | { |
cd0ff491 | 2035 | struct jme_adapter *jme = netdev_priv(netdev); |
79ce639c | 2036 | |
cd0ff491 | 2037 | if (new_mtu == jme->old_mtu) |
29bdd921 GFT |
2038 | return 0; |
2039 | ||
cd0ff491 GFT |
2040 | if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || |
2041 | ((new_mtu) < IPV6_MIN_MTU)) | |
2042 | return -EINVAL; | |
79ce639c | 2043 | |
cd0ff491 | 2044 | if (new_mtu > 4000) { |
79ce639c GFT |
2045 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2046 | jme->reg_rxcs |= RXCS_FIFOTHNP_64QW; | |
2047 | jme_restart_rx_engine(jme); | |
cd0ff491 | 2048 | } else { |
79ce639c GFT |
2049 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2050 | jme->reg_rxcs |= RXCS_FIFOTHNP_128QW; | |
2051 | jme_restart_rx_engine(jme); | |
2052 | } | |
2053 | ||
cd0ff491 | 2054 | if (new_mtu > 1900) { |
b3821cc5 GFT |
2055 | netdev->features &= ~(NETIF_F_HW_CSUM | |
2056 | NETIF_F_TSO | | |
2057 | NETIF_F_TSO6); | |
cd0ff491 GFT |
2058 | } else { |
2059 | if (test_bit(JME_FLAG_TXCSUM, &jme->flags)) | |
b3821cc5 | 2060 | netdev->features |= NETIF_F_HW_CSUM; |
cd0ff491 | 2061 | if (test_bit(JME_FLAG_TSO, &jme->flags)) |
b3821cc5 | 2062 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
79ce639c GFT |
2063 | } |
2064 | ||
cd0ff491 GFT |
2065 | netdev->mtu = new_mtu; |
2066 | jme_reset_link(jme); | |
79ce639c GFT |
2067 | |
2068 | return 0; | |
d7699f87 GFT |
2069 | } |
2070 | ||
8c198884 GFT |
2071 | static void |
2072 | jme_tx_timeout(struct net_device *netdev) | |
2073 | { | |
cd0ff491 | 2074 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 | 2075 | |
cdcdc9eb GFT |
2076 | jme->phylink = 0; |
2077 | jme_reset_phy_processor(jme); | |
cd0ff491 | 2078 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
cdcdc9eb GFT |
2079 | jme_set_settings(netdev, &jme->old_ecmd); |
2080 | ||
8c198884 | 2081 | /* |
cdcdc9eb | 2082 | * Force to Reset the link again |
8c198884 | 2083 | */ |
29bdd921 | 2084 | jme_reset_link(jme); |
8c198884 GFT |
2085 | } |
2086 | ||
f7f428e4 GFT |
2087 | static inline void jme_pause_rx(struct jme_adapter *jme) |
2088 | { | |
2089 | atomic_dec(&jme->link_changing); | |
2090 | ||
2091 | jme_set_rx_pcc(jme, PCC_OFF); | |
2092 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2093 | JME_NAPI_DISABLE(jme); | |
2094 | } else { | |
2095 | tasklet_disable(&jme->rxclean_task); | |
2096 | tasklet_disable(&jme->rxempty_task); | |
2097 | } | |
2098 | } | |
2099 | ||
2100 | static inline void jme_resume_rx(struct jme_adapter *jme) | |
2101 | { | |
2102 | struct dynpcc_info *dpi = &(jme->dpi); | |
2103 | ||
2104 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2105 | JME_NAPI_ENABLE(jme); | |
2106 | } else { | |
2107 | tasklet_hi_enable(&jme->rxclean_task); | |
2108 | tasklet_hi_enable(&jme->rxempty_task); | |
2109 | } | |
2110 | dpi->cur = PCC_P1; | |
2111 | dpi->attempt = PCC_P1; | |
2112 | dpi->cnt = 0; | |
2113 | jme_set_rx_pcc(jme, PCC_P1); | |
2114 | ||
2115 | atomic_inc(&jme->link_changing); | |
2116 | } | |
2117 | ||
42b1055e GFT |
2118 | static void |
2119 | jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
2120 | { | |
2121 | struct jme_adapter *jme = netdev_priv(netdev); | |
2122 | ||
f7f428e4 | 2123 | jme_pause_rx(jme); |
42b1055e | 2124 | jme->vlgrp = grp; |
f7f428e4 | 2125 | jme_resume_rx(jme); |
42b1055e GFT |
2126 | } |
2127 | ||
3bf61c55 GFT |
2128 | static void |
2129 | jme_get_drvinfo(struct net_device *netdev, | |
2130 | struct ethtool_drvinfo *info) | |
d7699f87 | 2131 | { |
cd0ff491 | 2132 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2133 | |
cd0ff491 GFT |
2134 | strcpy(info->driver, DRV_NAME); |
2135 | strcpy(info->version, DRV_VERSION); | |
2136 | strcpy(info->bus_info, pci_name(jme->pdev)); | |
d7699f87 GFT |
2137 | } |
2138 | ||
8c198884 GFT |
2139 | static int |
2140 | jme_get_regs_len(struct net_device *netdev) | |
2141 | { | |
cd0ff491 | 2142 | return JME_REG_LEN; |
8c198884 GFT |
2143 | } |
2144 | ||
2145 | static void | |
cd0ff491 | 2146 | mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len) |
8c198884 GFT |
2147 | { |
2148 | int i; | |
2149 | ||
cd0ff491 | 2150 | for (i = 0 ; i < len ; i += 4) |
79ce639c | 2151 | p[i >> 2] = jread32(jme, reg + i); |
186fc259 | 2152 | } |
8c198884 | 2153 | |
186fc259 | 2154 | static void |
cd0ff491 | 2155 | mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) |
186fc259 GFT |
2156 | { |
2157 | int i; | |
cd0ff491 | 2158 | u16 *p16 = (u16 *)p; |
186fc259 | 2159 | |
cd0ff491 | 2160 | for (i = 0 ; i < reg_nr ; ++i) |
186fc259 | 2161 | p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i); |
8c198884 GFT |
2162 | } |
2163 | ||
2164 | static void | |
2165 | jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) | |
2166 | { | |
cd0ff491 GFT |
2167 | struct jme_adapter *jme = netdev_priv(netdev); |
2168 | u32 *p32 = (u32 *)p; | |
8c198884 | 2169 | |
186fc259 | 2170 | memset(p, 0xFF, JME_REG_LEN); |
8c198884 GFT |
2171 | |
2172 | regs->version = 1; | |
2173 | mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN); | |
2174 | ||
2175 | p32 += 0x100 >> 2; | |
2176 | mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN); | |
2177 | ||
2178 | p32 += 0x100 >> 2; | |
2179 | mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN); | |
2180 | ||
2181 | p32 += 0x100 >> 2; | |
2182 | mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN); | |
2183 | ||
186fc259 GFT |
2184 | p32 += 0x100 >> 2; |
2185 | mdio_memcpy(jme, p32, JME_PHY_REG_NR); | |
8c198884 GFT |
2186 | } |
2187 | ||
2188 | static int | |
2189 | jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2190 | { | |
2191 | struct jme_adapter *jme = netdev_priv(netdev); | |
2192 | ||
8c198884 GFT |
2193 | ecmd->tx_coalesce_usecs = PCC_TX_TO; |
2194 | ecmd->tx_max_coalesced_frames = PCC_TX_CNT; | |
2195 | ||
cd0ff491 | 2196 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
cdcdc9eb GFT |
2197 | ecmd->use_adaptive_rx_coalesce = false; |
2198 | ecmd->rx_coalesce_usecs = 0; | |
2199 | ecmd->rx_max_coalesced_frames = 0; | |
2200 | return 0; | |
2201 | } | |
2202 | ||
2203 | ecmd->use_adaptive_rx_coalesce = true; | |
2204 | ||
cd0ff491 | 2205 | switch (jme->dpi.cur) { |
8c198884 GFT |
2206 | case PCC_P1: |
2207 | ecmd->rx_coalesce_usecs = PCC_P1_TO; | |
2208 | ecmd->rx_max_coalesced_frames = PCC_P1_CNT; | |
2209 | break; | |
2210 | case PCC_P2: | |
2211 | ecmd->rx_coalesce_usecs = PCC_P2_TO; | |
2212 | ecmd->rx_max_coalesced_frames = PCC_P2_CNT; | |
2213 | break; | |
2214 | case PCC_P3: | |
2215 | ecmd->rx_coalesce_usecs = PCC_P3_TO; | |
2216 | ecmd->rx_max_coalesced_frames = PCC_P3_CNT; | |
2217 | break; | |
2218 | default: | |
2219 | break; | |
2220 | } | |
2221 | ||
2222 | return 0; | |
2223 | } | |
2224 | ||
192570e0 GFT |
2225 | static int |
2226 | jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2227 | { | |
2228 | struct jme_adapter *jme = netdev_priv(netdev); | |
2229 | struct dynpcc_info *dpi = &(jme->dpi); | |
2230 | ||
cd0ff491 | 2231 | if (netif_running(netdev)) |
cdcdc9eb GFT |
2232 | return -EBUSY; |
2233 | ||
c97b5740 GFT |
2234 | if (ecmd->use_adaptive_rx_coalesce && |
2235 | test_bit(JME_FLAG_POLL, &jme->flags)) { | |
cd0ff491 | 2236 | clear_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb GFT |
2237 | jme->jme_rx = netif_rx; |
2238 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
192570e0 GFT |
2239 | dpi->cur = PCC_P1; |
2240 | dpi->attempt = PCC_P1; | |
2241 | dpi->cnt = 0; | |
2242 | jme_set_rx_pcc(jme, PCC_P1); | |
2243 | jme_interrupt_mode(jme); | |
c97b5740 GFT |
2244 | } else if (!(ecmd->use_adaptive_rx_coalesce) && |
2245 | !(test_bit(JME_FLAG_POLL, &jme->flags))) { | |
cd0ff491 | 2246 | set_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb GFT |
2247 | jme->jme_rx = netif_receive_skb; |
2248 | jme->jme_vlan_rx = vlan_hwaccel_receive_skb; | |
192570e0 GFT |
2249 | jme_interrupt_mode(jme); |
2250 | } | |
2251 | ||
2252 | return 0; | |
2253 | } | |
2254 | ||
8c198884 GFT |
2255 | static void |
2256 | jme_get_pauseparam(struct net_device *netdev, | |
2257 | struct ethtool_pauseparam *ecmd) | |
2258 | { | |
2259 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2260 | u32 val; |
8c198884 GFT |
2261 | |
2262 | ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0; | |
2263 | ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0; | |
2264 | ||
cd0ff491 GFT |
2265 | spin_lock_bh(&jme->phy_lock); |
2266 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2267 | spin_unlock_bh(&jme->phy_lock); | |
b3821cc5 GFT |
2268 | |
2269 | ecmd->autoneg = | |
2270 | (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0; | |
8c198884 GFT |
2271 | } |
2272 | ||
2273 | static int | |
2274 | jme_set_pauseparam(struct net_device *netdev, | |
2275 | struct ethtool_pauseparam *ecmd) | |
2276 | { | |
2277 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2278 | u32 val; |
8c198884 | 2279 | |
cd0ff491 | 2280 | if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^ |
8c198884 GFT |
2281 | (ecmd->tx_pause != 0)) { |
2282 | ||
cd0ff491 | 2283 | if (ecmd->tx_pause) |
8c198884 GFT |
2284 | jme->reg_txpfc |= TXPFC_PF_EN; |
2285 | else | |
2286 | jme->reg_txpfc &= ~TXPFC_PF_EN; | |
2287 | ||
2288 | jwrite32(jme, JME_TXPFC, jme->reg_txpfc); | |
2289 | } | |
2290 | ||
cd0ff491 GFT |
2291 | spin_lock_bh(&jme->rxmcs_lock); |
2292 | if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^ | |
8c198884 GFT |
2293 | (ecmd->rx_pause != 0)) { |
2294 | ||
cd0ff491 | 2295 | if (ecmd->rx_pause) |
8c198884 GFT |
2296 | jme->reg_rxmcs |= RXMCS_FLOWCTRL; |
2297 | else | |
2298 | jme->reg_rxmcs &= ~RXMCS_FLOWCTRL; | |
2299 | ||
2300 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2301 | } | |
cd0ff491 | 2302 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 | 2303 | |
cd0ff491 GFT |
2304 | spin_lock_bh(&jme->phy_lock); |
2305 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2306 | if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^ | |
8c198884 GFT |
2307 | (ecmd->autoneg != 0)) { |
2308 | ||
cd0ff491 | 2309 | if (ecmd->autoneg) |
8c198884 GFT |
2310 | val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
2311 | else | |
2312 | val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
2313 | ||
b3821cc5 GFT |
2314 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, |
2315 | MII_ADVERTISE, val); | |
8c198884 | 2316 | } |
cd0ff491 | 2317 | spin_unlock_bh(&jme->phy_lock); |
8c198884 GFT |
2318 | |
2319 | return 0; | |
2320 | } | |
2321 | ||
29bdd921 GFT |
2322 | static void |
2323 | jme_get_wol(struct net_device *netdev, | |
2324 | struct ethtool_wolinfo *wol) | |
2325 | { | |
2326 | struct jme_adapter *jme = netdev_priv(netdev); | |
2327 | ||
2328 | wol->supported = WAKE_MAGIC | WAKE_PHY; | |
2329 | ||
2330 | wol->wolopts = 0; | |
2331 | ||
cd0ff491 | 2332 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
29bdd921 GFT |
2333 | wol->wolopts |= WAKE_PHY; |
2334 | ||
cd0ff491 | 2335 | if (jme->reg_pmcs & PMCS_MFEN) |
29bdd921 GFT |
2336 | wol->wolopts |= WAKE_MAGIC; |
2337 | ||
2338 | } | |
2339 | ||
2340 | static int | |
2341 | jme_set_wol(struct net_device *netdev, | |
2342 | struct ethtool_wolinfo *wol) | |
2343 | { | |
2344 | struct jme_adapter *jme = netdev_priv(netdev); | |
2345 | ||
cd0ff491 | 2346 | if (wol->wolopts & (WAKE_MAGICSECURE | |
29bdd921 GFT |
2347 | WAKE_UCAST | |
2348 | WAKE_MCAST | | |
2349 | WAKE_BCAST | | |
2350 | WAKE_ARP)) | |
2351 | return -EOPNOTSUPP; | |
2352 | ||
2353 | jme->reg_pmcs = 0; | |
2354 | ||
cd0ff491 | 2355 | if (wol->wolopts & WAKE_PHY) |
29bdd921 GFT |
2356 | jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN; |
2357 | ||
cd0ff491 | 2358 | if (wol->wolopts & WAKE_MAGIC) |
29bdd921 GFT |
2359 | jme->reg_pmcs |= PMCS_MFEN; |
2360 | ||
cd0ff491 | 2361 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
42b1055e | 2362 | |
29bdd921 GFT |
2363 | return 0; |
2364 | } | |
b3821cc5 | 2365 | |
3bf61c55 GFT |
2366 | static int |
2367 | jme_get_settings(struct net_device *netdev, | |
2368 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2369 | { |
2370 | struct jme_adapter *jme = netdev_priv(netdev); | |
2371 | int rc; | |
8c198884 | 2372 | |
cd0ff491 | 2373 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2374 | rc = mii_ethtool_gset(&(jme->mii_if), ecmd); |
cd0ff491 | 2375 | spin_unlock_bh(&jme->phy_lock); |
d7699f87 GFT |
2376 | return rc; |
2377 | } | |
2378 | ||
3bf61c55 GFT |
2379 | static int |
2380 | jme_set_settings(struct net_device *netdev, | |
2381 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2382 | { |
2383 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2384 | int rc, fdc = 0; |
fcf45b4c | 2385 | |
cd0ff491 | 2386 | if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE) |
8c198884 GFT |
2387 | return -EINVAL; |
2388 | ||
cd0ff491 | 2389 | if (jme->mii_if.force_media && |
79ce639c GFT |
2390 | ecmd->autoneg != AUTONEG_ENABLE && |
2391 | (jme->mii_if.full_duplex != ecmd->duplex)) | |
2392 | fdc = 1; | |
2393 | ||
cd0ff491 | 2394 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2395 | rc = mii_ethtool_sset(&(jme->mii_if), ecmd); |
cd0ff491 | 2396 | spin_unlock_bh(&jme->phy_lock); |
fcf45b4c | 2397 | |
cd0ff491 | 2398 | if (!rc && fdc) |
79ce639c GFT |
2399 | jme_reset_link(jme); |
2400 | ||
cd0ff491 GFT |
2401 | if (!rc) { |
2402 | set_bit(JME_FLAG_SSET, &jme->flags); | |
29bdd921 GFT |
2403 | jme->old_ecmd = *ecmd; |
2404 | } | |
2405 | ||
d7699f87 GFT |
2406 | return rc; |
2407 | } | |
2408 | ||
cd0ff491 | 2409 | static u32 |
3bf61c55 GFT |
2410 | jme_get_link(struct net_device *netdev) |
2411 | { | |
d7699f87 GFT |
2412 | struct jme_adapter *jme = netdev_priv(netdev); |
2413 | return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP; | |
2414 | } | |
2415 | ||
8c198884 | 2416 | static u32 |
cd0ff491 GFT |
2417 | jme_get_msglevel(struct net_device *netdev) |
2418 | { | |
2419 | struct jme_adapter *jme = netdev_priv(netdev); | |
2420 | return jme->msg_enable; | |
2421 | } | |
2422 | ||
2423 | static void | |
2424 | jme_set_msglevel(struct net_device *netdev, u32 value) | |
8c198884 | 2425 | { |
cd0ff491 GFT |
2426 | struct jme_adapter *jme = netdev_priv(netdev); |
2427 | jme->msg_enable = value; | |
2428 | } | |
8c198884 | 2429 | |
cd0ff491 GFT |
2430 | static u32 |
2431 | jme_get_rx_csum(struct net_device *netdev) | |
2432 | { | |
2433 | struct jme_adapter *jme = netdev_priv(netdev); | |
8c198884 GFT |
2434 | return jme->reg_rxmcs & RXMCS_CHECKSUM; |
2435 | } | |
2436 | ||
2437 | static int | |
2438 | jme_set_rx_csum(struct net_device *netdev, u32 on) | |
2439 | { | |
cd0ff491 | 2440 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2441 | |
cd0ff491 GFT |
2442 | spin_lock_bh(&jme->rxmcs_lock); |
2443 | if (on) | |
8c198884 GFT |
2444 | jme->reg_rxmcs |= RXMCS_CHECKSUM; |
2445 | else | |
2446 | jme->reg_rxmcs &= ~RXMCS_CHECKSUM; | |
2447 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
cd0ff491 | 2448 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2449 | |
2450 | return 0; | |
2451 | } | |
2452 | ||
2453 | static int | |
2454 | jme_set_tx_csum(struct net_device *netdev, u32 on) | |
2455 | { | |
cd0ff491 | 2456 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2457 | |
cd0ff491 GFT |
2458 | if (on) { |
2459 | set_bit(JME_FLAG_TXCSUM, &jme->flags); | |
2460 | if (netdev->mtu <= 1900) | |
b3821cc5 | 2461 | netdev->features |= NETIF_F_HW_CSUM; |
cd0ff491 GFT |
2462 | } else { |
2463 | clear_bit(JME_FLAG_TXCSUM, &jme->flags); | |
8c198884 | 2464 | netdev->features &= ~NETIF_F_HW_CSUM; |
b3821cc5 | 2465 | } |
8c198884 GFT |
2466 | |
2467 | return 0; | |
2468 | } | |
2469 | ||
b3821cc5 GFT |
2470 | static int |
2471 | jme_set_tso(struct net_device *netdev, u32 on) | |
2472 | { | |
cd0ff491 | 2473 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2474 | |
cd0ff491 GFT |
2475 | if (on) { |
2476 | set_bit(JME_FLAG_TSO, &jme->flags); | |
2477 | if (netdev->mtu <= 1900) | |
b3821cc5 | 2478 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
cd0ff491 GFT |
2479 | } else { |
2480 | clear_bit(JME_FLAG_TSO, &jme->flags); | |
2481 | netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); | |
b3821cc5 GFT |
2482 | } |
2483 | ||
cd0ff491 | 2484 | return 0; |
b3821cc5 GFT |
2485 | } |
2486 | ||
8c198884 GFT |
2487 | static int |
2488 | jme_nway_reset(struct net_device *netdev) | |
2489 | { | |
cd0ff491 | 2490 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 GFT |
2491 | jme_restart_an(jme); |
2492 | return 0; | |
2493 | } | |
2494 | ||
cd0ff491 | 2495 | static u8 |
186fc259 GFT |
2496 | jme_smb_read(struct jme_adapter *jme, unsigned int addr) |
2497 | { | |
cd0ff491 | 2498 | u32 val; |
186fc259 GFT |
2499 | int to; |
2500 | ||
2501 | val = jread32(jme, JME_SMBCSR); | |
2502 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2503 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2504 | msleep(1); |
2505 | val = jread32(jme, JME_SMBCSR); | |
2506 | } | |
cd0ff491 | 2507 | if (!to) { |
c97b5740 | 2508 | netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n"); |
186fc259 GFT |
2509 | return 0xFF; |
2510 | } | |
2511 | ||
2512 | jwrite32(jme, JME_SMBINTF, | |
2513 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2514 | SMBINTF_HWRWN_READ | | |
2515 | SMBINTF_HWCMD); | |
2516 | ||
2517 | val = jread32(jme, JME_SMBINTF); | |
2518 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2519 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2520 | msleep(1); |
2521 | val = jread32(jme, JME_SMBINTF); | |
2522 | } | |
cd0ff491 | 2523 | if (!to) { |
c97b5740 | 2524 | netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n"); |
186fc259 GFT |
2525 | return 0xFF; |
2526 | } | |
2527 | ||
2528 | return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT; | |
2529 | } | |
2530 | ||
2531 | static void | |
cd0ff491 | 2532 | jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data) |
186fc259 | 2533 | { |
cd0ff491 | 2534 | u32 val; |
186fc259 GFT |
2535 | int to; |
2536 | ||
2537 | val = jread32(jme, JME_SMBCSR); | |
2538 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2539 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2540 | msleep(1); |
2541 | val = jread32(jme, JME_SMBCSR); | |
2542 | } | |
cd0ff491 | 2543 | if (!to) { |
c97b5740 | 2544 | netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n"); |
186fc259 GFT |
2545 | return; |
2546 | } | |
2547 | ||
2548 | jwrite32(jme, JME_SMBINTF, | |
2549 | ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) | | |
2550 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2551 | SMBINTF_HWRWN_WRITE | | |
2552 | SMBINTF_HWCMD); | |
2553 | ||
2554 | val = jread32(jme, JME_SMBINTF); | |
2555 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2556 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2557 | msleep(1); |
2558 | val = jread32(jme, JME_SMBINTF); | |
2559 | } | |
cd0ff491 | 2560 | if (!to) { |
c97b5740 | 2561 | netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n"); |
186fc259 GFT |
2562 | return; |
2563 | } | |
2564 | ||
2565 | mdelay(2); | |
2566 | } | |
2567 | ||
2568 | static int | |
2569 | jme_get_eeprom_len(struct net_device *netdev) | |
2570 | { | |
cd0ff491 GFT |
2571 | struct jme_adapter *jme = netdev_priv(netdev); |
2572 | u32 val; | |
186fc259 | 2573 | val = jread32(jme, JME_SMBCSR); |
cd0ff491 | 2574 | return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0; |
186fc259 GFT |
2575 | } |
2576 | ||
2577 | static int | |
2578 | jme_get_eeprom(struct net_device *netdev, | |
2579 | struct ethtool_eeprom *eeprom, u8 *data) | |
2580 | { | |
cd0ff491 | 2581 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2582 | int i, offset = eeprom->offset, len = eeprom->len; |
2583 | ||
2584 | /* | |
8d27293f | 2585 | * ethtool will check the boundary for us |
186fc259 GFT |
2586 | */ |
2587 | eeprom->magic = JME_EEPROM_MAGIC; | |
cd0ff491 | 2588 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2589 | data[i] = jme_smb_read(jme, i + offset); |
2590 | ||
2591 | return 0; | |
2592 | } | |
2593 | ||
2594 | static int | |
2595 | jme_set_eeprom(struct net_device *netdev, | |
2596 | struct ethtool_eeprom *eeprom, u8 *data) | |
2597 | { | |
cd0ff491 | 2598 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2599 | int i, offset = eeprom->offset, len = eeprom->len; |
2600 | ||
2601 | if (eeprom->magic != JME_EEPROM_MAGIC) | |
2602 | return -EINVAL; | |
2603 | ||
2604 | /* | |
8d27293f | 2605 | * ethtool will check the boundary for us |
186fc259 | 2606 | */ |
cd0ff491 | 2607 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2608 | jme_smb_write(jme, i + offset, data[i]); |
2609 | ||
2610 | return 0; | |
2611 | } | |
2612 | ||
d7699f87 | 2613 | static const struct ethtool_ops jme_ethtool_ops = { |
cd0ff491 | 2614 | .get_drvinfo = jme_get_drvinfo, |
8c198884 GFT |
2615 | .get_regs_len = jme_get_regs_len, |
2616 | .get_regs = jme_get_regs, | |
2617 | .get_coalesce = jme_get_coalesce, | |
192570e0 | 2618 | .set_coalesce = jme_set_coalesce, |
cd0ff491 GFT |
2619 | .get_pauseparam = jme_get_pauseparam, |
2620 | .set_pauseparam = jme_set_pauseparam, | |
29bdd921 GFT |
2621 | .get_wol = jme_get_wol, |
2622 | .set_wol = jme_set_wol, | |
d7699f87 GFT |
2623 | .get_settings = jme_get_settings, |
2624 | .set_settings = jme_set_settings, | |
2625 | .get_link = jme_get_link, | |
cd0ff491 GFT |
2626 | .get_msglevel = jme_get_msglevel, |
2627 | .set_msglevel = jme_set_msglevel, | |
8c198884 GFT |
2628 | .get_rx_csum = jme_get_rx_csum, |
2629 | .set_rx_csum = jme_set_rx_csum, | |
2630 | .set_tx_csum = jme_set_tx_csum, | |
b3821cc5 GFT |
2631 | .set_tso = jme_set_tso, |
2632 | .set_sg = ethtool_op_set_sg, | |
8c198884 | 2633 | .nway_reset = jme_nway_reset, |
186fc259 GFT |
2634 | .get_eeprom_len = jme_get_eeprom_len, |
2635 | .get_eeprom = jme_get_eeprom, | |
2636 | .set_eeprom = jme_set_eeprom, | |
d7699f87 GFT |
2637 | }; |
2638 | ||
3bf61c55 GFT |
2639 | static int |
2640 | jme_pci_dma64(struct pci_dev *pdev) | |
d7699f87 | 2641 | { |
94c5ea02 | 2642 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
fa97b924 GFT |
2643 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) |
2644 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) | |
3bf61c55 GFT |
2645 | return 1; |
2646 | ||
94c5ea02 | 2647 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
fa97b924 GFT |
2648 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))) |
2649 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40))) | |
8c198884 GFT |
2650 | return 1; |
2651 | ||
fa97b924 GFT |
2652 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) |
2653 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) | |
3bf61c55 GFT |
2654 | return 0; |
2655 | ||
2656 | return -1; | |
2657 | } | |
2658 | ||
cd0ff491 | 2659 | static inline void |
cdcdc9eb GFT |
2660 | jme_phy_init(struct jme_adapter *jme) |
2661 | { | |
cd0ff491 | 2662 | u16 reg26; |
cdcdc9eb GFT |
2663 | |
2664 | reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26); | |
2665 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000); | |
2666 | } | |
2667 | ||
cd0ff491 | 2668 | static inline void |
cdcdc9eb | 2669 | jme_check_hw_ver(struct jme_adapter *jme) |
42b1055e | 2670 | { |
cd0ff491 | 2671 | u32 chipmode; |
cdcdc9eb GFT |
2672 | |
2673 | chipmode = jread32(jme, JME_CHIPMODE); | |
2674 | ||
2675 | jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT; | |
e882564f | 2676 | jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT; |
42b1055e GFT |
2677 | } |
2678 | ||
94c5ea02 GFT |
2679 | static const struct net_device_ops jme_netdev_ops = { |
2680 | .ndo_open = jme_open, | |
2681 | .ndo_stop = jme_close, | |
2682 | .ndo_validate_addr = eth_validate_addr, | |
2683 | .ndo_start_xmit = jme_start_xmit, | |
2684 | .ndo_set_mac_address = jme_set_macaddr, | |
2685 | .ndo_set_multicast_list = jme_set_multi, | |
2686 | .ndo_change_mtu = jme_change_mtu, | |
2687 | .ndo_tx_timeout = jme_tx_timeout, | |
2688 | .ndo_vlan_rx_register = jme_vlan_rx_register, | |
2689 | }; | |
2690 | ||
3bf61c55 GFT |
2691 | static int __devinit |
2692 | jme_init_one(struct pci_dev *pdev, | |
2693 | const struct pci_device_id *ent) | |
2694 | { | |
cdcdc9eb | 2695 | int rc = 0, using_dac, i; |
d7699f87 GFT |
2696 | struct net_device *netdev; |
2697 | struct jme_adapter *jme; | |
cd0ff491 GFT |
2698 | u16 bmcr, bmsr; |
2699 | u32 apmc; | |
d7699f87 GFT |
2700 | |
2701 | /* | |
2702 | * set up PCI device basics | |
2703 | */ | |
4330c2f2 | 2704 | rc = pci_enable_device(pdev); |
cd0ff491 GFT |
2705 | if (rc) { |
2706 | jeprintk(pdev, "Cannot enable PCI device.\n"); | |
4330c2f2 GFT |
2707 | goto err_out; |
2708 | } | |
d7699f87 | 2709 | |
3bf61c55 | 2710 | using_dac = jme_pci_dma64(pdev); |
cd0ff491 GFT |
2711 | if (using_dac < 0) { |
2712 | jeprintk(pdev, "Cannot set PCI DMA Mask.\n"); | |
3bf61c55 GFT |
2713 | rc = -EIO; |
2714 | goto err_out_disable_pdev; | |
2715 | } | |
2716 | ||
cd0ff491 GFT |
2717 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
2718 | jeprintk(pdev, "No PCI resource region found.\n"); | |
4330c2f2 GFT |
2719 | rc = -ENOMEM; |
2720 | goto err_out_disable_pdev; | |
2721 | } | |
d7699f87 | 2722 | |
4330c2f2 | 2723 | rc = pci_request_regions(pdev, DRV_NAME); |
cd0ff491 GFT |
2724 | if (rc) { |
2725 | jeprintk(pdev, "Cannot obtain PCI resource region.\n"); | |
4330c2f2 GFT |
2726 | goto err_out_disable_pdev; |
2727 | } | |
d7699f87 GFT |
2728 | |
2729 | pci_set_master(pdev); | |
2730 | ||
2731 | /* | |
2732 | * alloc and init net device | |
2733 | */ | |
3bf61c55 | 2734 | netdev = alloc_etherdev(sizeof(*jme)); |
cd0ff491 GFT |
2735 | if (!netdev) { |
2736 | jeprintk(pdev, "Cannot allocate netdev structure.\n"); | |
4330c2f2 GFT |
2737 | rc = -ENOMEM; |
2738 | goto err_out_release_regions; | |
d7699f87 | 2739 | } |
94c5ea02 | 2740 | netdev->netdev_ops = &jme_netdev_ops; |
d7699f87 | 2741 | netdev->ethtool_ops = &jme_ethtool_ops; |
8c198884 | 2742 | netdev->watchdog_timeo = TX_TIMEOUT; |
42b1055e | 2743 | netdev->features = NETIF_F_HW_CSUM | |
b3821cc5 GFT |
2744 | NETIF_F_SG | |
2745 | NETIF_F_TSO | | |
2746 | NETIF_F_TSO6 | | |
42b1055e GFT |
2747 | NETIF_F_HW_VLAN_TX | |
2748 | NETIF_F_HW_VLAN_RX; | |
cd0ff491 | 2749 | if (using_dac) |
8c198884 | 2750 | netdev->features |= NETIF_F_HIGHDMA; |
d7699f87 GFT |
2751 | |
2752 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
2753 | pci_set_drvdata(pdev, netdev); | |
2754 | ||
2755 | /* | |
2756 | * init adapter info | |
2757 | */ | |
2758 | jme = netdev_priv(netdev); | |
2759 | jme->pdev = pdev; | |
2760 | jme->dev = netdev; | |
cdcdc9eb GFT |
2761 | jme->jme_rx = netif_rx; |
2762 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
29bdd921 | 2763 | jme->old_mtu = netdev->mtu = 1500; |
fcf45b4c | 2764 | jme->phylink = 0; |
b3821cc5 GFT |
2765 | jme->tx_ring_size = 1 << 10; |
2766 | jme->tx_ring_mask = jme->tx_ring_size - 1; | |
2767 | jme->tx_wake_threshold = 1 << 9; | |
2768 | jme->rx_ring_size = 1 << 9; | |
2769 | jme->rx_ring_mask = jme->rx_ring_size - 1; | |
cd0ff491 | 2770 | jme->msg_enable = JME_DEF_MSG_ENABLE; |
d7699f87 GFT |
2771 | jme->regs = ioremap(pci_resource_start(pdev, 0), |
2772 | pci_resource_len(pdev, 0)); | |
4330c2f2 | 2773 | if (!(jme->regs)) { |
cd0ff491 | 2774 | jeprintk(pdev, "Mapping PCI resource region error.\n"); |
d7699f87 GFT |
2775 | rc = -ENOMEM; |
2776 | goto err_out_free_netdev; | |
2777 | } | |
4330c2f2 | 2778 | |
cd0ff491 GFT |
2779 | if (no_pseudohp) { |
2780 | apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN; | |
2781 | jwrite32(jme, JME_APMC, apmc); | |
2782 | } else if (force_pseudohp) { | |
2783 | apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN; | |
2784 | jwrite32(jme, JME_APMC, apmc); | |
2785 | } | |
2786 | ||
cdcdc9eb | 2787 | NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2) |
192570e0 | 2788 | |
d7699f87 | 2789 | spin_lock_init(&jme->phy_lock); |
fcf45b4c | 2790 | spin_lock_init(&jme->macaddr_lock); |
8c198884 | 2791 | spin_lock_init(&jme->rxmcs_lock); |
fcf45b4c | 2792 | |
fcf45b4c GFT |
2793 | atomic_set(&jme->link_changing, 1); |
2794 | atomic_set(&jme->rx_cleaning, 1); | |
2795 | atomic_set(&jme->tx_cleaning, 1); | |
192570e0 | 2796 | atomic_set(&jme->rx_empty, 1); |
fcf45b4c | 2797 | |
79ce639c | 2798 | tasklet_init(&jme->pcc_task, |
c97b5740 | 2799 | jme_pcc_tasklet, |
79ce639c | 2800 | (unsigned long) jme); |
4330c2f2 | 2801 | tasklet_init(&jme->linkch_task, |
c97b5740 | 2802 | jme_link_change_tasklet, |
4330c2f2 GFT |
2803 | (unsigned long) jme); |
2804 | tasklet_init(&jme->txclean_task, | |
c97b5740 | 2805 | jme_tx_clean_tasklet, |
4330c2f2 GFT |
2806 | (unsigned long) jme); |
2807 | tasklet_init(&jme->rxclean_task, | |
c97b5740 | 2808 | jme_rx_clean_tasklet, |
4330c2f2 | 2809 | (unsigned long) jme); |
fcf45b4c | 2810 | tasklet_init(&jme->rxempty_task, |
c97b5740 | 2811 | jme_rx_empty_tasklet, |
fcf45b4c | 2812 | (unsigned long) jme); |
fa97b924 | 2813 | tasklet_disable_nosync(&jme->linkch_task); |
cd0ff491 GFT |
2814 | tasklet_disable_nosync(&jme->txclean_task); |
2815 | tasklet_disable_nosync(&jme->rxclean_task); | |
2816 | tasklet_disable_nosync(&jme->rxempty_task); | |
8c198884 GFT |
2817 | jme->dpi.cur = PCC_P1; |
2818 | ||
cd0ff491 | 2819 | jme->reg_ghc = 0; |
79ce639c | 2820 | jme->reg_rxcs = RXCS_DEFAULT; |
8c198884 GFT |
2821 | jme->reg_rxmcs = RXMCS_DEFAULT; |
2822 | jme->reg_txpfc = 0; | |
47220951 | 2823 | jme->reg_pmcs = PMCS_MFEN; |
cd0ff491 GFT |
2824 | set_bit(JME_FLAG_TXCSUM, &jme->flags); |
2825 | set_bit(JME_FLAG_TSO, &jme->flags); | |
192570e0 | 2826 | |
fcf45b4c GFT |
2827 | /* |
2828 | * Get Max Read Req Size from PCI Config Space | |
2829 | */ | |
cd0ff491 GFT |
2830 | pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs); |
2831 | jme->mrrs &= PCI_DCSR_MRRS_MASK; | |
2832 | switch (jme->mrrs) { | |
2833 | case MRRS_128B: | |
2834 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; | |
2835 | break; | |
2836 | case MRRS_256B: | |
2837 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; | |
2838 | break; | |
2839 | default: | |
2840 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; | |
2841 | break; | |
fcf45b4c GFT |
2842 | }; |
2843 | ||
d7699f87 | 2844 | /* |
cdcdc9eb | 2845 | * Must check before reset_mac_processor |
d7699f87 | 2846 | */ |
cdcdc9eb GFT |
2847 | jme_check_hw_ver(jme); |
2848 | jme->mii_if.dev = netdev; | |
cd0ff491 | 2849 | if (jme->fpgaver) { |
cdcdc9eb | 2850 | jme->mii_if.phy_id = 0; |
cd0ff491 | 2851 | for (i = 1 ; i < 32 ; ++i) { |
cdcdc9eb GFT |
2852 | bmcr = jme_mdio_read(netdev, i, MII_BMCR); |
2853 | bmsr = jme_mdio_read(netdev, i, MII_BMSR); | |
cd0ff491 | 2854 | if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { |
cdcdc9eb GFT |
2855 | jme->mii_if.phy_id = i; |
2856 | break; | |
2857 | } | |
2858 | } | |
2859 | ||
cd0ff491 | 2860 | if (!jme->mii_if.phy_id) { |
cdcdc9eb | 2861 | rc = -EIO; |
cd0ff491 | 2862 | jeprintk(pdev, "Can not find phy_id.\n"); |
fa97b924 | 2863 | goto err_out_unmap; |
cdcdc9eb GFT |
2864 | } |
2865 | ||
2866 | jme->reg_ghc |= GHC_LINK_POLL; | |
cd0ff491 | 2867 | } else { |
cdcdc9eb GFT |
2868 | jme->mii_if.phy_id = 1; |
2869 | } | |
cd0ff491 | 2870 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
2871 | jme->mii_if.supports_gmii = true; |
2872 | else | |
2873 | jme->mii_if.supports_gmii = false; | |
cdcdc9eb GFT |
2874 | jme->mii_if.mdio_read = jme_mdio_read; |
2875 | jme->mii_if.mdio_write = jme_mdio_write; | |
2876 | ||
d7699f87 | 2877 | jme_clear_pm(jme); |
e882564f | 2878 | jme_set_phyfifoa(jme); |
cd0ff491 GFT |
2879 | pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev); |
2880 | if (!jme->fpgaver) | |
cdcdc9eb | 2881 | jme_phy_init(jme); |
42b1055e | 2882 | jme_phy_off(jme); |
cdcdc9eb GFT |
2883 | |
2884 | /* | |
2885 | * Reset MAC processor and reload EEPROM for MAC Address | |
2886 | */ | |
d7699f87 | 2887 | jme_reset_mac_processor(jme); |
4330c2f2 | 2888 | rc = jme_reload_eeprom(jme); |
cd0ff491 GFT |
2889 | if (rc) { |
2890 | jeprintk(pdev, | |
b3821cc5 | 2891 | "Reload eeprom for reading MAC Address error.\n"); |
fa97b924 | 2892 | goto err_out_unmap; |
4330c2f2 | 2893 | } |
d7699f87 GFT |
2894 | jme_load_macaddr(netdev); |
2895 | ||
d7699f87 GFT |
2896 | /* |
2897 | * Tell stack that we are not ready to work until open() | |
2898 | */ | |
2899 | netif_carrier_off(netdev); | |
2900 | netif_stop_queue(netdev); | |
2901 | ||
2902 | /* | |
2903 | * Register netdev | |
2904 | */ | |
4330c2f2 | 2905 | rc = register_netdev(netdev); |
cd0ff491 GFT |
2906 | if (rc) { |
2907 | jeprintk(pdev, "Cannot register net device.\n"); | |
fa97b924 | 2908 | goto err_out_unmap; |
4330c2f2 | 2909 | } |
d7699f87 | 2910 | |
c97b5740 GFT |
2911 | netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x macaddr:%pM\n", |
2912 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ? | |
2913 | "JMC250 Gigabit Ethernet" : | |
2914 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ? | |
2915 | "JMC260 Fast Ethernet" : "Unknown", | |
2916 | (jme->fpgaver != 0) ? " (FPGA)" : "", | |
2917 | (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev, | |
2918 | jme->rev, netdev->dev_addr); | |
d7699f87 GFT |
2919 | |
2920 | return 0; | |
2921 | ||
2922 | err_out_unmap: | |
2923 | iounmap(jme->regs); | |
2924 | err_out_free_netdev: | |
2925 | pci_set_drvdata(pdev, NULL); | |
2926 | free_netdev(netdev); | |
4330c2f2 GFT |
2927 | err_out_release_regions: |
2928 | pci_release_regions(pdev); | |
d7699f87 | 2929 | err_out_disable_pdev: |
cd0ff491 | 2930 | pci_disable_device(pdev); |
d7699f87 | 2931 | err_out: |
4330c2f2 | 2932 | return rc; |
d7699f87 GFT |
2933 | } |
2934 | ||
3bf61c55 GFT |
2935 | static void __devexit |
2936 | jme_remove_one(struct pci_dev *pdev) | |
2937 | { | |
d7699f87 GFT |
2938 | struct net_device *netdev = pci_get_drvdata(pdev); |
2939 | struct jme_adapter *jme = netdev_priv(netdev); | |
2940 | ||
2941 | unregister_netdev(netdev); | |
2942 | iounmap(jme->regs); | |
2943 | pci_set_drvdata(pdev, NULL); | |
2944 | free_netdev(netdev); | |
2945 | pci_release_regions(pdev); | |
2946 | pci_disable_device(pdev); | |
2947 | ||
2948 | } | |
2949 | ||
9b9d55de | 2950 | #ifdef CONFIG_PM |
29bdd921 GFT |
2951 | static int |
2952 | jme_suspend(struct pci_dev *pdev, pm_message_t state) | |
2953 | { | |
2954 | struct net_device *netdev = pci_get_drvdata(pdev); | |
2955 | struct jme_adapter *jme = netdev_priv(netdev); | |
29bdd921 GFT |
2956 | |
2957 | atomic_dec(&jme->link_changing); | |
2958 | ||
2959 | netif_device_detach(netdev); | |
2960 | netif_stop_queue(netdev); | |
2961 | jme_stop_irq(jme); | |
29bdd921 | 2962 | |
cd0ff491 GFT |
2963 | tasklet_disable(&jme->txclean_task); |
2964 | tasklet_disable(&jme->rxclean_task); | |
2965 | tasklet_disable(&jme->rxempty_task); | |
2966 | ||
cd0ff491 GFT |
2967 | if (netif_carrier_ok(netdev)) { |
2968 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
47220951 GFT |
2969 | jme_polling_mode(jme); |
2970 | ||
29bdd921 | 2971 | jme_stop_pcc_timer(jme); |
cd0ff491 GFT |
2972 | jme_reset_ghc_speed(jme); |
2973 | jme_disable_rx_engine(jme); | |
2974 | jme_disable_tx_engine(jme); | |
29bdd921 GFT |
2975 | jme_reset_mac_processor(jme); |
2976 | jme_free_rx_resources(jme); | |
2977 | jme_free_tx_resources(jme); | |
2978 | netif_carrier_off(netdev); | |
2979 | jme->phylink = 0; | |
2980 | } | |
2981 | ||
cd0ff491 GFT |
2982 | tasklet_enable(&jme->txclean_task); |
2983 | tasklet_hi_enable(&jme->rxclean_task); | |
2984 | tasklet_hi_enable(&jme->rxempty_task); | |
29bdd921 GFT |
2985 | |
2986 | pci_save_state(pdev); | |
cd0ff491 | 2987 | if (jme->reg_pmcs) { |
42b1055e | 2988 | jme_set_100m_half(jme); |
47220951 | 2989 | |
cd0ff491 | 2990 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
47220951 GFT |
2991 | jme_wait_link(jme); |
2992 | ||
29bdd921 | 2993 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
cd0ff491 | 2994 | |
42b1055e | 2995 | pci_enable_wake(pdev, PCI_D3cold, true); |
cd0ff491 | 2996 | } else { |
42b1055e | 2997 | jme_phy_off(jme); |
29bdd921 | 2998 | } |
cd0ff491 | 2999 | pci_set_power_state(pdev, PCI_D3cold); |
29bdd921 GFT |
3000 | |
3001 | return 0; | |
3002 | } | |
3003 | ||
3004 | static int | |
3005 | jme_resume(struct pci_dev *pdev) | |
3006 | { | |
3007 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3008 | struct jme_adapter *jme = netdev_priv(netdev); | |
3009 | ||
3010 | jme_clear_pm(jme); | |
3011 | pci_restore_state(pdev); | |
3012 | ||
cd0ff491 | 3013 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
29bdd921 GFT |
3014 | jme_set_settings(netdev, &jme->old_ecmd); |
3015 | else | |
3016 | jme_reset_phy_processor(jme); | |
3017 | ||
29bdd921 GFT |
3018 | jme_start_irq(jme); |
3019 | netif_device_attach(netdev); | |
3020 | ||
3021 | atomic_inc(&jme->link_changing); | |
3022 | ||
3023 | jme_reset_link(jme); | |
3024 | ||
3025 | return 0; | |
3026 | } | |
9b9d55de | 3027 | #endif |
29bdd921 | 3028 | |
c97b5740 | 3029 | static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = { |
cd0ff491 GFT |
3030 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) }, |
3031 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) }, | |
d7699f87 GFT |
3032 | { } |
3033 | }; | |
3034 | ||
3035 | static struct pci_driver jme_driver = { | |
cd0ff491 GFT |
3036 | .name = DRV_NAME, |
3037 | .id_table = jme_pci_tbl, | |
3038 | .probe = jme_init_one, | |
3039 | .remove = __devexit_p(jme_remove_one), | |
d7699f87 | 3040 | #ifdef CONFIG_PM |
cd0ff491 GFT |
3041 | .suspend = jme_suspend, |
3042 | .resume = jme_resume, | |
d7699f87 | 3043 | #endif /* CONFIG_PM */ |
d7699f87 GFT |
3044 | }; |
3045 | ||
3bf61c55 GFT |
3046 | static int __init |
3047 | jme_init_module(void) | |
d7699f87 | 3048 | { |
94c5ea02 | 3049 | printk(KERN_INFO PFX "JMicron JMC2XX ethernet " |
4330c2f2 | 3050 | "driver version %s\n", DRV_VERSION); |
d7699f87 GFT |
3051 | return pci_register_driver(&jme_driver); |
3052 | } | |
3053 | ||
3bf61c55 GFT |
3054 | static void __exit |
3055 | jme_cleanup_module(void) | |
d7699f87 GFT |
3056 | { |
3057 | pci_unregister_driver(&jme_driver); | |
3058 | } | |
3059 | ||
3060 | module_init(jme_init_module); | |
3061 | module_exit(jme_cleanup_module); | |
3062 | ||
3bf61c55 | 3063 | MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>"); |
d7699f87 GFT |
3064 | MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver"); |
3065 | MODULE_LICENSE("GPL"); | |
3066 | MODULE_VERSION(DRV_VERSION); | |
3067 | MODULE_DEVICE_TABLE(pci, jme_pci_tbl); | |
3068 |