Import jme 1.0.6-backport source
[jme.git] / jme.c
CommitLineData
d7699f87
GFT
1/*
2 * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
3 *
4 * Copyright 2008 JMicron Technology Corporation
5 * http://www.jmicron.com/
6 *
3bf61c55
GFT
7 * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
8 *
d7699f87
GFT
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 */
23
d7699f87
GFT
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/pci.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/ethtool.h>
30#include <linux/mii.h>
31#include <linux/crc32.h>
4330c2f2 32#include <linux/delay.h>
29bdd921 33#include <linux/spinlock.h>
8c198884
GFT
34#include <linux/in.h>
35#include <linux/ip.h>
79ce639c
GFT
36#include <linux/ipv6.h>
37#include <linux/tcp.h>
38#include <linux/udp.h>
42b1055e 39#include <linux/if_vlan.h>
3b70a6fa 40#include <net/ip6_checksum.h>
d7699f87
GFT
41#include "jme.h"
42
cd0ff491
GFT
43static int force_pseudohp = -1;
44static int no_pseudohp = -1;
45static int no_extplug = -1;
46module_param(force_pseudohp, int, 0);
47MODULE_PARM_DESC(force_pseudohp,
48 "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
49module_param(no_pseudohp, int, 0);
50MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
51module_param(no_extplug, int, 0);
52MODULE_PARM_DESC(no_extplug,
53 "Do not use external plug signal for pseudo hot-plug.");
4330c2f2 54
3bf61c55
GFT
55static int
56jme_mdio_read(struct net_device *netdev, int phy, int reg)
d7699f87
GFT
57{
58 struct jme_adapter *jme = netdev_priv(netdev);
cd0ff491 59 int i, val, again = (reg == MII_BMSR) ? 1 : 0;
d7699f87 60
186fc259 61read_again:
cd0ff491 62 jwrite32(jme, JME_SMI, SMI_OP_REQ |
3bf61c55
GFT
63 smi_phy_addr(phy) |
64 smi_reg_addr(reg));
d7699f87
GFT
65
66 wmb();
cd0ff491 67 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
cdcdc9eb 68 udelay(20);
b3821cc5
GFT
69 val = jread32(jme, JME_SMI);
70 if ((val & SMI_OP_REQ) == 0)
3bf61c55 71 break;
cd0ff491 72 }
d7699f87 73
cd0ff491
GFT
74 if (i == 0) {
75 jeprintk(jme->pdev, "phy(%d) read timeout : %d\n", phy, reg);
3bf61c55 76 return 0;
cd0ff491 77 }
d7699f87 78
cd0ff491 79 if (again--)
186fc259
GFT
80 goto read_again;
81
cd0ff491 82 return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
d7699f87
GFT
83}
84
3bf61c55
GFT
85static void
86jme_mdio_write(struct net_device *netdev,
87 int phy, int reg, int val)
d7699f87
GFT
88{
89 struct jme_adapter *jme = netdev_priv(netdev);
90 int i;
91
3bf61c55
GFT
92 jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
93 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
94 smi_phy_addr(phy) | smi_reg_addr(reg));
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GFT
95
96 wmb();
cdcdc9eb
GFT
97 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
98 udelay(20);
8d27293f 99 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
3bf61c55
GFT
100 break;
101 }
d7699f87 102
3bf61c55 103 if (i == 0)
cd0ff491 104 jeprintk(jme->pdev, "phy(%d) write timeout : %d\n", phy, reg);
d7699f87 105
3bf61c55 106 return;
d7699f87
GFT
107}
108
cd0ff491 109static inline void
3bf61c55 110jme_reset_phy_processor(struct jme_adapter *jme)
d7699f87 111{
cd0ff491 112 u32 val;
3bf61c55
GFT
113
114 jme_mdio_write(jme->dev,
115 jme->mii_if.phy_id,
8c198884
GFT
116 MII_ADVERTISE, ADVERTISE_ALL |
117 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
3bf61c55 118
cd0ff491 119 if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
8d27293f
GFT
120 jme_mdio_write(jme->dev,
121 jme->mii_if.phy_id,
122 MII_CTRL1000,
123 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
3bf61c55 124
fcf45b4c
GFT
125 val = jme_mdio_read(jme->dev,
126 jme->mii_if.phy_id,
127 MII_BMCR);
128
129 jme_mdio_write(jme->dev,
130 jme->mii_if.phy_id,
131 MII_BMCR, val | BMCR_RESET);
132
3bf61c55
GFT
133 return;
134}
135
b3821cc5
GFT
136static void
137jme_setup_wakeup_frame(struct jme_adapter *jme,
cd0ff491 138 u32 *mask, u32 crc, int fnr)
b3821cc5
GFT
139{
140 int i;
141
142 /*
143 * Setup CRC pattern
144 */
145 jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
146 wmb();
147 jwrite32(jme, JME_WFODP, crc);
148 wmb();
149
150 /*
151 * Setup Mask
152 */
cd0ff491 153 for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
b3821cc5
GFT
154 jwrite32(jme, JME_WFOI,
155 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
156 (fnr & WFOI_FRAME_SEL));
157 wmb();
158 jwrite32(jme, JME_WFODP, mask[i]);
159 wmb();
160 }
161}
3bf61c55 162
cd0ff491 163static inline void
3bf61c55
GFT
164jme_reset_mac_processor(struct jme_adapter *jme)
165{
cd0ff491
GFT
166 u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
167 u32 crc = 0xCDCDCDCD;
168 u32 gpreg0;
b3821cc5
GFT
169 int i;
170
3bf61c55 171 jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
d7699f87 172 udelay(2);
3bf61c55 173 jwrite32(jme, JME_GHC, jme->reg_ghc);
cd0ff491
GFT
174
175 jwrite32(jme, JME_RXDBA_LO, 0x00000000);
176 jwrite32(jme, JME_RXDBA_HI, 0x00000000);
177 jwrite32(jme, JME_RXQDC, 0x00000000);
178 jwrite32(jme, JME_RXNDA, 0x00000000);
179 jwrite32(jme, JME_TXDBA_LO, 0x00000000);
180 jwrite32(jme, JME_TXDBA_HI, 0x00000000);
181 jwrite32(jme, JME_TXQDC, 0x00000000);
182 jwrite32(jme, JME_TXNDA, 0x00000000);
183
4330c2f2
GFT
184 jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
185 jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
cd0ff491 186 for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
b3821cc5 187 jme_setup_wakeup_frame(jme, mask, crc, i);
cd0ff491 188 if (jme->fpgaver)
cdcdc9eb
GFT
189 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
190 else
191 gpreg0 = GPREG0_DEFAULT;
192 jwrite32(jme, JME_GPREG0, gpreg0);
7ee473a3 193 jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
d7699f87
GFT
194}
195
cd0ff491
GFT
196static inline void
197jme_reset_ghc_speed(struct jme_adapter *jme)
198{
199 jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX);
200 jwrite32(jme, JME_GHC, jme->reg_ghc);
201}
202
203static inline void
3bf61c55 204jme_clear_pm(struct jme_adapter *jme)
d7699f87 205{
29bdd921 206 jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
4330c2f2 207 pci_set_power_state(jme->pdev, PCI_D0);
42b1055e 208 pci_enable_wake(jme->pdev, PCI_D0, false);
d7699f87
GFT
209}
210
3bf61c55
GFT
211static int
212jme_reload_eeprom(struct jme_adapter *jme)
d7699f87 213{
cd0ff491 214 u32 val;
d7699f87
GFT
215 int i;
216
217 val = jread32(jme, JME_SMBCSR);
218
cd0ff491 219 if (val & SMBCSR_EEPROMD) {
d7699f87
GFT
220 val |= SMBCSR_CNACK;
221 jwrite32(jme, JME_SMBCSR, val);
222 val |= SMBCSR_RELOAD;
223 jwrite32(jme, JME_SMBCSR, val);
224 mdelay(12);
225
cd0ff491 226 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
d7699f87
GFT
227 mdelay(1);
228 if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
229 break;
230 }
231
cd0ff491
GFT
232 if (i == 0) {
233 jeprintk(jme->pdev, "eeprom reload timeout\n");
d7699f87
GFT
234 return -EIO;
235 }
236 }
3bf61c55 237
d7699f87
GFT
238 return 0;
239}
240
3bf61c55
GFT
241static void
242jme_load_macaddr(struct net_device *netdev)
d7699f87
GFT
243{
244 struct jme_adapter *jme = netdev_priv(netdev);
245 unsigned char macaddr[6];
cd0ff491 246 u32 val;
d7699f87 247
cd0ff491 248 spin_lock_bh(&jme->macaddr_lock);
4330c2f2 249 val = jread32(jme, JME_RXUMA_LO);
d7699f87
GFT
250 macaddr[0] = (val >> 0) & 0xFF;
251 macaddr[1] = (val >> 8) & 0xFF;
252 macaddr[2] = (val >> 16) & 0xFF;
253 macaddr[3] = (val >> 24) & 0xFF;
4330c2f2 254 val = jread32(jme, JME_RXUMA_HI);
d7699f87
GFT
255 macaddr[4] = (val >> 0) & 0xFF;
256 macaddr[5] = (val >> 8) & 0xFF;
cd0ff491
GFT
257 memcpy(netdev->dev_addr, macaddr, 6);
258 spin_unlock_bh(&jme->macaddr_lock);
3bf61c55
GFT
259}
260
cd0ff491 261static inline void
3bf61c55
GFT
262jme_set_rx_pcc(struct jme_adapter *jme, int p)
263{
cd0ff491 264 switch (p) {
192570e0
GFT
265 case PCC_OFF:
266 jwrite32(jme, JME_PCCRX0,
267 ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
268 ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
269 break;
3bf61c55
GFT
270 case PCC_P1:
271 jwrite32(jme, JME_PCCRX0,
272 ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
273 ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
274 break;
275 case PCC_P2:
276 jwrite32(jme, JME_PCCRX0,
277 ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
278 ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
279 break;
280 case PCC_P3:
281 jwrite32(jme, JME_PCCRX0,
282 ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
283 ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
284 break;
285 default:
286 break;
287 }
192570e0 288 wmb();
3bf61c55 289
cd0ff491 290 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
7ca9ebee 291#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 292 msg_rx_status(jme, "Switched to PCC_P%d\n", p);
7ca9ebee
GFT
293#else
294 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
295#endif
d7699f87
GFT
296}
297
fcf45b4c 298static void
3bf61c55 299jme_start_irq(struct jme_adapter *jme)
d7699f87 300{
3bf61c55
GFT
301 register struct dynpcc_info *dpi = &(jme->dpi);
302
303 jme_set_rx_pcc(jme, PCC_P1);
3bf61c55
GFT
304 dpi->cur = PCC_P1;
305 dpi->attempt = PCC_P1;
306 dpi->cnt = 0;
307
308 jwrite32(jme, JME_PCCTX,
8c198884
GFT
309 ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
310 ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
3bf61c55
GFT
311 PCCTXQ0_EN
312 );
313
d7699f87
GFT
314 /*
315 * Enable Interrupts
316 */
317 jwrite32(jme, JME_IENS, INTR_ENABLE);
318}
319
cd0ff491 320static inline void
3bf61c55 321jme_stop_irq(struct jme_adapter *jme)
d7699f87
GFT
322{
323 /*
324 * Disable Interrupts
325 */
cd0ff491 326 jwrite32f(jme, JME_IENC, INTR_ENABLE);
d7699f87
GFT
327}
328
cd0ff491 329static u32
cdcdc9eb
GFT
330jme_linkstat_from_phy(struct jme_adapter *jme)
331{
cd0ff491 332 u32 phylink, bmsr;
cdcdc9eb
GFT
333
334 phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
335 bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
cd0ff491 336 if (bmsr & BMSR_ANCOMP)
cdcdc9eb
GFT
337 phylink |= PHY_LINK_AUTONEG_COMPLETE;
338
339 return phylink;
340}
341
cd0ff491 342static inline void
58c92f28 343jme_set_phyfifoa(struct jme_adapter *jme)
cd0ff491
GFT
344{
345 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
346}
347
348static inline void
58c92f28 349jme_set_phyfifob(struct jme_adapter *jme)
cd0ff491
GFT
350{
351 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
352}
353
fcf45b4c
GFT
354static int
355jme_check_link(struct net_device *netdev, int testonly)
d7699f87
GFT
356{
357 struct jme_adapter *jme = netdev_priv(netdev);
7ee473a3 358 u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
79ce639c 359 char linkmsg[64];
fcf45b4c 360 int rc = 0;
d7699f87 361
b3821cc5 362 linkmsg[0] = '\0';
cdcdc9eb 363
cd0ff491 364 if (jme->fpgaver)
cdcdc9eb
GFT
365 phylink = jme_linkstat_from_phy(jme);
366 else
367 phylink = jread32(jme, JME_PHY_LINK);
d7699f87 368
cd0ff491
GFT
369 if (phylink & PHY_LINK_UP) {
370 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
8c198884
GFT
371 /*
372 * If we did not enable AN
373 * Speed/Duplex Info should be obtained from SMI
374 */
375 phylink = PHY_LINK_UP;
376
377 bmcr = jme_mdio_read(jme->dev,
378 jme->mii_if.phy_id,
379 MII_BMCR);
380
381 phylink |= ((bmcr & BMCR_SPEED1000) &&
382 (bmcr & BMCR_SPEED100) == 0) ?
383 PHY_LINK_SPEED_1000M :
384 (bmcr & BMCR_SPEED100) ?
385 PHY_LINK_SPEED_100M :
386 PHY_LINK_SPEED_10M;
387
388 phylink |= (bmcr & BMCR_FULLDPLX) ?
389 PHY_LINK_DUPLEX : 0;
79ce639c 390
b3821cc5 391 strcat(linkmsg, "Forced: ");
cd0ff491 392 } else {
8c198884
GFT
393 /*
394 * Keep polling for speed/duplex resolve complete
395 */
cd0ff491 396 while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
8c198884
GFT
397 --cnt) {
398
399 udelay(1);
8c198884 400
cd0ff491 401 if (jme->fpgaver)
cdcdc9eb
GFT
402 phylink = jme_linkstat_from_phy(jme);
403 else
404 phylink = jread32(jme, JME_PHY_LINK);
8c198884 405 }
cd0ff491
GFT
406 if (!cnt)
407 jeprintk(jme->pdev,
8c198884 408 "Waiting speed resolve timeout.\n");
79ce639c 409
b3821cc5 410 strcat(linkmsg, "ANed: ");
d7699f87
GFT
411 }
412
cd0ff491 413 if (jme->phylink == phylink) {
fcf45b4c
GFT
414 rc = 1;
415 goto out;
416 }
cd0ff491 417 if (testonly)
fcf45b4c
GFT
418 goto out;
419
420 jme->phylink = phylink;
421
3b70a6fa
GFT
422 ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX |
423 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE |
424 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY);
cd0ff491
GFT
425 switch (phylink & PHY_LINK_SPEED_MASK) {
426 case PHY_LINK_SPEED_10M:
3b70a6fa
GFT
427 ghc |= GHC_SPEED_10M |
428 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
cd0ff491 429 strcat(linkmsg, "10 Mbps, ");
cd0ff491
GFT
430 break;
431 case PHY_LINK_SPEED_100M:
3b70a6fa
GFT
432 ghc |= GHC_SPEED_100M |
433 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
cd0ff491 434 strcat(linkmsg, "100 Mbps, ");
cd0ff491
GFT
435 break;
436 case PHY_LINK_SPEED_1000M:
3b70a6fa
GFT
437 ghc |= GHC_SPEED_1000M |
438 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
cd0ff491 439 strcat(linkmsg, "1000 Mbps, ");
cd0ff491
GFT
440 break;
441 default:
442 break;
d7699f87 443 }
d7699f87 444
cd0ff491 445 if (phylink & PHY_LINK_DUPLEX) {
d7699f87 446 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
7ee473a3 447 ghc |= GHC_DPX;
cd0ff491 448 } else {
d7699f87 449 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
3bf61c55
GFT
450 TXMCS_BACKOFF |
451 TXMCS_CARRIERSENSE |
452 TXMCS_COLLISION);
8c198884
GFT
453 jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
454 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
455 TXTRHD_TXREN |
456 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
457 }
7ee473a3
GFT
458
459 gpreg1 = GPREG1_DEFAULT;
460 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
461 if (!(phylink & PHY_LINK_DUPLEX))
462 gpreg1 |= GPREG1_HALFMODEPATCH;
463 switch (phylink & PHY_LINK_SPEED_MASK) {
464 case PHY_LINK_SPEED_10M:
465 jme_set_phyfifoa(jme);
466 gpreg1 |= GPREG1_RSSPATCH;
467 break;
468 case PHY_LINK_SPEED_100M:
469 jme_set_phyfifob(jme);
470 gpreg1 |= GPREG1_RSSPATCH;
471 break;
472 case PHY_LINK_SPEED_1000M:
473 jme_set_phyfifoa(jme);
474 break;
475 default:
476 break;
477 }
478 }
d7699f87 479
3b70a6fa 480 jwrite32(jme, JME_GPREG1, gpreg1);
fcf45b4c 481 jwrite32(jme, JME_GHC, ghc);
3b70a6fa 482 jme->reg_ghc = ghc;
fcf45b4c 483
3b70a6fa
GFT
484 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
485 "Full-Duplex, " :
486 "Half-Duplex, ");
487 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
488 "MDI-X" :
489 "MDI");
7ca9ebee 490#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 491 msg_link(jme, "Link is up at %s.\n", linkmsg);
7ca9ebee
GFT
492#else
493 netif_info(jme, link, jme->dev, "Link is up at %s.\n", linkmsg);
494#endif
cd0ff491
GFT
495 netif_carrier_on(netdev);
496 } else {
497 if (testonly)
fcf45b4c
GFT
498 goto out;
499
7ca9ebee 500#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 501 msg_link(jme, "Link is down.\n");
7ca9ebee
GFT
502#else
503 netif_info(jme, link, jme->dev, "Link is down.\n");
504#endif
fcf45b4c 505 jme->phylink = 0;
cd0ff491 506 netif_carrier_off(netdev);
d7699f87 507 }
fcf45b4c
GFT
508
509out:
510 return rc;
d7699f87
GFT
511}
512
3bf61c55
GFT
513static int
514jme_setup_tx_resources(struct jme_adapter *jme)
d7699f87 515{
d7699f87
GFT
516 struct jme_ring *txring = &(jme->txring[0]);
517
518 txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
b3821cc5
GFT
519 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
520 &(txring->dmaalloc),
521 GFP_ATOMIC);
fcf45b4c 522
0ede469c
GFT
523 if (!txring->alloc)
524 goto err_set_null;
d7699f87
GFT
525
526 /*
527 * 16 Bytes align
528 */
cd0ff491 529 txring->desc = (void *)ALIGN((unsigned long)(txring->alloc),
3bf61c55 530 RING_DESC_ALIGN);
4330c2f2 531 txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
d7699f87 532 txring->next_to_use = 0;
cdcdc9eb 533 atomic_set(&txring->next_to_clean, 0);
b3821cc5 534 atomic_set(&txring->nr_free, jme->tx_ring_size);
d7699f87 535
0ede469c
GFT
536 txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
537 jme->tx_ring_size, GFP_ATOMIC);
538 if (unlikely(!(txring->bufinf)))
539 goto err_free_txring;
540
d7699f87 541 /*
b3821cc5 542 * Initialize Transmit Descriptors
d7699f87 543 */
b3821cc5 544 memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
3bf61c55 545 memset(txring->bufinf, 0,
b3821cc5 546 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
d7699f87
GFT
547
548 return 0;
0ede469c
GFT
549
550err_free_txring:
551 dma_free_coherent(&(jme->pdev->dev),
552 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
553 txring->alloc,
554 txring->dmaalloc);
555
556err_set_null:
557 txring->desc = NULL;
558 txring->dmaalloc = 0;
559 txring->dma = 0;
560 txring->bufinf = NULL;
561
562 return -ENOMEM;
d7699f87
GFT
563}
564
3bf61c55
GFT
565static void
566jme_free_tx_resources(struct jme_adapter *jme)
d7699f87
GFT
567{
568 int i;
569 struct jme_ring *txring = &(jme->txring[0]);
0ede469c 570 struct jme_buffer_info *txbi;
d7699f87 571
cd0ff491 572 if (txring->alloc) {
0ede469c
GFT
573 if (txring->bufinf) {
574 for (i = 0 ; i < jme->tx_ring_size ; ++i) {
575 txbi = txring->bufinf + i;
576 if (txbi->skb) {
577 dev_kfree_skb(txbi->skb);
578 txbi->skb = NULL;
579 }
580 txbi->mapping = 0;
581 txbi->len = 0;
582 txbi->nr_desc = 0;
583 txbi->start_xmit = 0;
d7699f87 584 }
0ede469c 585 kfree(txring->bufinf);
d7699f87
GFT
586 }
587
588 dma_free_coherent(&(jme->pdev->dev),
b3821cc5 589 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
d7699f87
GFT
590 txring->alloc,
591 txring->dmaalloc);
3bf61c55
GFT
592
593 txring->alloc = NULL;
594 txring->desc = NULL;
595 txring->dmaalloc = 0;
596 txring->dma = 0;
0ede469c 597 txring->bufinf = NULL;
d7699f87 598 }
3bf61c55 599 txring->next_to_use = 0;
cdcdc9eb 600 atomic_set(&txring->next_to_clean, 0);
79ce639c 601 atomic_set(&txring->nr_free, 0);
d7699f87
GFT
602}
603
cd0ff491 604static inline void
3bf61c55 605jme_enable_tx_engine(struct jme_adapter *jme)
d7699f87
GFT
606{
607 /*
608 * Select Queue 0
609 */
610 jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
cd0ff491 611 wmb();
d7699f87
GFT
612
613 /*
614 * Setup TX Queue 0 DMA Bass Address
615 */
fcf45b4c 616 jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
3bf61c55 617 jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
fcf45b4c 618 jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
d7699f87
GFT
619
620 /*
621 * Setup TX Descptor Count
622 */
b3821cc5 623 jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
d7699f87
GFT
624
625 /*
626 * Enable TX Engine
627 */
628 wmb();
4330c2f2
GFT
629 jwrite32(jme, JME_TXCS, jme->reg_txcs |
630 TXCS_SELECT_QUEUE0 |
631 TXCS_ENABLE);
d7699f87
GFT
632
633}
634
cd0ff491 635static inline void
29bdd921
GFT
636jme_restart_tx_engine(struct jme_adapter *jme)
637{
638 /*
639 * Restart TX Engine
640 */
641 jwrite32(jme, JME_TXCS, jme->reg_txcs |
642 TXCS_SELECT_QUEUE0 |
643 TXCS_ENABLE);
644}
645
cd0ff491 646static inline void
3bf61c55 647jme_disable_tx_engine(struct jme_adapter *jme)
d7699f87
GFT
648{
649 int i;
cd0ff491 650 u32 val;
d7699f87
GFT
651
652 /*
653 * Disable TX Engine
654 */
fcf45b4c 655 jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
cd0ff491 656 wmb();
d7699f87
GFT
657
658 val = jread32(jme, JME_TXCS);
cd0ff491 659 for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
fcf45b4c 660 mdelay(1);
d7699f87 661 val = jread32(jme, JME_TXCS);
cd0ff491 662 rmb();
d7699f87
GFT
663 }
664
cd0ff491
GFT
665 if (!i)
666 jeprintk(jme->pdev, "Disable TX engine timeout.\n");
d7699f87
GFT
667}
668
3bf61c55
GFT
669static void
670jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
d7699f87 671{
0ede469c 672 struct jme_ring *rxring = &(jme->rxring[0]);
cd0ff491 673 register struct rxdesc *rxdesc = rxring->desc;
4330c2f2
GFT
674 struct jme_buffer_info *rxbi = rxring->bufinf;
675 rxdesc += i;
676 rxbi += i;
677
678 rxdesc->dw[0] = 0;
679 rxdesc->dw[1] = 0;
3bf61c55 680 rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32);
fcf45b4c
GFT
681 rxdesc->desc1.bufaddrl = cpu_to_le32(
682 (__u64)rxbi->mapping & 0xFFFFFFFFUL);
3bf61c55 683 rxdesc->desc1.datalen = cpu_to_le16(rxbi->len);
cd0ff491 684 if (jme->dev->features & NETIF_F_HIGHDMA)
3bf61c55 685 rxdesc->desc1.flags = RXFLAG_64BIT;
d7699f87 686 wmb();
3bf61c55 687 rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT;
d7699f87
GFT
688}
689
3bf61c55
GFT
690static int
691jme_make_new_rx_buf(struct jme_adapter *jme, int i)
4330c2f2
GFT
692{
693 struct jme_ring *rxring = &(jme->rxring[0]);
b3821cc5 694 struct jme_buffer_info *rxbi = rxring->bufinf + i;
cd0ff491 695 struct sk_buff *skb;
4330c2f2 696
79ce639c
GFT
697 skb = netdev_alloc_skb(jme->dev,
698 jme->dev->mtu + RX_EXTRA_LEN);
cd0ff491 699 if (unlikely(!skb))
4330c2f2 700 return -ENOMEM;
3b70a6fa
GFT
701#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
702 skb->dev = jme->dev;
703#endif
3bf61c55 704
4330c2f2 705 rxbi->skb = skb;
3bf61c55 706 rxbi->len = skb_tailroom(skb);
b3821cc5
GFT
707 rxbi->mapping = pci_map_page(jme->pdev,
708 virt_to_page(skb->data),
709 offset_in_page(skb->data),
710 rxbi->len,
711 PCI_DMA_FROMDEVICE);
4330c2f2
GFT
712
713 return 0;
714}
715
3bf61c55
GFT
716static void
717jme_free_rx_buf(struct jme_adapter *jme, int i)
4330c2f2
GFT
718{
719 struct jme_ring *rxring = &(jme->rxring[0]);
720 struct jme_buffer_info *rxbi = rxring->bufinf;
721 rxbi += i;
722
cd0ff491 723 if (rxbi->skb) {
b3821cc5 724 pci_unmap_page(jme->pdev,
4330c2f2 725 rxbi->mapping,
3bf61c55 726 rxbi->len,
4330c2f2
GFT
727 PCI_DMA_FROMDEVICE);
728 dev_kfree_skb(rxbi->skb);
729 rxbi->skb = NULL;
730 rxbi->mapping = 0;
3bf61c55 731 rxbi->len = 0;
4330c2f2
GFT
732 }
733}
734
3bf61c55
GFT
735static void
736jme_free_rx_resources(struct jme_adapter *jme)
737{
738 int i;
739 struct jme_ring *rxring = &(jme->rxring[0]);
740
cd0ff491 741 if (rxring->alloc) {
0ede469c
GFT
742 if (rxring->bufinf) {
743 for (i = 0 ; i < jme->rx_ring_size ; ++i)
744 jme_free_rx_buf(jme, i);
745 kfree(rxring->bufinf);
746 }
3bf61c55
GFT
747
748 dma_free_coherent(&(jme->pdev->dev),
b3821cc5 749 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
3bf61c55
GFT
750 rxring->alloc,
751 rxring->dmaalloc);
752 rxring->alloc = NULL;
753 rxring->desc = NULL;
754 rxring->dmaalloc = 0;
755 rxring->dma = 0;
0ede469c 756 rxring->bufinf = NULL;
3bf61c55
GFT
757 }
758 rxring->next_to_use = 0;
cdcdc9eb 759 atomic_set(&rxring->next_to_clean, 0);
3bf61c55
GFT
760}
761
762static int
763jme_setup_rx_resources(struct jme_adapter *jme)
d7699f87
GFT
764{
765 int i;
766 struct jme_ring *rxring = &(jme->rxring[0]);
767
768 rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
b3821cc5
GFT
769 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
770 &(rxring->dmaalloc),
771 GFP_ATOMIC);
0ede469c
GFT
772 if (!rxring->alloc)
773 goto err_set_null;
d7699f87
GFT
774
775 /*
776 * 16 Bytes align
777 */
cd0ff491 778 rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc),
3bf61c55 779 RING_DESC_ALIGN);
4330c2f2 780 rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
d7699f87 781 rxring->next_to_use = 0;
cdcdc9eb 782 atomic_set(&rxring->next_to_clean, 0);
d7699f87 783
0ede469c
GFT
784 rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
785 jme->rx_ring_size, GFP_ATOMIC);
786 if (unlikely(!(rxring->bufinf)))
787 goto err_free_rxring;
788
d7699f87
GFT
789 /*
790 * Initiallize Receive Descriptors
791 */
0ede469c
GFT
792 memset(rxring->bufinf, 0,
793 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
cd0ff491
GFT
794 for (i = 0 ; i < jme->rx_ring_size ; ++i) {
795 if (unlikely(jme_make_new_rx_buf(jme, i))) {
3bf61c55
GFT
796 jme_free_rx_resources(jme);
797 return -ENOMEM;
798 }
d7699f87
GFT
799
800 jme_set_clean_rxdesc(jme, i);
801 }
802
d7699f87 803 return 0;
0ede469c
GFT
804
805err_free_rxring:
806 dma_free_coherent(&(jme->pdev->dev),
807 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
808 rxring->alloc,
809 rxring->dmaalloc);
810err_set_null:
811 rxring->desc = NULL;
812 rxring->dmaalloc = 0;
813 rxring->dma = 0;
814 rxring->bufinf = NULL;
815
816 return -ENOMEM;
d7699f87
GFT
817}
818
cd0ff491 819static inline void
3bf61c55 820jme_enable_rx_engine(struct jme_adapter *jme)
d7699f87 821{
d7699f87 822 /*
cd0ff491
GFT
823 * Select Queue 0
824 */
825 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
826 RXCS_QUEUESEL_Q0);
827 wmb();
828
829 /*
d7699f87
GFT
830 * Setup RX DMA Bass Address
831 */
0ede469c 832 jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
3bf61c55 833 jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
0ede469c 834 jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
d7699f87
GFT
835
836 /*
b3821cc5 837 * Setup RX Descriptor Count
d7699f87 838 */
b3821cc5 839 jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
d7699f87 840
3bf61c55 841 /*
d7699f87
GFT
842 * Setup Unicast Filter
843 */
844 jme_set_multi(jme->dev);
845
846 /*
847 * Enable RX Engine
848 */
849 wmb();
79ce639c 850 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
4330c2f2
GFT
851 RXCS_QUEUESEL_Q0 |
852 RXCS_ENABLE |
853 RXCS_QST);
d7699f87
GFT
854}
855
cd0ff491 856static inline void
3bf61c55 857jme_restart_rx_engine(struct jme_adapter *jme)
4330c2f2
GFT
858{
859 /*
3bf61c55 860 * Start RX Engine
4330c2f2 861 */
79ce639c 862 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
4330c2f2
GFT
863 RXCS_QUEUESEL_Q0 |
864 RXCS_ENABLE |
865 RXCS_QST);
866}
867
cd0ff491 868static inline void
3bf61c55 869jme_disable_rx_engine(struct jme_adapter *jme)
d7699f87
GFT
870{
871 int i;
cd0ff491 872 u32 val;
d7699f87
GFT
873
874 /*
875 * Disable RX Engine
876 */
29bdd921 877 jwrite32(jme, JME_RXCS, jme->reg_rxcs);
cd0ff491 878 wmb();
d7699f87
GFT
879
880 val = jread32(jme, JME_RXCS);
cd0ff491 881 for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
29bdd921 882 mdelay(1);
d7699f87 883 val = jread32(jme, JME_RXCS);
cd0ff491 884 rmb();
d7699f87
GFT
885 }
886
cd0ff491
GFT
887 if (!i)
888 jeprintk(jme->pdev, "Disable RX engine timeout.\n");
d7699f87
GFT
889
890}
891
192570e0 892static int
cd0ff491 893jme_rxsum_ok(struct jme_adapter *jme, u16 flags)
192570e0 894{
cd0ff491 895 if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
192570e0
GFT
896 return false;
897
0ede469c
GFT
898 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
899 == RXWBFLAG_TCPON)) {
900 if (flags & RXWBFLAG_IPV4)
7ca9ebee 901#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
0ede469c 902 msg_rx_err(jme, "TCP Checksum error\n");
7ca9ebee
GFT
903#else
904 netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
905#endif
0ede469c 906 return false;
192570e0
GFT
907 }
908
0ede469c
GFT
909 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
910 == RXWBFLAG_UDPON)) {
911 if (flags & RXWBFLAG_IPV4)
7ca9ebee 912#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
0ede469c 913 msg_rx_err(jme, "UDP Checksum error.\n");
7ca9ebee
GFT
914#else
915 netif_err(jme, rx_err, jme->dev, "UDP Checksum error.\n");
916#endif
0ede469c 917 return false;
192570e0
GFT
918 }
919
0ede469c
GFT
920 if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
921 == RXWBFLAG_IPV4)) {
7ca9ebee 922#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 923 msg_rx_err(jme, "IPv4 Checksum error.\n");
7ca9ebee
GFT
924#else
925 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error.\n");
926#endif
0ede469c 927 return false;
192570e0
GFT
928 }
929
930 return true;
931}
932
3bf61c55 933static void
42b1055e 934jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
d7699f87 935{
d7699f87 936 struct jme_ring *rxring = &(jme->rxring[0]);
cd0ff491 937 struct rxdesc *rxdesc = rxring->desc;
3bf61c55 938 struct jme_buffer_info *rxbi = rxring->bufinf;
d7699f87 939 struct sk_buff *skb;
3bf61c55 940 int framesize;
d7699f87 941
3bf61c55
GFT
942 rxdesc += idx;
943 rxbi += idx;
d7699f87 944
3bf61c55
GFT
945 skb = rxbi->skb;
946 pci_dma_sync_single_for_cpu(jme->pdev,
947 rxbi->mapping,
948 rxbi->len,
949 PCI_DMA_FROMDEVICE);
950
cd0ff491 951 if (unlikely(jme_make_new_rx_buf(jme, idx))) {
3bf61c55
GFT
952 pci_dma_sync_single_for_device(jme->pdev,
953 rxbi->mapping,
954 rxbi->len,
955 PCI_DMA_FROMDEVICE);
956
957 ++(NET_STAT(jme).rx_dropped);
cd0ff491 958 } else {
3bf61c55
GFT
959 framesize = le16_to_cpu(rxdesc->descwb.framesize)
960 - RX_PREPAD_SIZE;
961
962 skb_reserve(skb, RX_PREPAD_SIZE);
963 skb_put(skb, framesize);
964 skb->protocol = eth_type_trans(skb, jme->dev);
965
3b70a6fa 966 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags)))
8c198884 967 skb->ip_summed = CHECKSUM_UNNECESSARY;
29bdd921
GFT
968 else
969 skb->ip_summed = CHECKSUM_NONE;
8c198884 970
3b70a6fa 971 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
7ca9ebee 972 spin_lock(&jme->vlgrp_lock);
cd0ff491 973 if (jme->vlgrp) {
cdcdc9eb 974 jme->jme_vlan_rx(skb, jme->vlgrp,
3b70a6fa 975 le16_to_cpu(rxdesc->descwb.vlan));
7ca9ebee 976 spin_unlock(&jme->vlgrp_lock);
b3821cc5 977 NET_STAT(jme).rx_bytes += 4;
7ca9ebee
GFT
978 } else {
979 spin_unlock(&jme->vlgrp_lock);
980 dev_kfree_skb(skb);
b3821cc5 981 }
cd0ff491 982 } else {
cdcdc9eb 983 jme->jme_rx(skb);
b3821cc5 984 }
3bf61c55 985
3b70a6fa
GFT
986 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
987 cpu_to_le16(RXWBFLAG_DEST_MUL))
3bf61c55
GFT
988 ++(NET_STAT(jme).multicast);
989
3bf61c55
GFT
990 NET_STAT(jme).rx_bytes += framesize;
991 ++(NET_STAT(jme).rx_packets);
992 }
993
994 jme_set_clean_rxdesc(jme, idx);
995
996}
997
8c198884 998static int
3bf61c55
GFT
999jme_process_receive(struct jme_adapter *jme, int limit)
1000{
1001 struct jme_ring *rxring = &(jme->rxring[0]);
cd0ff491 1002 struct rxdesc *rxdesc = rxring->desc;
b3821cc5 1003 int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
3bf61c55 1004
cd0ff491 1005 if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
192570e0
GFT
1006 goto out_inc;
1007
cd0ff491 1008 if (unlikely(atomic_read(&jme->link_changing) != 1))
192570e0
GFT
1009 goto out_inc;
1010
cd0ff491 1011 if (unlikely(!netif_carrier_ok(jme->dev)))
192570e0
GFT
1012 goto out_inc;
1013
cdcdc9eb 1014 i = atomic_read(&rxring->next_to_clean);
0ede469c 1015 while (limit > 0) {
3bf61c55
GFT
1016 rxdesc = rxring->desc;
1017 rxdesc += i;
1018
3b70a6fa 1019 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
3bf61c55
GFT
1020 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1021 goto out;
0ede469c 1022 --limit;
d7699f87 1023
4330c2f2
GFT
1024 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1025
cd0ff491 1026 if (unlikely(desccnt > 1 ||
192570e0 1027 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
d7699f87 1028
cd0ff491 1029 if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
3bf61c55 1030 ++(NET_STAT(jme).rx_crc_errors);
cd0ff491 1031 else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
3bf61c55
GFT
1032 ++(NET_STAT(jme).rx_fifo_errors);
1033 else
1034 ++(NET_STAT(jme).rx_errors);
4330c2f2 1035
cd0ff491 1036 if (desccnt > 1)
3bf61c55 1037 limit -= desccnt - 1;
4330c2f2 1038
cd0ff491 1039 for (j = i, ccnt = desccnt ; ccnt-- ; ) {
4330c2f2 1040 jme_set_clean_rxdesc(jme, j);
b3821cc5 1041 j = (j + 1) & (mask);
4330c2f2 1042 }
3bf61c55 1043
cd0ff491 1044 } else {
42b1055e 1045 jme_alloc_and_feed_skb(jme, i);
3bf61c55 1046 }
4330c2f2 1047
b3821cc5 1048 i = (i + desccnt) & (mask);
3bf61c55 1049 }
4330c2f2 1050
3bf61c55 1051out:
cdcdc9eb 1052 atomic_set(&rxring->next_to_clean, i);
4330c2f2 1053
192570e0
GFT
1054out_inc:
1055 atomic_inc(&jme->rx_cleaning);
1056
3bf61c55 1057 return limit > 0 ? limit : 0;
4330c2f2 1058
3bf61c55 1059}
d7699f87 1060
3bf61c55 1061static void
79ce639c
GFT
1062jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1063{
cd0ff491 1064 if (likely(atmp == dpi->cur)) {
192570e0 1065 dpi->cnt = 0;
79ce639c 1066 return;
192570e0 1067 }
79ce639c 1068
cd0ff491 1069 if (dpi->attempt == atmp) {
79ce639c 1070 ++(dpi->cnt);
cd0ff491 1071 } else {
79ce639c
GFT
1072 dpi->attempt = atmp;
1073 dpi->cnt = 0;
1074 }
1075
1076}
1077
1078static void
1079jme_dynamic_pcc(struct jme_adapter *jme)
1080{
1081 register struct dynpcc_info *dpi = &(jme->dpi);
1082
cd0ff491 1083 if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
79ce639c 1084 jme_attempt_pcc(dpi, PCC_P3);
7ca9ebee
GFT
1085 else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1086 dpi->intr_cnt > PCC_INTR_THRESHOLD)
79ce639c
GFT
1087 jme_attempt_pcc(dpi, PCC_P2);
1088 else
1089 jme_attempt_pcc(dpi, PCC_P1);
1090
cd0ff491
GFT
1091 if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1092 if (dpi->attempt < dpi->cur)
1093 tasklet_schedule(&jme->rxclean_task);
79ce639c
GFT
1094 jme_set_rx_pcc(jme, dpi->attempt);
1095 dpi->cur = dpi->attempt;
1096 dpi->cnt = 0;
1097 }
1098}
1099
1100static void
1101jme_start_pcc_timer(struct jme_adapter *jme)
1102{
1103 struct dynpcc_info *dpi = &(jme->dpi);
1104 dpi->last_bytes = NET_STAT(jme).rx_bytes;
1105 dpi->last_pkts = NET_STAT(jme).rx_packets;
1106 dpi->intr_cnt = 0;
1107 jwrite32(jme, JME_TMCSR,
1108 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1109}
1110
cd0ff491 1111static inline void
29bdd921
GFT
1112jme_stop_pcc_timer(struct jme_adapter *jme)
1113{
1114 jwrite32(jme, JME_TMCSR, 0);
1115}
1116
1117static void
cd0ff491
GFT
1118jme_shutdown_nic(struct jme_adapter *jme)
1119{
1120 u32 phylink;
1121
1122 phylink = jme_linkstat_from_phy(jme);
1123
1124 if (!(phylink & PHY_LINK_UP)) {
1125 /*
1126 * Disable all interrupt before issue timer
1127 */
1128 jme_stop_irq(jme);
1129 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1130 }
1131}
1132
1133static void
79ce639c
GFT
1134jme_pcc_tasklet(unsigned long arg)
1135{
cd0ff491 1136 struct jme_adapter *jme = (struct jme_adapter *)arg;
79ce639c
GFT
1137 struct net_device *netdev = jme->dev;
1138
cd0ff491
GFT
1139 if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1140 jme_shutdown_nic(jme);
1141 return;
1142 }
29bdd921 1143
cd0ff491 1144 if (unlikely(!netif_carrier_ok(netdev) ||
29bdd921
GFT
1145 (atomic_read(&jme->link_changing) != 1)
1146 )) {
1147 jme_stop_pcc_timer(jme);
79ce639c
GFT
1148 return;
1149 }
29bdd921 1150
cd0ff491 1151 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
192570e0
GFT
1152 jme_dynamic_pcc(jme);
1153
79ce639c
GFT
1154 jme_start_pcc_timer(jme);
1155}
1156
cd0ff491 1157static inline void
192570e0
GFT
1158jme_polling_mode(struct jme_adapter *jme)
1159{
1160 jme_set_rx_pcc(jme, PCC_OFF);
1161}
1162
cd0ff491 1163static inline void
192570e0
GFT
1164jme_interrupt_mode(struct jme_adapter *jme)
1165{
1166 jme_set_rx_pcc(jme, PCC_P1);
1167}
1168
cd0ff491
GFT
1169static inline int
1170jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1171{
1172 u32 apmc;
1173 apmc = jread32(jme, JME_APMC);
1174 return apmc & JME_APMC_PSEUDO_HP_EN;
1175}
1176
1177static void
1178jme_start_shutdown_timer(struct jme_adapter *jme)
1179{
1180 u32 apmc;
1181
1182 apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1183 apmc &= ~JME_APMC_EPIEN_CTRL;
1184 if (!no_extplug) {
1185 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1186 wmb();
1187 }
1188 jwrite32f(jme, JME_APMC, apmc);
1189
1190 jwrite32f(jme, JME_TIMER2, 0);
1191 set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1192 jwrite32(jme, JME_TMCSR,
1193 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1194}
1195
1196static void
1197jme_stop_shutdown_timer(struct jme_adapter *jme)
1198{
1199 u32 apmc;
1200
1201 jwrite32f(jme, JME_TMCSR, 0);
1202 jwrite32f(jme, JME_TIMER2, 0);
1203 clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1204
1205 apmc = jread32(jme, JME_APMC);
1206 apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1207 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1208 wmb();
1209 jwrite32f(jme, JME_APMC, apmc);
1210}
1211
79ce639c 1212static void
3bf61c55
GFT
1213jme_link_change_tasklet(unsigned long arg)
1214{
cd0ff491 1215 struct jme_adapter *jme = (struct jme_adapter *)arg;
fcf45b4c 1216 struct net_device *netdev = jme->dev;
fcf45b4c
GFT
1217 int rc;
1218
cd0ff491
GFT
1219 while (!atomic_dec_and_test(&jme->link_changing)) {
1220 atomic_inc(&jme->link_changing);
7ca9ebee 1221#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 1222 msg_intr(jme, "Get link change lock failed.\n");
7ca9ebee
GFT
1223#else
1224 netif_info(jme, intr, jme->dev, "Get link change lock failed.\n");
1225#endif
58c92f28 1226 while (atomic_read(&jme->link_changing) != 1)
7ca9ebee 1227#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 1228 msg_intr(jme, "Waiting link change lock.\n");
7ca9ebee
GFT
1229#else
1230 netif_info(jme, intr, jme->dev, "Waiting link change lock.\n");
1231#endif
cd0ff491 1232 }
fcf45b4c 1233
cd0ff491 1234 if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
fcf45b4c
GFT
1235 goto out;
1236
29bdd921 1237 jme->old_mtu = netdev->mtu;
fcf45b4c 1238 netif_stop_queue(netdev);
cd0ff491
GFT
1239 if (jme_pseudo_hotplug_enabled(jme))
1240 jme_stop_shutdown_timer(jme);
1241
1242 jme_stop_pcc_timer(jme);
1243 tasklet_disable(&jme->txclean_task);
1244 tasklet_disable(&jme->rxclean_task);
1245 tasklet_disable(&jme->rxempty_task);
1246
1247 if (netif_carrier_ok(netdev)) {
1248 jme_reset_ghc_speed(jme);
1249 jme_disable_rx_engine(jme);
1250 jme_disable_tx_engine(jme);
fcf45b4c
GFT
1251 jme_reset_mac_processor(jme);
1252 jme_free_rx_resources(jme);
1253 jme_free_tx_resources(jme);
192570e0 1254
cd0ff491 1255 if (test_bit(JME_FLAG_POLL, &jme->flags))
192570e0 1256 jme_polling_mode(jme);
cd0ff491
GFT
1257
1258 netif_carrier_off(netdev);
fcf45b4c
GFT
1259 }
1260
1261 jme_check_link(netdev, 0);
cd0ff491 1262 if (netif_carrier_ok(netdev)) {
fcf45b4c 1263 rc = jme_setup_rx_resources(jme);
cd0ff491
GFT
1264 if (rc) {
1265 jeprintk(jme->pdev, "Allocating resources for RX error"
fcf45b4c 1266 ", Device STOPPED!\n");
cd0ff491 1267 goto out_enable_tasklet;
fcf45b4c
GFT
1268 }
1269
fcf45b4c 1270 rc = jme_setup_tx_resources(jme);
cd0ff491
GFT
1271 if (rc) {
1272 jeprintk(jme->pdev, "Allocating resources for TX error"
fcf45b4c
GFT
1273 ", Device STOPPED!\n");
1274 goto err_out_free_rx_resources;
1275 }
1276
1277 jme_enable_rx_engine(jme);
1278 jme_enable_tx_engine(jme);
1279
1280 netif_start_queue(netdev);
192570e0 1281
cd0ff491 1282 if (test_bit(JME_FLAG_POLL, &jme->flags))
192570e0 1283 jme_interrupt_mode(jme);
192570e0 1284
79ce639c 1285 jme_start_pcc_timer(jme);
cd0ff491
GFT
1286 } else if (jme_pseudo_hotplug_enabled(jme)) {
1287 jme_start_shutdown_timer(jme);
fcf45b4c
GFT
1288 }
1289
cd0ff491 1290 goto out_enable_tasklet;
fcf45b4c
GFT
1291
1292err_out_free_rx_resources:
1293 jme_free_rx_resources(jme);
cd0ff491
GFT
1294out_enable_tasklet:
1295 tasklet_enable(&jme->txclean_task);
1296 tasklet_hi_enable(&jme->rxclean_task);
1297 tasklet_hi_enable(&jme->rxempty_task);
fcf45b4c
GFT
1298out:
1299 atomic_inc(&jme->link_changing);
3bf61c55 1300}
d7699f87 1301
3bf61c55
GFT
1302static void
1303jme_rx_clean_tasklet(unsigned long arg)
1304{
cd0ff491 1305 struct jme_adapter *jme = (struct jme_adapter *)arg;
79ce639c 1306 struct dynpcc_info *dpi = &(jme->dpi);
d7699f87 1307
192570e0
GFT
1308 jme_process_receive(jme, jme->rx_ring_size);
1309 ++(dpi->intr_cnt);
42b1055e 1310
192570e0 1311}
fcf45b4c 1312
192570e0 1313static int
cdcdc9eb 1314jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
192570e0 1315{
cdcdc9eb 1316 struct jme_adapter *jme = jme_napi_priv(holder);
3b70a6fa 1317 DECLARE_NETDEV
192570e0 1318 int rest;
fcf45b4c 1319
cdcdc9eb 1320 rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
fcf45b4c 1321
cd0ff491 1322 while (atomic_read(&jme->rx_empty) > 0) {
cdcdc9eb 1323 atomic_dec(&jme->rx_empty);
192570e0
GFT
1324 ++(NET_STAT(jme).rx_dropped);
1325 jme_restart_rx_engine(jme);
1326 }
1327 atomic_inc(&jme->rx_empty);
1328
cd0ff491 1329 if (rest) {
cdcdc9eb 1330 JME_RX_COMPLETE(netdev, holder);
192570e0
GFT
1331 jme_interrupt_mode(jme);
1332 }
1333
cdcdc9eb
GFT
1334 JME_NAPI_WEIGHT_SET(budget, rest);
1335 return JME_NAPI_WEIGHT_VAL(budget) - rest;
fcf45b4c
GFT
1336}
1337
1338static void
1339jme_rx_empty_tasklet(unsigned long arg)
1340{
cd0ff491 1341 struct jme_adapter *jme = (struct jme_adapter *)arg;
fcf45b4c 1342
cd0ff491 1343 if (unlikely(atomic_read(&jme->link_changing) != 1))
fcf45b4c
GFT
1344 return;
1345
cd0ff491 1346 if (unlikely(!netif_carrier_ok(jme->dev)))
fcf45b4c
GFT
1347 return;
1348
7ca9ebee 1349#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 1350 msg_rx_status(jme, "RX Queue Full!\n");
7ca9ebee
GFT
1351#else
1352 netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1353#endif
29bdd921 1354
fcf45b4c 1355 jme_rx_clean_tasklet(arg);
cdcdc9eb 1356
cd0ff491 1357 while (atomic_read(&jme->rx_empty) > 0) {
cdcdc9eb
GFT
1358 atomic_dec(&jme->rx_empty);
1359 ++(NET_STAT(jme).rx_dropped);
1360 jme_restart_rx_engine(jme);
1361 }
1362 atomic_inc(&jme->rx_empty);
4330c2f2
GFT
1363}
1364
3bf61c55 1365static void
b3821cc5
GFT
1366jme_wake_queue_if_stopped(struct jme_adapter *jme)
1367{
0ede469c 1368 struct jme_ring *txring = &(jme->txring[0]);
b3821cc5
GFT
1369
1370 smp_wmb();
cd0ff491 1371 if (unlikely(netif_queue_stopped(jme->dev) &&
b3821cc5 1372 atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
7ca9ebee 1373#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 1374 msg_tx_done(jme, "TX Queue Waked.\n");
7ca9ebee
GFT
1375#else
1376 netif_info(jme, tx_done, jme->dev, "TX Queue Waked.\n");
1377#endif
b3821cc5 1378 netif_wake_queue(jme->dev);
b3821cc5
GFT
1379 }
1380
1381}
1382
1383static void
3bf61c55 1384jme_tx_clean_tasklet(unsigned long arg)
4330c2f2 1385{
cd0ff491 1386 struct jme_adapter *jme = (struct jme_adapter *)arg;
3bf61c55 1387 struct jme_ring *txring = &(jme->txring[0]);
cd0ff491 1388 struct txdesc *txdesc = txring->desc;
3bf61c55 1389 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
b3821cc5 1390 int i, j, cnt = 0, max, err, mask;
3bf61c55 1391
cd0ff491
GFT
1392 tx_dbg(jme, "Into txclean.\n");
1393
1394 if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
fcf45b4c
GFT
1395 goto out;
1396
cd0ff491 1397 if (unlikely(atomic_read(&jme->link_changing) != 1))
fcf45b4c
GFT
1398 goto out;
1399
cd0ff491 1400 if (unlikely(!netif_carrier_ok(jme->dev)))
fcf45b4c
GFT
1401 goto out;
1402
b3821cc5
GFT
1403 max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1404 mask = jme->tx_ring_mask;
3bf61c55 1405
cd0ff491 1406 for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
3bf61c55
GFT
1407
1408 ctxbi = txbi + i;
1409
cd0ff491 1410 if (likely(ctxbi->skb &&
b3821cc5 1411 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
8c198884 1412
cd0ff491
GFT
1413 tx_dbg(jme, "txclean: %d+%d@%lu\n",
1414 i, ctxbi->nr_desc, jiffies);
3bf61c55 1415
cd0ff491 1416 err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
3bf61c55 1417
cd0ff491 1418 for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
b3821cc5
GFT
1419 ttxbi = txbi + ((i + j) & (mask));
1420 txdesc[(i + j) & (mask)].dw[0] = 0;
3bf61c55 1421
b3821cc5 1422 pci_unmap_page(jme->pdev,
3bf61c55
GFT
1423 ttxbi->mapping,
1424 ttxbi->len,
1425 PCI_DMA_TODEVICE);
1426
3bf61c55
GFT
1427 ttxbi->mapping = 0;
1428 ttxbi->len = 0;
1429 }
1430
1431 dev_kfree_skb(ctxbi->skb);
3bf61c55
GFT
1432
1433 cnt += ctxbi->nr_desc;
1434
cd0ff491 1435 if (unlikely(err)) {
8c198884 1436 ++(NET_STAT(jme).tx_carrier_errors);
cd0ff491 1437 } else {
8c198884 1438 ++(NET_STAT(jme).tx_packets);
b3821cc5
GFT
1439 NET_STAT(jme).tx_bytes += ctxbi->len;
1440 }
1441
1442 ctxbi->skb = NULL;
1443 ctxbi->len = 0;
cdcdc9eb 1444 ctxbi->start_xmit = 0;
cd0ff491
GFT
1445
1446 } else {
3bf61c55
GFT
1447 break;
1448 }
1449
b3821cc5 1450 i = (i + ctxbi->nr_desc) & mask;
3bf61c55
GFT
1451
1452 ctxbi->nr_desc = 0;
d7699f87
GFT
1453 }
1454
cd0ff491 1455 tx_dbg(jme, "txclean: done %d@%lu.\n", i, jiffies);
cdcdc9eb 1456 atomic_set(&txring->next_to_clean, i);
79ce639c 1457 atomic_add(cnt, &txring->nr_free);
3bf61c55 1458
b3821cc5
GFT
1459 jme_wake_queue_if_stopped(jme);
1460
fcf45b4c
GFT
1461out:
1462 atomic_inc(&jme->tx_cleaning);
d7699f87
GFT
1463}
1464
79ce639c 1465static void
cd0ff491 1466jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
d7699f87 1467{
3bf61c55
GFT
1468 /*
1469 * Disable interrupt
1470 */
1471 jwrite32f(jme, JME_IENC, INTR_ENABLE);
d7699f87 1472
cd0ff491 1473 if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
47220951
GFT
1474 /*
1475 * Link change event is critical
1476 * all other events are ignored
1477 */
1478 jwrite32(jme, JME_IEVE, intrstat);
3bf61c55 1479 tasklet_schedule(&jme->linkch_task);
29bdd921 1480 goto out_reenable;
fcf45b4c 1481 }
d7699f87 1482
cd0ff491 1483 if (intrstat & INTR_TMINTR) {
47220951 1484 jwrite32(jme, JME_IEVE, INTR_TMINTR);
79ce639c 1485 tasklet_schedule(&jme->pcc_task);
47220951 1486 }
79ce639c 1487
cd0ff491 1488 if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
47220951 1489 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
4330c2f2 1490 tasklet_schedule(&jme->txclean_task);
47220951
GFT
1491 }
1492
cd0ff491 1493 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
47220951
GFT
1494 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1495 INTR_PCCRX0 |
1496 INTR_RX0EMP)) |
1497 INTR_RX0);
1498 }
d7699f87 1499
cd0ff491
GFT
1500 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1501 if (intrstat & INTR_RX0EMP)
192570e0
GFT
1502 atomic_inc(&jme->rx_empty);
1503
cd0ff491
GFT
1504 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1505 if (likely(JME_RX_SCHEDULE_PREP(jme))) {
192570e0 1506 jme_polling_mode(jme);
cdcdc9eb 1507 JME_RX_SCHEDULE(jme);
192570e0
GFT
1508 }
1509 }
cd0ff491
GFT
1510 } else {
1511 if (intrstat & INTR_RX0EMP) {
cdcdc9eb 1512 atomic_inc(&jme->rx_empty);
cd0ff491
GFT
1513 tasklet_hi_schedule(&jme->rxempty_task);
1514 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1515 tasklet_hi_schedule(&jme->rxclean_task);
cdcdc9eb 1516 }
4330c2f2 1517 }
d7699f87 1518
29bdd921 1519out_reenable:
3bf61c55 1520 /*
fcf45b4c 1521 * Re-enable interrupt
3bf61c55 1522 */
fcf45b4c 1523 jwrite32f(jme, JME_IENS, INTR_ENABLE);
79ce639c
GFT
1524}
1525
3b70a6fa
GFT
1526#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1527static irqreturn_t
1528jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1529#else
79ce639c
GFT
1530static irqreturn_t
1531jme_intr(int irq, void *dev_id)
3b70a6fa 1532#endif
79ce639c 1533{
cd0ff491
GFT
1534 struct net_device *netdev = dev_id;
1535 struct jme_adapter *jme = netdev_priv(netdev);
1536 u32 intrstat;
79ce639c
GFT
1537
1538 intrstat = jread32(jme, JME_IEVE);
1539
1540 /*
1541 * Check if it's really an interrupt for us
1542 */
7ee473a3 1543 if (unlikely((intrstat & INTR_ENABLE) == 0))
29bdd921 1544 return IRQ_NONE;
79ce639c
GFT
1545
1546 /*
1547 * Check if the device still exist
1548 */
cd0ff491
GFT
1549 if (unlikely(intrstat == ~((typeof(intrstat))0)))
1550 return IRQ_NONE;
79ce639c
GFT
1551
1552 jme_intr_msi(jme, intrstat);
1553
cd0ff491 1554 return IRQ_HANDLED;
d7699f87
GFT
1555}
1556
3b70a6fa
GFT
1557#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1558static irqreturn_t
1559jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1560#else
79ce639c
GFT
1561static irqreturn_t
1562jme_msi(int irq, void *dev_id)
3b70a6fa 1563#endif
79ce639c 1564{
cd0ff491
GFT
1565 struct net_device *netdev = dev_id;
1566 struct jme_adapter *jme = netdev_priv(netdev);
1567 u32 intrstat;
79ce639c 1568
0ede469c 1569 intrstat = jread32(jme, JME_IEVE);
79ce639c
GFT
1570
1571 jme_intr_msi(jme, intrstat);
1572
cd0ff491 1573 return IRQ_HANDLED;
79ce639c
GFT
1574}
1575
79ce639c
GFT
1576static void
1577jme_reset_link(struct jme_adapter *jme)
1578{
1579 jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1580}
1581
fcf45b4c
GFT
1582static void
1583jme_restart_an(struct jme_adapter *jme)
1584{
cd0ff491 1585 u32 bmcr;
fcf45b4c 1586
cd0ff491 1587 spin_lock_bh(&jme->phy_lock);
fcf45b4c
GFT
1588 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1589 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1590 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
cd0ff491 1591 spin_unlock_bh(&jme->phy_lock);
79ce639c
GFT
1592}
1593
1594static int
1595jme_request_irq(struct jme_adapter *jme)
1596{
1597 int rc;
cd0ff491 1598 struct net_device *netdev = jme->dev;
3b70a6fa
GFT
1599#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1600 irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1601 int irq_flags = SA_SHIRQ;
1602#else
cd0ff491
GFT
1603 irq_handler_t handler = jme_intr;
1604 int irq_flags = IRQF_SHARED;
3b70a6fa 1605#endif
cd0ff491
GFT
1606
1607 if (!pci_enable_msi(jme->pdev)) {
1608 set_bit(JME_FLAG_MSI, &jme->flags);
1609 handler = jme_msi;
1610 irq_flags = 0;
1611 }
1612
1613 rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1614 netdev);
1615 if (rc) {
1616 jeprintk(jme->pdev,
b3821cc5 1617 "Unable to request %s interrupt (return: %d)\n",
cd0ff491
GFT
1618 test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1619 rc);
79ce639c 1620
cd0ff491
GFT
1621 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1622 pci_disable_msi(jme->pdev);
1623 clear_bit(JME_FLAG_MSI, &jme->flags);
79ce639c 1624 }
cd0ff491 1625 } else {
79ce639c
GFT
1626 netdev->irq = jme->pdev->irq;
1627 }
1628
cd0ff491 1629 return rc;
79ce639c
GFT
1630}
1631
1632static void
1633jme_free_irq(struct jme_adapter *jme)
1634{
cd0ff491
GFT
1635 free_irq(jme->pdev->irq, jme->dev);
1636 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1637 pci_disable_msi(jme->pdev);
1638 clear_bit(JME_FLAG_MSI, &jme->flags);
79ce639c 1639 jme->dev->irq = jme->pdev->irq;
cd0ff491 1640 }
fcf45b4c
GFT
1641}
1642
3bf61c55
GFT
1643static int
1644jme_open(struct net_device *netdev)
d7699f87
GFT
1645{
1646 struct jme_adapter *jme = netdev_priv(netdev);
cd0ff491 1647 int rc;
79ce639c 1648
42b1055e 1649 jme_clear_pm(jme);
cdcdc9eb 1650 JME_NAPI_ENABLE(jme);
d7699f87 1651
0ede469c 1652 tasklet_enable(&jme->linkch_task);
cd0ff491
GFT
1653 tasklet_enable(&jme->txclean_task);
1654 tasklet_hi_enable(&jme->rxclean_task);
1655 tasklet_hi_enable(&jme->rxempty_task);
1656
79ce639c 1657 rc = jme_request_irq(jme);
cd0ff491 1658 if (rc)
4330c2f2 1659 goto err_out;
79ce639c 1660
d7699f87 1661 jme_start_irq(jme);
42b1055e 1662
cd0ff491 1663 if (test_bit(JME_FLAG_SSET, &jme->flags))
42b1055e
GFT
1664 jme_set_settings(netdev, &jme->old_ecmd);
1665 else
1666 jme_reset_phy_processor(jme);
1667
29bdd921 1668 jme_reset_link(jme);
d7699f87
GFT
1669
1670 return 0;
1671
d7699f87
GFT
1672err_out:
1673 netif_stop_queue(netdev);
1674 netif_carrier_off(netdev);
4330c2f2 1675 return rc;
d7699f87
GFT
1676}
1677
7ee473a3 1678#ifdef CONFIG_PM
42b1055e
GFT
1679static void
1680jme_set_100m_half(struct jme_adapter *jme)
1681{
cd0ff491 1682 u32 bmcr, tmp;
42b1055e
GFT
1683
1684 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1685 tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1686 BMCR_SPEED1000 | BMCR_FULLDPLX);
1687 tmp |= BMCR_SPEED100;
1688
1689 if (bmcr != tmp)
1690 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1691
cd0ff491 1692 if (jme->fpgaver)
cdcdc9eb
GFT
1693 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1694 else
1695 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
42b1055e
GFT
1696}
1697
47220951
GFT
1698#define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1699static void
1700jme_wait_link(struct jme_adapter *jme)
1701{
cd0ff491 1702 u32 phylink, to = JME_WAIT_LINK_TIME;
47220951
GFT
1703
1704 mdelay(1000);
1705 phylink = jme_linkstat_from_phy(jme);
cd0ff491 1706 while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
47220951
GFT
1707 mdelay(10);
1708 phylink = jme_linkstat_from_phy(jme);
1709 }
1710}
7ee473a3 1711#endif
47220951 1712
cd0ff491 1713static inline void
42b1055e
GFT
1714jme_phy_off(struct jme_adapter *jme)
1715{
1716 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
1717}
1718
3bf61c55
GFT
1719static int
1720jme_close(struct net_device *netdev)
d7699f87
GFT
1721{
1722 struct jme_adapter *jme = netdev_priv(netdev);
1723
1724 netif_stop_queue(netdev);
1725 netif_carrier_off(netdev);
1726
1727 jme_stop_irq(jme);
79ce639c 1728 jme_free_irq(jme);
d7699f87 1729
cdcdc9eb 1730 JME_NAPI_DISABLE(jme);
192570e0 1731
0ede469c
GFT
1732 tasklet_disable(&jme->linkch_task);
1733 tasklet_disable(&jme->txclean_task);
1734 tasklet_disable(&jme->rxclean_task);
1735 tasklet_disable(&jme->rxempty_task);
8c198884 1736
cd0ff491
GFT
1737 jme_reset_ghc_speed(jme);
1738 jme_disable_rx_engine(jme);
1739 jme_disable_tx_engine(jme);
8c198884 1740 jme_reset_mac_processor(jme);
d7699f87
GFT
1741 jme_free_rx_resources(jme);
1742 jme_free_tx_resources(jme);
42b1055e 1743 jme->phylink = 0;
b3821cc5
GFT
1744 jme_phy_off(jme);
1745
1746 return 0;
1747}
1748
1749static int
1750jme_alloc_txdesc(struct jme_adapter *jme,
1751 struct sk_buff *skb)
1752{
0ede469c 1753 struct jme_ring *txring = &(jme->txring[0]);
b3821cc5
GFT
1754 int idx, nr_alloc, mask = jme->tx_ring_mask;
1755
1756 idx = txring->next_to_use;
1757 nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1758
cd0ff491 1759 if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
b3821cc5
GFT
1760 return -1;
1761
1762 atomic_sub(nr_alloc, &txring->nr_free);
42b1055e 1763
b3821cc5
GFT
1764 txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1765
1766 return idx;
1767}
1768
1769static void
1770jme_fill_tx_map(struct pci_dev *pdev,
cd0ff491 1771 struct txdesc *txdesc,
b3821cc5
GFT
1772 struct jme_buffer_info *txbi,
1773 struct page *page,
cd0ff491
GFT
1774 u32 page_offset,
1775 u32 len,
1776 u8 hidma)
b3821cc5
GFT
1777{
1778 dma_addr_t dmaaddr;
1779
1780 dmaaddr = pci_map_page(pdev,
1781 page,
1782 page_offset,
1783 len,
1784 PCI_DMA_TODEVICE);
1785
1786 pci_dma_sync_single_for_device(pdev,
1787 dmaaddr,
1788 len,
1789 PCI_DMA_TODEVICE);
1790
1791 txdesc->dw[0] = 0;
1792 txdesc->dw[1] = 0;
1793 txdesc->desc2.flags = TXFLAG_OWN;
cd0ff491 1794 txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0;
b3821cc5
GFT
1795 txdesc->desc2.datalen = cpu_to_le16(len);
1796 txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32);
1797 txdesc->desc2.bufaddrl = cpu_to_le32(
1798 (__u64)dmaaddr & 0xFFFFFFFFUL);
1799
1800 txbi->mapping = dmaaddr;
1801 txbi->len = len;
1802}
1803
1804static void
1805jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1806{
0ede469c 1807 struct jme_ring *txring = &(jme->txring[0]);
cd0ff491 1808 struct txdesc *txdesc = txring->desc, *ctxdesc;
b3821cc5 1809 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
cd0ff491 1810 u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
b3821cc5
GFT
1811 int i, nr_frags = skb_shinfo(skb)->nr_frags;
1812 int mask = jme->tx_ring_mask;
1813 struct skb_frag_struct *frag;
cd0ff491 1814 u32 len;
b3821cc5 1815
cd0ff491
GFT
1816 for (i = 0 ; i < nr_frags ; ++i) {
1817 frag = &skb_shinfo(skb)->frags[i];
b3821cc5
GFT
1818 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1819 ctxbi = txbi + ((idx + i + 2) & (mask));
1820
1821 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1822 frag->page_offset, frag->size, hidma);
42b1055e 1823 }
b3821cc5 1824
cd0ff491 1825 len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
b3821cc5
GFT
1826 ctxdesc = txdesc + ((idx + 1) & (mask));
1827 ctxbi = txbi + ((idx + 1) & (mask));
1828 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1829 offset_in_page(skb->data), len, hidma);
1830
1831}
1832
1833static int
1834jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1835{
3b70a6fa 1836 if (unlikely(
0ede469c 1837#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
3b70a6fa
GFT
1838 skb_shinfo(skb)->tso_size
1839#else
1840 skb_shinfo(skb)->gso_size
1841#endif
1842 && skb_header_cloned(skb) &&
b3821cc5
GFT
1843 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1844 dev_kfree_skb(skb);
1845 return -1;
1846 }
1847
1848 return 0;
1849}
1850
1851static int
3b70a6fa 1852jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
b3821cc5 1853{
0ede469c 1854#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
3b70a6fa
GFT
1855 *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1856#else
1857 *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1858#endif
cd0ff491 1859 if (*mss) {
b3821cc5
GFT
1860 *flags |= TXFLAG_LSEN;
1861
cd0ff491 1862 if (skb->protocol == htons(ETH_P_IP)) {
b3821cc5
GFT
1863 struct iphdr *iph = ip_hdr(skb);
1864
1865 iph->check = 0;
cd0ff491 1866 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
b3821cc5
GFT
1867 iph->daddr, 0,
1868 IPPROTO_TCP,
1869 0);
cd0ff491 1870 } else {
b3821cc5
GFT
1871 struct ipv6hdr *ip6h = ipv6_hdr(skb);
1872
cd0ff491 1873 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
b3821cc5
GFT
1874 &ip6h->daddr, 0,
1875 IPPROTO_TCP,
1876 0);
1877 }
1878
1879 return 0;
1880 }
1881
1882 return 1;
1883}
1884
1885static void
cd0ff491 1886jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
b3821cc5 1887{
3b70a6fa
GFT
1888#ifdef CHECKSUM_PARTIAL
1889 if (skb->ip_summed == CHECKSUM_PARTIAL)
1890#else
1891 if (skb->ip_summed == CHECKSUM_HW)
1892#endif
1893 {
cd0ff491 1894 u8 ip_proto;
b3821cc5 1895
3b70a6fa
GFT
1896#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1897 if (skb->protocol == htons(ETH_P_IP))
1898 ip_proto = ip_hdr(skb)->protocol;
1899 else if (skb->protocol == htons(ETH_P_IPV6))
1900 ip_proto = ipv6_hdr(skb)->nexthdr;
1901 else
1902 ip_proto = 0;
1903#else
b3821cc5 1904 switch (skb->protocol) {
cd0ff491 1905 case htons(ETH_P_IP):
b3821cc5
GFT
1906 ip_proto = ip_hdr(skb)->protocol;
1907 break;
cd0ff491 1908 case htons(ETH_P_IPV6):
b3821cc5
GFT
1909 ip_proto = ipv6_hdr(skb)->nexthdr;
1910 break;
1911 default:
1912 ip_proto = 0;
1913 break;
1914 }
3b70a6fa 1915#endif
b3821cc5 1916
cd0ff491 1917 switch (ip_proto) {
b3821cc5
GFT
1918 case IPPROTO_TCP:
1919 *flags |= TXFLAG_TCPCS;
1920 break;
1921 case IPPROTO_UDP:
1922 *flags |= TXFLAG_UDPCS;
1923 break;
1924 default:
7ca9ebee 1925#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 1926 msg_tx_err(jme, "Error upper layer protocol.\n");
7ca9ebee
GFT
1927#else
1928 netif_err(jme, tx_err, jme->dev, "Error upper layer protocol.\n");
1929#endif
b3821cc5
GFT
1930 break;
1931 }
1932 }
1933}
1934
cd0ff491 1935static inline void
3b70a6fa 1936jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
b3821cc5 1937{
cd0ff491 1938 if (vlan_tx_tag_present(skb)) {
b3821cc5 1939 *flags |= TXFLAG_TAGON;
3b70a6fa 1940 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
42b1055e 1941 }
b3821cc5
GFT
1942}
1943
1944static int
3b70a6fa 1945jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
b3821cc5 1946{
0ede469c 1947 struct jme_ring *txring = &(jme->txring[0]);
cd0ff491 1948 struct txdesc *txdesc;
b3821cc5 1949 struct jme_buffer_info *txbi;
cd0ff491 1950 u8 flags;
b3821cc5 1951
cd0ff491 1952 txdesc = (struct txdesc *)txring->desc + idx;
b3821cc5
GFT
1953 txbi = txring->bufinf + idx;
1954
1955 txdesc->dw[0] = 0;
1956 txdesc->dw[1] = 0;
1957 txdesc->dw[2] = 0;
1958 txdesc->dw[3] = 0;
1959 txdesc->desc1.pktsize = cpu_to_le16(skb->len);
1960 /*
1961 * Set OWN bit at final.
1962 * When kernel transmit faster than NIC.
1963 * And NIC trying to send this descriptor before we tell
1964 * it to start sending this TX queue.
1965 * Other fields are already filled correctly.
1966 */
1967 wmb();
1968 flags = TXFLAG_OWN | TXFLAG_INT;
cd0ff491
GFT
1969 /*
1970 * Set checksum flags while not tso
1971 */
1972 if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
1973 jme_tx_csum(jme, skb, &flags);
b3821cc5 1974 jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
3b70a6fa 1975 jme_map_tx_skb(jme, skb, idx);
b3821cc5
GFT
1976 txdesc->desc1.flags = flags;
1977 /*
1978 * Set tx buffer info after telling NIC to send
1979 * For better tx_clean timing
1980 */
1981 wmb();
1982 txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
1983 txbi->skb = skb;
1984 txbi->len = skb->len;
cd0ff491
GFT
1985 txbi->start_xmit = jiffies;
1986 if (!txbi->start_xmit)
8d27293f 1987 txbi->start_xmit = (0UL-1);
d7699f87
GFT
1988
1989 return 0;
1990}
1991
b3821cc5
GFT
1992static void
1993jme_stop_queue_if_full(struct jme_adapter *jme)
1994{
0ede469c 1995 struct jme_ring *txring = &(jme->txring[0]);
cd0ff491
GFT
1996 struct jme_buffer_info *txbi = txring->bufinf;
1997 int idx = atomic_read(&txring->next_to_clean);
cdcdc9eb 1998
cd0ff491 1999 txbi += idx;
b3821cc5
GFT
2000
2001 smp_wmb();
cd0ff491 2002 if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
b3821cc5 2003 netif_stop_queue(jme->dev);
7ca9ebee 2004#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2005 msg_tx_queued(jme, "TX Queue Paused.\n");
7ca9ebee
GFT
2006#else
2007 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused.\n");
2008#endif
b3821cc5 2009 smp_wmb();
cd0ff491
GFT
2010 if (atomic_read(&txring->nr_free)
2011 >= (jme->tx_wake_threshold)) {
b3821cc5 2012 netif_wake_queue(jme->dev);
7ca9ebee 2013#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2014 msg_tx_queued(jme, "TX Queue Fast Waked.\n");
7ca9ebee
GFT
2015#else
2016 netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked.\n");
2017#endif
b3821cc5
GFT
2018 }
2019 }
2020
cd0ff491 2021 if (unlikely(txbi->start_xmit &&
cdcdc9eb
GFT
2022 (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2023 txbi->skb)) {
2024 netif_stop_queue(jme->dev);
7ca9ebee 2025#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2026 msg_tx_queued(jme, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
7ca9ebee
GFT
2027#else
2028 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2029#endif
cdcdc9eb 2030 }
b3821cc5
GFT
2031}
2032
3bf61c55
GFT
2033/*
2034 * This function is already protected by netif_tx_lock()
2035 */
cd0ff491 2036
7ca9ebee 2037#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
3bf61c55 2038static int
7ca9ebee
GFT
2039#else
2040static netdev_tx_t
2041#endif
3bf61c55 2042jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
d7699f87 2043{
cd0ff491 2044 struct jme_adapter *jme = netdev_priv(netdev);
b3821cc5 2045 int idx;
d7699f87 2046
cd0ff491 2047 if (unlikely(jme_expand_header(jme, skb))) {
b3821cc5
GFT
2048 ++(NET_STAT(jme).tx_dropped);
2049 return NETDEV_TX_OK;
2050 }
2051
2052 idx = jme_alloc_txdesc(jme, skb);
79ce639c 2053
cd0ff491 2054 if (unlikely(idx < 0)) {
b3821cc5 2055 netif_stop_queue(netdev);
7ca9ebee 2056#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2057 msg_tx_err(jme, "BUG! Tx ring full when queue awake!\n");
7ca9ebee
GFT
2058#else
2059 netif_err(jme, tx_err, jme->dev, "BUG! Tx ring full when queue awake!\n");
2060#endif
d7699f87 2061
cd0ff491 2062 return NETDEV_TX_BUSY;
b3821cc5
GFT
2063 }
2064
3b70a6fa 2065 jme_fill_tx_desc(jme, skb, idx);
b3821cc5 2066
4330c2f2
GFT
2067 jwrite32(jme, JME_TXCS, jme->reg_txcs |
2068 TXCS_SELECT_QUEUE0 |
2069 TXCS_QUEUE0S |
2070 TXCS_ENABLE);
0ede469c 2071#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
d7699f87 2072 netdev->trans_start = jiffies;
0ede469c 2073#endif
d7699f87 2074
cd0ff491
GFT
2075 tx_dbg(jme, "xmit: %d+%d@%lu\n", idx,
2076 skb_shinfo(skb)->nr_frags + 2,
2077 jiffies);
b3821cc5
GFT
2078 jme_stop_queue_if_full(jme);
2079
cd0ff491 2080 return NETDEV_TX_OK;
d7699f87
GFT
2081}
2082
3bf61c55
GFT
2083static int
2084jme_set_macaddr(struct net_device *netdev, void *p)
d7699f87 2085{
cd0ff491 2086 struct jme_adapter *jme = netdev_priv(netdev);
d7699f87 2087 struct sockaddr *addr = p;
cd0ff491 2088 u32 val;
d7699f87 2089
cd0ff491 2090 if (netif_running(netdev))
d7699f87
GFT
2091 return -EBUSY;
2092
cd0ff491 2093 spin_lock_bh(&jme->macaddr_lock);
d7699f87
GFT
2094 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2095
186fc259
GFT
2096 val = (addr->sa_data[3] & 0xff) << 24 |
2097 (addr->sa_data[2] & 0xff) << 16 |
2098 (addr->sa_data[1] & 0xff) << 8 |
2099 (addr->sa_data[0] & 0xff);
4330c2f2 2100 jwrite32(jme, JME_RXUMA_LO, val);
186fc259
GFT
2101 val = (addr->sa_data[5] & 0xff) << 8 |
2102 (addr->sa_data[4] & 0xff);
4330c2f2 2103 jwrite32(jme, JME_RXUMA_HI, val);
cd0ff491 2104 spin_unlock_bh(&jme->macaddr_lock);
d7699f87
GFT
2105
2106 return 0;
2107}
2108
3bf61c55
GFT
2109static void
2110jme_set_multi(struct net_device *netdev)
d7699f87 2111{
3bf61c55 2112 struct jme_adapter *jme = netdev_priv(netdev);
d7699f87 2113 u32 mc_hash[2] = {};
7ca9ebee 2114#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
d7699f87 2115 int i;
7ca9ebee 2116#endif
d7699f87 2117
cd0ff491 2118 spin_lock_bh(&jme->rxmcs_lock);
8c198884
GFT
2119
2120 jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
d7699f87 2121
cd0ff491 2122 if (netdev->flags & IFF_PROMISC) {
8c198884 2123 jme->reg_rxmcs |= RXMCS_ALLFRAME;
cd0ff491 2124 } else if (netdev->flags & IFF_ALLMULTI) {
8c198884 2125 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
cd0ff491 2126 } else if (netdev->flags & IFF_MULTICAST) {
3bf61c55
GFT
2127 struct dev_mc_list *mclist;
2128 int bit_nr;
d7699f87 2129
8c198884 2130 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
7ca9ebee 2131#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
3bf61c55
GFT
2132 for (i = 0, mclist = netdev->mc_list;
2133 mclist && i < netdev->mc_count;
2134 ++i, mclist = mclist->next) {
7ca9ebee
GFT
2135#else
2136 netdev_for_each_mc_addr(mclist, netdev) {
2137#endif
cd0ff491
GFT
2138 bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2139 mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2140 }
d7699f87 2141
4330c2f2
GFT
2142 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2143 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
d7699f87
GFT
2144 }
2145
d7699f87 2146 wmb();
8c198884
GFT
2147 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2148
cd0ff491 2149 spin_unlock_bh(&jme->rxmcs_lock);
d7699f87
GFT
2150}
2151
3bf61c55 2152static int
8c198884 2153jme_change_mtu(struct net_device *netdev, int new_mtu)
d7699f87 2154{
cd0ff491 2155 struct jme_adapter *jme = netdev_priv(netdev);
79ce639c 2156
cd0ff491 2157 if (new_mtu == jme->old_mtu)
29bdd921
GFT
2158 return 0;
2159
cd0ff491
GFT
2160 if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2161 ((new_mtu) < IPV6_MIN_MTU))
2162 return -EINVAL;
79ce639c 2163
cd0ff491 2164 if (new_mtu > 4000) {
79ce639c
GFT
2165 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2166 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2167 jme_restart_rx_engine(jme);
cd0ff491 2168 } else {
79ce639c
GFT
2169 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2170 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2171 jme_restart_rx_engine(jme);
2172 }
2173
cd0ff491 2174 if (new_mtu > 1900) {
b3821cc5 2175 netdev->features &= ~(NETIF_F_HW_CSUM |
3b70a6fa
GFT
2176 NETIF_F_TSO
2177#ifdef NETIF_F_TSO6
2178 | NETIF_F_TSO6
2179#endif
2180 );
cd0ff491
GFT
2181 } else {
2182 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
b3821cc5 2183 netdev->features |= NETIF_F_HW_CSUM;
cd0ff491 2184 if (test_bit(JME_FLAG_TSO, &jme->flags))
3b70a6fa
GFT
2185 netdev->features |= NETIF_F_TSO
2186#ifdef NETIF_F_TSO6
2187 | NETIF_F_TSO6
2188#endif
2189 ;
79ce639c
GFT
2190 }
2191
cd0ff491
GFT
2192 netdev->mtu = new_mtu;
2193 jme_reset_link(jme);
79ce639c
GFT
2194
2195 return 0;
d7699f87
GFT
2196}
2197
3bf61c55 2198static void
8c198884
GFT
2199jme_tx_timeout(struct net_device *netdev)
2200{
cd0ff491 2201 struct jme_adapter *jme = netdev_priv(netdev);
8c198884 2202
cdcdc9eb
GFT
2203 jme->phylink = 0;
2204 jme_reset_phy_processor(jme);
cd0ff491 2205 if (test_bit(JME_FLAG_SSET, &jme->flags))
cdcdc9eb
GFT
2206 jme_set_settings(netdev, &jme->old_ecmd);
2207
8c198884 2208 /*
cdcdc9eb 2209 * Force to Reset the link again
8c198884 2210 */
29bdd921 2211 jme_reset_link(jme);
8c198884
GFT
2212}
2213
2214static void
42b1055e
GFT
2215jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2216{
2217 struct jme_adapter *jme = netdev_priv(netdev);
2218
7ca9ebee 2219 spin_lock_bh(&jme->vlgrp_lock);
42b1055e 2220 jme->vlgrp = grp;
7ca9ebee 2221 spin_unlock_bh(&jme->vlgrp_lock);
42b1055e
GFT
2222}
2223
7ca9ebee
GFT
2224#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2225static void
2226jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2227{
2228 struct jme_adapter *jme = netdev_priv(netdev);
2229
2230 spin_lock_bh(&jme->vlgrp_lock);
2231 if(jme->vlgrp) {
2232#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2233 jme->vlgrp->vlan_devices[vid] = NULL;
2234#else
2235 vlan_group_set_device(jme->vlgrp, vid, NULL);
2236#endif
2237 }
2238 spin_unlock_bh(&jme->vlgrp_lock);
2239}
2240#endif
2241
42b1055e 2242static void
3bf61c55
GFT
2243jme_get_drvinfo(struct net_device *netdev,
2244 struct ethtool_drvinfo *info)
d7699f87 2245{
cd0ff491 2246 struct jme_adapter *jme = netdev_priv(netdev);
d7699f87 2247
cd0ff491
GFT
2248 strcpy(info->driver, DRV_NAME);
2249 strcpy(info->version, DRV_VERSION);
2250 strcpy(info->bus_info, pci_name(jme->pdev));
d7699f87
GFT
2251}
2252
3bf61c55 2253static int
8c198884
GFT
2254jme_get_regs_len(struct net_device *netdev)
2255{
cd0ff491 2256 return JME_REG_LEN;
8c198884
GFT
2257}
2258
2259static void
cd0ff491 2260mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
8c198884
GFT
2261{
2262 int i;
2263
cd0ff491 2264 for (i = 0 ; i < len ; i += 4)
79ce639c 2265 p[i >> 2] = jread32(jme, reg + i);
186fc259 2266}
8c198884 2267
186fc259 2268static void
cd0ff491 2269mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
186fc259
GFT
2270{
2271 int i;
cd0ff491 2272 u16 *p16 = (u16 *)p;
186fc259 2273
cd0ff491 2274 for (i = 0 ; i < reg_nr ; ++i)
186fc259 2275 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
8c198884
GFT
2276}
2277
2278static void
2279jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2280{
cd0ff491
GFT
2281 struct jme_adapter *jme = netdev_priv(netdev);
2282 u32 *p32 = (u32 *)p;
8c198884 2283
186fc259 2284 memset(p, 0xFF, JME_REG_LEN);
8c198884
GFT
2285
2286 regs->version = 1;
2287 mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2288
2289 p32 += 0x100 >> 2;
2290 mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2291
2292 p32 += 0x100 >> 2;
2293 mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2294
2295 p32 += 0x100 >> 2;
2296 mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2297
186fc259
GFT
2298 p32 += 0x100 >> 2;
2299 mdio_memcpy(jme, p32, JME_PHY_REG_NR);
8c198884
GFT
2300}
2301
2302static int
2303jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2304{
2305 struct jme_adapter *jme = netdev_priv(netdev);
2306
8c198884
GFT
2307 ecmd->tx_coalesce_usecs = PCC_TX_TO;
2308 ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2309
cd0ff491 2310 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
cdcdc9eb
GFT
2311 ecmd->use_adaptive_rx_coalesce = false;
2312 ecmd->rx_coalesce_usecs = 0;
2313 ecmd->rx_max_coalesced_frames = 0;
2314 return 0;
2315 }
2316
2317 ecmd->use_adaptive_rx_coalesce = true;
2318
cd0ff491 2319 switch (jme->dpi.cur) {
8c198884
GFT
2320 case PCC_P1:
2321 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2322 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2323 break;
2324 case PCC_P2:
2325 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2326 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2327 break;
2328 case PCC_P3:
2329 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2330 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2331 break;
2332 default:
2333 break;
2334 }
2335
2336 return 0;
2337}
2338
192570e0
GFT
2339static int
2340jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2341{
2342 struct jme_adapter *jme = netdev_priv(netdev);
2343 struct dynpcc_info *dpi = &(jme->dpi);
2344
cd0ff491 2345 if (netif_running(netdev))
cdcdc9eb
GFT
2346 return -EBUSY;
2347
7ca9ebee
GFT
2348 if (ecmd->use_adaptive_rx_coalesce &&
2349 test_bit(JME_FLAG_POLL, &jme->flags)) {
cd0ff491 2350 clear_bit(JME_FLAG_POLL, &jme->flags);
cdcdc9eb
GFT
2351 jme->jme_rx = netif_rx;
2352 jme->jme_vlan_rx = vlan_hwaccel_rx;
192570e0
GFT
2353 dpi->cur = PCC_P1;
2354 dpi->attempt = PCC_P1;
2355 dpi->cnt = 0;
2356 jme_set_rx_pcc(jme, PCC_P1);
2357 jme_interrupt_mode(jme);
7ca9ebee
GFT
2358 } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2359 !(test_bit(JME_FLAG_POLL, &jme->flags))) {
cd0ff491 2360 set_bit(JME_FLAG_POLL, &jme->flags);
cdcdc9eb
GFT
2361 jme->jme_rx = netif_receive_skb;
2362 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
192570e0
GFT
2363 jme_interrupt_mode(jme);
2364 }
2365
2366 return 0;
2367}
2368
8c198884
GFT
2369static void
2370jme_get_pauseparam(struct net_device *netdev,
2371 struct ethtool_pauseparam *ecmd)
2372{
2373 struct jme_adapter *jme = netdev_priv(netdev);
cd0ff491 2374 u32 val;
8c198884
GFT
2375
2376 ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2377 ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2378
cd0ff491
GFT
2379 spin_lock_bh(&jme->phy_lock);
2380 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2381 spin_unlock_bh(&jme->phy_lock);
b3821cc5
GFT
2382
2383 ecmd->autoneg =
2384 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
8c198884
GFT
2385}
2386
2387static int
2388jme_set_pauseparam(struct net_device *netdev,
2389 struct ethtool_pauseparam *ecmd)
2390{
2391 struct jme_adapter *jme = netdev_priv(netdev);
cd0ff491 2392 u32 val;
8c198884 2393
cd0ff491 2394 if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
8c198884
GFT
2395 (ecmd->tx_pause != 0)) {
2396
cd0ff491 2397 if (ecmd->tx_pause)
8c198884
GFT
2398 jme->reg_txpfc |= TXPFC_PF_EN;
2399 else
2400 jme->reg_txpfc &= ~TXPFC_PF_EN;
2401
2402 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2403 }
2404
cd0ff491
GFT
2405 spin_lock_bh(&jme->rxmcs_lock);
2406 if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
8c198884
GFT
2407 (ecmd->rx_pause != 0)) {
2408
cd0ff491 2409 if (ecmd->rx_pause)
8c198884
GFT
2410 jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2411 else
2412 jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2413
2414 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2415 }
cd0ff491 2416 spin_unlock_bh(&jme->rxmcs_lock);
8c198884 2417
cd0ff491
GFT
2418 spin_lock_bh(&jme->phy_lock);
2419 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2420 if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
8c198884
GFT
2421 (ecmd->autoneg != 0)) {
2422
cd0ff491 2423 if (ecmd->autoneg)
8c198884
GFT
2424 val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2425 else
2426 val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2427
b3821cc5
GFT
2428 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2429 MII_ADVERTISE, val);
8c198884 2430 }
cd0ff491 2431 spin_unlock_bh(&jme->phy_lock);
8c198884
GFT
2432
2433 return 0;
2434}
2435
29bdd921
GFT
2436static void
2437jme_get_wol(struct net_device *netdev,
2438 struct ethtool_wolinfo *wol)
2439{
2440 struct jme_adapter *jme = netdev_priv(netdev);
2441
2442 wol->supported = WAKE_MAGIC | WAKE_PHY;
2443
2444 wol->wolopts = 0;
2445
cd0ff491 2446 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
29bdd921
GFT
2447 wol->wolopts |= WAKE_PHY;
2448
cd0ff491 2449 if (jme->reg_pmcs & PMCS_MFEN)
29bdd921
GFT
2450 wol->wolopts |= WAKE_MAGIC;
2451
2452}
2453
2454static int
2455jme_set_wol(struct net_device *netdev,
2456 struct ethtool_wolinfo *wol)
2457{
2458 struct jme_adapter *jme = netdev_priv(netdev);
2459
cd0ff491 2460 if (wol->wolopts & (WAKE_MAGICSECURE |
29bdd921
GFT
2461 WAKE_UCAST |
2462 WAKE_MCAST |
2463 WAKE_BCAST |
2464 WAKE_ARP))
2465 return -EOPNOTSUPP;
2466
2467 jme->reg_pmcs = 0;
2468
cd0ff491 2469 if (wol->wolopts & WAKE_PHY)
29bdd921
GFT
2470 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2471
cd0ff491 2472 if (wol->wolopts & WAKE_MAGIC)
29bdd921
GFT
2473 jme->reg_pmcs |= PMCS_MFEN;
2474
cd0ff491 2475 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
42b1055e 2476
29bdd921
GFT
2477 return 0;
2478}
b3821cc5 2479
8c198884 2480static int
3bf61c55
GFT
2481jme_get_settings(struct net_device *netdev,
2482 struct ethtool_cmd *ecmd)
d7699f87
GFT
2483{
2484 struct jme_adapter *jme = netdev_priv(netdev);
2485 int rc;
8c198884 2486
cd0ff491 2487 spin_lock_bh(&jme->phy_lock);
d7699f87 2488 rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
cd0ff491 2489 spin_unlock_bh(&jme->phy_lock);
d7699f87
GFT
2490 return rc;
2491}
2492
3bf61c55
GFT
2493static int
2494jme_set_settings(struct net_device *netdev,
2495 struct ethtool_cmd *ecmd)
d7699f87
GFT
2496{
2497 struct jme_adapter *jme = netdev_priv(netdev);
cd0ff491 2498 int rc, fdc = 0;
fcf45b4c 2499
cd0ff491 2500 if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
8c198884
GFT
2501 return -EINVAL;
2502
cd0ff491 2503 if (jme->mii_if.force_media &&
79ce639c
GFT
2504 ecmd->autoneg != AUTONEG_ENABLE &&
2505 (jme->mii_if.full_duplex != ecmd->duplex))
2506 fdc = 1;
2507
cd0ff491 2508 spin_lock_bh(&jme->phy_lock);
d7699f87 2509 rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
cd0ff491 2510 spin_unlock_bh(&jme->phy_lock);
fcf45b4c 2511
cd0ff491 2512 if (!rc && fdc)
79ce639c
GFT
2513 jme_reset_link(jme);
2514
cd0ff491
GFT
2515 if (!rc) {
2516 set_bit(JME_FLAG_SSET, &jme->flags);
29bdd921
GFT
2517 jme->old_ecmd = *ecmd;
2518 }
2519
d7699f87
GFT
2520 return rc;
2521}
2522
cd0ff491 2523static u32
3bf61c55
GFT
2524jme_get_link(struct net_device *netdev)
2525{
d7699f87
GFT
2526 struct jme_adapter *jme = netdev_priv(netdev);
2527 return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2528}
2529
8c198884 2530static u32
cd0ff491
GFT
2531jme_get_msglevel(struct net_device *netdev)
2532{
2533 struct jme_adapter *jme = netdev_priv(netdev);
2534 return jme->msg_enable;
2535}
2536
2537static void
2538jme_set_msglevel(struct net_device *netdev, u32 value)
8c198884 2539{
cd0ff491
GFT
2540 struct jme_adapter *jme = netdev_priv(netdev);
2541 jme->msg_enable = value;
2542}
8c198884 2543
cd0ff491
GFT
2544static u32
2545jme_get_rx_csum(struct net_device *netdev)
2546{
2547 struct jme_adapter *jme = netdev_priv(netdev);
8c198884
GFT
2548 return jme->reg_rxmcs & RXMCS_CHECKSUM;
2549}
2550
2551static int
2552jme_set_rx_csum(struct net_device *netdev, u32 on)
2553{
cd0ff491 2554 struct jme_adapter *jme = netdev_priv(netdev);
b3821cc5 2555
cd0ff491
GFT
2556 spin_lock_bh(&jme->rxmcs_lock);
2557 if (on)
8c198884
GFT
2558 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2559 else
2560 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2561 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
cd0ff491 2562 spin_unlock_bh(&jme->rxmcs_lock);
8c198884
GFT
2563
2564 return 0;
2565}
2566
2567static int
2568jme_set_tx_csum(struct net_device *netdev, u32 on)
2569{
cd0ff491 2570 struct jme_adapter *jme = netdev_priv(netdev);
b3821cc5 2571
cd0ff491
GFT
2572 if (on) {
2573 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2574 if (netdev->mtu <= 1900)
b3821cc5 2575 netdev->features |= NETIF_F_HW_CSUM;
cd0ff491
GFT
2576 } else {
2577 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
8c198884 2578 netdev->features &= ~NETIF_F_HW_CSUM;
b3821cc5 2579 }
8c198884
GFT
2580
2581 return 0;
2582}
2583
2584static int
b3821cc5
GFT
2585jme_set_tso(struct net_device *netdev, u32 on)
2586{
cd0ff491 2587 struct jme_adapter *jme = netdev_priv(netdev);
b3821cc5 2588
cd0ff491
GFT
2589 if (on) {
2590 set_bit(JME_FLAG_TSO, &jme->flags);
2591 if (netdev->mtu <= 1900)
3b70a6fa
GFT
2592 netdev->features |= NETIF_F_TSO
2593#ifdef NETIF_F_TSO6
2594 | NETIF_F_TSO6
2595#endif
2596 ;
cd0ff491
GFT
2597 } else {
2598 clear_bit(JME_FLAG_TSO, &jme->flags);
3b70a6fa
GFT
2599 netdev->features &= ~(NETIF_F_TSO
2600#ifdef NETIF_F_TSO6
2601 | NETIF_F_TSO6
2602#endif
2603 );
b3821cc5
GFT
2604 }
2605
cd0ff491 2606 return 0;
b3821cc5
GFT
2607}
2608
2609static int
8c198884
GFT
2610jme_nway_reset(struct net_device *netdev)
2611{
cd0ff491 2612 struct jme_adapter *jme = netdev_priv(netdev);
8c198884
GFT
2613 jme_restart_an(jme);
2614 return 0;
2615}
2616
cd0ff491 2617static u8
186fc259
GFT
2618jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2619{
cd0ff491 2620 u32 val;
186fc259
GFT
2621 int to;
2622
2623 val = jread32(jme, JME_SMBCSR);
2624 to = JME_SMB_BUSY_TIMEOUT;
cd0ff491 2625 while ((val & SMBCSR_BUSY) && --to) {
186fc259
GFT
2626 msleep(1);
2627 val = jread32(jme, JME_SMBCSR);
2628 }
cd0ff491 2629 if (!to) {
7ca9ebee 2630#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2631 msg_hw(jme, "SMB Bus Busy.\n");
7ca9ebee
GFT
2632#else
2633 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2634#endif
186fc259
GFT
2635 return 0xFF;
2636 }
2637
2638 jwrite32(jme, JME_SMBINTF,
2639 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2640 SMBINTF_HWRWN_READ |
2641 SMBINTF_HWCMD);
2642
2643 val = jread32(jme, JME_SMBINTF);
2644 to = JME_SMB_BUSY_TIMEOUT;
cd0ff491 2645 while ((val & SMBINTF_HWCMD) && --to) {
186fc259
GFT
2646 msleep(1);
2647 val = jread32(jme, JME_SMBINTF);
2648 }
cd0ff491 2649 if (!to) {
7ca9ebee 2650#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2651 msg_hw(jme, "SMB Bus Busy.\n");
7ca9ebee
GFT
2652#else
2653 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2654#endif
186fc259
GFT
2655 return 0xFF;
2656 }
2657
2658 return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2659}
2660
2661static void
cd0ff491 2662jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
186fc259 2663{
cd0ff491 2664 u32 val;
186fc259
GFT
2665 int to;
2666
2667 val = jread32(jme, JME_SMBCSR);
2668 to = JME_SMB_BUSY_TIMEOUT;
cd0ff491 2669 while ((val & SMBCSR_BUSY) && --to) {
186fc259
GFT
2670 msleep(1);
2671 val = jread32(jme, JME_SMBCSR);
2672 }
cd0ff491 2673 if (!to) {
7ca9ebee 2674#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2675 msg_hw(jme, "SMB Bus Busy.\n");
7ca9ebee
GFT
2676#else
2677 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2678#endif
186fc259
GFT
2679 return;
2680 }
2681
2682 jwrite32(jme, JME_SMBINTF,
2683 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2684 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2685 SMBINTF_HWRWN_WRITE |
2686 SMBINTF_HWCMD);
2687
2688 val = jread32(jme, JME_SMBINTF);
2689 to = JME_SMB_BUSY_TIMEOUT;
cd0ff491 2690 while ((val & SMBINTF_HWCMD) && --to) {
186fc259
GFT
2691 msleep(1);
2692 val = jread32(jme, JME_SMBINTF);
2693 }
cd0ff491 2694 if (!to) {
7ca9ebee 2695#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2696 msg_hw(jme, "SMB Bus Busy.\n");
7ca9ebee
GFT
2697#else
2698 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2699#endif
186fc259
GFT
2700 return;
2701 }
2702
2703 mdelay(2);
2704}
2705
2706static int
2707jme_get_eeprom_len(struct net_device *netdev)
2708{
cd0ff491
GFT
2709 struct jme_adapter *jme = netdev_priv(netdev);
2710 u32 val;
186fc259 2711 val = jread32(jme, JME_SMBCSR);
cd0ff491 2712 return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
186fc259
GFT
2713}
2714
2715static int
2716jme_get_eeprom(struct net_device *netdev,
2717 struct ethtool_eeprom *eeprom, u8 *data)
2718{
cd0ff491 2719 struct jme_adapter *jme = netdev_priv(netdev);
186fc259
GFT
2720 int i, offset = eeprom->offset, len = eeprom->len;
2721
2722 /*
8d27293f 2723 * ethtool will check the boundary for us
186fc259
GFT
2724 */
2725 eeprom->magic = JME_EEPROM_MAGIC;
cd0ff491 2726 for (i = 0 ; i < len ; ++i)
186fc259
GFT
2727 data[i] = jme_smb_read(jme, i + offset);
2728
2729 return 0;
2730}
2731
2732static int
2733jme_set_eeprom(struct net_device *netdev,
2734 struct ethtool_eeprom *eeprom, u8 *data)
2735{
cd0ff491 2736 struct jme_adapter *jme = netdev_priv(netdev);
186fc259
GFT
2737 int i, offset = eeprom->offset, len = eeprom->len;
2738
2739 if (eeprom->magic != JME_EEPROM_MAGIC)
2740 return -EINVAL;
2741
2742 /*
8d27293f 2743 * ethtool will check the boundary for us
186fc259 2744 */
cd0ff491 2745 for (i = 0 ; i < len ; ++i)
186fc259
GFT
2746 jme_smb_write(jme, i + offset, data[i]);
2747
2748 return 0;
2749}
2750
3b70a6fa
GFT
2751#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2752static struct ethtool_ops jme_ethtool_ops = {
2753#else
d7699f87 2754static const struct ethtool_ops jme_ethtool_ops = {
3b70a6fa 2755#endif
cd0ff491 2756 .get_drvinfo = jme_get_drvinfo,
8c198884
GFT
2757 .get_regs_len = jme_get_regs_len,
2758 .get_regs = jme_get_regs,
2759 .get_coalesce = jme_get_coalesce,
192570e0 2760 .set_coalesce = jme_set_coalesce,
cd0ff491
GFT
2761 .get_pauseparam = jme_get_pauseparam,
2762 .set_pauseparam = jme_set_pauseparam,
29bdd921
GFT
2763 .get_wol = jme_get_wol,
2764 .set_wol = jme_set_wol,
d7699f87
GFT
2765 .get_settings = jme_get_settings,
2766 .set_settings = jme_set_settings,
2767 .get_link = jme_get_link,
cd0ff491
GFT
2768 .get_msglevel = jme_get_msglevel,
2769 .set_msglevel = jme_set_msglevel,
8c198884
GFT
2770 .get_rx_csum = jme_get_rx_csum,
2771 .set_rx_csum = jme_set_rx_csum,
2772 .set_tx_csum = jme_set_tx_csum,
b3821cc5
GFT
2773 .set_tso = jme_set_tso,
2774 .set_sg = ethtool_op_set_sg,
8c198884 2775 .nway_reset = jme_nway_reset,
186fc259
GFT
2776 .get_eeprom_len = jme_get_eeprom_len,
2777 .get_eeprom = jme_get_eeprom,
2778 .set_eeprom = jme_set_eeprom,
d7699f87
GFT
2779};
2780
3bf61c55
GFT
2781static int
2782jme_pci_dma64(struct pci_dev *pdev)
d7699f87 2783{
3b70a6fa 2784 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
0ede469c
GFT
2785#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2786 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2787#else
2788 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2789#endif
2790 )
2791#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2792 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2793#else
cd0ff491 2794 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
0ede469c 2795#endif
3bf61c55
GFT
2796 return 1;
2797
3b70a6fa 2798 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
0ede469c
GFT
2799#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2800 !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2801#else
2802 !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2803#endif
2804 )
2805#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2806 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2807#else
cd0ff491 2808 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
0ede469c 2809#endif
8c198884
GFT
2810 return 1;
2811
0ede469c
GFT
2812#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2813 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2814 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2815#else
cd0ff491
GFT
2816 if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2817 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
0ede469c 2818#endif
3bf61c55
GFT
2819 return 0;
2820
2821 return -1;
2822}
2823
cd0ff491 2824static inline void
cdcdc9eb
GFT
2825jme_phy_init(struct jme_adapter *jme)
2826{
cd0ff491 2827 u16 reg26;
cdcdc9eb
GFT
2828
2829 reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2830 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2831}
2832
cd0ff491 2833static inline void
cdcdc9eb 2834jme_check_hw_ver(struct jme_adapter *jme)
42b1055e 2835{
cd0ff491 2836 u32 chipmode;
cdcdc9eb
GFT
2837
2838 chipmode = jread32(jme, JME_CHIPMODE);
2839
2840 jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
58c92f28 2841 jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
42b1055e
GFT
2842}
2843
3b70a6fa
GFT
2844#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2845static const struct net_device_ops jme_netdev_ops = {
2846 .ndo_open = jme_open,
2847 .ndo_stop = jme_close,
2848 .ndo_validate_addr = eth_validate_addr,
2849 .ndo_start_xmit = jme_start_xmit,
2850 .ndo_set_mac_address = jme_set_macaddr,
2851 .ndo_set_multicast_list = jme_set_multi,
2852 .ndo_change_mtu = jme_change_mtu,
2853 .ndo_tx_timeout = jme_tx_timeout,
2854 .ndo_vlan_rx_register = jme_vlan_rx_register,
2855};
2856#endif
2857
3bf61c55
GFT
2858static int __devinit
2859jme_init_one(struct pci_dev *pdev,
2860 const struct pci_device_id *ent)
2861{
cdcdc9eb 2862 int rc = 0, using_dac, i;
d7699f87
GFT
2863 struct net_device *netdev;
2864 struct jme_adapter *jme;
cd0ff491
GFT
2865 u16 bmcr, bmsr;
2866 u32 apmc;
d7699f87
GFT
2867
2868 /*
2869 * set up PCI device basics
2870 */
4330c2f2 2871 rc = pci_enable_device(pdev);
cd0ff491
GFT
2872 if (rc) {
2873 jeprintk(pdev, "Cannot enable PCI device.\n");
4330c2f2
GFT
2874 goto err_out;
2875 }
d7699f87 2876
3bf61c55 2877 using_dac = jme_pci_dma64(pdev);
cd0ff491
GFT
2878 if (using_dac < 0) {
2879 jeprintk(pdev, "Cannot set PCI DMA Mask.\n");
3bf61c55
GFT
2880 rc = -EIO;
2881 goto err_out_disable_pdev;
2882 }
2883
cd0ff491
GFT
2884 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2885 jeprintk(pdev, "No PCI resource region found.\n");
4330c2f2
GFT
2886 rc = -ENOMEM;
2887 goto err_out_disable_pdev;
2888 }
d7699f87 2889
4330c2f2 2890 rc = pci_request_regions(pdev, DRV_NAME);
cd0ff491
GFT
2891 if (rc) {
2892 jeprintk(pdev, "Cannot obtain PCI resource region.\n");
4330c2f2
GFT
2893 goto err_out_disable_pdev;
2894 }
d7699f87
GFT
2895
2896 pci_set_master(pdev);
2897
2898 /*
2899 * alloc and init net device
2900 */
3bf61c55 2901 netdev = alloc_etherdev(sizeof(*jme));
cd0ff491
GFT
2902 if (!netdev) {
2903 jeprintk(pdev, "Cannot allocate netdev structure.\n");
4330c2f2
GFT
2904 rc = -ENOMEM;
2905 goto err_out_release_regions;
d7699f87 2906 }
3b70a6fa
GFT
2907#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2908 netdev->netdev_ops = &jme_netdev_ops;
2909#else
d7699f87
GFT
2910 netdev->open = jme_open;
2911 netdev->stop = jme_close;
2912 netdev->hard_start_xmit = jme_start_xmit;
d7699f87
GFT
2913 netdev->set_mac_address = jme_set_macaddr;
2914 netdev->set_multicast_list = jme_set_multi;
2915 netdev->change_mtu = jme_change_mtu;
8c198884 2916 netdev->tx_timeout = jme_tx_timeout;
42b1055e 2917 netdev->vlan_rx_register = jme_vlan_rx_register;
7ca9ebee
GFT
2918#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2919 netdev->vlan_rx_kill_vid = jme_vlan_rx_kill_vid;
2920#endif
3bf61c55 2921 NETDEV_GET_STATS(netdev, &jme_get_stats);
3b70a6fa
GFT
2922#endif
2923 netdev->ethtool_ops = &jme_ethtool_ops;
2924 netdev->watchdog_timeo = TX_TIMEOUT;
42b1055e 2925 netdev->features = NETIF_F_HW_CSUM |
b3821cc5
GFT
2926 NETIF_F_SG |
2927 NETIF_F_TSO |
3b70a6fa 2928#ifdef NETIF_F_TSO6
b3821cc5 2929 NETIF_F_TSO6 |
3b70a6fa 2930#endif
42b1055e
GFT
2931 NETIF_F_HW_VLAN_TX |
2932 NETIF_F_HW_VLAN_RX;
cd0ff491 2933 if (using_dac)
8c198884 2934 netdev->features |= NETIF_F_HIGHDMA;
d7699f87
GFT
2935
2936 SET_NETDEV_DEV(netdev, &pdev->dev);
2937 pci_set_drvdata(pdev, netdev);
2938
2939 /*
2940 * init adapter info
2941 */
2942 jme = netdev_priv(netdev);
2943 jme->pdev = pdev;
2944 jme->dev = netdev;
cdcdc9eb
GFT
2945 jme->jme_rx = netif_rx;
2946 jme->jme_vlan_rx = vlan_hwaccel_rx;
29bdd921 2947 jme->old_mtu = netdev->mtu = 1500;
fcf45b4c 2948 jme->phylink = 0;
b3821cc5 2949 jme->tx_ring_size = 1 << 10;
0ede469c 2950 jme->tx_ring_mask = jme->tx_ring_size - 1;
b3821cc5
GFT
2951 jme->tx_wake_threshold = 1 << 9;
2952 jme->rx_ring_size = 1 << 9;
2953 jme->rx_ring_mask = jme->rx_ring_size - 1;
cd0ff491 2954 jme->msg_enable = JME_DEF_MSG_ENABLE;
d7699f87
GFT
2955 jme->regs = ioremap(pci_resource_start(pdev, 0),
2956 pci_resource_len(pdev, 0));
4330c2f2 2957 if (!(jme->regs)) {
cd0ff491 2958 jeprintk(pdev, "Mapping PCI resource region error.\n");
d7699f87
GFT
2959 rc = -ENOMEM;
2960 goto err_out_free_netdev;
2961 }
4330c2f2 2962
cd0ff491
GFT
2963 if (no_pseudohp) {
2964 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
2965 jwrite32(jme, JME_APMC, apmc);
2966 } else if (force_pseudohp) {
2967 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
2968 jwrite32(jme, JME_APMC, apmc);
2969 }
2970
cdcdc9eb 2971 NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
192570e0 2972
d7699f87 2973 spin_lock_init(&jme->phy_lock);
fcf45b4c 2974 spin_lock_init(&jme->macaddr_lock);
8c198884 2975 spin_lock_init(&jme->rxmcs_lock);
7ca9ebee 2976 spin_lock_init(&jme->vlgrp_lock);
fcf45b4c 2977
fcf45b4c
GFT
2978 atomic_set(&jme->link_changing, 1);
2979 atomic_set(&jme->rx_cleaning, 1);
2980 atomic_set(&jme->tx_cleaning, 1);
192570e0 2981 atomic_set(&jme->rx_empty, 1);
fcf45b4c 2982
79ce639c 2983 tasklet_init(&jme->pcc_task,
7ca9ebee 2984 jme_pcc_tasklet,
79ce639c 2985 (unsigned long) jme);
4330c2f2 2986 tasklet_init(&jme->linkch_task,
7ca9ebee 2987 jme_link_change_tasklet,
4330c2f2
GFT
2988 (unsigned long) jme);
2989 tasklet_init(&jme->txclean_task,
7ca9ebee 2990 jme_tx_clean_tasklet,
4330c2f2
GFT
2991 (unsigned long) jme);
2992 tasklet_init(&jme->rxclean_task,
7ca9ebee 2993 jme_rx_clean_tasklet,
4330c2f2 2994 (unsigned long) jme);
fcf45b4c 2995 tasklet_init(&jme->rxempty_task,
7ca9ebee 2996 jme_rx_empty_tasklet,
fcf45b4c 2997 (unsigned long) jme);
0ede469c 2998 tasklet_disable_nosync(&jme->linkch_task);
cd0ff491
GFT
2999 tasklet_disable_nosync(&jme->txclean_task);
3000 tasklet_disable_nosync(&jme->rxclean_task);
3001 tasklet_disable_nosync(&jme->rxempty_task);
8c198884
GFT
3002 jme->dpi.cur = PCC_P1;
3003
cd0ff491 3004 jme->reg_ghc = 0;
79ce639c 3005 jme->reg_rxcs = RXCS_DEFAULT;
8c198884
GFT
3006 jme->reg_rxmcs = RXMCS_DEFAULT;
3007 jme->reg_txpfc = 0;
47220951 3008 jme->reg_pmcs = PMCS_MFEN;
cd0ff491
GFT
3009 set_bit(JME_FLAG_TXCSUM, &jme->flags);
3010 set_bit(JME_FLAG_TSO, &jme->flags);
192570e0 3011
d7699f87 3012 /*
fcf45b4c
GFT
3013 * Get Max Read Req Size from PCI Config Space
3014 */
cd0ff491
GFT
3015 pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3016 jme->mrrs &= PCI_DCSR_MRRS_MASK;
3017 switch (jme->mrrs) {
3018 case MRRS_128B:
3019 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3020 break;
3021 case MRRS_256B:
3022 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3023 break;
3024 default:
3025 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3026 break;
fcf45b4c
GFT
3027 };
3028
fcf45b4c 3029 /*
cdcdc9eb 3030 * Must check before reset_mac_processor
d7699f87 3031 */
cdcdc9eb
GFT
3032 jme_check_hw_ver(jme);
3033 jme->mii_if.dev = netdev;
cd0ff491 3034 if (jme->fpgaver) {
cdcdc9eb 3035 jme->mii_if.phy_id = 0;
cd0ff491 3036 for (i = 1 ; i < 32 ; ++i) {
cdcdc9eb
GFT
3037 bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3038 bmsr = jme_mdio_read(netdev, i, MII_BMSR);
cd0ff491 3039 if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
cdcdc9eb
GFT
3040 jme->mii_if.phy_id = i;
3041 break;
3042 }
3043 }
3044
cd0ff491 3045 if (!jme->mii_if.phy_id) {
cdcdc9eb 3046 rc = -EIO;
cd0ff491 3047 jeprintk(pdev, "Can not find phy_id.\n");
0ede469c 3048 goto err_out_unmap;
cdcdc9eb
GFT
3049 }
3050
3051 jme->reg_ghc |= GHC_LINK_POLL;
cd0ff491 3052 } else {
cdcdc9eb
GFT
3053 jme->mii_if.phy_id = 1;
3054 }
cd0ff491 3055 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
8d27293f
GFT
3056 jme->mii_if.supports_gmii = true;
3057 else
3058 jme->mii_if.supports_gmii = false;
cdcdc9eb
GFT
3059 jme->mii_if.mdio_read = jme_mdio_read;
3060 jme->mii_if.mdio_write = jme_mdio_write;
3061
d7699f87 3062 jme_clear_pm(jme);
58c92f28 3063 jme_set_phyfifoa(jme);
cd0ff491
GFT
3064 pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
3065 if (!jme->fpgaver)
cdcdc9eb 3066 jme_phy_init(jme);
42b1055e 3067 jme_phy_off(jme);
cdcdc9eb
GFT
3068
3069 /*
3070 * Reset MAC processor and reload EEPROM for MAC Address
3071 */
d7699f87 3072 jme_reset_mac_processor(jme);
4330c2f2 3073 rc = jme_reload_eeprom(jme);
cd0ff491
GFT
3074 if (rc) {
3075 jeprintk(pdev,
b3821cc5 3076 "Reload eeprom for reading MAC Address error.\n");
0ede469c 3077 goto err_out_unmap;
4330c2f2 3078 }
d7699f87
GFT
3079 jme_load_macaddr(netdev);
3080
d7699f87
GFT
3081 /*
3082 * Tell stack that we are not ready to work until open()
3083 */
3084 netif_carrier_off(netdev);
3085 netif_stop_queue(netdev);
3086
3087 /*
3088 * Register netdev
3089 */
4330c2f2 3090 rc = register_netdev(netdev);
cd0ff491
GFT
3091 if (rc) {
3092 jeprintk(pdev, "Cannot register net device.\n");
0ede469c 3093 goto err_out_unmap;
4330c2f2 3094 }
d7699f87 3095
7ca9ebee 3096#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
0ede469c
GFT
3097 msg_probe(jme, "%s%s ver:%x rev:%x "
3098 "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3b70a6fa
GFT
3099 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3100 "JMC250 Gigabit Ethernet" :
3101 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3102 "JMC260 Fast Ethernet" : "Unknown",
cd0ff491 3103 (jme->fpgaver != 0) ? " (FPGA)" : "",
58c92f28 3104 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
0ede469c
GFT
3105 jme->rev,
3106 netdev->dev_addr[0],
3107 netdev->dev_addr[1],
3108 netdev->dev_addr[2],
3109 netdev->dev_addr[3],
3110 netdev->dev_addr[4],
3111 netdev->dev_addr[5]);
7ca9ebee
GFT
3112#else
3113 netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x macaddr:%pM\n",
3114 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3115 "JMC250 Gigabit Ethernet" :
3116 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3117 "JMC260 Fast Ethernet" : "Unknown",
3118 (jme->fpgaver != 0) ? " (FPGA)" : "",
3119 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3120 jme->rev, netdev->dev_addr);
3121#endif
d7699f87
GFT
3122
3123 return 0;
3124
3125err_out_unmap:
3126 iounmap(jme->regs);
3127err_out_free_netdev:
3128 pci_set_drvdata(pdev, NULL);
3129 free_netdev(netdev);
4330c2f2
GFT
3130err_out_release_regions:
3131 pci_release_regions(pdev);
d7699f87 3132err_out_disable_pdev:
cd0ff491 3133 pci_disable_device(pdev);
d7699f87 3134err_out:
4330c2f2 3135 return rc;
d7699f87
GFT
3136}
3137
3bf61c55
GFT
3138static void __devexit
3139jme_remove_one(struct pci_dev *pdev)
3140{
d7699f87
GFT
3141 struct net_device *netdev = pci_get_drvdata(pdev);
3142 struct jme_adapter *jme = netdev_priv(netdev);
3143
3144 unregister_netdev(netdev);
3145 iounmap(jme->regs);
3146 pci_set_drvdata(pdev, NULL);
3147 free_netdev(netdev);
3148 pci_release_regions(pdev);
3149 pci_disable_device(pdev);
3150
3151}
3152
7ee473a3 3153#ifdef CONFIG_PM
29bdd921
GFT
3154static int
3155jme_suspend(struct pci_dev *pdev, pm_message_t state)
3156{
3157 struct net_device *netdev = pci_get_drvdata(pdev);
3158 struct jme_adapter *jme = netdev_priv(netdev);
29bdd921
GFT
3159
3160 atomic_dec(&jme->link_changing);
3161
3162 netif_device_detach(netdev);
3163 netif_stop_queue(netdev);
3164 jme_stop_irq(jme);
29bdd921 3165
cd0ff491
GFT
3166 tasklet_disable(&jme->txclean_task);
3167 tasklet_disable(&jme->rxclean_task);
3168 tasklet_disable(&jme->rxempty_task);
3169
cd0ff491
GFT
3170 if (netif_carrier_ok(netdev)) {
3171 if (test_bit(JME_FLAG_POLL, &jme->flags))
47220951
GFT
3172 jme_polling_mode(jme);
3173
29bdd921 3174 jme_stop_pcc_timer(jme);
cd0ff491
GFT
3175 jme_reset_ghc_speed(jme);
3176 jme_disable_rx_engine(jme);
3177 jme_disable_tx_engine(jme);
29bdd921
GFT
3178 jme_reset_mac_processor(jme);
3179 jme_free_rx_resources(jme);
3180 jme_free_tx_resources(jme);
3181 netif_carrier_off(netdev);
3182 jme->phylink = 0;
3183 }
3184
cd0ff491
GFT
3185 tasklet_enable(&jme->txclean_task);
3186 tasklet_hi_enable(&jme->rxclean_task);
3187 tasklet_hi_enable(&jme->rxempty_task);
29bdd921
GFT
3188
3189 pci_save_state(pdev);
cd0ff491 3190 if (jme->reg_pmcs) {
42b1055e 3191 jme_set_100m_half(jme);
47220951 3192
cd0ff491 3193 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
47220951
GFT
3194 jme_wait_link(jme);
3195
29bdd921 3196 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
cd0ff491 3197
42b1055e 3198 pci_enable_wake(pdev, PCI_D3cold, true);
cd0ff491 3199 } else {
42b1055e 3200 jme_phy_off(jme);
29bdd921 3201 }
cd0ff491 3202 pci_set_power_state(pdev, PCI_D3cold);
29bdd921
GFT
3203
3204 return 0;
3205}
3206
3207static int
3208jme_resume(struct pci_dev *pdev)
3209{
3210 struct net_device *netdev = pci_get_drvdata(pdev);
3211 struct jme_adapter *jme = netdev_priv(netdev);
3212
3213 jme_clear_pm(jme);
3214 pci_restore_state(pdev);
3215
cd0ff491 3216 if (test_bit(JME_FLAG_SSET, &jme->flags))
29bdd921
GFT
3217 jme_set_settings(netdev, &jme->old_ecmd);
3218 else
3219 jme_reset_phy_processor(jme);
3220
29bdd921
GFT
3221 jme_start_irq(jme);
3222 netif_device_attach(netdev);
3223
3224 atomic_inc(&jme->link_changing);
3225
3226 jme_reset_link(jme);
3227
3228 return 0;
3229}
7ee473a3 3230#endif
29bdd921 3231
7ca9ebee 3232#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
d7699f87 3233static struct pci_device_id jme_pci_tbl[] = {
7ca9ebee
GFT
3234#else
3235static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3236#endif
cd0ff491
GFT
3237 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3238 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
d7699f87
GFT
3239 { }
3240};
3241
3242static struct pci_driver jme_driver = {
cd0ff491
GFT
3243 .name = DRV_NAME,
3244 .id_table = jme_pci_tbl,
3245 .probe = jme_init_one,
3246 .remove = __devexit_p(jme_remove_one),
d7699f87 3247#ifdef CONFIG_PM
cd0ff491
GFT
3248 .suspend = jme_suspend,
3249 .resume = jme_resume,
d7699f87 3250#endif /* CONFIG_PM */
d7699f87
GFT
3251};
3252
3bf61c55
GFT
3253static int __init
3254jme_init_module(void)
d7699f87 3255{
3b70a6fa 3256 printk(KERN_INFO PFX "JMicron JMC2XX ethernet "
4330c2f2 3257 "driver version %s\n", DRV_VERSION);
d7699f87
GFT
3258 return pci_register_driver(&jme_driver);
3259}
3260
3bf61c55
GFT
3261static void __exit
3262jme_cleanup_module(void)
d7699f87
GFT
3263{
3264 pci_unregister_driver(&jme_driver);
3265}
3266
3267module_init(jme_init_module);
3268module_exit(jme_cleanup_module);
3269
3bf61c55 3270MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
d7699f87
GFT
3271MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3272MODULE_LICENSE("GPL");
3273MODULE_VERSION(DRV_VERSION);
3274MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3275