From 8c6bda1a89c148f3a28edc09a76dac9bff57d8ee Mon Sep 17 00:00:00 2001 From: Michael Chan Date: Thu, 21 Apr 2005 17:09:08 -0700 Subject: [PATCH] [TG3]: Fix tg3_set_power_state() Fix tg3_set_power_state to drive GPIOs properly based on the TG3_FLAG_EEPROM_WRITE_PROTECT flag. Some delays are also added after D0 and D3 power state changes. Signed-off-by: Michael Chan Signed-off-by: David S. Miller --- drivers/net/tg3.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 742340aebf7..f0b5dc7766b 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -1005,8 +1005,13 @@ static int tg3_set_power_state(struct tg3 *tp, int state) pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control); - tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl); - udelay(100); + udelay(100); /* Delay after power state change */ + + /* Switch out of Vaux if it is not a LOM */ + if (!(tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT)) { + tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl); + udelay(100); + } return 0; @@ -1151,6 +1156,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state) /* Finally, set the new power state. */ pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control); + udelay(100); /* Delay after power state change */ tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN); -- 2.39.3