From: Linus Torvalds Date: Mon, 1 Nov 2010 00:40:24 +0000 (-0400) Subject: Merge branches 'irq-core-for-linus' and 'core-locking-for-linus' of git://git.kernel... X-Git-Tag: v2.6.37-rc1~7 X-Git-Url: http://bbs.cooldavid.org/git/?a=commitdiff_plain;h=82279e6bd7643da1b3fbda42555c3238c7b00d38;hp=4882720b267b7b1d1b0ce08334b205f0329d4615;p=net-next-2.6.git Merge branches 'irq-core-for-linus' and 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: genirq: Fix up irq_node() for irq_data changes. genirq: Add single IRQ reservation helper genirq: Warn if enable_irq is called before irq is set up * 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: semaphore: Remove mutex emulation staging: Final semaphore cleanup jbd2: Convert jbd2_slab_create_sem to mutex hpfs: Convert sbi->hpfs_creation_de to mutex Fix up trivial change/delete conflicts with deleted 'dream' drivers (drivers/staging/dream/camera/{mt9d112.c,mt9p012_fox.c,mt9t013.c,s5k3e2fx.c}) --- diff --git a/Documentation/DocBook/kgdb.tmpl b/Documentation/DocBook/kgdb.tmpl index 490d862c5f0..d71b57fcf11 100644 --- a/Documentation/DocBook/kgdb.tmpl +++ b/Documentation/DocBook/kgdb.tmpl @@ -710,7 +710,18 @@ Task Addr Pid Parent [*] cpu State Thread Command A simple shell The kdb core command set A registration API to register additional kdb shell commands. - A good example of a self-contained kdb module is the "ftdump" command for dumping the ftrace buffer. See: kernel/trace/trace_kdb.c + + A good example of a self-contained kdb module + is the "ftdump" command for dumping the ftrace buffer. See: + kernel/trace/trace_kdb.c + For an example of how to dynamically register + a new kdb command you can build the kdb_hello.ko kernel module + from samples/kdb/kdb_hello.c. To build this example you can + set CONFIG_SAMPLES=y and CONFIG_SAMPLE_KDB=m in your kernel + config. Later run "modprobe kdb_hello" and the next time you + enter the kdb shell, you can run the "hello" + command. + The implementation for kdb_printf() which emits messages directly to I/O drivers, bypassing the kernel log. diff --git a/Documentation/filesystems/Locking b/Documentation/filesystems/Locking index 8a817f656f0..a91f3089001 100644 --- a/Documentation/filesystems/Locking +++ b/Documentation/filesystems/Locking @@ -322,7 +322,6 @@ fl_release_private: yes yes prototypes: int (*fl_compare_owner)(struct file_lock *, struct file_lock *); void (*fl_notify)(struct file_lock *); /* unblock callback */ - void (*fl_copy_lock)(struct file_lock *, struct file_lock *); void (*fl_release_private)(struct file_lock *); void (*fl_break)(struct file_lock *); /* break_lease callback */ @@ -330,7 +329,6 @@ locking rules: BKL may block fl_compare_owner: yes no fl_notify: yes no -fl_copy_lock: yes no fl_release_private: yes yes fl_break: yes no diff --git a/Makefile b/Makefile index 6b23f1b15fc..519db43052a 100644 --- a/Makefile +++ b/Makefile @@ -204,6 +204,9 @@ ifeq ($(ARCH),x86_64) endif # Additional ARCH settings for sparc +ifeq ($(ARCH),sparc32) + SRCARCH := sparc +endif ifeq ($(ARCH),sparc64) SRCARCH := sparc endif diff --git a/arch/Kconfig b/arch/Kconfig index 53d7f619a1b..8bf0fa652eb 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -42,6 +42,20 @@ config KPROBES for kernel debugging, non-intrusive instrumentation and testing. If in doubt, say "N". +config JUMP_LABEL + bool "Optimize trace point call sites" + depends on HAVE_ARCH_JUMP_LABEL + help + If it is detected that the compiler has support for "asm goto", + the kernel will compile trace point locations with just a + nop instruction. When trace points are enabled, the nop will + be converted to a jump to the trace function. This technique + lowers overhead and stress on the branch prediction of the + processor. + + On i386, options added to the compiler flags may increase + the size of the kernel slightly. + config OPTPROBES def_bool y depends on KPROBES && HAVE_OPTPROBES diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b527bf5701c..a19a5266d5f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -720,9 +720,11 @@ config ARCH_S5PC100 config ARCH_S5PV210 bool "Samsung S5PV210/S5PC110" select CPU_V7 + select ARCH_SPARSEMEM_ENABLE select GENERIC_GPIO select HAVE_CLK select ARM_L1_CACHE_SHIFT_6 + select ARCH_HAS_CPUFREQ select ARCH_USES_GETTIMEOFFSET select HAVE_S3C2410_I2C select HAVE_S3C_RTC @@ -733,9 +735,13 @@ config ARCH_S5PV210 config ARCH_S5PV310 bool "Samsung S5PV310/S5PC210" select CPU_V7 + select ARCH_SPARSEMEM_ENABLE select GENERIC_GPIO select HAVE_CLK select GENERIC_CLOCKEVENTS + select HAVE_S3C_RTC + select HAVE_S3C2410_I2C + select HAVE_S3C2410_WATCHDOG help Samsung S5PV310 series based systems @@ -1662,6 +1668,12 @@ if ARCH_HAS_CPUFREQ source "drivers/cpufreq/Kconfig" +config CPU_FREQ_IMX + tristate "CPUfreq driver for i.MX CPUs" + depends on ARCH_MXC && CPU_FREQ + help + This enables the CPUfreq driver for i.MX CPUs. + config CPU_FREQ_SA1100 bool diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig index 163cfee7644..5c7a87260fa 100644 --- a/arch/arm/configs/mx51_defconfig +++ b/arch/arm/configs/mx51_defconfig @@ -82,6 +82,7 @@ CONFIG_FEC=y CONFIG_INPUT_FF_MEMLESS=m # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y CONFIG_INPUT_EVBUG=m CONFIG_MOUSE_PS2=m CONFIG_MOUSE_PS2_ELANTECH=y diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index 6bcba48800f..cc42d5fdee1 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h @@ -21,9 +21,6 @@ #define __ASM_ARM_HARDWARE_L2X0_H #define L2X0_CACHE_ID 0x000 -#define L2X0_CACHE_ID_PART_MASK (0xf << 6) -#define L2X0_CACHE_ID_PART_L210 (1 << 6) -#define L2X0_CACHE_ID_PART_L310 (3 << 6) #define L2X0_CACHE_TYPE 0x004 #define L2X0_CTRL 0x100 #define L2X0_AUX_CTRL 0x104 @@ -53,6 +50,16 @@ #define L2X0_LINE_DATA 0xF10 #define L2X0_LINE_TAG 0xF30 #define L2X0_DEBUG_CTRL 0xF40 +#define L2X0_PREFETCH_CTRL 0xF60 +#define L2X0_POWER_CTRL 0xF80 +#define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1) +#define L2X0_STNDBY_MODE_EN (1 << 0) + +/* Registers shifts and masks */ +#define L2X0_CACHE_ID_PART_MASK (0xf << 6) +#define L2X0_CACHE_ID_PART_L210 (1 << 6) +#define L2X0_CACHE_ID_PART_L310 (3 << 6) +#define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x3 << 17) #ifndef __ASSEMBLY__ extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); diff --git a/arch/arm/include/asm/kgdb.h b/arch/arm/include/asm/kgdb.h index 08265993227..48066ce9ea3 100644 --- a/arch/arm/include/asm/kgdb.h +++ b/arch/arm/include/asm/kgdb.h @@ -70,7 +70,8 @@ extern int kgdb_fault_expected; #define _GP_REGS 16 #define _FP_REGS 8 #define _EXTRA_REGS 2 -#define DBG_MAX_REG_NUM (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS) +#define GDB_MAX_REGS (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS) +#define DBG_MAX_REG_NUM (_GP_REGS + _FP_REGS + _EXTRA_REGS) #define KGDB_MAX_NO_CPUS 1 #define BUFMAX 400 @@ -93,7 +94,7 @@ extern int kgdb_fault_expected; #define _SPT 13 #define _LR 14 #define _PC 15 -#define _CPSR (DBG_MAX_REG_NUM - 1) +#define _CPSR (GDB_MAX_REGS - 1) /* * So that we can denote the end of a frame for tracing, diff --git a/arch/arm/include/asm/memblock.h b/arch/arm/include/asm/memblock.h index fdbc43b2e6c..b8da2e415e4 100644 --- a/arch/arm/include/asm/memblock.h +++ b/arch/arm/include/asm/memblock.h @@ -1,13 +1,6 @@ #ifndef _ASM_ARM_MEMBLOCK_H #define _ASM_ARM_MEMBLOCK_H -#ifdef CONFIG_MMU -extern phys_addr_t lowmem_end_addr; -#define MEMBLOCK_REAL_LIMIT lowmem_end_addr -#else -#define MEMBLOCK_REAL_LIMIT 0 -#endif - struct meminfo; struct machine_desc; diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h index 25f76bae57a..fc190092527 100644 --- a/arch/arm/include/asm/outercache.h +++ b/arch/arm/include/asm/outercache.h @@ -25,6 +25,9 @@ struct outer_cache_fns { void (*inv_range)(unsigned long, unsigned long); void (*clean_range)(unsigned long, unsigned long); void (*flush_range)(unsigned long, unsigned long); + void (*flush_all)(void); + void (*inv_all)(void); + void (*disable)(void); #ifdef CONFIG_OUTER_CACHE_SYNC void (*sync)(void); #endif @@ -50,6 +53,24 @@ static inline void outer_flush_range(unsigned long start, unsigned long end) outer_cache.flush_range(start, end); } +static inline void outer_flush_all(void) +{ + if (outer_cache.flush_all) + outer_cache.flush_all(); +} + +static inline void outer_inv_all(void) +{ + if (outer_cache.inv_all) + outer_cache.inv_all(); +} + +static inline void outer_disable(void) +{ + if (outer_cache.disable) + outer_cache.disable(); +} + #else static inline void outer_inv_range(unsigned long start, unsigned long end) @@ -58,6 +79,9 @@ static inline void outer_clean_range(unsigned long start, unsigned long end) { } static inline void outer_flush_range(unsigned long start, unsigned long end) { } +static inline void outer_flush_all(void) { } +static inline void outer_inv_all(void) { } +static inline void outer_disable(void) { } #endif diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c index d6e8b4d2e60..778c2f7024f 100644 --- a/arch/arm/kernel/kgdb.c +++ b/arch/arm/kernel/kgdb.c @@ -79,7 +79,7 @@ sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *task) return; /* Initialize to zero */ - for (regno = 0; regno < DBG_MAX_REG_NUM; regno++) + for (regno = 0; regno < GDB_MAX_REGS; regno++) gdb_regs[regno] = 0; /* Otherwise, we have only some registers from switch_to() */ diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c index 1fc74cbd1a1..3a8fd5140d7 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c @@ -78,7 +78,10 @@ void machine_kexec(struct kimage *image) local_fiq_disable(); setup_mm_for_reboot(0); /* mode is not used, so just pass 0*/ flush_cache_all(); + outer_flush_all(); + outer_disable(); cpu_proc_fin(); + outer_inv_all(); flush_cache_all(); cpu_reset(reboot_code_buffer_phys); } diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index 1953e3d21ab..cead8893b46 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -113,6 +113,7 @@ SECTIONS *(.rodata.*) *(.glue_7) *(.glue_7t) + . = ALIGN(4); *(.got) /* Global offset table */ ARM_CPU_KEEP(PROC_INFO) } diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index b8bbd31aa85..84a5ba03f1b 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -23,16 +23,20 @@ #include #include #include +#include #include #include #include #include #include #include +#include #include "devices-imx27.h" #include "devices.h" +#define SD1_EN_GPIO (GPIO_PORTB + 25) + static const int mx27pdk_pins[] __initconst = { /* UART1 */ PE12_PF_UART1_TXD, @@ -58,6 +62,14 @@ static const int mx27pdk_pins[] __initconst = { PD15_AOUT_FEC_COL, PD16_AIN_FEC_TX_ER, PF23_AIN_FEC_TX_EN, + /* SDHC1 */ + PE18_PF_SD1_D0, + PE19_PF_SD1_D1, + PE20_PF_SD1_D2, + PE21_PF_SD1_D3, + PE22_PF_SD1_CMD, + PE23_PF_SD1_CLK, + SD1_EN_GPIO | GPIO_GPIO | GPIO_OUT, }; static const struct imxuart_platform_data uart_pdata __initconst = { @@ -85,13 +97,39 @@ static struct matrix_keymap_data mx27_3ds_keymap_data = { .keymap_size = ARRAY_SIZE(mx27_3ds_keymap), }; +static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq, + void *data) +{ + return request_irq(IRQ_GPIOB(26), detect_irq, IRQF_TRIGGER_FALLING | + IRQF_TRIGGER_RISING, "sdhc1-card-detect", data); +} + +static void mx27_3ds_sdhc1_exit(struct device *dev, void *data) +{ + free_irq(IRQ_GPIOB(26), data); +} + +static struct imxmmc_platform_data sdhc1_pdata = { + .init = mx27_3ds_sdhc1_init, + .exit = mx27_3ds_sdhc1_exit, +}; + +static void mx27_3ds_sdhc1_enable_level_translator(void) +{ + /* Turn on TXB0108 OE pin */ + gpio_request(SD1_EN_GPIO, "sd1_enable"); + gpio_direction_output(SD1_EN_GPIO, 1); +} + static void __init mx27pdk_init(void) { mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins), "mx27pdk"); + mx27_3ds_sdhc1_enable_level_translator(); imx27_add_imx_uart0(&uart_pdata); imx27_add_fec(NULL); mxc_register_device(&imx_kpp_device, &mx27_3ds_keymap_data); + mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); } static void __init mx27pdk_timer_init(void) diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index babb2259716..e24e3d05397 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -197,7 +197,7 @@ unsigned long ixp2000_gettimeoffset (void) return offset / ticks_per_usec; } -static int ixp2000_timer_interrupt(int irq, void *dev_id) +static irqreturn_t ixp2000_timer_interrupt(int irq, void *dev_id) { /* clear timer 1 */ ixp2000_reg_wrb(IXP2000_T1_CLR, 1); diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index 3115a29dec4..dbbcfeb919d 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig @@ -6,6 +6,7 @@ choice config ARCH_MSM7X00A bool "MSM7x00A / MSM7x01A" + select MACH_TROUT if !MACH_HALIBUT select ARCH_MSM_ARM11 select MSM_SMD select MSM_SMD_PKG3 @@ -15,34 +16,34 @@ config ARCH_MSM7X00A config ARCH_MSM7X30 bool "MSM7x30" + select MACH_MSM7X30_SURF # if ! select ARCH_MSM_SCORPION select MSM_SMD select MSM_VIC select CPU_V7 - select MSM_REMOTE_SPINLOCK_DEKKERS select MSM_GPIOMUX select MSM_PROC_COMM select HAS_MSM_DEBUG_UART_PHYS config ARCH_QSD8X50 bool "QSD8X50" + select MACH_QSD8X50_SURF if !MACH_QSD8X50A_ST1_5 select ARCH_MSM_SCORPION select MSM_SMD select MSM_VIC select CPU_V7 - select MSM_REMOTE_SPINLOCK_LDREX select MSM_GPIOMUX select MSM_PROC_COMM select HAS_MSM_DEBUG_UART_PHYS config ARCH_MSM8X60 bool "MSM8X60" + select MACH_MSM8X60_SURF if (!MACH_MSM8X60_RUMI3 && !MACH_MSM8X60_SIM \ + && !MACH_MSM8X60_FFA) select ARM_GIC select CPU_V7 select MSM_V2_TLMM select MSM_GPIOMUX - select MACH_MSM8X60_SURF if (!MACH_MSM8X60_RUMI3 && !MACH_MSM8X60_SIM \ - && !MACH_MSM8X60_FFA) endchoice diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c index 59edecbe126..75dabb16c80 100644 --- a/arch/arm/mach-msm/board-halibut.c +++ b/arch/arm/mach-msm/board-halibut.c @@ -83,7 +83,6 @@ static void __init halibut_fixup(struct machine_desc *desc, struct tag *tags, { mi->nr_banks=1; mi->bank[0].start = PHYS_OFFSET; - mi->bank[0].node = PHYS_TO_NID(PHYS_OFFSET); mi->bank[0].size = (101*1024*1024); } diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S index fbd5d90dcc8..646b99ebc77 100644 --- a/arch/arm/mach-msm/include/mach/debug-macro.S +++ b/arch/arm/mach-msm/include/mach/debug-macro.S @@ -19,7 +19,7 @@ #include #include -#ifdef CONFIG_HAS_MSM_DEBUG_UART_PHYS +#if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE) .macro addruart, rp, rv ldr \rp, =MSM_DEBUG_UART_PHYS ldr \rv, =MSM_DEBUG_UART_BASE @@ -36,7 +36,18 @@ tst \rd, #0x04 beq 1001b .endm +#else + .macro addruart, rp, rv + mov \rv, #0xff000000 + orr \rv, \rv, #0x00f00000 + .endm - .macro busyuart,rd,rx + .macro senduart,rd,rx + .endm + + .macro waituart,rd,rx .endm #endif + + .macro busyuart,rd,rx + .endm diff --git a/arch/arm/mach-msm/iommu_dev.c b/arch/arm/mach-msm/iommu_dev.c index c33ae786c41..9019cee2907 100644 --- a/arch/arm/mach-msm/iommu_dev.c +++ b/arch/arm/mach-msm/iommu_dev.c @@ -128,7 +128,7 @@ static void msm_iommu_reset(void __iomem *base) static int msm_iommu_probe(struct platform_device *pdev) { - struct resource *r; + struct resource *r, *r2; struct clk *iommu_clk; struct msm_iommu_drvdata *drvdata; struct msm_iommu_dev *iommu_dev = pdev->dev.platform_data; @@ -183,27 +183,27 @@ static int msm_iommu_probe(struct platform_device *pdev) len = r->end - r->start + 1; - r = request_mem_region(r->start, len, r->name); - if (!r) { + r2 = request_mem_region(r->start, len, r->name); + if (!r2) { pr_err("Could not request memory region: " "start=%p, len=%d\n", (void *) r->start, len); ret = -EBUSY; goto fail; } - regs_base = ioremap(r->start, len); + regs_base = ioremap(r2->start, len); if (!regs_base) { pr_err("Could not ioremap: start=%p, len=%d\n", - (void *) r->start, len); + (void *) r2->start, len); ret = -EBUSY; - goto fail; + goto fail_mem; } irq = platform_get_irq_byname(pdev, "secure_irq"); if (irq < 0) { ret = -ENODEV; - goto fail; + goto fail_io; } mb(); @@ -211,14 +211,14 @@ static int msm_iommu_probe(struct platform_device *pdev) if (GET_IDR(regs_base) == 0) { pr_err("Invalid IDR value detected\n"); ret = -ENODEV; - goto fail; + goto fail_io; } ret = request_irq(irq, msm_iommu_fault_handler, 0, "msm_iommu_secure_irpt_handler", drvdata); if (ret) { pr_err("Request IRQ %d failed with ret=%d\n", irq, ret); - goto fail; + goto fail_io; } msm_iommu_reset(regs_base); @@ -237,6 +237,10 @@ static int msm_iommu_probe(struct platform_device *pdev) return 0; +fail_io: + iounmap(regs_base); +fail_mem: + release_mem_region(r->start, len); fail: kfree(drvdata); return ret; diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 7689848ec68..950100f19d0 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c @@ -137,7 +137,7 @@ static struct msm_clock msm_clocks[] = { .rating = 200, .read = msm_gpt_read, .mask = CLOCKSOURCE_MASK(32), - .shift = 24, + .shift = 17, .flags = CLOCK_SOURCE_IS_CONTINUOUS, }, .irq = { diff --git a/arch/arm/mach-mx25/Kconfig b/arch/arm/mach-mx25/Kconfig index aa57e35ce3c..38ca09a5df9 100644 --- a/arch/arm/mach-mx25/Kconfig +++ b/arch/arm/mach-mx25/Kconfig @@ -6,6 +6,7 @@ config MACH_MX25_3DS bool "Support MX25PDK (3DS) Platform" select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND + select IMX_HAVE_PLATFORM_ESDHC config MACH_EUKREA_CPUIMX25 bool "Support Eukrea CPUIMX25 Platform" diff --git a/arch/arm/mach-mx25/mach-mx25_3ds.c b/arch/arm/mach-mx25/mach-mx25_3ds.c index 80805107a73..f8be1eb0c06 100644 --- a/arch/arm/mach-mx25/mach-mx25_3ds.c +++ b/arch/arm/mach-mx25/mach-mx25_3ds.c @@ -96,6 +96,14 @@ static struct pad_desc mx25pdk_pads[] = { MX25_PAD_KPP_COL1__KPP_COL1, MX25_PAD_KPP_COL2__KPP_COL2, MX25_PAD_KPP_COL3__KPP_COL3, + + /* SD1 */ + MX25_PAD_SD1_CMD__SD1_CMD, + MX25_PAD_SD1_CLK__SD1_CLK, + MX25_PAD_SD1_DATA0__SD1_DATA0, + MX25_PAD_SD1_DATA1__SD1_DATA1, + MX25_PAD_SD1_DATA2__SD1_DATA2, + MX25_PAD_SD1_DATA3__SD1_DATA3, }; static const struct fec_platform_data mx25_fec_pdata __initconst = { @@ -193,6 +201,8 @@ static void __init mx25pdk_init(void) mx25pdk_fec_reset(); imx25_add_fec(&mx25_fec_pdata); mxc_register_device(&mx25_kpp_device, &mx25pdk_keymap_data); + + imx25_add_esdhc(0, NULL); } static void __init mx25pdk_timer_init(void) diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index 096fd33f8ab..5000ac1f93e 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig @@ -143,8 +143,10 @@ config MACH_ARMADILLO5X0 config MACH_MX35_3DS bool "Support MX35PDK platform" select ARCH_MX35 + select MXC_DEBUG_BOARD select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND + select IMX_HAVE_PLATFORM_ESDHC default n help Include support for MX35PDK platform. This includes specific diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index f4dff11aaee..d4da9496089 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c @@ -72,24 +72,24 @@ struct platform_device mxc_w1_master_device = { #ifdef CONFIG_ARCH_MX31 static struct resource mxcsdhc0_resources[] = { { - .start = MMC_SDHC1_BASE_ADDR, - .end = MMC_SDHC1_BASE_ADDR + SZ_16K - 1, + .start = MX31_MMC_SDHC1_BASE_ADDR, + .end = MX31_MMC_SDHC1_BASE_ADDR + SZ_16K - 1, .flags = IORESOURCE_MEM, }, { - .start = MXC_INT_MMC_SDHC1, - .end = MXC_INT_MMC_SDHC1, + .start = MX31_INT_MMC_SDHC1, + .end = MX31_INT_MMC_SDHC1, .flags = IORESOURCE_IRQ, }, }; static struct resource mxcsdhc1_resources[] = { { - .start = MMC_SDHC2_BASE_ADDR, - .end = MMC_SDHC2_BASE_ADDR + SZ_16K - 1, + .start = MX31_MMC_SDHC2_BASE_ADDR, + .end = MX31_MMC_SDHC2_BASE_ADDR + SZ_16K - 1, .flags = IORESOURCE_MEM, }, { - .start = MXC_INT_MMC_SDHC2, - .end = MXC_INT_MMC_SDHC2, + .start = MX31_INT_MMC_SDHC2, + .end = MX31_INT_MMC_SDHC2, .flags = IORESOURCE_IRQ, }, }; diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c index 5c1d0e86c91..0ad9e782108 100644 --- a/arch/arm/mach-mx3/mach-mx31_3ds.c +++ b/arch/arm/mach-mx3/mach-mx31_3ds.c @@ -38,39 +38,9 @@ #include "devices-imx31.h" #include "devices.h" -/* Definitions for components on the Debug board */ - -/* Base address of CPLD controller on the Debug board */ -#define DEBUG_BASE_ADDRESS CS5_IO_ADDRESS(MX3x_CS5_BASE_ADDR) - -/* LAN9217 ethernet base address */ -#define LAN9217_BASE_ADDR MX3x_CS5_BASE_ADDR - -/* CPLD config and interrupt base address */ -#define CPLD_ADDR (DEBUG_BASE_ADDRESS + 0x20000) - -/* status, interrupt */ -#define CPLD_INT_STATUS_REG (CPLD_ADDR + 0x10) -#define CPLD_INT_MASK_REG (CPLD_ADDR + 0x38) -#define CPLD_INT_RESET_REG (CPLD_ADDR + 0x20) -/* magic word for debug CPLD */ -#define CPLD_MAGIC_NUMBER1_REG (CPLD_ADDR + 0x40) -#define CPLD_MAGIC_NUMBER2_REG (CPLD_ADDR + 0x48) -/* CPLD code version */ -#define CPLD_CODE_VER_REG (CPLD_ADDR + 0x50) -/* magic word for debug CPLD */ -#define CPLD_MAGIC_NUMBER3_REG (CPLD_ADDR + 0x58) - /* CPLD IRQ line for external uart, external ethernet etc */ #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1) -#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START) -#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE) - -#define EXPIO_INT_ENET (MXC_EXP_IO_BASE + 0) - -#define MXC_MAX_EXP_IO_LINES 16 - /* * This file contains the board-specific initialization routines. */ @@ -272,7 +242,7 @@ static void __init mxc_board_init(void) imx31_add_imx_uart0(&uart_pdata); imx31_add_mxc_nand(&mx31_3ds_nand_board_info); - imx31_add_spi_imx0(&spi1_pdata); + imx31_add_spi_imx1(&spi1_pdata); spi_register_board_info(mx31_3ds_spi_devs, ARRAY_SIZE(mx31_3ds_spi_devs)); @@ -281,9 +251,9 @@ static void __init mxc_board_init(void) mx31_3ds_usbotg_init(); mxc_register_device(&mxc_otg_udc_device, &usbotg_pdata); - if (!mxc_expio_init(CS5_BASE_ADDR, EXPIO_PARENT_INT)) - printk(KERN_WARNING "Init of the debugboard failed, all " - "devices on the board are unusable.\n"); + if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT)) + printk(KERN_WARNING "Init of the debug board failed, all " + "devices on the debug board are unusable.\n"); } static void __init mx31_3ds_timer_init(void) diff --git a/arch/arm/mach-mx3/mach-mx35_3ds.c b/arch/arm/mach-mx3/mach-mx35_3ds.c index 05f628d9072..b66a75aa2e8 100644 --- a/arch/arm/mach-mx3/mach-mx35_3ds.c +++ b/arch/arm/mach-mx3/mach-mx35_3ds.c @@ -38,11 +38,15 @@ #include #include #include +#include +#include #include #include "devices-imx35.h" #include "devices.h" +#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTA + 1) + static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; @@ -108,6 +112,13 @@ static struct pad_desc mx35pdk_pads[] = { /* USBH1 */ MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR, MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC, + /* SDCARD */ + MX35_PAD_SD1_CMD__ESDHC1_CMD, + MX35_PAD_SD1_CLK__ESDHC1_CLK, + MX35_PAD_SD1_DATA0__ESDHC1_DAT0, + MX35_PAD_SD1_DATA1__ESDHC1_DAT1, + MX35_PAD_SD1_DATA2__ESDHC1_DAT2, + MX35_PAD_SD1_DATA3__ESDHC1_DAT3, }; /* OTG config */ @@ -140,6 +151,11 @@ static void __init mxc_board_init(void) mxc_register_device(&mxc_usbh1, &usb_host_pdata); imx35_add_mxc_nand(&mx35pdk_nand_board_info); + imx35_add_esdhc(0, NULL); + + if (mxc_expio_init(MX35_CS5_BASE_ADDR, EXPIO_PARENT_INT)) + pr_warn("Init of the debugboard failed, all " + "devices on the debugboard are unusable.\n"); } static void __init mx35pdk_timer_init(void) diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index a2df9ac3799..3ec910a7a18 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -6,6 +6,7 @@ config ARCH_MX51 select MXC_TZIC select ARCH_MXC_IOMUX_V3 select ARCH_MXC_AUDMUX_V2 + select ARCH_HAS_CPUFREQ comment "MX5 platforms:" @@ -13,6 +14,7 @@ config MACH_MX51_BABBAGE bool "Support MX51 BABBAGE platforms" select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_ESDHC help Include support for MX51 Babbage platform, also known as MX51EVK in u-boot. This includes specific configurations for the board and its diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index 1769c161a60..462f177eddf 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile @@ -5,6 +5,7 @@ # Object file lists. obj-y := cpu.o mm.o clock-mx51.o devices.o +obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index 0821fe9b3b2..acbe30df2e6 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -1,5 +1,5 @@ /* - * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright (C) 2009-2010 Amit Kucheria * * The code contained herein is licensed under the GNU General Public @@ -18,6 +18,8 @@ #include #include #include +#include +#include #include #include @@ -32,11 +34,13 @@ #include "devices-imx51.h" #include "devices.h" +#include "cpu_op-mx51.h" #define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */ #define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */ #define BABBAGE_PHY_RESET (1*32 + 5) /* GPIO_2_5 */ #define BABBAGE_FEC_PHY_RESET (1*32 + 14) /* GPIO_2_14 */ +#define BABBAGE_POWER_KEY (1*32 + 21) /* GPIO_2_21 */ /* USB_CTRL_1 */ #define MX51_USB_CTRL_1_OFFSET 0x10 @@ -46,6 +50,21 @@ #define MX51_USB_PLL_DIV_19_2_MHZ 0x01 #define MX51_USB_PLL_DIV_24_MHZ 0x02 +static struct gpio_keys_button babbage_buttons[] = { + { + .gpio = BABBAGE_POWER_KEY, + .code = BTN_0, + .desc = "PWR", + .active_low = 1, + .wakeup = 1, + }, +}; + +static const struct gpio_keys_platform_data imx_button_data __initconst = { + .buttons = babbage_buttons, + .nbuttons = ARRAY_SIZE(babbage_buttons), +}; + static struct pad_desc mx51babbage_pads[] = { /* UART1 */ MX51_PAD_UART1_RXD__UART1_RXD, @@ -112,6 +131,22 @@ static struct pad_desc mx51babbage_pads[] = { /* FEC PHY reset line */ MX51_PAD_EIM_A20__GPIO_2_14, + + /* SD 1 */ + MX51_PAD_SD1_CMD__SD1_CMD, + MX51_PAD_SD1_CLK__SD1_CLK, + MX51_PAD_SD1_DATA0__SD1_DATA0, + MX51_PAD_SD1_DATA1__SD1_DATA1, + MX51_PAD_SD1_DATA2__SD1_DATA2, + MX51_PAD_SD1_DATA3__SD1_DATA3, + + /* SD 2 */ + MX51_PAD_SD2_CMD__SD2_CMD, + MX51_PAD_SD2_CLK__SD2_CLK, + MX51_PAD_SD2_DATA0__SD2_DATA0, + MX51_PAD_SD2_DATA1__SD2_DATA1, + MX51_PAD_SD2_DATA2__SD2_DATA2, + MX51_PAD_SD2_DATA3__SD2_DATA3, }; /* Serial ports */ @@ -281,13 +316,22 @@ __setup("otg_mode=", babbage_otg_mode); static void __init mxc_board_init(void) { struct pad_desc usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP; + struct pad_desc power_key = MX51_PAD_EIM_A27__GPIO_2_21; +#if defined(CONFIG_CPU_FREQ_IMX) + get_cpu_op = mx51_get_cpu_op; +#endif mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads, ARRAY_SIZE(mx51babbage_pads)); mxc_init_imx_uart(); babbage_fec_reset(); imx51_add_fec(NULL); + /* Set the PAD settings for the pwr key. */ + power_key.pad_ctrl = MX51_GPIO_PAD_CTRL_2; + mxc_iomux_v3_setup_pad(&power_key); + imx51_add_gpio_keys(&imx_button_data); + imx51_add_imx_i2c(0, &babbage_i2c_data); imx51_add_imx_i2c(1, &babbage_i2c_data); mxc_register_device(&mxc_hsi2c_device, &babbage_hsi2c_data); @@ -304,6 +348,9 @@ static void __init mxc_board_init(void) /* setback USBH1_STP to be function */ mxc_iomux_v3_setup_pad(&usbh1stp); babbage_usbhub_reset(); + + imx51_add_esdhc(0, NULL); + imx51_add_esdhc(1, NULL); } static void __init mx51_babbage_timer_init(void) diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index f2aae92cf0e..8ac36d88292 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c @@ -362,7 +362,7 @@ static int _clk_lp_apm_set_parent(struct clk *clk, struct clk *parent) return 0; } -static unsigned long clk_arm_get_rate(struct clk *clk) +static unsigned long clk_cpu_get_rate(struct clk *clk) { u32 cacrr, div; unsigned long parent_rate; @@ -374,6 +374,22 @@ static unsigned long clk_arm_get_rate(struct clk *clk) return parent_rate / div; } +static int clk_cpu_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, cpu_podf; + unsigned long parent_rate; + + parent_rate = clk_get_rate(clk->parent); + cpu_podf = parent_rate / rate - 1; + /* use post divider to change freq */ + reg = __raw_readl(MXC_CCM_CACRR); + reg &= ~MXC_CCM_CACRR_ARM_PODF_MASK; + reg |= cpu_podf << MXC_CCM_CACRR_ARM_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CACRR); + + return 0; +} + static int _clk_periph_apm_set_parent(struct clk *clk, struct clk *parent) { u32 reg, mux; @@ -736,7 +752,8 @@ static struct clk periph_apm_clk = { static struct clk cpu_clk = { .parent = &pll1_sw_clk, - .get_rate = clk_arm_get_rate, + .get_rate = clk_cpu_get_rate, + .set_rate = clk_cpu_set_rate, }; static struct clk ahb_clk = { @@ -1064,6 +1081,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("imx51-cspi.0", NULL, cspi_clk) _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk) + _REGISTER_CLOCK(NULL, "cpu_clk", cpu_clk) }; static void clk_tree_init(void) diff --git a/arch/arm/mach-mx5/cpu_op-mx51.c b/arch/arm/mach-mx5/cpu_op-mx51.c new file mode 100644 index 00000000000..9d34c3d4c02 --- /dev/null +++ b/arch/arm/mach-mx5/cpu_op-mx51.c @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include + +static struct cpu_op mx51_cpu_op[] = { + { + .cpu_rate = 160000000,}, + { + .cpu_rate = 800000000,}, +}; + +struct cpu_op *mx51_get_cpu_op(int *op) +{ + *op = ARRAY_SIZE(mx51_cpu_op); + return mx51_cpu_op; +} diff --git a/arch/arm/mach-mx5/cpu_op-mx51.h b/arch/arm/mach-mx5/cpu_op-mx51.h new file mode 100644 index 00000000000..97477fecb46 --- /dev/null +++ b/arch/arm/mach-mx5/cpu_op-mx51.h @@ -0,0 +1,14 @@ +/* + * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +extern struct cpu_op *mx51_get_cpu_op(int *op); diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h index 5cc910e6053..8c50cb5d05f 100644 --- a/arch/arm/mach-mx5/devices-imx51.h +++ b/arch/arm/mach-mx5/devices-imx51.h @@ -13,6 +13,8 @@ extern const struct imx_fec_data imx51_fec_data __initconst; #define imx51_add_fec(pdata) \ imx_add_fec(&imx51_fec_data, pdata) +#define imx51_add_gpio_keys(pdata) imx_add_gpio_keys(pdata) + extern const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst; #define imx51_add_imx_i2c(id, pdata) \ imx_add_imx_i2c(&imx51_imx_i2c_data[id], pdata) diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 923f9f5f91c..2f895553e6a 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -44,6 +44,13 @@ void __init gic_init_irq(void) } #ifdef CONFIG_CACHE_L2X0 + +static void omap4_l2x0_disable(void) +{ + /* Disable PL310 L2 Cache controller */ + omap_smc1(0x102, 0x0); +} + static int __init omap_l2_cache_init(void) { /* @@ -70,6 +77,12 @@ static int __init omap_l2_cache_init(void) else l2x0_init(l2cache_base, 0x0e070000, 0xc0000fff); + /* + * Override default outer_cache.disable with a OMAP4 + * specific one + */ + outer_cache.disable = omap4_l2x0_disable; + return 0; } early_initcall(omap_l2_cache_init); diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c index 8cdeb14af59..8aa2f1902a9 100644 --- a/arch/arm/mach-s3c2410/h1940-bluetooth.c +++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c @@ -30,7 +30,7 @@ static void h1940bt_enable(int on) { if (on) { /* Power on the chip */ - h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER); + gpio_set_value(H1940_LATCH_BLUETOOTH_POWER, 1); /* Reset the chip */ mdelay(10); @@ -43,7 +43,7 @@ static void h1940bt_enable(int on) mdelay(10); gpio_set_value(S3C2410_GPH(1), 0); mdelay(10); - h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0); + gpio_set_value(H1940_LATCH_BLUETOOTH_POWER, 0); } } @@ -64,7 +64,14 @@ static int __devinit h1940bt_probe(struct platform_device *pdev) ret = gpio_request(S3C2410_GPH(1), dev_name(&pdev->dev)); if (ret) { - dev_err(&pdev->dev, "could not get GPH1\n");\ + dev_err(&pdev->dev, "could not get GPH1\n"); + return ret; + } + + ret = gpio_request(H1940_LATCH_BLUETOOTH_POWER, dev_name(&pdev->dev)); + if (ret) { + gpio_free(S3C2410_GPH(1)); + dev_err(&pdev->dev, "could not get BT_POWER\n"); return ret; } diff --git a/arch/arm/mach-s3c2410/include/mach/gpio.h b/arch/arm/mach-s3c2410/include/mach/gpio.h index b649bf2ccd5..f7f6b07df30 100644 --- a/arch/arm/mach-s3c2410/include/mach/gpio.h +++ b/arch/arm/mach-s3c2410/include/mach/gpio.h @@ -22,6 +22,8 @@ #ifdef CONFIG_CPU_S3C244X #define ARCH_NR_GPIOS (32 * 9 + CONFIG_S3C24XX_GPIO_EXTRA) +#elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416) +#define ARCH_NR_GPIOS (32 * 12 + CONFIG_S3C24XX_GPIO_EXTRA) #else #define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA) #endif @@ -30,8 +32,10 @@ #include #include -#ifdef CONFIG_CPU_S3C24XX -#define S3C_GPIO_END (S3C2410_GPIO_BANKJ + 32) +#ifdef CONFIG_CPU_S3C244X +#define S3C_GPIO_END (S3C2410_GPJ(0) + 32) +#elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416) +#define S3C_GPIO_END (S3C2410_GPM(0) + 32) #else -#define S3C_GPIO_END (S3C2410_GPIO_BANKH + 32) +#define S3C_GPIO_END (S3C2410_GPH(0) + 32) #endif diff --git a/arch/arm/mach-s3c2410/include/mach/h1940-latch.h b/arch/arm/mach-s3c2410/include/mach/h1940-latch.h index d8a832729a8..97e42bfce81 100644 --- a/arch/arm/mach-s3c2410/include/mach/h1940-latch.h +++ b/arch/arm/mach-s3c2410/include/mach/h1940-latch.h @@ -14,51 +14,30 @@ #ifndef __ASM_ARCH_H1940_LATCH_H #define __ASM_ARCH_H1940_LATCH_H +#include -#ifndef __ASSEMBLY__ -#define H1940_LATCH ((void __force __iomem *)0xF8000000) -#else -#define H1940_LATCH 0xF8000000 -#endif - -#define H1940_PA_LATCH (S3C2410_CS2) +#define H1940_LATCH_GPIO(x) (S3C_GPIO_END + (x)) /* SD layer latch */ -#define H1940_LATCH_SDQ1 (1<<16) -#define H1940_LATCH_LCD_P1 (1<<17) -#define H1940_LATCH_LCD_P2 (1<<18) -#define H1940_LATCH_LCD_P3 (1<<19) -#define H1940_LATCH_MAX1698_nSHUTDOWN (1<<20) /* LCD backlight */ -#define H1940_LATCH_LED_RED (1<<21) -#define H1940_LATCH_SDQ7 (1<<22) -#define H1940_LATCH_USB_DP (1<<23) +#define H1940_LATCH_LCD_P0 H1940_LATCH_GPIO(0) +#define H1940_LATCH_LCD_P1 H1940_LATCH_GPIO(1) +#define H1940_LATCH_LCD_P2 H1940_LATCH_GPIO(2) +#define H1940_LATCH_LCD_P3 H1940_LATCH_GPIO(3) +#define H1940_LATCH_MAX1698_nSHUTDOWN H1940_LATCH_GPIO(4) +#define H1940_LATCH_LED_RED H1940_LATCH_GPIO(5) +#define H1940_LATCH_SDQ7 H1940_LATCH_GPIO(6) +#define H1940_LATCH_USB_DP H1940_LATCH_GPIO(7) /* CPU layer latch */ -#define H1940_LATCH_UDA_POWER (1<<24) -#define H1940_LATCH_AUDIO_POWER (1<<25) -#define H1940_LATCH_SM803_ENABLE (1<<26) -#define H1940_LATCH_LCD_P4 (1<<27) -#define H1940_LATCH_CPUQ5 (1<<28) /* untraced */ -#define H1940_LATCH_BLUETOOTH_POWER (1<<29) /* active high */ -#define H1940_LATCH_LED_GREEN (1<<30) -#define H1940_LATCH_LED_FLASH (1<<31) - -/* default settings */ - -#define H1940_LATCH_DEFAULT \ - H1940_LATCH_LCD_P4 | \ - H1940_LATCH_SM803_ENABLE | \ - H1940_LATCH_SDQ1 | \ - H1940_LATCH_LCD_P1 | \ - H1940_LATCH_LCD_P2 | \ - H1940_LATCH_LCD_P3 | \ - H1940_LATCH_MAX1698_nSHUTDOWN | \ - H1940_LATCH_CPUQ5 - -/* control functions */ - -extern void h1940_latch_control(unsigned int clear, unsigned int set); +#define H1940_LATCH_UDA_POWER H1940_LATCH_GPIO(8) +#define H1940_LATCH_AUDIO_POWER H1940_LATCH_GPIO(9) +#define H1940_LATCH_SM803_ENABLE H1940_LATCH_GPIO(10) +#define H1940_LATCH_LCD_P4 H1940_LATCH_GPIO(11) +#define H1940_LATCH_SD_POWER H1940_LATCH_GPIO(12) +#define H1940_LATCH_BLUETOOTH_POWER H1940_LATCH_GPIO(13) +#define H1940_LATCH_LED_GREEN H1940_LATCH_GPIO(14) +#define H1940_LATCH_LED_FLASH H1940_LATCH_GPIO(15) #endif /* __ASM_ARCH_H1940_LATCH_H */ diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h index 08ab9dfb6ae..101aeea2231 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h @@ -118,6 +118,8 @@ #define S3C2443_SCLKCON_UARTCLK (1<<8) #define S3C2443_SCLKCON_USBHOST (1<<1) +#define S3C2443_PWRCFG_SLEEP (1<<15) + #include static inline unsigned int diff --git a/arch/arm/mach-s3c2410/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h index 54297eb0bf5..7a311e8dddb 100644 --- a/arch/arm/mach-s3c2410/include/mach/vmalloc.h +++ b/arch/arm/mach-s3c2410/include/mach/vmalloc.h @@ -15,6 +15,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H -#define VMALLOC_END 0xE0000000UL +#define VMALLOC_END 0xF6000000UL #endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 98c5c9e81ee..d7ada8c7e41 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -24,6 +24,7 @@ #include #include #include +#include #include