]> bbs.cooldavid.org Git - net-next-2.6.git/blobdiff - drivers/net/bnx2x.h
bnx2x: White spaces
[net-next-2.6.git] / drivers / net / bnx2x.h
index 602ab86b6392ba46342bfa61ff4b930688e5a7a4..bdfe084b8abeefb19a1b2851d0ce0c1b899abb90 100644 (file)
@@ -1,6 +1,6 @@
 /* bnx2x.h: Broadcom Everest network driver.
  *
- * Copyright (c) 2007-2009 Broadcom Corporation
+ * Copyright (c) 2007-2010 Broadcom Corporation
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -44,7 +44,6 @@
 /* error/debug prints */
 
 #define DRV_MODULE_NAME                "bnx2x"
-#define PFX DRV_MODULE_NAME    ": "
 
 /* for messages that are currently off */
 #define BNX2X_MSG_OFF                  0
 #define DP_LEVEL                       KERN_NOTICE     /* was: KERN_DEBUG */
 
 /* regular debug print */
-#define DP(__mask, __fmt, __args...) do { \
-       if (bp->msglevel & (__mask)) \
-               printk(DP_LEVEL "[%s:%d(%s)]" __fmt, __func__, __LINE__, \
-                       bp->dev ? (bp->dev->name) : "?", ##__args); \
-       } while (0)
+#define DP(__mask, __fmt, __args...)                           \
+do {                                                           \
+       if (bp->msg_enable & (__mask))                          \
+               printk(DP_LEVEL "[%s:%d(%s)]" __fmt,            \
+                      __func__, __LINE__,                      \
+                      bp->dev ? (bp->dev->name) : "?",         \
+                      ##__args);                               \
+} while (0)
 
 /* errors debug print */
-#define BNX2X_DBG_ERR(__fmt, __args...) do { \
-       if (bp->msglevel & NETIF_MSG_PROBE) \
-               printk(KERN_ERR "[%s:%d(%s)]" __fmt, __func__, __LINE__, \
-                       bp->dev ? (bp->dev->name) : "?", ##__args); \
-       } while (0)
+#define BNX2X_DBG_ERR(__fmt, __args...)                                \
+do {                                                           \
+       if (netif_msg_probe(bp))                                \
+               pr_err("[%s:%d(%s)]" __fmt,                     \
+                      __func__, __LINE__,                      \
+                      bp->dev ? (bp->dev->name) : "?",         \
+                      ##__args);                               \
+} while (0)
 
 /* for errors (never masked) */
-#define BNX2X_ERR(__fmt, __args...) do { \
-       printk(KERN_ERR "[%s:%d(%s)]" __fmt, __func__, __LINE__, \
-               bp->dev ? (bp->dev->name) : "?", ##__args); \
+#define BNX2X_ERR(__fmt, __args...)                            \
+do {                                                           \
+       pr_err("[%s:%d(%s)]" __fmt,                             \
+              __func__, __LINE__,                              \
+              bp->dev ? (bp->dev->name) : "?",                 \
+              ##__args);                                       \
        } while (0)
 
-/* before we have a dev->name use dev_info() */
-#define BNX2X_DEV_INFO(__fmt, __args...) do { \
-       if (bp->msglevel & NETIF_MSG_PROBE) \
-               dev_info(&bp->pdev->dev, __fmt, ##__args); \
+#define BNX2X_ERROR(__fmt, __args...) do { \
+       pr_err("[%s:%d]" __fmt, __func__, __LINE__, ##__args); \
        } while (0)
 
 
+/* before we have a dev->name use dev_info() */
+#define BNX2X_DEV_INFO(__fmt, __args...)                        \
+do {                                                            \
+       if (netif_msg_probe(bp))                                 \
+               dev_info(&bp->pdev->dev, __fmt, ##__args);       \
+} while (0)
+
+
 #ifdef BNX2X_STOP_ON_ERROR
 #define bnx2x_panic() do { \
                bp->panic = 1; \
                                 offset, len32); \
        } while (0)
 
-#define VIRT_WR_DMAE_LEN(bp, data, addr, len32) \
+#define VIRT_WR_DMAE_LEN(bp, data, addr, len32, le32_swap) \
        do { \
                memcpy(GUNZIP_BUF(bp), data, (len32) * 4); \
                bnx2x_write_big_buf_wb(bp, addr, len32); \
 #define SHMEM2_RD(bp, field)           REG_RD(bp, SHMEM2_ADDR(bp, field))
 #define SHMEM2_WR(bp, field, val)      REG_WR(bp, SHMEM2_ADDR(bp, field), val)
 
+#define MF_CFG_RD(bp, field)           SHMEM_RD(bp, mf_cfg.field)
+#define MF_CFG_WR(bp, field, val)      SHMEM_WR(bp, mf_cfg.field, val)
+
 #define EMAC_RD(bp, reg)               REG_RD(bp, emac_base + reg)
 #define EMAC_WR(bp, reg, val)          REG_WR(bp, emac_base + reg, val)
 
+#define AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR \
+       AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR
+
 
 /* fast path */
 
 struct sw_rx_bd {
        struct sk_buff  *skb;
-       DECLARE_PCI_UNMAP_ADDR(mapping)
+       DEFINE_DMA_UNMAP_ADDR(mapping);
 };
 
 struct sw_tx_bd {
@@ -167,7 +187,7 @@ struct sw_tx_bd {
 
 struct sw_rx_page {
        struct page     *page;
-       DECLARE_PCI_UNMAP_ADDR(mapping)
+       DEFINE_DMA_UNMAP_ADDR(mapping);
 };
 
 union db_prod {
@@ -809,6 +829,12 @@ struct attn_route {
        u32     sig[4];
 };
 
+typedef enum {
+       BNX2X_RECOVERY_DONE,
+       BNX2X_RECOVERY_INIT,
+       BNX2X_RECOVERY_WAIT,
+} bnx2x_recovery_state_t;
+
 struct bnx2x {
        /* Fields used in the tx and intr/napi performance paths
         * are grouped together in the beginning of the structure
@@ -826,6 +852,9 @@ struct bnx2x {
        struct pci_dev          *pdev;
 
        atomic_t                intr_sem;
+
+       bnx2x_recovery_state_t  recovery_state;
+       int                     is_leader;
 #ifdef BCM_CNIC
        struct msix_entry       msix_table[MAX_CONTEXT+2];
 #else
@@ -882,7 +911,7 @@ struct bnx2x {
        /* End of fields used in the performance code paths */
 
        int                     panic;
-       int                     msglevel;
+       int                     msg_enable;
 
        u32                     flags;
 #define PCIX_FLAG                      1
@@ -915,8 +944,7 @@ struct bnx2x {
        int                     mrrs;
 
        struct delayed_work     sp_task;
-       struct work_struct      reset_task;
-
+       struct delayed_work     reset_task;
        struct timer_list       timer;
        int                     current_interval;
 
@@ -952,6 +980,8 @@ struct bnx2x {
        u16                     rx_quick_cons_trip;
        u16                     rx_ticks_int;
        u16                     rx_ticks;
+/* Maximal coalescing timeout in us */
+#define BNX2X_MAX_COALESCE_TOUT                (0xf0*12)
 
        u32                     lin_cnt;
 
@@ -1066,6 +1096,7 @@ struct bnx2x {
 #define INIT_CSEM_INT_TABLE_DATA(bp)   (bp->csem_int_table_data)
 #define INIT_CSEM_PRAM_DATA(bp)                (bp->csem_pram_data)
 
+       char                    fw_ver[32];
        const struct firmware   *firmware;
 };
 
@@ -1116,6 +1147,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
 #define LOAD_DIAG                      2
 #define UNLOAD_NORMAL                  0
 #define UNLOAD_CLOSE                   1
+#define UNLOAD_RECOVERY                 2
 
 
 /* DMAE command defines */
@@ -1143,7 +1175,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
 #define DMAE_CMD_E1HVN_SHIFT           DMAE_COMMAND_E1HVN_SHIFT
 
 #define DMAE_LEN32_RD_MAX              0x80
-#define DMAE_LEN32_WR_MAX              0x400
+#define DMAE_LEN32_WR_MAX(bp)          (CHIP_IS_E1(bp) ? 0x400 : 0x2000)
 
 #define DMAE_COMP_VAL                  0xe0d0d0ae
 
@@ -1285,6 +1317,10 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
                                 AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR | \
                                 AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR)
 
+#define HW_PRTY_ASSERT_SET_3 (AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | \
+               AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | \
+               AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY | \
+               AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY)
 
 #define MULTI_FLAGS(bp) \
                (TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY | \
@@ -1324,6 +1360,9 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
 #define PXP2_REG_PXP2_INT_STS          PXP2_REG_PXP2_INT_STS_0
 #endif
 
+#define BNX2X_VPD_LEN                  128
+#define VENDOR_ID_LEN                  4
+
 /* MISC_REG_RESET_REG - this is here for the hsi to work don't touch */
 
 #endif /* bnx2x.h */