bnx2x: White spaces

[net-next-2.6.git] / drivers / net / bnx2x.h

diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index 3c48a7a683086fecf1b5b3eba52e0de89af7d016..bdfe084b8abeefb19a1b2851d0ce0c1b899abb90 100644 (file)
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -83,7 +83,12 @@ do {                                                         \
               __func__, __LINE__,                              \
               bp->dev ? (bp->dev->name) : "?",                 \
               ##__args);                                       \
-} while (0)
+       } while (0)
+
+#define BNX2X_ERROR(__fmt, __args...) do { \
+       pr_err("[%s:%d]" __fmt, __func__, __LINE__, ##__args); \
+       } while (0)
+
 
 /* before we have a dev->name use dev_info() */
 #define BNX2X_DEV_INFO(__fmt, __args...)                        \
@@ -155,15 +160,21 @@ do {                                                               \
 #define SHMEM2_RD(bp, field)           REG_RD(bp, SHMEM2_ADDR(bp, field))
 #define SHMEM2_WR(bp, field, val)      REG_WR(bp, SHMEM2_ADDR(bp, field), val)
 
+#define MF_CFG_RD(bp, field)           SHMEM_RD(bp, mf_cfg.field)
+#define MF_CFG_WR(bp, field, val)      SHMEM_WR(bp, mf_cfg.field, val)
+
 #define EMAC_RD(bp, reg)               REG_RD(bp, emac_base + reg)
 #define EMAC_WR(bp, reg, val)          REG_WR(bp, emac_base + reg, val)
 
+#define AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR \
+       AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR
+
 
 /* fast path */
 
 struct sw_rx_bd {
        struct sk_buff  *skb;
-       DECLARE_PCI_UNMAP_ADDR(mapping)
+       DEFINE_DMA_UNMAP_ADDR(mapping);
 };
 
 struct sw_tx_bd {
@@ -176,7 +187,7 @@ struct sw_tx_bd {
 
 struct sw_rx_page {
        struct page     *page;
-       DECLARE_PCI_UNMAP_ADDR(mapping)
+       DEFINE_DMA_UNMAP_ADDR(mapping);
 };
 
 union db_prod {
@@ -818,6 +829,12 @@ struct attn_route {
        u32     sig[4];
 };
 
+typedef enum {
+       BNX2X_RECOVERY_DONE,
+       BNX2X_RECOVERY_INIT,
+       BNX2X_RECOVERY_WAIT,
+} bnx2x_recovery_state_t;
+
 struct bnx2x {
        /* Fields used in the tx and intr/napi performance paths
         * are grouped together in the beginning of the structure
@@ -835,6 +852,9 @@ struct bnx2x {
        struct pci_dev          *pdev;
 
        atomic_t                intr_sem;
+
+       bnx2x_recovery_state_t  recovery_state;
+       int                     is_leader;
 #ifdef BCM_CNIC
        struct msix_entry       msix_table[MAX_CONTEXT+2];
 #else
@@ -924,8 +944,7 @@ struct bnx2x {
        int                     mrrs;
 
        struct delayed_work     sp_task;
-       struct work_struct      reset_task;
-
+       struct delayed_work     reset_task;
        struct timer_list       timer;
        int                     current_interval;
 
@@ -961,6 +980,8 @@ struct bnx2x {
        u16                     rx_quick_cons_trip;
        u16                     rx_ticks_int;
        u16                     rx_ticks;
+/* Maximal coalescing timeout in us */
+#define BNX2X_MAX_COALESCE_TOUT                (0xf0*12)
 
        u32                     lin_cnt;
 
@@ -1075,6 +1096,7 @@ struct bnx2x {
 #define INIT_CSEM_INT_TABLE_DATA(bp)   (bp->csem_int_table_data)
 #define INIT_CSEM_PRAM_DATA(bp)                (bp->csem_pram_data)
 
+       char                    fw_ver[32];
        const struct firmware   *firmware;
 };
 
@@ -1125,6 +1147,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
 #define LOAD_DIAG                      2
 #define UNLOAD_NORMAL                  0
 #define UNLOAD_CLOSE                   1
+#define UNLOAD_RECOVERY                 2
 
 
 /* DMAE command defines */
@@ -1152,7 +1175,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
 #define DMAE_CMD_E1HVN_SHIFT           DMAE_COMMAND_E1HVN_SHIFT
 
 #define DMAE_LEN32_RD_MAX              0x80
-#define DMAE_LEN32_WR_MAX              0x400
+#define DMAE_LEN32_WR_MAX(bp)          (CHIP_IS_E1(bp) ? 0x400 : 0x2000)
 
 #define DMAE_COMP_VAL                  0xe0d0d0ae
 
@@ -1294,6 +1317,10 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
                                 AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR | \
                                 AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR)
 
+#define HW_PRTY_ASSERT_SET_3 (AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | \
+               AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | \
+               AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY | \
+               AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY)
 
 #define MULTI_FLAGS(bp) \
                (TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY | \
@@ -1333,6 +1360,9 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
 #define PXP2_REG_PXP2_INT_STS          PXP2_REG_PXP2_INT_STS_0
 #endif
 
+#define BNX2X_VPD_LEN                  128
+#define VENDOR_ID_LEN                  4
+
 /* MISC_REG_RESET_REG - this is here for the hsi to work don't touch */
 
 #endif /* bnx2x.h */