drm/radeon/kms: avoid corner case issue with unmappable vram V2

[net-next-2.6.git] / drivers / gpu / drm / radeon / radeon.h

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 2f94dc66c1836f4bf5d6814bb51b5730a13945ad..9ff38c99a6ea0e568f2567c0a7ad34b06e60e512 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -178,6 +178,9 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev);
 void radeon_atombios_get_power_modes(struct radeon_device *rdev);
 void radeon_atom_set_voltage(struct radeon_device *rdev, u16 level);
 void rs690_pm_info(struct radeon_device *rdev);
+extern u32 rv6xx_get_temp(struct radeon_device *rdev);
+extern u32 rv770_get_temp(struct radeon_device *rdev);
+extern u32 evergreen_get_temp(struct radeon_device *rdev);
 
 /*
  * Fences.
@@ -232,7 +235,7 @@ struct radeon_surface_reg {
  */
 struct radeon_mman {
        struct ttm_bo_global_ref        bo_global_ref;
-       struct ttm_global_reference     mem_global_ref;
+       struct drm_global_reference     mem_global_ref;
        struct ttm_bo_device            bdev;
        bool                            mem_global_referenced;
        bool                            initialized;
@@ -341,6 +344,7 @@ struct radeon_mc {
         * about vram size near mc fb location */
        u64                     mc_vram_size;
        u64                     visible_vram_size;
+       u64                     active_vram_size;
        u64                     gtt_size;
        u64                     gtt_start;
        u64                     gtt_end;
@@ -671,6 +675,13 @@ struct radeon_pm_profile {
        int dpms_on_cm_idx;
 };
 
+enum radeon_int_thermal_type {
+       THERMAL_TYPE_NONE,
+       THERMAL_TYPE_RV6XX,
+       THERMAL_TYPE_RV770,
+       THERMAL_TYPE_EVERGREEN,
+};
+
 struct radeon_voltage {
        enum radeon_voltage_type type;
        /* gpio voltage */
@@ -766,6 +777,9 @@ struct radeon_pm {
        enum radeon_pm_profile_type profile;
        int                     profile_index;
        struct radeon_pm_profile profiles[PM_PROFILE_MAX];
+       /* internal thermal controller on rv6xx+ */
+       enum radeon_int_thermal_type int_thermal_type;
+       struct device           *int_hwmon_dev;
 };
 
 
@@ -902,6 +916,7 @@ struct r600_asic {
        unsigned                tiling_nbanks;
        unsigned                tiling_npipes;
        unsigned                tiling_group_size;
+       unsigned                tile_config;
        struct r100_gpu_lockup  lockup;
 };
 
@@ -926,6 +941,7 @@ struct rv770_asic {
        unsigned                tiling_nbanks;
        unsigned                tiling_npipes;
        unsigned                tiling_group_size;
+       unsigned                tile_config;
        struct r100_gpu_lockup  lockup;
 };
 
@@ -951,6 +967,7 @@ struct evergreen_asic {
        unsigned tiling_nbanks;
        unsigned tiling_npipes;
        unsigned tiling_group_size;
+       unsigned tile_config;
 };
 
 union radeon_asic_config {
@@ -997,6 +1014,11 @@ int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
                                struct drm_file *filp);
 
+/* VRAM scratch page for HDP bug */
+struct r700_vram_scratch {
+       struct radeon_bo                *robj;
+       volatile uint32_t               *ptr;
+};
 
 /*
  * Core structure, functions and helpers.
@@ -1033,6 +1055,9 @@ struct radeon_device {
        uint32_t                        pcie_reg_mask;
        radeon_rreg_t                   pciep_rreg;
        radeon_wreg_t                   pciep_wreg;
+       /* io port */
+       void __iomem                    *rio_mem;
+       resource_size_t                 rio_mem_size;
        struct radeon_clock             clock;
        struct radeon_mc                mc;
        struct radeon_gart              gart;
@@ -1060,6 +1085,7 @@ struct radeon_device {
        const struct firmware *pfp_fw;  /* r6/700 PFP firmware */
        const struct firmware *rlc_fw;  /* r6/700 RLC firmware */
        struct r600_blit r600_blit;
+       struct r700_vram_scratch vram_scratch;
        int msi_enabled; /* msi enabled */
        struct r600_ih ih; /* r6/700 interrupt ring */
        struct workqueue_struct *wq;
@@ -1069,6 +1095,7 @@ struct radeon_device {
        struct mutex vram_mutex;
 
        /* audio stuff */
+       bool                    audio_enabled;
        struct timer_list       audio_timer;
        int                     audio_channels;
        int                     audio_rate;
@@ -1078,6 +1105,10 @@ struct radeon_device {
 
        bool powered_down;
        struct notifier_block acpi_nb;
+       /* only one userspace can use Hyperz features at a time */
+       struct drm_file *hyperz_filp;
+       /* i2c buses */
+       struct radeon_i2c_chan *i2c_bus[RADEON_MAX_I2C_BUS];
 };
 
 int radeon_device_init(struct radeon_device *rdev,
@@ -1114,6 +1145,26 @@ static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32
        }
 }
 
+static inline u32 r100_io_rreg(struct radeon_device *rdev, u32 reg)
+{
+       if (reg < rdev->rio_mem_size)
+               return ioread32(rdev->rio_mem + reg);
+       else {
+               iowrite32(reg, rdev->rio_mem + RADEON_MM_INDEX);
+               return ioread32(rdev->rio_mem + RADEON_MM_DATA);
+       }
+}
+
+static inline void r100_io_wreg(struct radeon_device *rdev, u32 reg, u32 v)
+{
+       if (reg < rdev->rio_mem_size)
+               iowrite32(v, rdev->rio_mem + reg);
+       else {
+               iowrite32(reg, rdev->rio_mem + RADEON_MM_INDEX);
+               iowrite32(v, rdev->rio_mem + RADEON_MM_DATA);
+       }
+}
+
 /*
  * Cast helper
  */
@@ -1152,6 +1203,8 @@ static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32
                WREG32_PLL(reg, tmp_);                          \
        } while (0)
 #define DREG32_SYS(sqf, rdev, reg) seq_printf((sqf), #reg " : 0x%08X\n", r100_mm_rreg((rdev), (reg)))
+#define RREG32_IO(reg) r100_io_rreg(rdev, (reg))
+#define WREG32_IO(reg, v) r100_io_wreg(rdev, (reg), (v))
 
 /*
  * Indirect registers accessor
@@ -1287,8 +1340,6 @@ extern bool radeon_card_posted(struct radeon_device *rdev);
 extern void radeon_update_bandwidth_info(struct radeon_device *rdev);
 extern void radeon_update_display_priority(struct radeon_device *rdev);
 extern bool radeon_boot_test_post_card(struct radeon_device *rdev);
-extern int radeon_clocks_init(struct radeon_device *rdev);
-extern void radeon_clocks_fini(struct radeon_device *rdev);
 extern void radeon_scratch_init(struct radeon_device *rdev);
 extern void radeon_surface_init(struct radeon_device *rdev);
 extern int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data);
@@ -1415,6 +1466,13 @@ extern void r700_cp_fini(struct radeon_device *rdev);
 extern void evergreen_disable_interrupt_state(struct radeon_device *rdev);
 extern int evergreen_irq_set(struct radeon_device *rdev);
 
+/* radeon_acpi.c */ 
+#if defined(CONFIG_ACPI) 
+extern int radeon_acpi_init(struct radeon_device *rdev); 
+#else 
+static inline int radeon_acpi_init(struct radeon_device *rdev) { return 0; } 
+#endif 
+
 /* evergreen */
 struct evergreen_mc_save {
        u32 vga_control[6];