drm/radeon/kms: Force HDP_NONSURF to maximum size

[net-next-2.6.git] / drivers / gpu / drm / radeon / r600.c

diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index d152ceca5d37709263c655e9f524ae679744b1db..b32064dad95d061134ec2a075e86124c2fed2d0f 100644 (file)
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -557,13 +557,18 @@ void r600_pm_init_profile(struct radeon_device *rdev)
 
 void r600_pm_misc(struct radeon_device *rdev)
 {
-       int requested_index = rdev->pm.requested_power_state_index;
-       struct radeon_power_state *ps = &rdev->pm.power_state[requested_index];
-       struct radeon_voltage *voltage = &ps->clock_info[0].voltage;
-
-       if ((voltage->type == VOLTAGE_SW) && voltage->voltage)
-               radeon_atom_set_voltage(rdev, voltage->voltage);
-
+       int req_ps_idx = rdev->pm.requested_power_state_index;
+       int req_cm_idx = rdev->pm.requested_clock_mode_index;
+       struct radeon_power_state *ps = &rdev->pm.power_state[req_ps_idx];
+       struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage;
+
+       if ((voltage->type == VOLTAGE_SW) && voltage->voltage) {
+               if (voltage->voltage != rdev->pm.current_vddc) {
+                       radeon_atom_set_voltage(rdev, voltage->voltage);
+                       rdev->pm.current_vddc = voltage->voltage;
+                       DRM_DEBUG("Setting: v: %d\n", voltage->voltage);
+               }
+       }
 }
 
 bool r600_gui_idle(struct radeon_device *rdev)
@@ -1092,7 +1097,7 @@ static void r600_mc_program(struct radeon_device *rdev)
        WREG32(MC_VM_FB_LOCATION, tmp);
        WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));
        WREG32(HDP_NONSURFACE_INFO, (2 << 7));
-       WREG32(HDP_NONSURFACE_SIZE, rdev->mc.mc_vram_size | 0x3FF);
+       WREG32(HDP_NONSURFACE_SIZE, 0x3FFFFFFF);
        if (rdev->flags & RADEON_IS_AGP) {
                WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 22);
                WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 22);