DMAENGINE: COH 901 318 configure channel direction

[net-next-2.6.git] / drivers / dma / coh901318.c

diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
index 544c46278f84658fd6cc149436b7a2eef25b6077..1656fdcdb6c244cd8ed73b8d212790f8ebde8c5c 100644 (file)
--- a/drivers/dma/coh901318.c
+++ b/drivers/dma/coh901318.c
@@ -928,6 +928,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
        struct coh901318_chan *cohc = to_coh901318_chan(chan);
        struct coh901318_lli *data;
        struct coh901318_desc *cohd;
+       const struct coh901318_params *params;
        struct scatterlist *sg;
        int len = 0;
        int size;
@@ -935,6 +936,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
        u32 ctrl_chained = cohc_chan_param(cohc)->ctrl_lli_chained;
        u32 ctrl = cohc_chan_param(cohc)->ctrl_lli;
        u32 ctrl_last = cohc_chan_param(cohc)->ctrl_lli_last;
+       u32 config;
        unsigned long flg;
        int ret;
 
@@ -952,10 +954,14 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
                /* Trigger interrupt after last lli */
                ctrl_last |= COH901318_CX_CTRL_TC_IRQ_ENABLE;
 
+       params = cohc_chan_param(cohc);
+       config = params->config;
+
        if (direction == DMA_TO_DEVICE) {
                u32 tx_flags = COH901318_CX_CTRL_PRDD_SOURCE |
                        COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE;
 
+               config |= COH901318_CX_CFG_RM_MEMORY_TO_PRIMARY;
                ctrl_chained |= tx_flags;
                ctrl_last |= tx_flags;
                ctrl |= tx_flags;
@@ -963,12 +969,15 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
                u32 rx_flags = COH901318_CX_CTRL_PRDD_DEST |
                        COH901318_CX_CTRL_DST_ADDR_INC_ENABLE;
 
+               config |= COH901318_CX_CFG_RM_PRIMARY_TO_MEMORY;
                ctrl_chained |= rx_flags;
                ctrl_last |= rx_flags;
                ctrl |= rx_flags;
        } else
                goto err_direction;
 
+       coh901318_set_conf(cohc, config);
+
        /* The dma only supports transmitting packages up to
         * MAX_DMA_PACKET_SIZE. Calculate to total number of
         * dma elemts required to send the entire sg list
@@ -1250,6 +1259,11 @@ static int __init coh901318_probe(struct platform_device *pdev)
        base->dma_memcpy.device_issue_pending = coh901318_issue_pending;
        base->dma_memcpy.device_terminate_all = coh901318_terminate_all;
        base->dma_memcpy.dev = &pdev->dev;
+       /*
+        * This controller can only access address at even 32bit boundaries,
+        * i.e. 2^2
+        */
+       base->dma_memcpy.copy_align = 2;
        err = dma_async_device_register(&base->dma_memcpy);
 
        if (err)