m68knommu: map ColdFire interrupts to correct masking bits

[net-next-2.6.git] / arch / m68knommu / platform / 5407 / config.c

diff --git a/arch/m68knommu/platform/5407/config.c b/arch/m68knommu/platform/5407/config.c
index cc80029a4a00d754025e37c7dd0ef3381b055d73..70ea789a400c7cfd0df53783b3dd61b539c05771 100644 (file)
--- a/arch/m68knommu/platform/5407/config.c
+++ b/arch/m68knommu/platform/5407/config.c
@@ -49,12 +49,11 @@ static void __init m5407_uart_init_line(int line, int irq)
        if (line == 0) {
                writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
                writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
-               mcf_clrimr(MCFINTC_UART0);
+               mcf_mapirq2imr(irq, MCFINTC_UART0);
        } else if (line == 1) {
                writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
                writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
-               mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
-               mcf_clrimr(MCFINTC_UART1);
+               mcf_mapirq2imr(irq, MCFINTC_UART1);
        }
 }
 
@@ -74,11 +73,13 @@ static void __init m5407_timers_init(void)
        /* Timer1 is always used as system timer */
        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
                MCF_MBAR + MCFSIM_TIMER1ICR);
+       mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
 
 #ifdef CONFIG_HIGHPROFILE
        /* Timer2 is to be used as a high speed profile timer  */
        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
                MCF_MBAR + MCFSIM_TIMER2ICR);
+       mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
 #endif
 }
 
@@ -99,13 +100,19 @@ void __init config_BSP(char *commandp, int size)
 {
        mach_reset = m5407_cpu_reset;
        m5407_timers_init();
+       m5407_uarts_init();
+
+       /* Only support the external interrupts on their primary level */
+       mcf_mapirq2imr(25, MCFINTC_EINT1);
+       mcf_mapirq2imr(27, MCFINTC_EINT3);
+       mcf_mapirq2imr(29, MCFINTC_EINT5);
+       mcf_mapirq2imr(31, MCFINTC_EINT7);
 }
 
 /***************************************************************************/
 
 static int __init init_BSP(void)
 {
-       m5407_uarts_init();
        platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
        return 0;
 }