2 * Universal Interface for Intel High Definition Audio Codec
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation; either version 2 of the License, or (at your option)
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59
18 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 #ifndef __SOUND_HDA_CODEC_H
22 #define __SOUND_HDA_CODEC_H
24 #include <sound/info.h>
25 #include <sound/control.h>
26 #include <sound/pcm.h>
27 #include <sound/hwdep.h>
29 #if defined(CONFIG_PM) || defined(CONFIG_SND_HDA_POWER_SAVE)
30 #define SND_HDA_NEEDS_RESUME /* resume control code is required */
36 #define AC_NODE_ROOT 0x00
39 * function group types
42 AC_GRP_AUDIO_FUNCTION = 0x01,
43 AC_GRP_MODEM_FUNCTION = 0x02,
50 AC_WID_AUD_OUT, /* Audio Out */
51 AC_WID_AUD_IN, /* Audio In */
52 AC_WID_AUD_MIX, /* Audio Mixer */
53 AC_WID_AUD_SEL, /* Audio Selector */
54 AC_WID_PIN, /* Pin Complex */
55 AC_WID_POWER, /* Power */
56 AC_WID_VOL_KNB, /* Volume Knob */
57 AC_WID_BEEP, /* Beep Generator */
58 AC_WID_VENDOR = 0x0f /* Vendor specific */
64 #define AC_VERB_GET_STREAM_FORMAT 0x0a00
65 #define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
66 #define AC_VERB_GET_PROC_COEF 0x0c00
67 #define AC_VERB_GET_COEF_INDEX 0x0d00
68 #define AC_VERB_PARAMETERS 0x0f00
69 #define AC_VERB_GET_CONNECT_SEL 0x0f01
70 #define AC_VERB_GET_CONNECT_LIST 0x0f02
71 #define AC_VERB_GET_PROC_STATE 0x0f03
72 #define AC_VERB_GET_SDI_SELECT 0x0f04
73 #define AC_VERB_GET_POWER_STATE 0x0f05
74 #define AC_VERB_GET_CONV 0x0f06
75 #define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
76 #define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
77 #define AC_VERB_GET_PIN_SENSE 0x0f09
78 #define AC_VERB_GET_BEEP_CONTROL 0x0f0a
79 #define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
80 #define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
81 #define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
82 #define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
84 #define AC_VERB_GET_GPIO_DATA 0x0f15
85 #define AC_VERB_GET_GPIO_MASK 0x0f16
86 #define AC_VERB_GET_GPIO_DIRECTION 0x0f17
87 #define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
88 #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
89 #define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
90 #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
92 #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
93 #define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
94 #define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
95 #define AC_VERB_GET_HDMI_ELDD 0x0f2f
96 #define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
97 #define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
98 #define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
99 #define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
100 #define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
105 #define AC_VERB_SET_STREAM_FORMAT 0x200
106 #define AC_VERB_SET_AMP_GAIN_MUTE 0x300
107 #define AC_VERB_SET_PROC_COEF 0x400
108 #define AC_VERB_SET_COEF_INDEX 0x500
109 #define AC_VERB_SET_CONNECT_SEL 0x701
110 #define AC_VERB_SET_PROC_STATE 0x703
111 #define AC_VERB_SET_SDI_SELECT 0x704
112 #define AC_VERB_SET_POWER_STATE 0x705
113 #define AC_VERB_SET_CHANNEL_STREAMID 0x706
114 #define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
115 #define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
116 #define AC_VERB_SET_PIN_SENSE 0x709
117 #define AC_VERB_SET_BEEP_CONTROL 0x70a
118 #define AC_VERB_SET_EAPD_BTLENABLE 0x70c
119 #define AC_VERB_SET_DIGI_CONVERT_1 0x70d
120 #define AC_VERB_SET_DIGI_CONVERT_2 0x70e
121 #define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
122 #define AC_VERB_SET_GPIO_DATA 0x715
123 #define AC_VERB_SET_GPIO_MASK 0x716
124 #define AC_VERB_SET_GPIO_DIRECTION 0x717
125 #define AC_VERB_SET_GPIO_WAKE_MASK 0x718
126 #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
127 #define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
128 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
129 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
130 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
131 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
132 #define AC_VERB_SET_EAPD 0x788
133 #define AC_VERB_SET_CODEC_RESET 0x7ff
134 #define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
135 #define AC_VERB_SET_HDMI_DIP_INDEX 0x730
136 #define AC_VERB_SET_HDMI_DIP_DATA 0x731
137 #define AC_VERB_SET_HDMI_DIP_XMIT 0x732
138 #define AC_VERB_SET_HDMI_CP_CTRL 0x733
139 #define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
144 #define AC_PAR_VENDOR_ID 0x00
145 #define AC_PAR_SUBSYSTEM_ID 0x01
146 #define AC_PAR_REV_ID 0x02
147 #define AC_PAR_NODE_COUNT 0x04
148 #define AC_PAR_FUNCTION_TYPE 0x05
149 #define AC_PAR_AUDIO_FG_CAP 0x08
150 #define AC_PAR_AUDIO_WIDGET_CAP 0x09
151 #define AC_PAR_PCM 0x0a
152 #define AC_PAR_STREAM 0x0b
153 #define AC_PAR_PIN_CAP 0x0c
154 #define AC_PAR_AMP_IN_CAP 0x0d
155 #define AC_PAR_CONNLIST_LEN 0x0e
156 #define AC_PAR_POWER_STATE 0x0f
157 #define AC_PAR_PROC_CAP 0x10
158 #define AC_PAR_GPIO_CAP 0x11
159 #define AC_PAR_AMP_OUT_CAP 0x12
160 #define AC_PAR_VOL_KNB_CAP 0x13
161 #define AC_PAR_HDMI_LPCM_CAP 0x20
164 * AC_VERB_PARAMETERS results (32bit)
167 /* Function Group Type */
168 #define AC_FGT_TYPE (0xff<<0)
169 #define AC_FGT_TYPE_SHIFT 0
170 #define AC_FGT_UNSOL_CAP (1<<8)
172 /* Audio Function Group Capabilities */
173 #define AC_AFG_OUT_DELAY (0xf<<0)
174 #define AC_AFG_IN_DELAY (0xf<<8)
175 #define AC_AFG_BEEP_GEN (1<<16)
177 /* Audio Widget Capabilities */
178 #define AC_WCAP_STEREO (1<<0) /* stereo I/O */
179 #define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
180 #define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
181 #define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
182 #define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
183 #define AC_WCAP_STRIPE (1<<5) /* stripe */
184 #define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
185 #define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
186 #define AC_WCAP_CONN_LIST (1<<8) /* connection list */
187 #define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
188 #define AC_WCAP_POWER (1<<10) /* power control */
189 #define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
190 #define AC_WCAP_CP_CAPS (1<<12) /* content protection */
191 #define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
192 #define AC_WCAP_DELAY (0xf<<16)
193 #define AC_WCAP_DELAY_SHIFT 16
194 #define AC_WCAP_TYPE (0xf<<20)
195 #define AC_WCAP_TYPE_SHIFT 20
197 /* supported PCM rates and bits */
198 #define AC_SUPPCM_RATES (0xfff << 0)
199 #define AC_SUPPCM_BITS_8 (1<<16)
200 #define AC_SUPPCM_BITS_16 (1<<17)
201 #define AC_SUPPCM_BITS_20 (1<<18)
202 #define AC_SUPPCM_BITS_24 (1<<19)
203 #define AC_SUPPCM_BITS_32 (1<<20)
205 /* supported PCM stream format */
206 #define AC_SUPFMT_PCM (1<<0)
207 #define AC_SUPFMT_FLOAT32 (1<<1)
208 #define AC_SUPFMT_AC3 (1<<2)
211 #define AC_GPIO_IO_COUNT (0xff<<0)
212 #define AC_GPIO_O_COUNT (0xff<<8)
213 #define AC_GPIO_O_COUNT_SHIFT 8
214 #define AC_GPIO_I_COUNT (0xff<<16)
215 #define AC_GPIO_I_COUNT_SHIFT 16
216 #define AC_GPIO_UNSOLICITED (1<<30)
217 #define AC_GPIO_WAKE (1<<31)
219 /* Converter stream, channel */
220 #define AC_CONV_CHANNEL (0xf<<0)
221 #define AC_CONV_STREAM (0xf<<4)
222 #define AC_CONV_STREAM_SHIFT 4
224 /* Input converter SDI select */
225 #define AC_SDI_SELECT (0xf<<0)
227 /* Unsolicited response control */
228 #define AC_UNSOL_TAG (0x3f<<0)
229 #define AC_UNSOL_ENABLED (1<<7)
230 #define AC_USRSP_EN AC_UNSOL_ENABLED
232 /* Unsolicited responses */
233 #define AC_UNSOL_RES_TAG (0x3f<<26)
234 #define AC_UNSOL_RES_TAG_SHIFT 26
235 #define AC_UNSOL_RES_SUBTAG (0x1f<<21)
236 #define AC_UNSOL_RES_SUBTAG_SHIFT 21
237 #define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
238 #define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
239 #define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
240 #define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
242 /* Pin widget capabilies */
243 #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
244 #define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
245 #define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
246 #define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
247 #define AC_PINCAP_OUT (1<<4) /* output capable */
248 #define AC_PINCAP_IN (1<<5) /* input capable */
249 #define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
250 /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
251 * but is marked reserved in the Intel HDA specification.
253 #define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
254 /* Note: The same bit as LR_SWAP is newly defined as HDMI capability
255 * in HD-audio specification
257 #define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
258 #define AC_PINCAP_VREF (0x37<<8)
259 #define AC_PINCAP_VREF_SHIFT 8
260 #define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
261 /* Vref status (used in pin cap) */
262 #define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
263 #define AC_PINCAP_VREF_50 (1<<1) /* 50% */
264 #define AC_PINCAP_VREF_GRD (1<<2) /* ground */
265 #define AC_PINCAP_VREF_80 (1<<4) /* 80% */
266 #define AC_PINCAP_VREF_100 (1<<5) /* 100% */
268 /* Amplifier capabilities */
269 #define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
270 #define AC_AMPCAP_OFFSET_SHIFT 0
271 #define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
272 #define AC_AMPCAP_NUM_STEPS_SHIFT 8
273 #define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
276 #define AC_AMPCAP_STEP_SIZE_SHIFT 16
277 #define AC_AMPCAP_MUTE (1<<31) /* mute capable */
278 #define AC_AMPCAP_MUTE_SHIFT 31
280 /* Connection list */
281 #define AC_CLIST_LENGTH (0x7f<<0)
282 #define AC_CLIST_LONG (1<<7)
284 /* Supported power status */
285 #define AC_PWRST_D0SUP (1<<0)
286 #define AC_PWRST_D1SUP (1<<1)
287 #define AC_PWRST_D2SUP (1<<2)
288 #define AC_PWRST_D3SUP (1<<3)
289 #define AC_PWRST_D3COLDSUP (1<<4)
290 #define AC_PWRST_S3D3COLDSUP (1<<29)
291 #define AC_PWRST_CLKSTOP (1<<30)
292 #define AC_PWRST_EPSS (1U<<31)
294 /* Power state values */
295 #define AC_PWRST_SETTING (0xf<<0)
296 #define AC_PWRST_ACTUAL (0xf<<4)
297 #define AC_PWRST_ACTUAL_SHIFT 4
298 #define AC_PWRST_D0 0x00
299 #define AC_PWRST_D1 0x01
300 #define AC_PWRST_D2 0x02
301 #define AC_PWRST_D3 0x03
303 /* Processing capabilies */
304 #define AC_PCAP_BENIGN (1<<0)
305 #define AC_PCAP_NUM_COEF (0xff<<8)
306 #define AC_PCAP_NUM_COEF_SHIFT 8
308 /* Volume knobs capabilities */
309 #define AC_KNBCAP_NUM_STEPS (0x7f<<0)
310 #define AC_KNBCAP_DELTA (1<<7)
312 /* HDMI LPCM capabilities */
313 #define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
314 #define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
315 #define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
316 #define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
317 #define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
318 #define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
319 #define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
320 #define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
321 #define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
322 #define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
323 #define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
324 #define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
325 #define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
326 #define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
333 #define AC_AMP_MUTE (1<<7)
334 #define AC_AMP_GAIN (0x7f)
335 #define AC_AMP_GET_INDEX (0xf<<0)
337 #define AC_AMP_GET_LEFT (1<<13)
338 #define AC_AMP_GET_RIGHT (0<<13)
339 #define AC_AMP_GET_OUTPUT (1<<15)
340 #define AC_AMP_GET_INPUT (0<<15)
342 #define AC_AMP_SET_INDEX (0xf<<8)
343 #define AC_AMP_SET_INDEX_SHIFT 8
344 #define AC_AMP_SET_RIGHT (1<<12)
345 #define AC_AMP_SET_LEFT (1<<13)
346 #define AC_AMP_SET_INPUT (1<<14)
347 #define AC_AMP_SET_OUTPUT (1<<15)
350 #define AC_DIG1_ENABLE (1<<0)
351 #define AC_DIG1_V (1<<1)
352 #define AC_DIG1_VCFG (1<<2)
353 #define AC_DIG1_EMPHASIS (1<<3)
354 #define AC_DIG1_COPYRIGHT (1<<4)
355 #define AC_DIG1_NONAUDIO (1<<5)
356 #define AC_DIG1_PROFESSIONAL (1<<6)
357 #define AC_DIG1_LEVEL (1<<7)
360 #define AC_DIG2_CC (0x7f<<0)
362 /* Pin widget control - 8bit */
363 #define AC_PINCTL_VREFEN (0x7<<0)
364 #define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
365 #define AC_PINCTL_VREF_50 1 /* 50% */
366 #define AC_PINCTL_VREF_GRD 2 /* ground */
367 #define AC_PINCTL_VREF_80 4 /* 80% */
368 #define AC_PINCTL_VREF_100 5 /* 100% */
369 #define AC_PINCTL_IN_EN (1<<5)
370 #define AC_PINCTL_OUT_EN (1<<6)
371 #define AC_PINCTL_HP_EN (1<<7)
373 /* Pin sense - 32bit */
374 #define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
375 #define AC_PINSENSE_PRESENCE (1<<31)
376 #define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
378 /* EAPD/BTL enable - 32bit */
379 #define AC_EAPDBTL_BALANCED (1<<0)
380 #define AC_EAPDBTL_EAPD (1<<1)
381 #define AC_EAPDBTL_LR_SWAP (1<<2)
384 #define AC_ELDD_ELD_VALID (1<<31)
385 #define AC_ELDD_ELD_DATA 0xff
388 #define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
389 #define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
392 #define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
393 #define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
395 /* HDMI DIP xmit (transmit) control */
396 #define AC_DIPXMIT_MASK (0x3<<6)
397 #define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
398 #define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
399 #define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
401 /* HDMI content protection (CP) control */
402 #define AC_CPCTRL_CES (1<<9) /* current encryption state */
403 #define AC_CPCTRL_READY (1<<8) /* ready bit */
404 #define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
405 #define AC_CPCTRL_STATE (3<<0) /* current CP request state */
407 /* Converter channel <-> HDMI slot mapping */
408 #define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
409 #define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
411 /* configuration default - 32bit */
412 #define AC_DEFCFG_SEQUENCE (0xf<<0)
413 #define AC_DEFCFG_DEF_ASSOC (0xf<<4)
414 #define AC_DEFCFG_ASSOC_SHIFT 4
415 #define AC_DEFCFG_MISC (0xf<<8)
416 #define AC_DEFCFG_MISC_SHIFT 8
417 #define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
418 #define AC_DEFCFG_COLOR (0xf<<12)
419 #define AC_DEFCFG_COLOR_SHIFT 12
420 #define AC_DEFCFG_CONN_TYPE (0xf<<16)
421 #define AC_DEFCFG_CONN_TYPE_SHIFT 16
422 #define AC_DEFCFG_DEVICE (0xf<<20)
423 #define AC_DEFCFG_DEVICE_SHIFT 20
424 #define AC_DEFCFG_LOCATION (0x3f<<24)
425 #define AC_DEFCFG_LOCATION_SHIFT 24
426 #define AC_DEFCFG_PORT_CONN (0x3<<30)
427 #define AC_DEFCFG_PORT_CONN_SHIFT 30
429 /* device device types (0x0-0xf) */
436 AC_JACK_DIG_OTHER_OUT,
437 AC_JACK_MODEM_LINE_SIDE,
438 AC_JACK_MODEM_HAND_SIDE,
444 AC_JACK_DIG_OTHER_IN,
448 /* jack connection types (0x0-0xf) */
450 AC_JACK_CONN_UNKNOWN,
455 AC_JACK_CONN_OPTICAL,
456 AC_JACK_CONN_OTHER_DIGITAL,
457 AC_JACK_CONN_OTHER_ANALOG,
462 AC_JACK_CONN_OTHER = 0xf,
465 /* jack colors (0x0-0xf) */
467 AC_JACK_COLOR_UNKNOWN,
473 AC_JACK_COLOR_ORANGE,
474 AC_JACK_COLOR_YELLOW,
475 AC_JACK_COLOR_PURPLE,
477 AC_JACK_COLOR_WHITE = 0xe,
481 /* Jack location (0x0-0x3f) */
494 AC_JACK_LOC_EXTERNAL = 0x00,
495 AC_JACK_LOC_INTERNAL = 0x10,
496 AC_JACK_LOC_SEPARATE = 0x20,
497 AC_JACK_LOC_OTHER = 0x30,
500 /* external on primary chasis */
501 AC_JACK_LOC_REAR_PANEL = 0x07,
502 AC_JACK_LOC_DRIVE_BAY,
504 AC_JACK_LOC_RISER = 0x17,
508 AC_JACK_LOC_MOBILE_IN = 0x37,
509 AC_JACK_LOC_MOBILE_OUT,
512 /* Port connectivity (0-3) */
514 AC_JACK_PORT_COMPLEX,
520 /* max. connections to a widget */
521 #define HDA_MAX_CONNECTIONS 32
523 /* max. codec address */
524 #define HDA_MAX_CODEC_ADDRESS 0x0f
531 unsigned int alloced;
532 unsigned int elem_size;
533 unsigned int alloc_align;
537 void *snd_array_new(struct snd_array *array);
538 void snd_array_free(struct snd_array *array);
539 static inline void snd_array_init(struct snd_array *array, unsigned int size,
542 array->elem_size = size;
543 array->alloc_align = align;
546 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
548 return array->list + idx * array->elem_size;
551 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
553 return (unsigned long)(ptr - array->list) / array->elem_size;
564 struct hda_pcm_stream;
565 struct hda_bus_unsolicited;
568 typedef u16 hda_nid_t;
572 /* send a single command */
573 int (*command)(struct hda_bus *bus, unsigned int cmd);
574 /* get a response from the last command */
575 unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
576 /* free the private data */
577 void (*private_free)(struct hda_bus *);
578 /* attach a PCM stream */
579 int (*attach_pcm)(struct hda_bus *bus, struct hda_codec *codec,
580 struct hda_pcm *pcm);
581 /* reset bus for retry verb */
582 void (*bus_reset)(struct hda_bus *bus);
583 #ifdef CONFIG_SND_HDA_POWER_SAVE
584 /* notify power-up/down from codec to controller */
585 void (*pm_notify)(struct hda_bus *bus);
589 /* template to pass to the bus constructor */
590 struct hda_bus_template {
593 const char *modelname;
595 struct hda_bus_ops ops;
601 * each controller needs to creata a hda_bus to assign the accessor.
602 * A hda_bus contains several codecs in the list codec_list.
605 struct snd_card *card;
607 /* copied from template */
610 const char *modelname;
612 struct hda_bus_ops ops;
614 /* codec linked list */
615 struct list_head codec_list;
616 /* link caddr -> codec */
617 struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
619 struct mutex cmd_mutex;
621 /* unsolicited event queue */
622 struct hda_bus_unsolicited *unsol;
624 struct workqueue_struct *workq; /* common workqueue for codecs */
627 DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
630 unsigned int needs_damn_long_delay :1;
631 unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
632 unsigned int sync_write:1; /* sync after verb write */
633 /* status for codec/controller */
634 unsigned int shutdown :1; /* being unloaded */
635 unsigned int rirb_error:1; /* error in codec communication */
636 unsigned int response_reset:1; /* controller was reset */
637 unsigned int in_reset:1; /* during reset operation */
643 * Known codecs have the patch to build and set up the controls/PCMs
644 * better than the generic parser.
646 struct hda_codec_preset {
650 unsigned int subs_mask;
654 int (*patch)(struct hda_codec *codec);
657 struct hda_codec_preset_list {
658 const struct hda_codec_preset *preset;
659 struct module *owner;
660 struct list_head list;
664 int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset);
665 int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset);
667 /* ops set by the preset patch */
668 struct hda_codec_ops {
669 int (*build_controls)(struct hda_codec *codec);
670 int (*build_pcms)(struct hda_codec *codec);
671 int (*init)(struct hda_codec *codec);
672 void (*free)(struct hda_codec *codec);
673 void (*unsol_event)(struct hda_codec *codec, unsigned int res);
674 #ifdef SND_HDA_NEEDS_RESUME
675 int (*suspend)(struct hda_codec *codec, pm_message_t state);
676 int (*resume)(struct hda_codec *codec);
678 #ifdef CONFIG_SND_HDA_POWER_SAVE
679 int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
681 void (*reboot_notify)(struct hda_codec *codec);
684 /* record for amp information cache */
685 struct hda_cache_head {
686 u32 key; /* hash key */
687 u16 val; /* assigned value */
688 u16 next; /* next link; -1 = terminal */
691 struct hda_amp_info {
692 struct hda_cache_head head;
693 u32 amp_caps; /* amp capabilities */
694 u16 vol[2]; /* current volume & mute */
697 struct hda_cache_rec {
698 u16 hash[64]; /* hash table for index */
699 struct snd_array buf; /* record entries */
704 int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
705 struct snd_pcm_substream *substream);
706 int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
707 struct snd_pcm_substream *substream);
708 int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
709 unsigned int stream_tag, unsigned int format,
710 struct snd_pcm_substream *substream);
711 int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
712 struct snd_pcm_substream *substream);
715 /* PCM information for each substream */
716 struct hda_pcm_stream {
717 unsigned int substreams; /* number of substreams, 0 = not exist*/
718 unsigned int channels_min; /* min. number of channels */
719 unsigned int channels_max; /* max. number of channels */
720 hda_nid_t nid; /* default NID to query rates/formats/bps, or set up */
721 u32 rates; /* supported rates */
722 u64 formats; /* supported formats (SNDRV_PCM_FMTBIT_) */
723 unsigned int maxbps; /* supported max. bit per sample */
724 struct hda_pcm_ops ops;
736 /* for PCM creation */
739 struct hda_pcm_stream stream[2];
740 unsigned int pcm_type; /* HDA_PCM_TYPE_XXX */
741 int device; /* device number to assign */
742 struct snd_pcm *pcm; /* assigned PCM instance */
745 /* codec information */
748 unsigned int addr; /* codec addr*/
749 struct list_head list; /* list point */
751 hda_nid_t afg; /* AFG node id */
752 hda_nid_t mfg; /* MFG node id */
760 /* detected preset */
761 const struct hda_codec_preset *preset;
762 struct module *owner;
763 const char *vendor_name; /* codec vendor name */
764 const char *chip_name; /* codec chip name */
765 const char *modelname; /* model name for preset */
768 struct hda_codec_ops patch_ops;
770 /* PCM to create, set by patch_ops.build_pcms callback */
771 unsigned int num_pcms;
772 struct hda_pcm *pcm_info;
774 /* codec specific info */
778 struct hda_beep *beep;
779 unsigned int beep_mode;
781 /* widget capabilities cache */
782 unsigned int num_nodes;
786 struct snd_array mixers; /* list of assigned mixer elements */
788 struct hda_cache_rec amp_cache; /* cache for amp access */
789 struct hda_cache_rec cmd_cache; /* cache for other commands */
791 struct mutex spdif_mutex;
792 struct mutex control_mutex;
793 unsigned int spdif_status; /* IEC958 status bits */
794 unsigned short spdif_ctls; /* SPDIF control bits */
795 unsigned int spdif_in_enable; /* SPDIF input enable? */
796 hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
797 struct snd_array init_pins; /* initial (BIOS) pin configurations */
798 struct snd_array driver_pins; /* pin configs set by codec parser */
800 #ifdef CONFIG_SND_HDA_HWDEP
801 struct snd_hwdep *hwdep; /* assigned hwdep device */
802 struct snd_array init_verbs; /* additional init verbs */
803 struct snd_array hints; /* additional hints */
804 struct snd_array user_pins; /* default pin configs to override */
808 unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
810 * (e.g. Realtek codecs)
812 unsigned int pin_amp_workaround:1; /* pin out-amp takes index
813 * (e.g. Conexant codecs)
815 #ifdef CONFIG_SND_HDA_POWER_SAVE
816 unsigned int power_on :1; /* current (global) power-state */
817 unsigned int power_transition :1; /* power-state in transition */
818 int power_count; /* current (global) power refcount */
819 struct delayed_work power_work; /* delayed task for powerdown */
820 unsigned long power_on_acct;
821 unsigned long power_off_acct;
822 unsigned long power_jiffies;
825 /* codec-specific additional proc output */
826 void (*proc_widget_hook)(struct snd_info_buffer *buffer,
827 struct hda_codec *codec, hda_nid_t nid);
832 HDA_INPUT, HDA_OUTPUT
839 int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
840 struct hda_bus **busp);
841 int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
842 struct hda_codec **codecp);
843 int snd_hda_codec_configure(struct hda_codec *codec);
846 * low level functions
848 unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
850 unsigned int verb, unsigned int parm);
851 int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int direct,
852 unsigned int verb, unsigned int parm);
853 #define snd_hda_param_read(codec, nid, param) \
854 snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
855 int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
856 hda_nid_t *start_id);
857 int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
858 hda_nid_t *conn_list, int max_conns);
866 void snd_hda_sequence_write(struct hda_codec *codec,
867 const struct hda_verb *seq);
869 /* unsolicited event */
870 int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
873 #ifdef SND_HDA_NEEDS_RESUME
874 int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
875 int direct, unsigned int verb, unsigned int parm);
876 void snd_hda_sequence_write_cache(struct hda_codec *codec,
877 const struct hda_verb *seq);
878 void snd_hda_codec_resume_cache(struct hda_codec *codec);
880 #define snd_hda_codec_write_cache snd_hda_codec_write
881 #define snd_hda_sequence_write_cache snd_hda_sequence_write
884 /* the struct for codec->pin_configs */
890 unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
891 int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
893 int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
894 hda_nid_t nid, unsigned int cfg); /* for hwdep */
899 int snd_hda_build_controls(struct hda_bus *bus);
900 int snd_hda_codec_build_controls(struct hda_codec *codec);
905 int snd_hda_build_pcms(struct hda_bus *bus);
906 int snd_hda_codec_build_pcms(struct hda_codec *codec);
907 void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
909 int channel_id, int format);
910 void snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid);
911 unsigned int snd_hda_calc_stream_format(unsigned int rate,
912 unsigned int channels,
914 unsigned int maxbps);
915 int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
916 unsigned int format);
921 void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
922 void snd_hda_bus_reboot_notify(struct hda_bus *bus);
928 int snd_hda_suspend(struct hda_bus *bus);
929 int snd_hda_resume(struct hda_bus *bus);
933 * get widget information
935 const char *snd_hda_get_jack_connectivity(u32 cfg);
936 const char *snd_hda_get_jack_type(u32 cfg);
937 const char *snd_hda_get_jack_location(u32 cfg);
942 #ifdef CONFIG_SND_HDA_POWER_SAVE
943 void snd_hda_power_up(struct hda_codec *codec);
944 void snd_hda_power_down(struct hda_codec *codec);
945 #define snd_hda_codec_needs_resume(codec) codec->power_count
946 void snd_hda_update_power_acct(struct hda_codec *codec);
948 static inline void snd_hda_power_up(struct hda_codec *codec) {}
949 static inline void snd_hda_power_down(struct hda_codec *codec) {}
950 #define snd_hda_codec_needs_resume(codec) 1
953 #ifdef CONFIG_SND_HDA_PATCH_LOADER
957 int snd_hda_load_patch(struct hda_bus *bus, const char *patch);
961 * Codec modularization
964 /* Export symbols only for communication with codec drivers;
965 * When built in kernel, all HD-audio drivers are supposed to be statically
966 * linked to the kernel. Thus, the symbols don't have to (or shouldn't) be
967 * exported unless it's built as a module.
970 #define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
972 #define EXPORT_SYMBOL_HDA(sym)
975 #endif /* __SOUND_HDA_CODEC_H */