2 tm6000-regs.h - driver for TM5600/TM6000/TM6010 USB video capture devices
4 Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation version 2
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 * Define TV Master TM5600/TM6000/TM6010 Request codes
23 #define REQ_00_SET_IR_VALUE 0
24 #define REQ_01_SET_WAKEUP_IRCODE 1
25 #define REQ_02_GET_IR_CODE 2
26 #define REQ_03_SET_GET_MCU_PIN 3
27 #define REQ_04_EN_DISABLE_MCU_INT 4
28 #define REQ_05_SET_GET_USBREG 5
29 /* Write: RegNum, Value, 0 */
30 /* Read : RegNum, Value, 1, RegStatus */
31 #define REQ_06_SET_GET_USBREG_BIT 6
32 #define REQ_07_SET_GET_AVREG 7
33 /* Write: RegNum, Value, 0 */
34 /* Read : RegNum, Value, 1, RegStatus */
35 #define REQ_08_SET_GET_AVREG_BIT 8
36 #define REQ_09_SET_GET_TUNER_FQ 9
37 #define REQ_10_SET_TUNER_SYSTEM 10
38 #define REQ_11_SET_EEPROM_ADDR 11
39 #define REQ_12_SET_GET_EEPROMBYTE 12
40 #define REQ_13_GET_EEPROM_SEQREAD 13
41 #define REQ_14_SET_GET_I2C_WR2_RDN 14
42 #define REQ_15_SET_GET_I2CBYTE 15
43 /* Write: Subaddr, Slave Addr, value, 0 */
44 /* Read : Subaddr, Slave Addr, value, 1 */
45 #define REQ_16_SET_GET_I2C_WR1_RDN 16
46 /* Subaddr, Slave Addr, 0, length */
47 #define REQ_17_SET_GET_I2CFP 17
48 /* Write: Slave Addr, register, value */
49 /* Read : Slave Addr, register, 2, data */
50 #define REQ_20_DATA_TRANSFER 20
51 #define REQ_30_I2C_WRITE 30
52 #define REQ_31_I2C_READ 31
53 #define REQ_35_AFTEK_TUNER_READ 35
54 #define REQ_40_GET_VERSION 40
55 #define REQ_50_SET_START 50
56 #define REQ_51_SET_STOP 51
57 #define REQ_52_TRANSMIT_DATA 52
58 #define REQ_53_SPI_INITIAL 53
59 #define REQ_54_SPI_SETSTART 54
60 #define REQ_55_SPI_INOUTDATA 55
61 #define REQ_56_SPI_SETSTOP 56
64 * Define TV Master TM5600/TM6000/TM6010 GPIO lines
67 #define TM6000_GPIO_CLK 0x101
68 #define TM6000_GPIO_DATA 0x100
70 #define TM6000_GPIO_1 0x102
71 #define TM6000_GPIO_2 0x103
72 #define TM6000_GPIO_3 0x104
73 #define TM6000_GPIO_4 0x300
74 #define TM6000_GPIO_5 0x301
75 #define TM6000_GPIO_6 0x304
76 #define TM6000_GPIO_7 0x305
78 /* tm6010 defines GPIO with different values */
79 #define TM6010_GPIO_0 0x0102
80 #define TM6010_GPIO_1 0x0103
81 #define TM6010_GPIO_2 0x0104
82 #define TM6010_GPIO_3 0x0105
83 #define TM6010_GPIO_4 0x0106
84 #define TM6010_GPIO_5 0x0107
85 #define TM6010_GPIO_6 0x0300
86 #define TM6010_GPIO_7 0x0301
87 #define TM6010_GPIO_9 0x0305
89 * Define TV Master TM5600/TM6000/TM6010 URB message codes and length
93 TM6000_URB_MSG_VIDEO=1,
100 /* Define TM6000/TM6010 Video decoder registers */
101 #define TM6010_REQ07_R00_VIDEO_CONTROL0 0x00
102 #define TM6010_REQ07_R01_VIDEO_CONTROL1 0x01
103 #define TM6010_REQ07_R02_VIDEO_CONTROL2 0x02
104 #define TM6010_REQ07_R03_YC_SEP_CONTROL 0x03
105 #define TM6010_REQ07_R04_LUMA_HAGC_CONTROL 0x04
106 #define TM6010_REQ07_R05_NOISE_THRESHOLD 0x05
107 #define TM6010_REQ07_R06_AGC_GATE_THRESHOLD 0x06
108 #define TM6010_REQ07_R07_OUTPUT_CONTROL 0x07
109 #define TM6010_REQ07_R08_LUMA_CONTRAST_ADJ 0x08
110 #define TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ 0x09
111 #define TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ 0x0A
112 #define TM6010_REQ07_R0B_CHROMA_HUE_PHASE_ADJ 0x0B
113 #define TM6010_REQ07_R0C_CHROMA_AGC_CONTROL 0x0C
114 #define TM6010_REQ07_R0D_CHROMA_KILL_LEVEL 0x0D
115 #define TM6010_REQ07_R0F_CHROMA_AUTO_POSITION 0x0F
116 #define TM6010_REQ07_R10_AGC_PEAK_NOMINAL 0x10
117 #define TM6010_REQ07_R11_AGC_PEAK_CONTROL 0x11
118 #define TM6010_REQ07_R12_AGC_GATE_STARTH 0x12
119 #define TM6010_REQ07_R13_AGC_GATE_STARTL 0x13
120 #define TM6010_REQ07_R14_AGC_GATE_WIDTH 0x14
121 #define TM6010_REQ07_R15_AGC_BP_DELAY 0x15
122 #define TM6010_REQ07_R16_LOCK_COUNT 0x16
123 #define TM6010_REQ07_R17_HLOOP_MAXSTATE 0x17
124 #define TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3 0x18
125 #define TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2 0x19
126 #define TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1 0x1A
127 #define TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0 0x1B
128 #define TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3 0x1C
129 #define TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2 0x1D
130 #define TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1 0x1E
131 #define TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0 0x1F
132 #define TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME 0x20
133 #define TM6010_REQ07_R21_HSYNC_PHASE_OFFSET 0x21
134 #define TM6010_REQ07_R22_HSYNC_PLL_START_TIME 0x22
135 #define TM6010_REQ07_R23_HSYNC_PLL_END_TIME 0x23
136 #define TM6010_REQ07_R24_HSYNC_TIP_START_TIME 0x24
137 #define TM6010_REQ07_R25_HSYNC_TIP_END_TIME 0x25
138 #define TM6010_REQ07_R26_HSYNC_RISING_EDGE_START 0x26
139 #define TM6010_REQ07_R27_HSYNC_RISING_EDGE_END 0x27
140 #define TM6010_REQ07_R28_BACKPORCH_START 0x28
141 #define TM6010_REQ07_R29_BACKPORCH_END 0x29
142 #define TM6010_REQ07_R2A_HSYNC_FILTER_START 0x2A
143 #define TM6010_REQ07_R2B_HSYNC_FILTER_END 0x2B
144 #define TM6010_REQ07_R2C_CHROMA_BURST_START 0x2C
145 #define TM6010_REQ07_R2D_CHROMA_BURST_END 0x2D
146 #define TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART 0x2E
147 #define TM6010_REQ07_R2F_ACTIVE_VIDEO_HWIDTH 0x2F
148 #define TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART 0x30
149 #define TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT 0x31
150 #define TM6010_REQ07_R32_VSYNC_HLOCK_MIN 0x32
151 #define TM6010_REQ07_R33_VSYNC_HLOCK_MAX 0x33
152 #define TM6010_REQ07_R34_VSYNC_AGC_MIN 0x34
153 #define TM6010_REQ07_R35_VSYNC_AGC_MAX 0x35
154 #define TM6010_REQ07_R36_VSYNC_VBI_MIN 0x36
155 #define TM6010_REQ07_R37_VSYNC_VBI_MAX 0x37
156 #define TM6010_REQ07_R38_VSYNC_THRESHOLD 0x38
157 #define TM6010_REQ07_R39_VSYNC_TIME_CONSTANT 0x39
158 #define TM6010_REQ07_R3A_STATUS1 0x3A
159 #define TM6010_REQ07_R3B_STATUS2 0x3B
160 #define TM6010_REQ07_R3C_STATUS3 0x3C
161 #define TM6010_REQ07_R3F_RESET 0x3F
162 #define TM6010_REQ07_R40_TELETEXT_VBI_CODE0 0x40
163 #define TM6010_REQ07_R41_TELETEXT_VBI_CODE1 0x41
164 #define TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL 0x42
165 #define TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7 0x43
166 #define TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8 0x44
167 #define TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9 0x45
168 #define TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10 0x46
169 #define TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11 0x47
170 #define TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12 0x48
171 #define TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13 0x49
172 #define TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14 0x4A
173 #define TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15 0x4B
174 #define TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16 0x4C
175 #define TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17 0x4D
176 #define TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18 0x4E
177 #define TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19 0x4F
178 #define TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20 0x50
179 #define TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21 0x51
180 #define TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22 0x52
181 #define TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23 0x53
182 #define TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES 0x54
183 #define TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN 0x55
184 #define TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN 0x56
185 #define TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN 0x57
186 #define TM6010_REQ07_R58_VBI_CAPTION_DTO1 0x58
187 #define TM6010_REQ07_R59_VBI_CAPTION_DTO0 0x59
188 #define TM6010_REQ07_R5A_VBI_TELETEXT_DTO1 0x5A
189 #define TM6010_REQ07_R5B_VBI_TELETEXT_DTO0 0x5B
190 #define TM6010_REQ07_R5C_VBI_WSS625_DTO1 0x5C
191 #define TM6010_REQ07_R5D_VBI_WSS625_DTO0 0x5D
192 #define TM6010_REQ07_R5E_VBI_CAPTION_FRAME_START 0x5E
193 #define TM6010_REQ07_R5F_VBI_WSS625_FRAME_START 0x5F
194 #define TM6010_REQ07_R60_TELETEXT_FRAME_START 0x60
195 #define TM6010_REQ07_R61_VBI_CCDATA1 0x61
196 #define TM6010_REQ07_R62_VBI_CCDATA2 0x62
197 #define TM6010_REQ07_R63_VBI_WSS625_DATA1 0x63
198 #define TM6010_REQ07_R64_VBI_WSS625_DATA2 0x64
199 #define TM6010_REQ07_R65_VBI_DATA_STATUS 0x65
200 #define TM6010_REQ07_R66_VBI_CAPTION_START 0x66
201 #define TM6010_REQ07_R67_VBI_WSS625_START 0x67
202 #define TM6010_REQ07_R68_VBI_TELETEXT_START 0x68
203 #define TM6010_REQ07_R70_HSYNC_DTO_INC_STATUS3 0x70
204 #define TM6010_REQ07_R71_HSYNC_DTO_INC_STATUS2 0x71
205 #define TM6010_REQ07_R72_HSYNC_DTO_INC_STATUS1 0x72
206 #define TM6010_REQ07_R73_HSYNC_DTO_INC_STATUS0 0x73
207 #define TM6010_REQ07_R74_CHROMA_DTO_INC_STATUS3 0x74
208 #define TM6010_REQ07_R75_CHROMA_DTO_INC_STATUS2 0x75
209 #define TM6010_REQ07_R76_CHROMA_DTO_INC_STATUS1 0x76
210 #define TM6010_REQ07_R77_CHROMA_DTO_INC_STATUS0 0x77
211 #define TM6010_REQ07_R78_AGC_AGAIN_STATUS 0x78
212 #define TM6010_REQ07_R79_AGC_DGAIN_STATUS 0x79
213 #define TM6010_REQ07_R7A_CHROMA_MAG_STATUS 0x7A
214 #define TM6010_REQ07_R7B_CHROMA_GAIN_STATUS1 0x7B
215 #define TM6010_REQ07_R7C_CHROMA_GAIN_STATUS0 0x7C
216 #define TM6010_REQ07_R7D_CORDIC_FREQ_STATUS 0x7D
217 #define TM6010_REQ07_R7F_STATUS_NOISE 0x7F
218 #define TM6010_REQ07_R80_COMB_FILTER_TRESHOLD 0x80
219 #define TM6010_REQ07_R82_COMB_FILTER_CONFIG 0x82
220 #define TM6010_REQ07_R83_CHROMA_LOCK_CONFIG 0x83
221 #define TM6010_REQ07_R84_NOISE_NTSC_C 0x84
222 #define TM6010_REQ07_R85_NOISE_PAL_C 0x85
223 #define TM6010_REQ07_R86_NOISE_PHASE_C 0x86
224 #define TM6010_REQ07_R87_NOISE_PHASE_Y 0x87
225 #define TM6010_REQ07_R8A_CHROMA_LOOPFILTER_STATE 0x8A
226 #define TM6010_REQ07_R8B_CHROMA_HRESAMPLER 0x8B
227 #define TM6010_REQ07_R8D_CPUMP_DELAY_ADJ 0x8D
228 #define TM6010_REQ07_R8E_CPUMP_ADJ 0x8E
229 #define TM6010_REQ07_R8F_CPUMP_DELAY 0x8F
231 /* Define TM6000/TM6010 Miscellaneous registers */
232 #define TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE 0xC0
233 #define TM6010_REQ07_RC1_TRESHOLD 0xC1
234 #define TM6010_REQ07_RC2_HSYNC_WIDTH 0xC2
235 #define TM6010_REQ07_RC3_HSTART1 0xC3
236 #define TM6010_REQ07_RC4_HSTART0 0xC4
237 #define TM6010_REQ07_RC5_HEND1 0xC5
238 #define TM6010_REQ07_RC6_HEND0 0xC6
239 #define TM6010_REQ07_RC7_VSTART1 0xC7
240 #define TM6010_REQ07_RC8_VSTART0 0xC8
241 #define TM6010_REQ07_RC9_VEND1 0xC9
242 #define TM6010_REQ07_RCA_VEND0 0xCA
243 #define TM6010_REQ07_RCB_DELAY 0xCB
244 #define TM6010_REQ07_RCC_ACTIVE_VIDEO_IF 0xCC
245 #define TM6010_REQ07_RD0_USB_PERIPHERY_CONTROL 0xD0
246 #define TM6010_REQ07_RD1_ADDR_FOR_REQ1 0xD1
247 #define TM6010_REQ07_RD2_ADDR_FOR_REQ2 0xD2
248 #define TM6010_REQ07_RD3_ADDR_FOR_REQ3 0xD3
249 #define TM6010_REQ07_RD4_ADDR_FOR_REQ4 0xD4
250 #define TM6010_REQ07_RD5_POWERSAVE 0xD5
251 #define TM6010_REQ07_RD6_ENDP_REQ1_REQ2 0xD6
252 #define TM6010_REQ07_RD7_ENDP_REQ3_REQ4 0xD7
253 #define TM6010_REQ07_RD8_IR 0xD8
254 #define TM6010_REQ07_RD8_IR_BSIZE 0xD9
255 #define TM6010_REQ07_RD8_IR_WAKEUP_SEL 0xDA
256 #define TM6010_REQ07_RD8_IR_WAKEUP_ADD 0xDB
257 #define TM6010_REQ07_RD8_IR_LEADER1 0xDC
258 #define TM6010_REQ07_RD8_IR_LEADER0 0xDD
259 #define TM6010_REQ07_RD8_IR_PULSE_CNT1 0xDE
260 #define TM6010_REQ07_RD8_IR_PULSE_CNT0 0xDF
261 #define TM6010_REQ07_RE0_DVIDEO_SOURCE 0xE0
262 #define TM6010_REQ07_RE0_DVIDEO_SOURCE_IF 0xE1
263 #define TM6010_REQ07_RE2_OUT_SEL2 0xE2
264 #define TM6010_REQ07_RE3_OUT_SEL1 0xE3
265 #define TM6010_REQ07_RE4_OUT_SEL0 0xE4
266 #define TM6010_REQ07_RE5_REMOTE_WAKEUP 0xE5
267 #define TM6010_REQ07_RE7_PUB_GPIO 0xE7
268 #define TM6010_REQ07_RE8_TYPESEL_MOS_I2S 0xE8
269 #define TM6010_REQ07_RE9_TYPESEL_MOS_TS 0xE9
270 #define TM6010_REQ07_REA_TYPESEL_MOS_CCIR 0xEA
271 #define TM6010_REQ07_RF0_BIST_CRC_RESULT0 0xF0
272 #define TM6010_REQ07_RF1_BIST_CRC_RESULT1 0xF1
273 #define TM6010_REQ07_RF2_BIST_CRC_RESULT2 0xF2
274 #define TM6010_REQ07_RF3_BIST_CRC_RESULT3 0xF3
275 #define TM6010_REQ07_RF4_BIST_ERR_VST2 0xF4
276 #define TM6010_REQ07_RF5_BIST_ERR_VST1 0xF5
277 #define TM6010_REQ07_RF6_BIST_ERR_VST0 0xF6
278 #define TM6010_REQ07_RF7_BIST 0xF7
279 #define TM6010_REQ07_RFE_POWER_DOWN 0xFE
280 #define TM6010_REQ07_RFF_SOFT_RESET 0xFF
282 /* Define TM6000/TM6010 USB registers */
283 #define TM6000_U_MAIN_CTRL 0x00
284 #define TM6000_U_DEVADDR 0x01
285 #define TM6000_U_TEST 0x02
286 #define TM6000_U_SOFN0 0x04
287 #define TM6000_U_SOFN1 0x05
288 #define TM6000_U_SOFTM0 0x06
289 #define TM6000_U_SOFTM1 0x07
290 #define TM6000_U_PHY_TEST 0x08
291 #define TM6000_U_VCTL 0x09
292 #define TM6000_U_VSTA 0x0A
293 #define TM6000_U_CX_CFG 0x0B
294 #define TM6000_U_ENDP0_REG0 0x0C
295 #define TM6000_U_GMASK 0x10
296 #define TM6000_U_IMASK0 0x11
297 #define TM6000_U_IMASK1 0x12
298 #define TM6000_U_IMASK2 0x13
299 #define TM6000_U_IMASK3 0x14
300 #define TM6000_U_IMASK4 0x15
301 #define TM6000_U_IMASK5 0x16
302 #define TM6000_U_IMASK6 0x17
303 #define TM6000_U_IMASK7 0x18
304 #define TM6000_U_ZEROP0 0x19
305 #define TM6000_U_ZEROP1 0x1A
306 #define TM6000_U_FIFO_EMP0 0x1C
307 #define TM6000_U_FIFO_EMP1 0x1D
308 #define TM6000_U_IRQ_GROUP 0x20
309 #define TM6000_U_IRQ_SOURCE0 0x21
310 #define TM6000_U_IRQ_SOURCE1 0x22
311 #define TM6000_U_IRQ_SOURCE2 0x23
312 #define TM6000_U_IRQ_SOURCE3 0x24
313 #define TM6000_U_IRQ_SOURCE4 0x25
314 #define TM6000_U_IRQ_SOURCE5 0x26
315 #define TM6000_U_IRQ_SOURCE6 0x27
316 #define TM6000_U_IRQ_SOURCE7 0x28
317 #define TM6000_U_SEQ_ERR0 0x29
318 #define TM6000_U_SEQ_ERR1 0x2A
319 #define TM6000_U_SEQ_ABORT0 0x2B
320 #define TM6000_U_SEQ_ABORT1 0x2C
321 #define TM6000_U_TX_ZERO0 0x2D
322 #define TM6000_U_TX_ZERO1 0x2E
323 #define TM6000_U_IDLE_CNT 0x2F
324 #define TM6000_U_FNO_P1 0x30
325 #define TM6000_U_FNO_P2 0x31
326 #define TM6000_U_FNO_P3 0x32
327 #define TM6000_U_FNO_P4 0x33
328 #define TM6000_U_FNO_P5 0x34
329 #define TM6000_U_FNO_P6 0x35
330 #define TM6000_U_FNO_P7 0x36
331 #define TM6000_U_FNO_P8 0x37
332 #define TM6000_U_FNO_P9 0x38
333 #define TM6000_U_FNO_P10 0x39
334 #define TM6000_U_FNO_P11 0x3A
335 #define TM6000_U_FNO_P12 0x3B
336 #define TM6000_U_FNO_P13 0x3C
337 #define TM6000_U_FNO_P14 0x3D
338 #define TM6000_U_FNO_P15 0x3E
339 #define TM6000_U_IN_MAXPS_LOW1 0x40
340 #define TM6000_U_IN_MAXPS_HIGH1 0x41
341 #define TM6000_U_IN_MAXPS_LOW2 0x42
342 #define TM6000_U_IN_MAXPS_HIGH2 0x43
343 #define TM6000_U_IN_MAXPS_LOW3 0x44
344 #define TM6000_U_IN_MAXPS_HIGH3 0x45
345 #define TM6000_U_IN_MAXPS_LOW4 0x46
346 #define TM6000_U_IN_MAXPS_HIGH4 0x47
347 #define TM6000_U_IN_MAXPS_LOW5 0x48
348 #define TM6000_U_IN_MAXPS_HIGH5 0x49
349 #define TM6000_U_IN_MAXPS_LOW6 0x4A
350 #define TM6000_U_IN_MAXPS_HIGH6 0x4B
351 #define TM6000_U_IN_MAXPS_LOW7 0x4C
352 #define TM6000_U_IN_MAXPS_HIGH7 0x4D
353 #define TM6000_U_IN_MAXPS_LOW8 0x4E
354 #define TM6000_U_IN_MAXPS_HIGH8 0x4F
355 #define TM6000_U_IN_MAXPS_LOW9 0x50
356 #define TM6000_U_IN_MAXPS_HIGH9 0x51
357 #define TM6000_U_IN_MAXPS_LOW10 0x52
358 #define TM6000_U_IN_MAXPS_HIGH10 0x53
359 #define TM6000_U_IN_MAXPS_LOW11 0x54
360 #define TM6000_U_IN_MAXPS_HIGH11 0x55
361 #define TM6000_U_IN_MAXPS_LOW12 0x56
362 #define TM6000_U_IN_MAXPS_HIGH12 0x57
363 #define TM6000_U_IN_MAXPS_LOW13 0x58
364 #define TM6000_U_IN_MAXPS_HIGH13 0x59
365 #define TM6000_U_IN_MAXPS_LOW14 0x5A
366 #define TM6000_U_IN_MAXPS_HIGH14 0x5B
367 #define TM6000_U_IN_MAXPS_LOW15 0x5C
368 #define TM6000_U_IN_MAXPS_HIGH15 0x5D
369 #define TM6000_U_OUT_MAXPS_LOW1 0x60
370 #define TM6000_U_OUT_MAXPS_HIGH1 0x61
371 #define TM6000_U_OUT_MAXPS_LOW2 0x62
372 #define TM6000_U_OUT_MAXPS_HIGH2 0x63
373 #define TM6000_U_OUT_MAXPS_LOW3 0x64
374 #define TM6000_U_OUT_MAXPS_HIGH3 0x65
375 #define TM6000_U_OUT_MAXPS_LOW4 0x66
376 #define TM6000_U_OUT_MAXPS_HIGH4 0x67
377 #define TM6000_U_OUT_MAXPS_LOW5 0x68
378 #define TM6000_U_OUT_MAXPS_HIGH5 0x69
379 #define TM6000_U_OUT_MAXPS_LOW6 0x6A
380 #define TM6000_U_OUT_MAXPS_HIGH6 0x6B
381 #define TM6000_U_OUT_MAXPS_LOW7 0x6C
382 #define TM6000_U_OUT_MAXPS_HIGH7 0x6D
383 #define TM6000_U_OUT_MAXPS_LOW8 0x6E
384 #define TM6000_U_OUT_MAXPS_HIGH8 0x6F
385 #define TM6000_U_OUT_MAXPS_LOW9 0x70
386 #define TM6000_U_OUT_MAXPS_HIGH9 0x71
387 #define TM6000_U_OUT_MAXPS_LOW10 0x72
388 #define TM6000_U_OUT_MAXPS_HIGH10 0x73
389 #define TM6000_U_OUT_MAXPS_LOW11 0x74
390 #define TM6000_U_OUT_MAXPS_HIGH11 0x75
391 #define TM6000_U_OUT_MAXPS_LOW12 0x76
392 #define TM6000_U_OUT_MAXPS_HIGH12 0x77
393 #define TM6000_U_OUT_MAXPS_LOW13 0x78
394 #define TM6000_U_OUT_MAXPS_HIGH13 0x79
395 #define TM6000_U_OUT_MAXPS_LOW14 0x7A
396 #define TM6000_U_OUT_MAXPS_HIGH14 0x7B
397 #define TM6000_U_OUT_MAXPS_LOW15 0x7C
398 #define TM6000_U_OUT_MAXPS_HIGH15 0x7D
399 #define TM6000_U_FIFO0 0x80
400 #define TM6000_U_FIFO1 0x81
401 #define TM6000_U_FIFO2 0x82
402 #define TM6000_U_FIFO3 0x83
403 #define TM6000_U_FIFO4 0x84
404 #define TM6000_U_FIFO5 0x85
405 #define TM6000_U_FIFO6 0x86
406 #define TM6000_U_FIFO7 0x87
407 #define TM6000_U_FIFO8 0x88
408 #define TM6000_U_FIFO9 0x89
409 #define TM6000_U_FIFO10 0x8A
410 #define TM6000_U_FIFO11 0x8B
411 #define TM6000_U_FIFO12 0x8C
412 #define TM6000_U_FIFO13 0x8D
413 #define TM6000_U_FIFO14 0x8E
414 #define TM6000_U_FIFO15 0x8F
415 #define TM6000_U_CFG_FIFO0 0x90
416 #define TM6000_U_CFG_FIFO1 0x91
417 #define TM6000_U_CFG_FIFO2 0x92
418 #define TM6000_U_CFG_FIFO3 0x93
419 #define TM6000_U_CFG_FIFO4 0x94
420 #define TM6000_U_CFG_FIFO5 0x95
421 #define TM6000_U_CFG_FIFO6 0x96
422 #define TM6000_U_CFG_FIFO7 0x97
423 #define TM6000_U_CFG_FIFO8 0x98
424 #define TM6000_U_CFG_FIFO9 0x99
425 #define TM6000_U_CFG_FIFO10 0x9A
426 #define TM6000_U_CFG_FIFO11 0x9B
427 #define TM6000_U_CFG_FIFO12 0x9C
428 #define TM6000_U_CFG_FIFO13 0x9D
429 #define TM6000_U_CFG_FIFO14 0x9E
430 #define TM6000_U_CFG_FIFO15 0x9F
431 #define TM6000_U_CTL_FIFO0 0xA0
432 #define TM6000_U_CTL_FIFO1 0xA1
433 #define TM6000_U_CTL_FIFO2 0xA2
434 #define TM6000_U_CTL_FIFO3 0xA3
435 #define TM6000_U_CTL_FIFO4 0xA4
436 #define TM6000_U_CTL_FIFO5 0xA5
437 #define TM6000_U_CTL_FIFO6 0xA6
438 #define TM6000_U_CTL_FIFO7 0xA7
439 #define TM6000_U_CTL_FIFO8 0xA8
440 #define TM6000_U_CTL_FIFO9 0xA9
441 #define TM6000_U_CTL_FIFO10 0xAA
442 #define TM6000_U_CTL_FIFO11 0xAB
443 #define TM6000_U_CTL_FIFO12 0xAC
444 #define TM6000_U_CTL_FIFO13 0xAD
445 #define TM6000_U_CTL_FIFO14 0xAE
446 #define TM6000_U_CTL_FIFO15 0xAF
447 #define TM6000_U_BC_LOW_FIFO0 0xB0
448 #define TM6000_U_BC_LOW_FIFO1 0xB1
449 #define TM6000_U_BC_LOW_FIFO2 0xB2
450 #define TM6000_U_BC_LOW_FIFO3 0xB3
451 #define TM6000_U_BC_LOW_FIFO4 0xB4
452 #define TM6000_U_BC_LOW_FIFO5 0xB5
453 #define TM6000_U_BC_LOW_FIFO6 0xB6
454 #define TM6000_U_BC_LOW_FIFO7 0xB7
455 #define TM6000_U_BC_LOW_FIFO8 0xB8
456 #define TM6000_U_BC_LOW_FIFO9 0xB9
457 #define TM6000_U_BC_LOW_FIFO10 0xBA
458 #define TM6000_U_BC_LOW_FIFO11 0xBB
459 #define TM6000_U_BC_LOW_FIFO12 0xBC
460 #define TM6000_U_BC_LOW_FIFO13 0xBD
461 #define TM6000_U_BC_LOW_FIFO14 0xBE
462 #define TM6000_U_BC_LOW_FIFO15 0xBF
463 #define TM6000_U_DATA_FIFO0 0xC0
464 #define TM6000_U_DATA_FIFO1 0xC4
465 #define TM6000_U_DATA_FIFO2 0xC8
466 #define TM6000_U_DATA_FIFO3 0xCC
467 #define TM6000_U_DATA_FIFO4 0xD0
468 #define TM6000_U_DATA_FIFO5 0xD4
469 #define TM6000_U_DATA_FIFO6 0xD8
470 #define TM6000_U_DATA_FIFO7 0xDC
471 #define TM6000_U_DATA_FIFO8 0xE0
472 #define TM6000_U_DATA_FIFO9 0xE4
473 #define TM6000_U_DATA_FIFO10 0xE8
474 #define TM6000_U_DATA_FIFO11 0xEC
475 #define TM6000_U_DATA_FIFO12 0xF0
476 #define TM6000_U_DATA_FIFO13 0xF4
477 #define TM6000_U_DATA_FIFO14 0xF8
478 #define TM6000_U_DATA_FIFO15 0xFC
480 /* Define TM6000/TM6010 Audio decoder registers */
481 #define TM6010_REQ08_R00_A_VERSION 0x00
482 #define TM6010_REQ08_R01_A_INIT 0x01
483 #define TM6010_REQ08_R02_A_FIX_GAIN_CTRL 0x02
484 #define TM6010_REQ08_R03_A_AUTO_GAIN_CTRL 0x03
485 #define TM6010_REQ08_R04_A_SIF_AMP_CTRL 0x04
486 #define TM6010_REQ08_R05_A_STANDARD_MOD 0x05
487 #define TM6010_REQ08_R06_A_SOUND_MOD 0x06
488 #define TM6010_REQ08_R07_A_LEFT_VOL 0x07
489 #define TM6010_REQ08_R08_A_RIGHT_VOL 0x08
490 #define TM6010_REQ08_R09_A_MAIN_VOL 0x09
491 #define TM6010_REQ08_R0A_A_I2S_MOD 0x0A
492 #define TM6010_REQ08_R0B_A_ASD_THRES1 0x0B
493 #define TM6010_REQ08_R0C_A_ASD_THRES2 0x0C
494 #define TM6010_REQ08_R0D_A_AMD_THRES 0x0D
495 #define TM6010_REQ08_R0E_A_MONO_THRES1 0x0E
496 #define TM6010_REQ08_R0F_A_MONO_THRES2 0x0F
497 #define TM6010_REQ08_R10_A_MUTE_THRES1 0x10
498 #define TM6010_REQ08_R11_A_MUTE_THRES2 0x11
499 #define TM6010_REQ08_R12_A_AGC_U 0x12
500 #define TM6010_REQ08_R13_A_AGC_ERR_T 0x13
501 #define TM6010_REQ08_R14_A_AGC_GAIN_INIT 0x14
502 #define TM6010_REQ08_R15_A_AGC_STEP_THR 0x15
503 #define TM6010_REQ08_R16_A_AGC_GAIN_MAX 0x16
504 #define TM6010_REQ08_R17_A_AGC_GAIN_MIN 0x17
505 #define TM6010_REQ08_R18_A_TR_CTRL 0x18
506 #define TM6010_REQ08_R19_A_FH_2FH_GAIN 0x19
507 #define TM6010_REQ08_R1A_A_NICAM_SER_MAX 0x1A
508 #define TM6010_REQ08_R1B_A_NICAM_SER_MIN 0x1B
509 #define TM6010_REQ08_R1E_A_GAIN_DEEMPH_OUT 0x1E
510 #define TM6010_REQ08_R1F_A_TEST_INTF_SEL 0x1F
511 #define TM6010_REQ08_R20_A_TEST_PIN_SEL 0x20
512 #define TM6010_REQ08_R21_A_AGC_ERR 0x21
513 #define TM6010_REQ08_R22_A_AGC_GAIN 0x22
514 #define TM6010_REQ08_R23_A_NICAM_INFO 0x23
515 #define TM6010_REQ08_R24_A_SER 0x24
516 #define TM6010_REQ08_R25_A_C1_AMP 0x25
517 #define TM6010_REQ08_R26_A_C2_AMP 0x26
518 #define TM6010_REQ08_R27_A_NOISE_AMP 0x27
519 #define TM6010_REQ08_R28_A_AUDIO_MODE_RES 0x28
521 /* Define TM6000/TM6010 Video ADC registers */
522 #define TM6010_REQ08_RE0_ADC_REF 0xE0
523 #define TM6010_REQ08_RE1_DAC_CLMP 0xE1
524 #define TM6010_REQ08_RE2_POWER_DOWN_CTRL1 0xE2
525 #define TM6010_REQ08_RE3_ADC_IN1_SEL 0xE3
526 #define TM6010_REQ08_RE4_ADC_IN2_SEL 0xE4
527 #define TM6010_REQ08_RE5_GAIN_PARAM 0xE5
528 #define TM6010_REQ08_RE6_POWER_DOWN_CTRL2 0xE6
529 #define TM6010_REQ08_RE7_REG_GAIN_Y 0xE7
530 #define TM6010_REQ08_RE8_REG_GAIN_C 0xE8
531 #define TM6010_REQ08_RE9_BIAS_CTRL 0xE9
532 #define TM6010_REQ08_REA_BUFF_DRV_CTRL 0xEA
533 #define TM6010_REQ08_REB_SIF_GAIN_CTRL 0xEB
534 #define TM6010_REQ08_REC_REVERSE_YC_CTRL 0xEC
535 #define TM6010_REQ08_RED_GAIN_SEL 0xED
537 /* Define TM6000/TM6010 Audio ADC registers */
538 #define TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG 0xF0
539 #define TM6010_REQ08_RF1_AADC_POWER_DOWN 0xF1
540 #define TM6010_REQ08_RF2_LEFT_CHANNEL_VOL 0xF2
541 #define TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL 0xF3