]> bbs.cooldavid.org Git - net-next-2.6.git/blob - drivers/staging/rt2860/common/rtmp_init.c
Merge branch 'irq-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[net-next-2.6.git] / drivers / staging / rt2860 / common / rtmp_init.c
1 /*
2  *************************************************************************
3  * Ralink Tech Inc.
4  * 5F., No.36, Taiyuan St., Jhubei City,
5  * Hsinchu County 302,
6  * Taiwan, R.O.C.
7  *
8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
9  *
10  * This program is free software; you can redistribute it and/or modify  *
11  * it under the terms of the GNU General Public License as published by  *
12  * the Free Software Foundation; either version 2 of the License, or     *
13  * (at your option) any later version.                                   *
14  *                                                                       *
15  * This program is distributed in the hope that it will be useful,       *
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
18  * GNU General Public License for more details.                          *
19  *                                                                       *
20  * You should have received a copy of the GNU General Public License     *
21  * along with this program; if not, write to the                         *
22  * Free Software Foundation, Inc.,                                       *
23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
24  *                                                                       *
25  *************************************************************************
26
27         Module Name:
28         rtmp_init.c
29
30         Abstract:
31         Miniport generic portion header file
32
33         Revision History:
34         Who         When          What
35         --------    ----------    ----------------------------------------------
36         Paul Lin    2002-08-01    created
37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
39 */
40 #include "../rt_config.h"
41 #include        "firmware.h"
42 #include <linux/bitrev.h>
43
44 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
45 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
46                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
47                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
48                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
49                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
50                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
51                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
52                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
53
54 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
55
56 const unsigned short ccitt_16Table[] = {
57         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
58         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
59         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
60         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
61         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
62         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
63         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
64         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
65         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
66         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
67         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
68         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
69         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
70         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
71         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
72         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
73         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
74         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
75         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
76         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
77         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
78         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
79         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
80         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
81         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
82         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
83         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
84         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
85         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
86         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
87         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
88         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
89 };
90 #define ByteCRC16(v, crc) \
91         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
92
93 //
94 // BBP register initialization set
95 //
96 REG_PAIR   BBPRegTable[] = {
97         {BBP_R65,               0x2C},          // fix rssi issue
98         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
99         {BBP_R69,               0x12},
100         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
101         {BBP_R73,               0x10},
102         {BBP_R81,               0x37},
103         {BBP_R82,               0x62},
104         {BBP_R83,               0x6A},
105         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
106         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
107         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
108         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
109         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
110         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
111 };
112 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
113
114 //
115 // RF register initialization set
116 //
117
118 //
119 // ASIC register initialization sets
120 //
121
122 RTMP_REG_PAIR   MACRegTable[] = {
123 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
124         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
125         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
126 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
127         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
128         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
129 #else
130     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
131 #endif // HW_BEACON_OFFSET //
132
133         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
134         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
135         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
136         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
137         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
138         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
139         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
140         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
141         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
142         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
143         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
144         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
145         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
146         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
147         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
148         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
149         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
150         {GF40_PROT_CFG,                 0x03F44084},
151         {MM20_PROT_CFG,                 0x01744004},
152 #ifdef RT2860
153         {MM40_PROT_CFG,                 0x03F54084},
154 #endif // RT2860 //
155         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
156         {TX_RTS_CFG,                    0x00092b20},
157         {EXP_ACK_TIME,                  0x002400ca},    // default value
158         {TXOP_HLDR_ET,                  0x00000002},
159
160         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
161                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
162                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
163                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
164         {XIFS_TIME_CFG,                 0x33a41010},
165         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
166 };
167
168
169 #ifdef CONFIG_STA_SUPPORT
170 RTMP_REG_PAIR   STAMACRegTable[] =      {
171         {WMM_AIFSN_CFG,         0x00002273},
172         {WMM_CWMIN_CFG, 0x00002344},
173         {WMM_CWMAX_CFG, 0x000034aa},
174 };
175 #endif // CONFIG_STA_SUPPORT //
176
177 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
178 #ifdef CONFIG_STA_SUPPORT
179 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
180 #endif // CONFIG_STA_SUPPORT //
181
182
183 // New 8k byte firmware size for RT3071/RT3072
184 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
185 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
186 #define FIRMWARE_MAJOR_VERSION  0
187
188 #define FIRMWAREIMAGEV1_LENGTH  0x1000
189 #define FIRMWAREIMAGEV2_LENGTH  0x1000
190
191 #ifdef RT2860
192 #define FIRMWARE_MINOR_VERSION  2
193 #endif // RT2860 //
194
195
196 /*
197         ========================================================================
198
199         Routine Description:
200                 Allocate RTMP_ADAPTER data block and do some initialization
201
202         Arguments:
203                 Adapter         Pointer to our adapter
204
205         Return Value:
206                 NDIS_STATUS_SUCCESS
207                 NDIS_STATUS_FAILURE
208
209         IRQL = PASSIVE_LEVEL
210
211         Note:
212
213         ========================================================================
214 */
215 NDIS_STATUS     RTMPAllocAdapterBlock(
216         IN  PVOID       handle,
217         OUT     PRTMP_ADAPTER   *ppAdapter)
218 {
219         PRTMP_ADAPTER   pAd;
220         NDIS_STATUS             Status;
221         INT                     index;
222         UCHAR                   *pBeaconBuf = NULL;
223
224         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
225
226         *ppAdapter = NULL;
227
228         do
229         {
230                 // Allocate RTMP_ADAPTER memory block
231                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
232                 if (pBeaconBuf == NULL)
233                 {
234                         Status = NDIS_STATUS_FAILURE;
235                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
236                         break;
237                 }
238
239                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
240                 if (Status != NDIS_STATUS_SUCCESS)
241                 {
242                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
243                         break;
244                 }
245                 pAd->BeaconBuf = pBeaconBuf;
246                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
247
248
249                 // Init spin locks
250                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
251 #ifdef RT2860
252                 NdisAllocateSpinLock(&pAd->RxRingLock);
253 #endif // RT2860 //
254
255                 for (index =0 ; index < NUM_OF_TX_RING; index++)
256                 {
257                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
258                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
259                         pAd->DeQueueRunning[index] = FALSE;
260                 }
261
262                 NdisAllocateSpinLock(&pAd->irq_lock);
263
264         } while (FALSE);
265
266         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
267                 kfree(pBeaconBuf);
268
269         *ppAdapter = pAd;
270
271         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
272         return Status;
273 }
274
275 /*
276         ========================================================================
277
278         Routine Description:
279                 Read initial Tx power per MCS and BW from EEPROM
280
281         Arguments:
282                 Adapter                                         Pointer to our adapter
283
284         Return Value:
285                 None
286
287         IRQL = PASSIVE_LEVEL
288
289         Note:
290
291         ========================================================================
292 */
293 VOID    RTMPReadTxPwrPerRate(
294         IN      PRTMP_ADAPTER   pAd)
295 {
296         ULONG           data, Adata, Gdata;
297         USHORT          i, value, value2;
298         INT                     Apwrdelta, Gpwrdelta;
299         UCHAR           t1,t2,t3,t4;
300         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
301
302         //
303         // Get power delta for 20MHz and 40MHz.
304         //
305         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
306         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
307         Apwrdelta = 0;
308         Gpwrdelta = 0;
309
310         if ((value2 & 0xff) != 0xff)
311         {
312                 if ((value2 & 0x80))
313                         Gpwrdelta = (value2&0xf);
314
315                 if ((value2 & 0x40))
316                         bGpwrdeltaMinus = FALSE;
317                 else
318                         bGpwrdeltaMinus = TRUE;
319         }
320         if ((value2 & 0xff00) != 0xff00)
321         {
322                 if ((value2 & 0x8000))
323                         Apwrdelta = ((value2&0xf00)>>8);
324
325                 if ((value2 & 0x4000))
326                         bApwrdeltaMinus = FALSE;
327                 else
328                         bApwrdeltaMinus = TRUE;
329         }
330         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
331
332         //
333         // Get Txpower per MCS for 20MHz in 2.4G.
334         //
335         for (i=0; i<5; i++)
336         {
337                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
338                 data = value;
339                 if (bApwrdeltaMinus == FALSE)
340                 {
341                         t1 = (value&0xf)+(Apwrdelta);
342                         if (t1 > 0xf)
343                                 t1 = 0xf;
344                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
345                         if (t2 > 0xf)
346                                 t2 = 0xf;
347                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
348                         if (t3 > 0xf)
349                                 t3 = 0xf;
350                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
351                         if (t4 > 0xf)
352                                 t4 = 0xf;
353                 }
354                 else
355                 {
356                         if ((value&0xf) > Apwrdelta)
357                                 t1 = (value&0xf)-(Apwrdelta);
358                         else
359                                 t1 = 0;
360                         if (((value&0xf0)>>4) > Apwrdelta)
361                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
362                         else
363                                 t2 = 0;
364                         if (((value&0xf00)>>8) > Apwrdelta)
365                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
366                         else
367                                 t3 = 0;
368                         if (((value&0xf000)>>12) > Apwrdelta)
369                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
370                         else
371                                 t4 = 0;
372                 }
373                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
374                 if (bGpwrdeltaMinus == FALSE)
375                 {
376                         t1 = (value&0xf)+(Gpwrdelta);
377                         if (t1 > 0xf)
378                                 t1 = 0xf;
379                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
380                         if (t2 > 0xf)
381                                 t2 = 0xf;
382                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
383                         if (t3 > 0xf)
384                                 t3 = 0xf;
385                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
386                         if (t4 > 0xf)
387                                 t4 = 0xf;
388                 }
389                 else
390                 {
391                         if ((value&0xf) > Gpwrdelta)
392                                 t1 = (value&0xf)-(Gpwrdelta);
393                         else
394                                 t1 = 0;
395                         if (((value&0xf0)>>4) > Gpwrdelta)
396                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
397                         else
398                                 t2 = 0;
399                         if (((value&0xf00)>>8) > Gpwrdelta)
400                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
401                         else
402                                 t3 = 0;
403                         if (((value&0xf000)>>12) > Gpwrdelta)
404                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
405                         else
406                                 t4 = 0;
407                 }
408                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
409
410                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
411                 if (bApwrdeltaMinus == FALSE)
412                 {
413                         t1 = (value&0xf)+(Apwrdelta);
414                         if (t1 > 0xf)
415                                 t1 = 0xf;
416                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
417                         if (t2 > 0xf)
418                                 t2 = 0xf;
419                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
420                         if (t3 > 0xf)
421                                 t3 = 0xf;
422                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
423                         if (t4 > 0xf)
424                                 t4 = 0xf;
425                 }
426                 else
427                 {
428                         if ((value&0xf) > Apwrdelta)
429                                 t1 = (value&0xf)-(Apwrdelta);
430                         else
431                                 t1 = 0;
432                         if (((value&0xf0)>>4) > Apwrdelta)
433                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
434                         else
435                                 t2 = 0;
436                         if (((value&0xf00)>>8) > Apwrdelta)
437                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
438                         else
439                                 t3 = 0;
440                         if (((value&0xf000)>>12) > Apwrdelta)
441                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
442                         else
443                                 t4 = 0;
444                 }
445                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
446                 if (bGpwrdeltaMinus == FALSE)
447                 {
448                         t1 = (value&0xf)+(Gpwrdelta);
449                         if (t1 > 0xf)
450                                 t1 = 0xf;
451                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
452                         if (t2 > 0xf)
453                                 t2 = 0xf;
454                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
455                         if (t3 > 0xf)
456                                 t3 = 0xf;
457                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
458                         if (t4 > 0xf)
459                                 t4 = 0xf;
460                 }
461                 else
462                 {
463                         if ((value&0xf) > Gpwrdelta)
464                                 t1 = (value&0xf)-(Gpwrdelta);
465                         else
466                                 t1 = 0;
467                         if (((value&0xf0)>>4) > Gpwrdelta)
468                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
469                         else
470                                 t2 = 0;
471                         if (((value&0xf00)>>8) > Gpwrdelta)
472                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
473                         else
474                                 t3 = 0;
475                         if (((value&0xf000)>>12) > Gpwrdelta)
476                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
477                         else
478                                 t4 = 0;
479                 }
480                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
481                 data |= (value<<16);
482
483                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
484                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
485
486                 if (data != 0xffffffff)
487                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
488                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
489         }
490
491         //
492         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
493         //
494         bValid = TRUE;
495         for (i=0; i<6; i++)
496         {
497                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
498                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
499                 {
500                         bValid = FALSE;
501                         break;
502                 }
503         }
504
505         //
506         // Get Txpower per MCS for 40MHz in 2.4G.
507         //
508         if (bValid)
509         {
510                 for (i=0; i<4; i++)
511                 {
512                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
513                         if (bGpwrdeltaMinus == FALSE)
514                         {
515                                 t1 = (value&0xf)+(Gpwrdelta);
516                                 if (t1 > 0xf)
517                                         t1 = 0xf;
518                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
519                                 if (t2 > 0xf)
520                                         t2 = 0xf;
521                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
522                                 if (t3 > 0xf)
523                                         t3 = 0xf;
524                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
525                                 if (t4 > 0xf)
526                                         t4 = 0xf;
527                         }
528                         else
529                         {
530                                 if ((value&0xf) > Gpwrdelta)
531                                         t1 = (value&0xf)-(Gpwrdelta);
532                                 else
533                                         t1 = 0;
534                                 if (((value&0xf0)>>4) > Gpwrdelta)
535                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
536                                 else
537                                         t2 = 0;
538                                 if (((value&0xf00)>>8) > Gpwrdelta)
539                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
540                                 else
541                                         t3 = 0;
542                                 if (((value&0xf000)>>12) > Gpwrdelta)
543                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
544                                 else
545                                         t4 = 0;
546                         }
547                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
548
549                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
550                         if (bGpwrdeltaMinus == FALSE)
551                         {
552                                 t1 = (value&0xf)+(Gpwrdelta);
553                                 if (t1 > 0xf)
554                                         t1 = 0xf;
555                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
556                                 if (t2 > 0xf)
557                                         t2 = 0xf;
558                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
559                                 if (t3 > 0xf)
560                                         t3 = 0xf;
561                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
562                                 if (t4 > 0xf)
563                                         t4 = 0xf;
564                         }
565                         else
566                         {
567                                 if ((value&0xf) > Gpwrdelta)
568                                         t1 = (value&0xf)-(Gpwrdelta);
569                                 else
570                                         t1 = 0;
571                                 if (((value&0xf0)>>4) > Gpwrdelta)
572                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
573                                 else
574                                         t2 = 0;
575                                 if (((value&0xf00)>>8) > Gpwrdelta)
576                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
577                                 else
578                                         t3 = 0;
579                                 if (((value&0xf000)>>12) > Gpwrdelta)
580                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
581                                 else
582                                         t4 = 0;
583                         }
584                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
585
586                         if (i == 0)
587                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
588                         else
589                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
590
591                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
592                 }
593         }
594
595         //
596         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
597         //
598         bValid = TRUE;
599         for (i=0; i<8; i++)
600         {
601                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
602                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
603                 {
604                         bValid = FALSE;
605                         break;
606                 }
607         }
608
609         //
610         // Get Txpower per MCS for 20MHz in 5G.
611         //
612         if (bValid)
613         {
614                 for (i=0; i<5; i++)
615                 {
616                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
617                         if (bApwrdeltaMinus == FALSE)
618                         {
619                                 t1 = (value&0xf)+(Apwrdelta);
620                                 if (t1 > 0xf)
621                                         t1 = 0xf;
622                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
623                                 if (t2 > 0xf)
624                                         t2 = 0xf;
625                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
626                                 if (t3 > 0xf)
627                                         t3 = 0xf;
628                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
629                                 if (t4 > 0xf)
630                                         t4 = 0xf;
631                         }
632                         else
633                         {
634                                 if ((value&0xf) > Apwrdelta)
635                                         t1 = (value&0xf)-(Apwrdelta);
636                                 else
637                                         t1 = 0;
638                                 if (((value&0xf0)>>4) > Apwrdelta)
639                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
640                                 else
641                                         t2 = 0;
642                                 if (((value&0xf00)>>8) > Apwrdelta)
643                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
644                                 else
645                                         t3 = 0;
646                                 if (((value&0xf000)>>12) > Apwrdelta)
647                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
648                                 else
649                                         t4 = 0;
650                         }
651                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
652
653                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
654                         if (bApwrdeltaMinus == FALSE)
655                         {
656                                 t1 = (value&0xf)+(Apwrdelta);
657                                 if (t1 > 0xf)
658                                         t1 = 0xf;
659                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
660                                 if (t2 > 0xf)
661                                         t2 = 0xf;
662                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
663                                 if (t3 > 0xf)
664                                         t3 = 0xf;
665                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
666                                 if (t4 > 0xf)
667                                         t4 = 0xf;
668                         }
669                         else
670                         {
671                                 if ((value&0xf) > Apwrdelta)
672                                         t1 = (value&0xf)-(Apwrdelta);
673                                 else
674                                         t1 = 0;
675                                 if (((value&0xf0)>>4) > Apwrdelta)
676                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
677                                 else
678                                         t2 = 0;
679                                 if (((value&0xf00)>>8) > Apwrdelta)
680                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
681                                 else
682                                         t3 = 0;
683                                 if (((value&0xf000)>>12) > Apwrdelta)
684                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
685                                 else
686                                         t4 = 0;
687                         }
688                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
689
690                         if (i == 0)
691                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
692                         else
693                                 pAd->Tx20MPwrCfgABand[i] = Adata;
694
695                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
696                 }
697         }
698
699         //
700         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
701         //
702         bValid = TRUE;
703         for (i=0; i<6; i++)
704         {
705                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
706                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
707                 {
708                         bValid = FALSE;
709                         break;
710                 }
711         }
712
713         //
714         // Get Txpower per MCS for 40MHz in 5G.
715         //
716         if (bValid)
717         {
718                 for (i=0; i<4; i++)
719                 {
720                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
721                         if (bApwrdeltaMinus == FALSE)
722                         {
723                                 t1 = (value&0xf)+(Apwrdelta);
724                                 if (t1 > 0xf)
725                                         t1 = 0xf;
726                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
727                                 if (t2 > 0xf)
728                                         t2 = 0xf;
729                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
730                                 if (t3 > 0xf)
731                                         t3 = 0xf;
732                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
733                                 if (t4 > 0xf)
734                                         t4 = 0xf;
735                         }
736                         else
737                         {
738                                 if ((value&0xf) > Apwrdelta)
739                                         t1 = (value&0xf)-(Apwrdelta);
740                                 else
741                                         t1 = 0;
742                                 if (((value&0xf0)>>4) > Apwrdelta)
743                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
744                                 else
745                                         t2 = 0;
746                                 if (((value&0xf00)>>8) > Apwrdelta)
747                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
748                                 else
749                                         t3 = 0;
750                                 if (((value&0xf000)>>12) > Apwrdelta)
751                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
752                                 else
753                                         t4 = 0;
754                         }
755                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
756
757                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
758                         if (bApwrdeltaMinus == FALSE)
759                         {
760                                 t1 = (value&0xf)+(Apwrdelta);
761                                 if (t1 > 0xf)
762                                         t1 = 0xf;
763                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
764                                 if (t2 > 0xf)
765                                         t2 = 0xf;
766                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
767                                 if (t3 > 0xf)
768                                         t3 = 0xf;
769                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
770                                 if (t4 > 0xf)
771                                         t4 = 0xf;
772                         }
773                         else
774                         {
775                                 if ((value&0xf) > Apwrdelta)
776                                         t1 = (value&0xf)-(Apwrdelta);
777                                 else
778                                         t1 = 0;
779                                 if (((value&0xf0)>>4) > Apwrdelta)
780                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
781                                 else
782                                         t2 = 0;
783                                 if (((value&0xf00)>>8) > Apwrdelta)
784                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
785                                 else
786                                         t3 = 0;
787                                 if (((value&0xf000)>>12) > Apwrdelta)
788                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
789                                 else
790                                         t4 = 0;
791                         }
792                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
793
794                         if (i == 0)
795                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
796                         else
797                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
798
799                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
800                 }
801         }
802 }
803
804
805 /*
806         ========================================================================
807
808         Routine Description:
809                 Read initial channel power parameters from EEPROM
810
811         Arguments:
812                 Adapter                                         Pointer to our adapter
813
814         Return Value:
815                 None
816
817         IRQL = PASSIVE_LEVEL
818
819         Note:
820
821         ========================================================================
822 */
823 VOID    RTMPReadChannelPwr(
824         IN      PRTMP_ADAPTER   pAd)
825 {
826         UCHAR                           i, choffset;
827         EEPROM_TX_PWR_STRUC         Power;
828         EEPROM_TX_PWR_STRUC         Power2;
829
830         // Read Tx power value for all channels
831         // Value from 1 - 0x7f. Default value is 24.
832         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
833         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
834
835         // 0. 11b/g, ch1 - ch 14
836         for (i = 0; i < 7; i++)
837         {
838                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
839                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
840                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
841                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
842
843                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
844                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
845                 else
846                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
847
848                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
849                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
850                 else
851                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
852
853                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
854                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
855                 else
856                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
857
858                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
859                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
860                 else
861                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
862         }
863
864         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
865         // 1.1 Fill up channel
866         choffset = 14;
867         for (i = 0; i < 4; i++)
868         {
869                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
870                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
871                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
872
873                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
874                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
875                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
876
877                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
878                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
879                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
880         }
881
882         // 1.2 Fill up power
883         for (i = 0; i < 6; i++)
884         {
885                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
886                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
887
888                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
889                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
890
891                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
892                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
893
894                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
895                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
896
897                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
898                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
899         }
900
901         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
902         // 2.1 Fill up channel
903         choffset = 14 + 12;
904         for (i = 0; i < 5; i++)
905         {
906                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
907                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
908                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
909
910                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
911                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
912                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
913
914                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
915                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
916                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
917         }
918         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
919         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
920         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
921
922         // 2.2 Fill up power
923         for (i = 0; i < 8; i++)
924         {
925                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
926                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
927
928                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
929                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
930
931                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
932                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
933
934                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
935                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
936
937                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
938                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
939         }
940
941         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
942         // 3.1 Fill up channel
943         choffset = 14 + 12 + 16;
944         for (i = 0; i < 2; i++)
945         {
946                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
947                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
948                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
949
950                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
951                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
952                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
953
954                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
955                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
956                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
957         }
958         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
959         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
960         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
961
962         // 3.2 Fill up power
963         for (i = 0; i < 4; i++)
964         {
965                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
966                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
967
968                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
969                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
970
971                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
972                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
973
974                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
975                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
976
977                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
978                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
979         }
980
981         // 4. Print and Debug
982         choffset = 14 + 12 + 16 + 7;
983
984
985 #if 0
986         // Init the 802.11j channel number for TX channel power
987         // 0. 20MHz
988         for (i = 0; i < 3; i++)
989         {
990                 pAd->TxPower11J[i].Channel = 8 + i * 4;
991                 pAd->TxPower11J[i].BW = BW_20;
992         }
993
994         for (i = 0; i < 4; i++)
995         {
996                 pAd->TxPower11J[i + 3].Channel = 34 + i * 4;
997                 pAd->TxPower11J[i + 3].BW = BW_20;
998         }
999
1000         for (i = 0; i < 4; i++)
1001         {
1002                 pAd->TxPower11J[i + 7].Channel = 184 + i * 4;
1003                 pAd->TxPower11J[i + 7].BW = BW_20;
1004         }
1005
1006         // 0. 10MHz
1007         for (i = 0; i < 2; i++)
1008         {
1009                 pAd->TxPower11J[i + 11].Channel = 7 + i;
1010                 pAd->TxPower11J[i + 11].BW = BW_10;
1011         }
1012         pAd->TxPower11J[13].Channel = 11;
1013         pAd->TxPower11J[13].BW = BW_10;
1014
1015         for (i = 0; i < 3; i++)
1016         {
1017                 pAd->TxPower11J[i + 14].Channel = 183 + i;
1018                 pAd->TxPower11J[i + 14].BW= BW_10;
1019         }
1020
1021         for (i = 0; i < 3; i++)
1022         {
1023                 pAd->TxPower11J[i + 17].Channel = 187 + i;
1024                 pAd->TxPower11J[i + 17].BW = BW_10;
1025         }
1026         for (i = 0; i < 10; i++)
1027         {
1028                 Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX_PWR_OFFSET + i * 2);
1029                 Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX2_PWR_OFFSET + i * 2);
1030
1031                 if ((Power.field.Byte0 < 36) && (Power.field.Byte0 > -6))
1032                         pAd->TxPower11J[i * 2].Power = Power.field.Byte0;
1033
1034                 if ((Power.field.Byte1 < 36) && (Power.field.Byte1 > -6))
1035                         pAd->TxPower11J[i * 2 + 1].Power = Power.field.Byte1;
1036
1037                 if ((Power2.field.Byte0 < 36) && (Power2.field.Byte0 > -6))
1038                         pAd->TxPower11J[i * 2].Power2 = Power2.field.Byte0;
1039
1040                 if ((Power2.field.Byte1 < 36) && (Power2.field.Byte1 > -6))
1041                         pAd->TxPower11J[i * 2 + 1].Power2 = Power2.field.Byte1;
1042         }
1043 #endif
1044 }
1045
1046 /*
1047         ========================================================================
1048
1049         Routine Description:
1050                 Read the following from the registry
1051                 1. All the parameters
1052                 2. NetworkAddres
1053
1054         Arguments:
1055                 Adapter                                         Pointer to our adapter
1056                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1057
1058         Return Value:
1059                 NDIS_STATUS_SUCCESS
1060                 NDIS_STATUS_FAILURE
1061                 NDIS_STATUS_RESOURCES
1062
1063         IRQL = PASSIVE_LEVEL
1064
1065         Note:
1066
1067         ========================================================================
1068 */
1069 NDIS_STATUS     NICReadRegParameters(
1070         IN      PRTMP_ADAPTER           pAd,
1071         IN      NDIS_HANDLE                     WrapperConfigurationContext
1072         )
1073 {
1074         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1075         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1076         return Status;
1077 }
1078
1079
1080
1081
1082 /*
1083         ========================================================================
1084
1085         Routine Description:
1086                 Read initial parameters from EEPROM
1087
1088         Arguments:
1089                 Adapter                                         Pointer to our adapter
1090
1091         Return Value:
1092                 None
1093
1094         IRQL = PASSIVE_LEVEL
1095
1096         Note:
1097
1098         ========================================================================
1099 */
1100 VOID    NICReadEEPROMParameters(
1101         IN      PRTMP_ADAPTER   pAd,
1102         IN      PUCHAR                  mac_addr)
1103 {
1104         UINT32                  data = 0;
1105         USHORT                  i, value, value2;
1106         UCHAR                   TmpPhy;
1107         EEPROM_TX_PWR_STRUC         Power;
1108         EEPROM_VERSION_STRUC    Version;
1109         EEPROM_ANTENNA_STRUC    Antenna;
1110         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1111
1112         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1113
1114         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1115         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1116         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1117
1118         if((data & 0x30) == 0)
1119                 pAd->EEPROMAddressNum = 6;              // 93C46
1120         else if((data & 0x30) == 0x10)
1121                 pAd->EEPROMAddressNum = 8;     // 93C66
1122         else
1123                 pAd->EEPROMAddressNum = 8;     // 93C86
1124         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1125
1126         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1127         // MAC address registers according to E2PROM setting
1128         if (mac_addr == NULL ||
1129                 strlen(mac_addr) != 17 ||
1130                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1131                 mac_addr[11] != ':' || mac_addr[14] != ':')
1132         {
1133                 USHORT  Addr01,Addr23,Addr45 ;
1134
1135                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1136                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1137                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1138
1139                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1140                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1141                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1142                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1143                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1144                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1145
1146                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1147         }
1148         else
1149         {
1150                 INT             j;
1151                 PUCHAR  macptr;
1152
1153                 macptr = mac_addr;
1154
1155                 for (j=0; j<MAC_ADDR_LEN; j++)
1156                 {
1157                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1158                         macptr=macptr+3;
1159                 }
1160
1161                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1162         }
1163
1164
1165         {
1166                 //more conveninet to test mbssid, so ap's bssid &0xf1
1167                 if (pAd->PermanentAddress[0] == 0xff)
1168                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1169
1170                 //if (pAd->PermanentAddress[5] == 0xff)
1171                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1172
1173                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1174                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1175                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1176                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1177                 if (pAd->bLocalAdminMAC == FALSE)
1178                 {
1179                         MAC_DW0_STRUC csr2;
1180                         MAC_DW1_STRUC csr3;
1181                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1182                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1183                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1184                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1185                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1186                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1187                         csr3.word = 0;
1188                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1189                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1190                         csr3.field.U2MeMask = 0xff;
1191                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1192                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1193                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1194                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1195                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1196                 }
1197         }
1198
1199         // if not return early. cause fail at emulation.
1200         // Init the channel number for TX channel power
1201         RTMPReadChannelPwr(pAd);
1202
1203         // if E2PROM version mismatch with driver's expectation, then skip
1204         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1205         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1206         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1207         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1208
1209         if (Version.field.Version > VALID_EEPROM_VERSION)
1210         {
1211                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1212                 /*pAd->SystemErrorBitmap |= 0x00000001;
1213
1214                 // hard-code default value when no proper E2PROM installed
1215                 pAd->bAutoTxAgcA = FALSE;
1216                 pAd->bAutoTxAgcG = FALSE;
1217
1218                 // Default the channel power
1219                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1220                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1221
1222                 // Default the channel power
1223                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1224                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1225
1226                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1227                         pAd->EEPROMDefaultValue[i] = 0xffff;
1228                 return;  */
1229         }
1230
1231         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1232         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1233         pAd->EEPROMDefaultValue[0] = value;
1234
1235         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1236         pAd->EEPROMDefaultValue[1] = value;
1237
1238         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1239         pAd->EEPROMDefaultValue[2] = value;
1240
1241         for(i = 0; i < 8; i++)
1242         {
1243                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1244                 pAd->EEPROMDefaultValue[i+3] = value;
1245         }
1246
1247         // We have to parse NIC configuration 0 at here.
1248         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1249         // Therefore, we have to read TxAutoAgc control beforehand.
1250         // Read Tx AGC control bit
1251         Antenna.word = pAd->EEPROMDefaultValue[0];
1252         if (Antenna.word == 0xFFFF)
1253         {
1254                 Antenna.word = 0;
1255                 Antenna.field.RfIcType = RFIC_2820;
1256                 Antenna.field.TxPath = 1;
1257                 Antenna.field.RxPath = 2;
1258                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1259         }
1260
1261         // Choose the desired Tx&Rx stream.
1262         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1263                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1264
1265         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1266         {
1267                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1268
1269                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1270                         (pAd->CommonCfg.RxStream > 2))
1271                 {
1272                         // only 2 Rx streams for RT2860 series
1273                         pAd->CommonCfg.RxStream = 2;
1274                 }
1275         }
1276
1277         // 3*3
1278         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1279         // yet implement
1280         for(i=0; i<3; i++)
1281         {
1282         }
1283
1284         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1285
1286
1287
1288 #ifdef CONFIG_STA_SUPPORT
1289         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1290         {
1291                 NicConfig2.word = 0;
1292                 if ((NicConfig2.word & 0x00ff) == 0xff)
1293                 {
1294                         NicConfig2.word &= 0xff00;
1295                 }
1296
1297                 if ((NicConfig2.word >> 8) == 0xff)
1298                 {
1299                         NicConfig2.word &= 0x00ff;
1300                 }
1301         }
1302 #endif // CONFIG_STA_SUPPORT //
1303
1304         if (NicConfig2.field.DynamicTxAgcControl == 1)
1305                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1306         else
1307                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1308
1309         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1310
1311         // Save the antenna for future use
1312         pAd->Antenna.word = Antenna.word;
1313
1314         //
1315         // Reset PhyMode if we don't support 802.11a
1316         // Only RFIC_2850 & RFIC_2750 support 802.11a
1317         //
1318         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1319         {
1320                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1321                         (pAd->CommonCfg.PhyMode == PHY_11A))
1322                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1323 #ifdef DOT11_N_SUPPORT
1324                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1325                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1326                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1327                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1328                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1329 #endif // DOT11_N_SUPPORT //
1330         }
1331
1332         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1333         // 0. 11b/g
1334         {
1335                 /* these are tempature reference value (0x00 ~ 0xFE)
1336                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1337                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1338                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1339                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1340                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1341                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1342                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1343                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1344                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1345                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1346                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1347                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1348                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1349                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1350                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1351                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1352                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1353                 pAd->TxAgcStepG = Power.field.Byte1;
1354                 pAd->TxAgcCompensateG = 0;
1355                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1356                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1357
1358                 // Disable TxAgc if the based value is not right
1359                 if (pAd->TssiRefG == 0xff)
1360                         pAd->bAutoTxAgcG = FALSE;
1361
1362                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1363                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1364                         pAd->TssiRefG,
1365                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1366                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1367         }
1368         // 1. 11a
1369         {
1370                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1371                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1372                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1373                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1374                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1375                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1376                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1377                 pAd->TssiRefA   = Power.field.Byte0;
1378                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1379                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1380                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1381                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1382                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1383                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1384                 pAd->TxAgcStepA = Power.field.Byte1;
1385                 pAd->TxAgcCompensateA = 0;
1386                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1387                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1388
1389                 // Disable TxAgc if the based value is not right
1390                 if (pAd->TssiRefA == 0xff)
1391                         pAd->bAutoTxAgcA = FALSE;
1392
1393                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1394                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1395                         pAd->TssiRefA,
1396                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1397                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1398         }
1399         pAd->BbpRssiToDbmDelta = 0x0;
1400
1401         // Read frequency offset setting for RF
1402         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1403         if ((value & 0x00FF) != 0x00FF)
1404                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1405         else
1406                 pAd->RfFreqOffset = 0;
1407         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1408
1409         //CountryRegion byte offset (38h)
1410         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1411         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1412
1413         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1414         {
1415                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1416                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1417                 TmpPhy = pAd->CommonCfg.PhyMode;
1418                 pAd->CommonCfg.PhyMode = 0xff;
1419                 RTMPSetPhyMode(pAd, TmpPhy);
1420 #ifdef DOT11_N_SUPPORT
1421                 SetCommonHT(pAd);
1422 #endif // DOT11_N_SUPPORT //
1423         }
1424
1425         //
1426         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1427         // The valid value are (-10 ~ 10)
1428         //
1429         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1430         pAd->BGRssiOffset0 = value & 0x00ff;
1431         pAd->BGRssiOffset1 = (value >> 8);
1432         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1433         pAd->BGRssiOffset2 = value & 0x00ff;
1434         pAd->ALNAGain1 = (value >> 8);
1435         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1436         pAd->BLNAGain = value & 0x00ff;
1437         pAd->ALNAGain0 = (value >> 8);
1438
1439         // Validate 11b/g RSSI_0 offset.
1440         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1441                 pAd->BGRssiOffset0 = 0;
1442
1443         // Validate 11b/g RSSI_1 offset.
1444         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1445                 pAd->BGRssiOffset1 = 0;
1446
1447         // Validate 11b/g RSSI_2 offset.
1448         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1449                 pAd->BGRssiOffset2 = 0;
1450
1451         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1452         pAd->ARssiOffset0 = value & 0x00ff;
1453         pAd->ARssiOffset1 = (value >> 8);
1454         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1455         pAd->ARssiOffset2 = value & 0x00ff;
1456         pAd->ALNAGain2 = (value >> 8);
1457
1458         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1459                 pAd->ALNAGain1 = pAd->ALNAGain0;
1460         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1461                 pAd->ALNAGain2 = pAd->ALNAGain0;
1462
1463         // Validate 11a RSSI_0 offset.
1464         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1465                 pAd->ARssiOffset0 = 0;
1466
1467         // Validate 11a RSSI_1 offset.
1468         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1469                 pAd->ARssiOffset1 = 0;
1470
1471         //Validate 11a RSSI_2 offset.
1472         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1473                 pAd->ARssiOffset2 = 0;
1474
1475         //
1476         // Get LED Setting.
1477         //
1478         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1479         pAd->LedCntl.word = (value&0xff00) >> 8;
1480         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1481         pAd->Led1 = value;
1482         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1483         pAd->Led2 = value;
1484         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1485         pAd->Led3 = value;
1486
1487         RTMPReadTxPwrPerRate(pAd);
1488
1489 #ifdef SINGLE_SKU
1490         //pAd->CommonCfg.DefineMaxTxPwr = RTMP_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR);
1491         RT28xx_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR, pAd->CommonCfg.DefineMaxTxPwr);
1492 #endif // SINGLE_SKU //
1493
1494         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1495 }
1496
1497 /*
1498         ========================================================================
1499
1500         Routine Description:
1501                 Set default value from EEPROM
1502
1503         Arguments:
1504                 Adapter                                         Pointer to our adapter
1505
1506         Return Value:
1507                 None
1508
1509         IRQL = PASSIVE_LEVEL
1510
1511         Note:
1512
1513         ========================================================================
1514 */
1515 VOID    NICInitAsicFromEEPROM(
1516         IN      PRTMP_ADAPTER   pAd)
1517 {
1518 #ifdef CONFIG_STA_SUPPORT
1519         UINT32                                  data = 0;
1520         UCHAR   BBPR1 = 0;
1521 #endif // CONFIG_STA_SUPPORT //
1522         USHORT                                  i;
1523         EEPROM_ANTENNA_STRUC    Antenna;
1524         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1525         UCHAR   BBPR3 = 0;
1526
1527         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1528         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1529         {
1530                 UCHAR BbpRegIdx, BbpValue;
1531
1532                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1533                 {
1534                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1535                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1536                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1537                 }
1538         }
1539
1540         Antenna.word = pAd->Antenna.word;
1541         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1542         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1543
1544         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1545
1546
1547         // Save the antenna for future use
1548         pAd->NicConfig2.word = NicConfig2.word;
1549
1550         //
1551         // Send LED Setting to MCU.
1552         //
1553         if (pAd->LedCntl.word == 0xFF)
1554         {
1555                 pAd->LedCntl.word = 0x01;
1556                 pAd->Led1 = 0x5555;
1557                 pAd->Led2 = 0x2221;
1558
1559 #ifdef RT2860
1560                 pAd->Led3 = 0xA9F8;
1561 #endif // RT2860 //
1562         }
1563
1564         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1565         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1566         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1567     pAd->LedIndicatorStregth = 0xFF;
1568     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1569
1570 #ifdef CONFIG_STA_SUPPORT
1571         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1572         {
1573                 // Read Hardware controlled Radio state enable bit
1574                 if (NicConfig2.field.HardwareRadioControl == 1)
1575                 {
1576                         pAd->StaCfg.bHardwareRadio = TRUE;
1577
1578                         // Read GPIO pin2 as Hardware controlled radio state
1579                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1580                         if ((data & 0x04) == 0)
1581                         {
1582                                 pAd->StaCfg.bHwRadio = FALSE;
1583                                 pAd->StaCfg.bRadio = FALSE;
1584                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1585                         }
1586                 }
1587                 else
1588                         pAd->StaCfg.bHardwareRadio = FALSE;
1589
1590                 if (pAd->StaCfg.bRadio == FALSE)
1591                 {
1592                         RTMPSetLED(pAd, LED_RADIO_OFF);
1593                 }
1594                 else
1595                 {
1596                         RTMPSetLED(pAd, LED_RADIO_ON);
1597 #ifdef RT2860
1598                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1599                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1600                         // 2-1. wait command ok.
1601                         AsicCheckCommanOk(pAd, PowerWakeCID);
1602 #endif // RT2860 //
1603                 }
1604         }
1605 #endif // CONFIG_STA_SUPPORT //
1606
1607         // Turn off patching for cardbus controller
1608         if (NicConfig2.field.CardbusAcceleration == 1)
1609         {
1610         }
1611
1612         if (NicConfig2.field.DynamicTxAgcControl == 1)
1613                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1614         else
1615                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1616         //
1617         // Since BBP has been progamed, to make sure BBP setting will be
1618         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1619         //
1620         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1621
1622         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1623         BBPR3 &= (~0x18);
1624         if(pAd->Antenna.field.RxPath == 3)
1625         {
1626                 BBPR3 |= (0x10);
1627         }
1628         else if(pAd->Antenna.field.RxPath == 2)
1629         {
1630                 BBPR3 |= (0x8);
1631         }
1632         else if(pAd->Antenna.field.RxPath == 1)
1633         {
1634                 BBPR3 |= (0x0);
1635         }
1636         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1637
1638 #ifdef CONFIG_STA_SUPPORT
1639         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1640         {
1641                 // Handle the difference when 1T
1642                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1643                 if(pAd->Antenna.field.TxPath == 1)
1644                 {
1645                 BBPR1 &= (~0x18);
1646                 }
1647                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1648
1649                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1650         }
1651 #endif // CONFIG_STA_SUPPORT //
1652         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1653         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1654 }
1655
1656 /*
1657         ========================================================================
1658
1659         Routine Description:
1660                 Initialize NIC hardware
1661
1662         Arguments:
1663                 Adapter                                         Pointer to our adapter
1664
1665         Return Value:
1666                 None
1667
1668         IRQL = PASSIVE_LEVEL
1669
1670         Note:
1671
1672         ========================================================================
1673 */
1674 NDIS_STATUS     NICInitializeAdapter(
1675         IN      PRTMP_ADAPTER   pAd,
1676         IN   BOOLEAN    bHardReset)
1677 {
1678         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1679         WPDMA_GLO_CFG_STRUC     GloCfg;
1680 #ifdef RT2860
1681         UINT32                  Value;
1682         DELAY_INT_CFG_STRUC     IntCfg;
1683 #endif // RT2860 //
1684         ULONG   i =0, j=0;
1685         AC_TXOP_CSR0_STRUC      csr0;
1686
1687         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1688
1689         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1690 retry:
1691         i = 0;
1692         do
1693         {
1694                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1695                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1696                         break;
1697
1698                 RTMPusecDelay(1000);
1699                 i++;
1700         }while ( i<100);
1701         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1702         GloCfg.word &= 0xff0;
1703         GloCfg.field.EnTXWriteBackDDONE =1;
1704         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1705
1706         // Record HW Beacon offset
1707         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1708         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1709         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1710         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1711         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1712         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1713         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1714         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1715
1716         //
1717         // write all shared Ring's base address into ASIC
1718         //
1719
1720         // asic simulation sequence put this ahead before loading firmware.
1721         // pbf hardware reset
1722 #ifdef RT2860
1723         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1724         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1725         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1726 #endif // RT2860 //
1727
1728         // Initialze ASIC for TX & Rx operation
1729         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1730         {
1731                 if (j++ == 0)
1732                 {
1733                         NICLoadFirmware(pAd);
1734                         goto retry;
1735                 }
1736                 return NDIS_STATUS_FAILURE;
1737         }
1738
1739
1740 #ifdef RT2860
1741         // Write AC_BK base address register
1742         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1743         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1744         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1745
1746         // Write AC_BE base address register
1747         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1748         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1749         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1750
1751         // Write AC_VI base address register
1752         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1753         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1754         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1755
1756         // Write AC_VO base address register
1757         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1758         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1759         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1760
1761         // Write HCCA base address register
1762           Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1763           RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1764         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1765
1766         // Write MGMT_BASE_CSR register
1767         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1768         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1769         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1770
1771         // Write RX_BASE_CSR register
1772         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1773         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1774         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1775
1776         // Init RX Ring index pointer
1777         pAd->RxRing.RxSwReadIdx = 0;
1778         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1779         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1780
1781         // Init TX rings index pointer
1782         {
1783                 for (i=0; i<NUM_OF_TX_RING; i++)
1784                 {
1785                         pAd->TxRing[i].TxSwFreeIdx = 0;
1786                         pAd->TxRing[i].TxCpuIdx = 0;
1787                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
1788                 }
1789         }
1790
1791         // init MGMT ring index pointer
1792         pAd->MgmtRing.TxSwFreeIdx = 0;
1793         pAd->MgmtRing.TxCpuIdx = 0;
1794         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
1795
1796         //
1797         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
1798         //
1799
1800         // Write TX_RING_CSR0 register
1801         Value = TX_RING_SIZE;
1802         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1803         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1804         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1805         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1806         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1807         Value = MGMT_RING_SIZE;
1808         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1809
1810         // Write RX_RING_CSR register
1811         Value = RX_RING_SIZE;
1812         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1813 #endif // RT2860 //
1814
1815
1816         // WMM parameter
1817         csr0.word = 0;
1818         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1819         if (pAd->CommonCfg.PhyMode == PHY_11B)
1820         {
1821                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
1822                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
1823         }
1824         else
1825         {
1826                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
1827                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
1828         }
1829         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1830
1831
1832 #ifdef RT2860
1833         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1834         i = 0;
1835         do
1836         {
1837                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1838                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1839                         break;
1840
1841                 RTMPusecDelay(1000);
1842                 i++;
1843         }while ( i < 100);
1844
1845         GloCfg.word &= 0xff0;
1846         GloCfg.field.EnTXWriteBackDDONE =1;
1847         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1848
1849         IntCfg.word = 0;
1850         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1851 #endif // RT2860 //
1852
1853
1854         // reset action
1855         // Load firmware
1856         //  Status = NICLoadFirmware(pAd);
1857
1858         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1859         return Status;
1860 }
1861
1862 /*
1863         ========================================================================
1864
1865         Routine Description:
1866                 Initialize ASIC
1867
1868         Arguments:
1869                 Adapter                                         Pointer to our adapter
1870
1871         Return Value:
1872                 None
1873
1874         IRQL = PASSIVE_LEVEL
1875
1876         Note:
1877
1878         ========================================================================
1879 */
1880 NDIS_STATUS     NICInitializeAsic(
1881         IN      PRTMP_ADAPTER   pAd,
1882         IN  BOOLEAN             bHardReset)
1883 {
1884         ULONG                   Index = 0;
1885         UCHAR                   R0 = 0xff;
1886         UINT32                  MacCsr12 = 0, Counter = 0;
1887         USHORT                  KeyIdx;
1888         INT                             i,apidx;
1889
1890         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1891
1892 #ifdef RT2860
1893         if (bHardReset == TRUE)
1894         {
1895                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1896         }
1897         else
1898                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1899
1900         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1901         // Initialize MAC register to default value
1902         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1903         {
1904                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1905         }
1906
1907
1908 #ifdef CONFIG_STA_SUPPORT
1909         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1910         {
1911                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1912                 {
1913                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1914                 }
1915         }
1916 #endif // CONFIG_STA_SUPPORT //
1917 #endif // RT2860 //
1918
1919
1920         //
1921         // Before program BBP, we need to wait BBP/RF get wake up.
1922         //
1923         Index = 0;
1924         do
1925         {
1926                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1927
1928                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
1929                         break;
1930
1931                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
1932                 RTMPusecDelay(1000);
1933         } while (Index++ < 100);
1934
1935     // The commands to firmware should be after these commands, these commands will init firmware
1936         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1937         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1938         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1939         RTMPusecDelay(1000);
1940
1941         // Read BBP register, make sure BBP is up and running before write new data
1942         Index = 0;
1943         do
1944         {
1945                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1946                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1947         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1948         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1949
1950         if ((R0 == 0xff) || (R0 == 0x00))
1951                 return NDIS_STATUS_FAILURE;
1952
1953         // Initialize BBP register to default value
1954         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1955         {
1956                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1957         }
1958
1959         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1960         if ((pAd->MACVersion&0xffff) != 0x0101)
1961                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1962
1963
1964         if (pAd->MACVersion == 0x28600100)
1965         {
1966                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1967                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1968     }
1969
1970         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1971         {
1972                 // enlarge MAX_LEN_CFG
1973                 UINT32 csr;
1974                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1975                 csr &= 0xFFF;
1976                 csr |= 0x2000;
1977                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1978         }
1979
1980
1981         // Add radio off control
1982 #ifdef CONFIG_STA_SUPPORT
1983         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1984         {
1985                 if (pAd->StaCfg.bRadio == FALSE)
1986                 {
1987 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1988                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1989                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1990                 }
1991         }
1992 #endif // CONFIG_STA_SUPPORT //
1993
1994         // Clear raw counters
1995         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1996         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1997         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1998         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1999         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2000         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2001
2002         // ASIC will keep garbage value after boot
2003         // Clear all seared key table when initial
2004         // This routine can be ignored in radio-ON/OFF operation.
2005         if (bHardReset)
2006         {
2007                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2008                 {
2009                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2010                 }
2011
2012                 // Clear all pairwise key table when initial
2013                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2014                 {
2015                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2016                 }
2017         }
2018
2019
2020         // It isn't necessary to clear this space when not hard reset.
2021         if (bHardReset == TRUE)
2022         {
2023                 // clear all on-chip BEACON frame space
2024                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2025                 {
2026                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2027                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2028                 }
2029         }
2030
2031 #ifdef CONFIG_STA_SUPPORT
2032         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2033         {
2034                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2035                 if ((pAd->MACVersion&0xffff) != 0x0101)
2036                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2037         }
2038 #endif // CONFIG_STA_SUPPORT //
2039
2040         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2041         return NDIS_STATUS_SUCCESS;
2042 }
2043
2044 /*
2045         ========================================================================
2046
2047         Routine Description:
2048                 Reset NIC Asics
2049
2050         Arguments:
2051                 Adapter                                         Pointer to our adapter
2052
2053         Return Value:
2054                 None
2055
2056         IRQL = PASSIVE_LEVEL
2057
2058         Note:
2059                 Reset NIC to initial state AS IS system boot up time.
2060
2061         ========================================================================
2062 */
2063 VOID    NICIssueReset(
2064         IN      PRTMP_ADAPTER   pAd)
2065 {
2066         UINT32  Value = 0;
2067         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2068
2069         // Disable Rx, register value supposed will remain after reset
2070         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2071         Value &= (0xfffffff3);
2072         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2073
2074         // Issue reset and clear from reset state
2075         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2076         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2077
2078         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2079 }
2080
2081 /*
2082         ========================================================================
2083
2084         Routine Description:
2085                 Check ASIC registers and find any reason the system might hang
2086
2087         Arguments:
2088                 Adapter                                         Pointer to our adapter
2089
2090         Return Value:
2091                 None
2092
2093         IRQL = DISPATCH_LEVEL
2094
2095         ========================================================================
2096 */
2097 BOOLEAN NICCheckForHang(
2098         IN      PRTMP_ADAPTER   pAd)
2099 {
2100         return (FALSE);
2101 }
2102
2103 VOID NICUpdateFifoStaCounters(
2104         IN PRTMP_ADAPTER pAd)
2105 {
2106         TX_STA_FIFO_STRUC       StaFifo;
2107         MAC_TABLE_ENTRY         *pEntry;
2108         UCHAR                           i = 0;
2109         UCHAR                   pid = 0, wcid = 0;
2110         CHAR                            reTry;
2111         UCHAR                           succMCS;
2112
2113 #ifdef RALINK_ATE
2114         /* Nothing to do in ATE mode */
2115         if (ATE_ON(pAd))
2116                 return;
2117 #endif // RALINK_ATE //
2118
2119                 do
2120                 {
2121                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2122
2123                         if (StaFifo.field.bValid == 0)
2124                                 break;
2125
2126                         wcid = (UCHAR)StaFifo.field.wcid;
2127
2128
2129                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2130                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2131                         {
2132                                 i++;
2133                                 continue;
2134                         }
2135
2136                         /* PID store Tx MCS Rate */
2137                         pid = (UCHAR)StaFifo.field.PidType;
2138
2139                         pEntry = &pAd->MacTab.Content[wcid];
2140
2141                         pEntry->DebugFIFOCount++;
2142
2143 #ifdef DOT11_N_SUPPORT
2144                         if (StaFifo.field.TxBF) // 3*3
2145                                 pEntry->TxBFCount++;
2146 #endif // DOT11_N_SUPPORT //
2147
2148 #ifdef UAPSD_AP_SUPPORT
2149                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2150 #endif // UAPSD_AP_SUPPORT //
2151
2152                         if (!StaFifo.field.TxSuccess)
2153                         {
2154                                 pEntry->FIFOCount++;
2155                                 pEntry->OneSecTxFailCount++;
2156
2157                                 if (pEntry->FIFOCount >= 1)
2158                                 {
2159                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2160 #if 0
2161                                         SendRefreshBAR(pAd, pEntry);
2162                                         pEntry->NoBADataCountDown = 64;
2163 #else
2164 #ifdef DOT11_N_SUPPORT
2165                                         pEntry->NoBADataCountDown = 64;
2166 #endif // DOT11_N_SUPPORT //
2167
2168                                         if(pEntry->PsMode == PWR_ACTIVE)
2169                                         {
2170 #ifdef DOT11_N_SUPPORT
2171                                                 int tid;
2172                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2173                                                 {
2174                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2175                                                 }
2176 #endif // DOT11_N_SUPPORT //
2177
2178                                                 // Update the continuous transmission counter except PS mode
2179                                                 pEntry->ContinueTxFailCnt++;
2180                                         }
2181                                         else
2182                                         {
2183                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2184                                                 //     this tx error happened due to sta just go to sleep.
2185                                                 pEntry->FIFOCount = 0;
2186                                                 pEntry->ContinueTxFailCnt = 0;
2187                                         }
2188 #endif
2189                                         //pEntry->FIFOCount = 0;
2190                                 }
2191                                 //pEntry->bSendBAR = TRUE;
2192                         }
2193                         else
2194                         {
2195 #ifdef DOT11_N_SUPPORT
2196                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2197                                 {
2198                                         pEntry->NoBADataCountDown--;
2199                                         if (pEntry->NoBADataCountDown==0)
2200                                         {
2201                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2202                                         }
2203                                 }
2204 #endif // DOT11_N_SUPPORT //
2205                                 pEntry->FIFOCount = 0;
2206                                 pEntry->OneSecTxNoRetryOkCount++;
2207                                 // update NoDataIdleCount when sucessful send packet to STA.
2208                                 pEntry->NoDataIdleCount = 0;
2209                                 pEntry->ContinueTxFailCnt = 0;
2210                         }
2211
2212                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2213
2214                         reTry = pid - succMCS;
2215
2216                         if (StaFifo.field.TxSuccess)
2217                         {
2218                                 pEntry->TXMCSExpected[pid]++;
2219                                 if (pid == succMCS)
2220                                 {
2221                                         pEntry->TXMCSSuccessful[pid]++;
2222                                 }
2223                                 else
2224                                 {
2225                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2226                                 }
2227                         }
2228                         else
2229                         {
2230                                 pEntry->TXMCSFailed[pid]++;
2231                         }
2232
2233                         if (reTry > 0)
2234                         {
2235                                 if ((pid >= 12) && succMCS <=7)
2236                                 {
2237                                         reTry -= 4;
2238                                 }
2239                                 pEntry->OneSecTxRetryOkCount += reTry;
2240                         }
2241
2242                         i++;
2243                         // ASIC store 16 stack
2244                 } while ( i < (2*TX_RING_SIZE) );
2245
2246 }
2247
2248 /*
2249         ========================================================================
2250
2251         Routine Description:
2252                 Read statistical counters from hardware registers and record them
2253                 in software variables for later on query
2254
2255         Arguments:
2256                 pAd                                     Pointer to our adapter
2257
2258         Return Value:
2259                 None
2260
2261         IRQL = DISPATCH_LEVEL
2262
2263         ========================================================================
2264 */
2265 VOID NICUpdateRawCounters(
2266         IN PRTMP_ADAPTER pAd)
2267 {
2268         UINT32  OldValue;
2269         RX_STA_CNT0_STRUC        RxStaCnt0;
2270         RX_STA_CNT1_STRUC   RxStaCnt1;
2271         RX_STA_CNT2_STRUC   RxStaCnt2;
2272         TX_STA_CNT0_STRUC        TxStaCnt0;
2273         TX_STA_CNT1_STRUC        StaTx1;
2274         TX_STA_CNT2_STRUC        StaTx2;
2275         TX_AGG_CNT_STRUC        TxAggCnt;
2276         TX_AGG_CNT0_STRUC       TxAggCnt0;
2277         TX_AGG_CNT1_STRUC       TxAggCnt1;
2278         TX_AGG_CNT2_STRUC       TxAggCnt2;
2279         TX_AGG_CNT3_STRUC       TxAggCnt3;
2280         TX_AGG_CNT4_STRUC       TxAggCnt4;
2281         TX_AGG_CNT5_STRUC       TxAggCnt5;
2282         TX_AGG_CNT6_STRUC       TxAggCnt6;
2283         TX_AGG_CNT7_STRUC       TxAggCnt7;
2284
2285         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2286         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2287
2288         {
2289                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2290             // Update RX PLCP error counter
2291             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2292                 // Update False CCA counter
2293                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2294         }
2295
2296         // Update FCS counters
2297         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2298         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2299         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2300                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2301
2302         // Add FCS error count to private counters
2303         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2304         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2305         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2306         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2307                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2308
2309         // Update Duplicate Rcv check
2310         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2311         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2312         // Update RX Overflow counter
2313         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2314
2315         if (!pAd->bUpdateBcnCntDone)
2316         {
2317         // Update BEACON sent count
2318         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2319         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2320         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2321         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2322         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2323         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2324         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2325         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2326         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2327         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2328         }
2329
2330         {
2331                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2332                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2333                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2334                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2335                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2336                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2337                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2338                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2339                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2340                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2341                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2342                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2343                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2344
2345                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2346                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2347                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2348                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2349
2350                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2351                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2352                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2353                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2354
2355                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2356                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2357                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2358                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2359
2360                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2361                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2362
2363                 // Calculate the transmitted A-MPDU count
2364                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2365                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2366
2367                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2368                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2369
2370                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2371                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2372
2373                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2374                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2375
2376                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2377                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2378
2379                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2380                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2381
2382                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2383                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2384
2385                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2386                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2387         }
2388
2389 #ifdef DBG_DIAGNOSE
2390         {
2391                 RtmpDiagStruct  *pDiag;
2392                 COUNTER_RALINK  *pRalinkCounters;
2393                 UCHAR                   ArrayCurIdx, i;
2394
2395                 pDiag = &pAd->DiagStruct;
2396                 pRalinkCounters = &pAd->RalinkCounters;
2397                 ArrayCurIdx = pDiag->ArrayCurIdx;
2398
2399                 if (pDiag->inited == 0)
2400                 {
2401                         NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2402                         pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2403                         pDiag->inited = 1;
2404                 }
2405                 else
2406                 {
2407                         // Tx
2408                         pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2409                         pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2410                         pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2411                         pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2412                         pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2413                         pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2414                         pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2415                         pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2416                         pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2417                         pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2418                         pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2419                         pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2420                         pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2421                         pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2422                         pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2423                         pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2424                         pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2425                         pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2426                         pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2427
2428                         pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2429
2430                         INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
2431                         ArrayCurIdx = pDiag->ArrayCurIdx;
2432                         for (i =0; i < 9; i++)
2433                         {
2434                                 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2435                                 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2436                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2437                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2438                         }
2439                         pDiag->TxDataCnt[ArrayCurIdx] = 0;
2440                         pDiag->TxFailCnt[ArrayCurIdx] = 0;
2441                         pDiag->RxDataCnt[ArrayCurIdx] = 0;
2442                         pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
2443                         for (i = 9; i < 24; i++) // 3*3
2444                         {
2445                                 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2446                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2447                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2448 }
2449
2450                         if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2451                                 INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
2452                 }
2453
2454         }
2455 #endif // DBG_DIAGNOSE //
2456
2457
2458 }
2459
2460
2461 /*
2462         ========================================================================
2463
2464         Routine Description:
2465                 Reset NIC from error
2466
2467         Arguments:
2468                 Adapter                                         Pointer to our adapter
2469
2470         Return Value:
2471                 None
2472
2473         IRQL = PASSIVE_LEVEL
2474
2475         Note:
2476                 Reset NIC from error state
2477
2478         ========================================================================
2479 */
2480 VOID    NICResetFromError(
2481         IN      PRTMP_ADAPTER   pAd)
2482 {
2483         // Reset BBP (according to alex, reset ASIC will force reset BBP
2484         // Therefore, skip the reset BBP
2485         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2486
2487         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2488         // Remove ASIC from reset state
2489         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2490
2491         NICInitializeAdapter(pAd, FALSE);
2492         NICInitAsicFromEEPROM(pAd);
2493
2494         // Switch to current channel, since during reset process, the connection should remains on.
2495         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2496         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2497 }
2498
2499 /*
2500         ========================================================================
2501
2502         Routine Description:
2503                 erase 8051 firmware image in MAC ASIC
2504
2505         Arguments:
2506                 Adapter                                         Pointer to our adapter
2507
2508         IRQL = PASSIVE_LEVEL
2509
2510         ========================================================================
2511 */
2512 VOID NICEraseFirmware(
2513         IN PRTMP_ADAPTER pAd)
2514 {
2515         ULONG i;
2516
2517         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2518                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2519
2520 }/* End of NICEraseFirmware */
2521
2522 /*
2523         ========================================================================
2524
2525         Routine Description:
2526                 Load 8051 firmware RT2561.BIN file into MAC ASIC
2527
2528         Arguments:
2529                 Adapter                                         Pointer to our adapter
2530
2531         Return Value:
2532                 NDIS_STATUS_SUCCESS         firmware image load ok
2533                 NDIS_STATUS_FAILURE         image not found
2534
2535         IRQL = PASSIVE_LEVEL
2536
2537         ========================================================================
2538 */
2539 NDIS_STATUS NICLoadFirmware(
2540         IN PRTMP_ADAPTER pAd)
2541 {
2542 #ifdef BIN_IN_FILE
2543 #define NICLF_DEFAULT_USE()     \
2544         flg_default_firm_use = TRUE; \
2545         printk("%s - Use default firmware!\n", __FUNCTION__);
2546
2547         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
2548         PUCHAR                  src;
2549         struct file             *srcf;
2550         INT                     retval, orgfsuid, orgfsgid, i;
2551         mm_segment_t    orgfs;
2552         PUCHAR                  pFirmwareImage;
2553         UINT                    FileLength = 0;
2554         UINT32                  MacReg;
2555         ULONG                   Index;
2556         ULONG                   firm;
2557         BOOLEAN                 flg_default_firm_use = FALSE;
2558
2559
2560         DBGPRINT(RT_DEBUG_TRACE, ("===> %s\n", __FUNCTION__));
2561
2562         /* init */
2563         pFirmwareImage = NULL;
2564         src = RTMP_FIRMWARE_FILE_NAME;
2565
2566         /* save uid and gid used for filesystem access.
2567            set user and group to 0 (root) */
2568         orgfsuid = current->fsuid;
2569         orgfsgid = current->fsgid;
2570         current->fsuid = current->fsgid = 0;
2571     orgfs = get_fs();
2572     set_fs(KERNEL_DS);
2573
2574         pAd->FirmwareVersion = (FIRMWARE_MAJOR_VERSION << 8) + \
2575                                                    FIRMWARE_MINOR_VERSION;
2576
2577
2578         /* allocate firmware buffer */
2579     pFirmwareImage = kmalloc(MAX_FIRMWARE_IMAGE_SIZE, MEM_ALLOC_FLAG);
2580     if (pFirmwareImage == NULL)
2581         {
2582                 /* allocate fail, use default firmware array in firmware.h */
2583                 printk("%s - Allocate memory fail!\n", __FUNCTION__);
2584                 NICLF_DEFAULT_USE();
2585     }
2586         else
2587         {
2588                 /* allocate ok! zero the firmware buffer */
2589                 memset(pFirmwareImage, 0x00, MAX_FIRMWARE_IMAGE_SIZE);
2590         } /* End of if */
2591
2592
2593         /* if ok, read firmware file from *.bin file */
2594         if (flg_default_firm_use == FALSE)
2595         {
2596                 do
2597                 {
2598                         /* open the bin file */
2599                         srcf = filp_open(src, O_RDONLY, 0);
2600
2601                         if (IS_ERR(srcf))
2602                         {
2603                                 printk("%s - Error %ld opening %s\n",
2604                                            __FUNCTION__, -PTR_ERR(srcf), src);
2605                                 NICLF_DEFAULT_USE();
2606                                 break;
2607                         } /* End of if */
2608
2609                         /* the object must have a read method */
2610                         if ((srcf->f_op == NULL) || (srcf->f_op->read == NULL))
2611                         {
2612                                 printk("%s - %s does not have a write method\n", __FUNCTION__, src);
2613                                 NICLF_DEFAULT_USE();
2614                                 break;
2615                         } /* End of if */
2616
2617                         /* read the firmware from the file *.bin */
2618                         FileLength = srcf->f_op->read(srcf,
2619                                                                                   pFirmwareImage,
2620                                                                                   MAX_FIRMWARE_IMAGE_SIZE,
2621                                                                                   &srcf->f_pos);
2622
2623                         if (FileLength != MAX_FIRMWARE_IMAGE_SIZE)
2624                         {
2625                                 printk("%s: error file length (=%d) in RT2860AP.BIN\n",
2626                                            __FUNCTION__, FileLength);
2627                                 NICLF_DEFAULT_USE();
2628                                 break;
2629                         }
2630                         else
2631                         {
2632                                 PUCHAR ptr = pFirmwareImage;
2633                                 USHORT crc = 0xffff;
2634
2635
2636                                 /* calculate firmware CRC */
2637                                 for(i=0; i<(MAX_FIRMWARE_IMAGE_SIZE-2); i++, ptr++)
2638                                         crc = ByteCRC16(bitrev8(*ptr), crc);
2639                                 /* End of for */
2640
2641                                 if ((pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2] != \
2642                                                                 (UCHAR)bitrev8((UCHAR)(crc>>8))) ||
2643                                         (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1] != \
2644                                                                 (UCHAR)bitrev8((UCHAR)crc)))
2645                                 {
2646                                         /* CRC fail */
2647                                         printk("%s: CRC = 0x%02x 0x%02x "
2648                                                    "error, should be 0x%02x 0x%02x\n",
2649                                                    __FUNCTION__,
2650                                                    pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2],
2651                                                    pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1],
2652                                                    (UCHAR)(crc>>8), (UCHAR)(crc));
2653                                         NICLF_DEFAULT_USE();
2654                                         break;
2655                                 }
2656                                 else
2657                                 {
2658                                         /* firmware is ok */
2659                                         pAd->FirmwareVersion = \
2660                                                 (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4] << 8) +
2661                                                 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3];
2662
2663                                         /* check if firmware version of the file is too old */
2664                                         if ((pAd->FirmwareVersion) < \
2665                                                                                         ((FIRMWARE_MAJOR_VERSION << 8) +
2666                                                                                          FIRMWARE_MINOR_VERSION))
2667                                         {
2668                                                 printk("%s: firmware version too old!\n", __FUNCTION__);
2669                                                 NICLF_DEFAULT_USE();
2670                                                 break;
2671                                         } /* End of if */
2672                                 } /* End of if */
2673
2674                                 DBGPRINT(RT_DEBUG_TRACE,
2675                                                  ("NICLoadFirmware: CRC ok, ver=%d.%d\n",
2676                                                   pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4],
2677                                                   pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3]));
2678                         } /* End of if (FileLength == MAX_FIRMWARE_IMAGE_SIZE) */
2679                         break;
2680                 } while(TRUE);
2681
2682                 /* close firmware file */
2683                 if (IS_ERR(srcf))
2684                         ;
2685                 else
2686                 {
2687                         retval = filp_close(srcf, NULL);
2688                         if (retval)
2689                         {
2690                                 DBGPRINT(RT_DEBUG_ERROR,
2691                                                  ("--> Error %d closing %s\n", -retval, src));
2692                         } /* End of if */
2693                 } /* End of if */
2694         } /* End of if */
2695
2696
2697         /* write firmware to ASIC */
2698         if (flg_default_firm_use == TRUE)
2699         {
2700                 /* use default fimeware, free allocated buffer */
2701                 if (pFirmwareImage != NULL)
2702                         kfree(pFirmwareImage);
2703                 /* End of if */
2704
2705                 /* use default *.bin array */
2706                 pFirmwareImage = FirmwareImage;
2707                 FileLength = sizeof(FirmwareImage);
2708         } /* End of if */
2709
2710         /* enable Host program ram write selection */
2711         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x10000);
2712
2713         for(i=0; i<FileLength; i+=4)
2714         {
2715                 firm = pFirmwareImage[i] +
2716                            (pFirmwareImage[i+3] << 24) +
2717                            (pFirmwareImage[i+2] << 16) +
2718                            (pFirmwareImage[i+1] << 8);
2719
2720                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, firm);
2721         } /* End of for */
2722
2723         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00000);
2724         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00001);
2725
2726         /* initialize BBP R/W access agent */
2727         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0);
2728         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2729
2730         if (flg_default_firm_use == FALSE)
2731         {
2732                 /* use file firmware, free allocated buffer */
2733                 if (pFirmwareImage != NULL)
2734                         kfree(pFirmwareImage);
2735                 /* End of if */
2736         } /* End of if */
2737
2738         set_fs(orgfs);
2739         current->fsuid = orgfsuid;
2740         current->fsgid = orgfsgid;
2741 #else
2742
2743         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
2744         PUCHAR                  pFirmwareImage;
2745         ULONG                   FileLength, Index;
2746         //ULONG                 firm;
2747         UINT32                  MacReg = 0;
2748
2749         pFirmwareImage = FirmwareImage;
2750         FileLength = sizeof(FirmwareImage);
2751         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2752 #endif
2753
2754         /* check if MCU is ready */
2755         Index = 0;
2756         do
2757         {
2758                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2759
2760                 if (MacReg & 0x80)
2761                         break;
2762
2763                 RTMPusecDelay(1000);
2764         } while (Index++ < 1000);
2765
2766     if (Index >= 1000)
2767         {
2768                 Status = NDIS_STATUS_FAILURE;
2769                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2770         } /* End of if */
2771
2772     DBGPRINT(RT_DEBUG_TRACE,
2773                          ("<=== %s (status=%d)\n", __FUNCTION__, Status));
2774     return Status;
2775 } /* End of NICLoadFirmware */
2776
2777
2778 /*
2779         ========================================================================
2780
2781         Routine Description:
2782                 Load Tx rate switching parameters
2783
2784         Arguments:
2785                 Adapter                                         Pointer to our adapter
2786
2787         Return Value:
2788                 NDIS_STATUS_SUCCESS         firmware image load ok
2789                 NDIS_STATUS_FAILURE         image not found
2790
2791         IRQL = PASSIVE_LEVEL
2792
2793         Rate Table Format:
2794                 1. (B0: Valid Item number) (B1:Initial item from zero)
2795                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2796
2797         ========================================================================
2798 */
2799 NDIS_STATUS NICLoadRateSwitchingParams(
2800         IN PRTMP_ADAPTER pAd)
2801 {
2802         return NDIS_STATUS_SUCCESS;
2803 }
2804
2805 /*
2806         ========================================================================
2807
2808         Routine Description:
2809                 if  pSrc1 all zero with length Length, return 0.
2810                 If not all zero, return 1
2811
2812         Arguments:
2813                 pSrc1
2814
2815         Return Value:
2816                 1:                      not all zero
2817                 0:                      all zero
2818
2819         IRQL = DISPATCH_LEVEL
2820
2821         Note:
2822
2823         ========================================================================
2824 */
2825 ULONG   RTMPNotAllZero(
2826         IN      PVOID   pSrc1,
2827         IN      ULONG   Length)
2828 {
2829         PUCHAR  pMem1;
2830         ULONG   Index = 0;
2831
2832         pMem1 = (PUCHAR) pSrc1;
2833
2834         for (Index = 0; Index < Length; Index++)
2835         {
2836                 if (pMem1[Index] != 0x0)
2837                 {
2838                         break;
2839                 }
2840         }
2841
2842         if (Index == Length)
2843         {
2844                 return (0);
2845         }
2846         else
2847         {
2848                 return (1);
2849         }
2850 }
2851
2852 /*
2853         ========================================================================
2854
2855         Routine Description:
2856                 Compare two memory block
2857
2858         Arguments:
2859                 pSrc1           Pointer to first memory address
2860                 pSrc2           Pointer to second memory address
2861
2862         Return Value:
2863                 0:                      memory is equal
2864                 1:                      pSrc1 memory is larger
2865                 2:                      pSrc2 memory is larger
2866
2867         IRQL = DISPATCH_LEVEL
2868
2869         Note:
2870
2871         ========================================================================
2872 */
2873 ULONG   RTMPCompareMemory(
2874         IN      PVOID   pSrc1,
2875         IN      PVOID   pSrc2,
2876         IN      ULONG   Length)
2877 {
2878         PUCHAR  pMem1;
2879         PUCHAR  pMem2;
2880         ULONG   Index = 0;
2881
2882         pMem1 = (PUCHAR) pSrc1;
2883         pMem2 = (PUCHAR) pSrc2;
2884
2885         for (Index = 0; Index < Length; Index++)
2886         {
2887                 if (pMem1[Index] > pMem2[Index])
2888                         return (1);
2889                 else if (pMem1[Index] < pMem2[Index])
2890                         return (2);
2891         }
2892
2893         // Equal
2894         return (0);
2895 }
2896
2897 /*
2898         ========================================================================
2899
2900         Routine Description:
2901                 Zero out memory block
2902
2903         Arguments:
2904                 pSrc1           Pointer to memory address
2905                 Length          Size
2906
2907         Return Value:
2908                 None
2909
2910         IRQL = PASSIVE_LEVEL
2911         IRQL = DISPATCH_LEVEL
2912
2913         Note:
2914
2915         ========================================================================
2916 */
2917 VOID    RTMPZeroMemory(
2918         IN      PVOID   pSrc,
2919         IN      ULONG   Length)
2920 {
2921         PUCHAR  pMem;
2922         ULONG   Index = 0;
2923
2924         pMem = (PUCHAR) pSrc;
2925
2926         for (Index = 0; Index < Length; Index++)
2927         {
2928                 pMem[Index] = 0x00;
2929         }
2930 }
2931
2932 VOID    RTMPFillMemory(
2933         IN      PVOID   pSrc,
2934         IN      ULONG   Length,
2935         IN      UCHAR   Fill)
2936 {
2937         PUCHAR  pMem;
2938         ULONG   Index = 0;
2939
2940         pMem = (PUCHAR) pSrc;
2941
2942         for (Index = 0; Index < Length; Index++)
2943         {
2944                 pMem[Index] = Fill;
2945         }
2946 }
2947
2948 /*
2949         ========================================================================
2950
2951         Routine Description:
2952                 Copy data from memory block 1 to memory block 2
2953
2954         Arguments:
2955                 pDest           Pointer to destination memory address
2956                 pSrc            Pointer to source memory address
2957                 Length          Copy size
2958
2959         Return Value:
2960                 None
2961
2962         IRQL = PASSIVE_LEVEL
2963         IRQL = DISPATCH_LEVEL
2964
2965         Note:
2966
2967         ========================================================================
2968 */
2969 VOID    RTMPMoveMemory(
2970         OUT     PVOID   pDest,
2971         IN      PVOID   pSrc,
2972         IN      ULONG   Length)
2973 {
2974         PUCHAR  pMem1;
2975         PUCHAR  pMem2;
2976         UINT    Index;
2977
2978         ASSERT((Length==0) || (pDest && pSrc));
2979
2980         pMem1 = (PUCHAR) pDest;
2981         pMem2 = (PUCHAR) pSrc;
2982
2983         for (Index = 0; Index < Length; Index++)
2984         {
2985                 pMem1[Index] = pMem2[Index];
2986         }
2987 }
2988
2989 /*
2990         ========================================================================
2991
2992         Routine Description:
2993                 Initialize port configuration structure
2994
2995         Arguments:
2996                 Adapter                                         Pointer to our adapter
2997
2998         Return Value:
2999                 None
3000
3001         IRQL = PASSIVE_LEVEL
3002
3003         Note:
3004
3005         ========================================================================
3006 */
3007 VOID    UserCfgInit(
3008         IN      PRTMP_ADAPTER pAd)
3009 {
3010     UINT key_index, bss_index;
3011
3012         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3013
3014         //
3015         //  part I. intialize common configuration
3016         //
3017
3018         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3019         {
3020                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3021                 {
3022                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3023                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3024                 }
3025         }
3026
3027         pAd->Antenna.word = 0;
3028         pAd->CommonCfg.BBPCurrentBW = BW_20;
3029
3030         pAd->LedCntl.word = 0;
3031 #ifdef RT2860
3032         pAd->LedIndicatorStregth = 0;
3033         pAd->RLnkCtrlOffset = 0;
3034         pAd->HostLnkCtrlOffset = 0;
3035 #endif // RT2860 //
3036
3037         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
3038         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
3039         pAd->RfIcType = RFIC_2820;
3040
3041         // Init timer for reset complete event
3042         pAd->CommonCfg.CentralChannel = 1;
3043         pAd->bForcePrintTX = FALSE;
3044         pAd->bForcePrintRX = FALSE;
3045         pAd->bStaFifoTest = FALSE;
3046         pAd->bProtectionTest = FALSE;
3047         pAd->bHCCATest = FALSE;
3048         pAd->bGenOneHCCA = FALSE;
3049         pAd->CommonCfg.Dsifs = 10;      // in units of usec
3050         pAd->CommonCfg.TxPower = 100; //mW
3051         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3052         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3053         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3054         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3055         pAd->CommonCfg.RtsThreshold = 2347;
3056         pAd->CommonCfg.FragmentThreshold = 2346;
3057         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
3058         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3059         pAd->CommonCfg.PhyMode = 0xff;     // unknown
3060         pAd->CommonCfg.BandState = UNKNOWN_BAND;
3061         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3062         pAd->CommonCfg.RadarDetect.CSCount = 0;
3063         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3064         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3065         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3066         pAd->CommonCfg.bAPSDCapable = FALSE;
3067         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3068         pAd->CommonCfg.TriggerTimerCount = 0;
3069         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3070         pAd->CommonCfg.bCountryFlag = FALSE;
3071         pAd->CommonCfg.TxStream = 0;
3072         pAd->CommonCfg.RxStream = 0;
3073
3074         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3075
3076 #ifdef DOT11_N_SUPPORT
3077         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3078         pAd->HTCEnable = FALSE;
3079         pAd->bBroadComHT = FALSE;
3080         pAd->CommonCfg.bRdg = FALSE;
3081
3082 #ifdef DOT11N_DRAFT3
3083         pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell;   // Unit : TU. 5~1000
3084         pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell;     // Unit : TU. 10~1000
3085         pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval;  // Unit : Second
3086         pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel;       // Unit : TU. 200~10000
3087         pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel; // Unit : TU. 20~10000
3088         pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
3089         pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold;       // Unit : percentage
3090         pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
3091 #endif  // DOT11N_DRAFT3 //
3092
3093         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3094         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3095         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3096         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3097         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3098         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3099         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3100
3101         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3102         BATableInit(pAd, &pAd->BATable);
3103
3104         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3105         pAd->CommonCfg.bHTProtect = 1;
3106         pAd->CommonCfg.bMIMOPSEnable = TRUE;
3107         pAd->CommonCfg.bBADecline = FALSE;
3108         pAd->CommonCfg.bDisableReordering = FALSE;
3109
3110         pAd->CommonCfg.TxBASize = 7;
3111
3112         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3113 #endif // DOT11_N_SUPPORT //
3114
3115         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3116         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3117         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3118         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3119         pAd->CommonCfg.TxRate = RATE_6;
3120
3121         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3122         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3123         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3124
3125         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
3126
3127         //
3128         // part II. intialize STA specific configuration
3129         //
3130 #ifdef CONFIG_STA_SUPPORT
3131         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3132         {
3133                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3134                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3135                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3136                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3137
3138                 pAd->StaCfg.Psm = PWR_ACTIVE;
3139
3140                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3141                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3142                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3143                 pAd->StaCfg.bMixCipher = FALSE;
3144                 pAd->StaCfg.DefaultKeyId = 0;
3145
3146                 // 802.1x port control
3147                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3148                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3149                 pAd->StaCfg.LastMicErrorTime = 0;
3150                 pAd->StaCfg.MicErrCnt        = 0;
3151                 pAd->StaCfg.bBlockAssoc      = FALSE;
3152                 pAd->StaCfg.WpaState         = SS_NOTUSE;
3153
3154                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
3155
3156                 pAd->StaCfg.RssiTrigger = 0;
3157                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3158                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3159                 pAd->StaCfg.AtimWin = 0;
3160                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3161                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3162                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3163                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3164                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3165
3166                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3167                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3168         }
3169
3170 #ifdef EXT_BUILD_CHANNEL_LIST
3171         pAd->StaCfg.IEEE80211dClientMode = Rt802_11_D_None;
3172 #endif // EXT_BUILD_CHANNEL_LIST //
3173 #endif // CONFIG_STA_SUPPORT //
3174
3175         // global variables mXXXX used in MAC protocol state machines
3176         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3177         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3178         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3179
3180         // PHY specification
3181         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3182         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3183
3184 #ifdef CONFIG_STA_SUPPORT
3185         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3186         {
3187                 // user desired power mode
3188                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3189                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3190                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3191
3192 #ifdef LEAP_SUPPORT
3193                 // CCX v1.0 releated init value
3194                 RTMPInitTimer(pAd, &pAd->StaCfg.LeapAuthTimer, GET_TIMER_FUNCTION(LeapAuthTimeout), pAd, FALSE);
3195                 pAd->StaCfg.LeapAuthMode = CISCO_AuthModeLEAPNone;
3196                 pAd->StaCfg.bCkipOn = FALSE;
3197 #endif // LEAP_SUPPORT //
3198
3199                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3200                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3201
3202                 // Patch for Ndtest
3203                 pAd->StaCfg.ScanCnt = 0;
3204
3205                 // CCX 2.0 control flag init
3206                 pAd->StaCfg.CCXEnable = FALSE;
3207                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3208                 pAd->StaCfg.CCXQosECWMin        = 4;
3209                 pAd->StaCfg.CCXQosECWMax        = 10;
3210
3211                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3212                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3213                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3214                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3215                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3216
3217                 // Nitro mode control
3218                 pAd->StaCfg.bAutoReconnect = TRUE;
3219
3220                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3221                 // This patch is for driver wake up from standby mode, system will do scan right away.
3222                 pAd->StaCfg.LastScanTime = 0;
3223                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3224                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3225                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3226 #ifdef WPA_SUPPLICANT_SUPPORT
3227                 pAd->StaCfg.IEEE8021X = FALSE;
3228                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3229                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3230 #ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
3231                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3232 #endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
3233 #endif // WPA_SUPPLICANT_SUPPORT //
3234
3235         }
3236 #endif // CONFIG_STA_SUPPORT //
3237
3238         // Default for extra information is not valid
3239         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3240
3241         // Default Config change flag
3242         pAd->bConfigChanged = FALSE;
3243
3244         //
3245         // part III. AP configurations
3246         //
3247
3248
3249         //
3250         // part IV. others
3251         //
3252         // dynamic BBP R66:sensibity tuning to overcome background noise
3253         pAd->BbpTuning.bEnable                = TRUE;
3254         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3255         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3256         pAd->BbpTuning.R66Delta               = 4;
3257         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3258
3259         //
3260         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3261         // if not initial this value, the default value will be 0.
3262         //
3263         pAd->BbpTuning.R66CurrentValue = 0x38;
3264
3265         pAd->Bbp94 = BBPR94_DEFAULT;
3266         pAd->BbpForCCK = FALSE;
3267
3268         // initialize MAC table and allocate spin lock
3269         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3270         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3271         NdisAllocateSpinLock(&pAd->MacTabLock);
3272
3273 #ifdef RALINK_ATE
3274         NdisZeroMemory(&pAd->ate, sizeof(ATE_INFO));
3275         pAd->ate.Mode = ATE_STOP;
3276         pAd->ate.TxCount = 200;/* to exceed TX_RING_SIZE ... */
3277         pAd->ate.TxLength = 1024;
3278         pAd->ate.TxWI.ShortGI = 0;// LONG GI : 800 ns
3279         pAd->ate.TxWI.PHYMODE = MODE_CCK;
3280         pAd->ate.TxWI.MCS = 3;
3281         pAd->ate.TxWI.BW = BW_20;
3282         pAd->ate.Channel = 1;
3283         pAd->ate.QID = QID_AC_BE;
3284         pAd->ate.Addr1[0] = 0x00;
3285         pAd->ate.Addr1[1] = 0x11;
3286         pAd->ate.Addr1[2] = 0x22;
3287         pAd->ate.Addr1[3] = 0xAA;
3288         pAd->ate.Addr1[4] = 0xBB;
3289         pAd->ate.Addr1[5] = 0xCC;
3290         NdisMoveMemory(pAd->ate.Addr2, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3291         NdisMoveMemory(pAd->ate.Addr3, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3292         pAd->ate.bRxFer = 0;
3293         pAd->ate.bQATxStart = FALSE;
3294         pAd->ate.bQARxStart = FALSE;
3295 #ifdef RT2860
3296         pAd->ate.bFWLoading = FALSE;
3297 #endif // RT2860 //
3298 #ifdef RALINK_28xx_QA
3299         //pAd->ate.Repeat = 0;
3300         pAd->ate.TxStatus = 0;
3301         pAd->ate.AtePid = THREAD_PID_INIT_VALUE;
3302 #endif // RALINK_28xx_QA //
3303 #endif // RALINK_ATE //
3304
3305
3306         pAd->CommonCfg.bWiFiTest = FALSE;
3307 #ifdef RT2860
3308     pAd->bPCIclkOff = FALSE;
3309 #endif // RT2860 //
3310
3311
3312         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3313 }
3314
3315 // IRQL = PASSIVE_LEVEL
3316 UCHAR BtoH(char ch)
3317 {
3318         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3319         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3320         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3321         return(255);
3322 }
3323
3324 //
3325 //  FUNCTION: AtoH(char *, UCHAR *, int)
3326 //
3327 //  PURPOSE:  Converts ascii string to network order hex
3328 //
3329 //  PARAMETERS:
3330 //    src    - pointer to input ascii string
3331 //    dest   - pointer to output hex
3332 //    destlen - size of dest
3333 //
3334 //  COMMENTS:
3335 //
3336 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3337 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3338 //
3339 // IRQL = PASSIVE_LEVEL
3340
3341 void AtoH(char * src, UCHAR * dest, int destlen)
3342 {
3343         char * srcptr;
3344         PUCHAR destTemp;
3345
3346         srcptr = src;
3347         destTemp = (PUCHAR) dest;
3348
3349         while(destlen--)
3350         {
3351                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3352                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3353                 destTemp++;
3354         }
3355 }
3356
3357 VOID    RTMPPatchMacBbpBug(
3358         IN      PRTMP_ADAPTER   pAd)
3359 {
3360         ULONG   Index;
3361
3362         // Initialize BBP register to default value
3363         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3364         {
3365                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3366         }
3367
3368         // Initialize RF register to default value
3369         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3370         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3371
3372         // Re-init BBP register from EEPROM value
3373         NICInitAsicFromEEPROM(pAd);
3374 }
3375
3376 /*
3377         ========================================================================
3378
3379         Routine Description:
3380                 Init timer objects
3381
3382         Arguments:
3383                 pAd                     Pointer to our adapter
3384                 pTimer                          Timer structure
3385                 pTimerFunc                      Function to execute when timer expired
3386                 Repeat                          Ture for period timer
3387
3388         Return Value:
3389                 None
3390
3391         Note:
3392
3393         ========================================================================
3394 */
3395 VOID    RTMPInitTimer(
3396         IN      PRTMP_ADAPTER                   pAd,
3397         IN      PRALINK_TIMER_STRUCT    pTimer,
3398         IN      PVOID                                   pTimerFunc,
3399         IN      PVOID                                   pData,
3400         IN      BOOLEAN                                 Repeat)
3401 {
3402         //
3403         // Set Valid to TRUE for later used.
3404         // It will crash if we cancel a timer or set a timer
3405         // that we haven't initialize before.
3406         //
3407         pTimer->Valid      = TRUE;
3408
3409         pTimer->PeriodicType = Repeat;
3410         pTimer->State      = FALSE;
3411         pTimer->cookie = (ULONG) pData;
3412
3413
3414         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3415 }
3416
3417 /*
3418         ========================================================================
3419
3420         Routine Description:
3421                 Init timer objects
3422
3423         Arguments:
3424                 pTimer                          Timer structure
3425                 Value                           Timer value in milliseconds
3426
3427         Return Value:
3428                 None
3429
3430         Note:
3431                 To use this routine, must call RTMPInitTimer before.
3432
3433         ========================================================================
3434 */
3435 VOID    RTMPSetTimer(
3436         IN      PRALINK_TIMER_STRUCT    pTimer,
3437         IN      ULONG                                   Value)
3438 {
3439         if (pTimer->Valid)
3440         {
3441                 pTimer->TimerValue = Value;
3442                 pTimer->State      = FALSE;
3443                 if (pTimer->PeriodicType == TRUE)
3444                 {
3445                         pTimer->Repeat = TRUE;
3446                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3447                 }
3448                 else
3449                 {
3450                         pTimer->Repeat = FALSE;
3451                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3452                 }
3453         }
3454         else
3455         {
3456                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3457         }
3458 }
3459
3460
3461 /*
3462         ========================================================================
3463
3464         Routine Description:
3465                 Init timer objects
3466
3467         Arguments:
3468                 pTimer                          Timer structure
3469                 Value                           Timer value in milliseconds
3470
3471         Return Value:
3472                 None
3473
3474         Note:
3475                 To use this routine, must call RTMPInitTimer before.
3476
3477         ========================================================================
3478 */
3479 VOID    RTMPModTimer(
3480         IN      PRALINK_TIMER_STRUCT    pTimer,
3481         IN      ULONG                                   Value)
3482 {
3483         BOOLEAN Cancel;
3484
3485         if (pTimer->Valid)
3486         {
3487                 pTimer->TimerValue = Value;
3488                 pTimer->State      = FALSE;
3489                 if (pTimer->PeriodicType == TRUE)
3490                 {
3491                         RTMPCancelTimer(pTimer, &Cancel);
3492                         RTMPSetTimer(pTimer, Value);
3493                 }
3494                 else
3495                 {
3496                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3497                 }
3498         }
3499         else
3500         {
3501                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3502         }
3503 }
3504
3505 /*
3506         ========================================================================
3507
3508         Routine Description:
3509                 Cancel timer objects
3510
3511         Arguments:
3512                 Adapter                                         Pointer to our adapter
3513
3514         Return Value:
3515                 None
3516
3517         IRQL = PASSIVE_LEVEL
3518         IRQL = DISPATCH_LEVEL
3519
3520         Note:
3521                 1.) To use this routine, must call RTMPInitTimer before.
3522                 2.) Reset NIC to initial state AS IS system boot up time.
3523
3524         ========================================================================
3525 */
3526 VOID    RTMPCancelTimer(
3527         IN      PRALINK_TIMER_STRUCT    pTimer,
3528         OUT     BOOLEAN                                 *pCancelled)
3529 {
3530         if (pTimer->Valid)
3531         {
3532                 if (pTimer->State == FALSE)
3533                         pTimer->Repeat = FALSE;
3534                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3535
3536                 if (*pCancelled == TRUE)
3537                         pTimer->State = TRUE;
3538
3539         }
3540         else
3541         {
3542                 //
3543                 // NdisMCancelTimer just canced the timer and not mean release the timer.
3544                 // And don't set the "Valid" to False. So that we can use this timer again.
3545                 //
3546                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3547         }
3548 }
3549
3550 /*
3551         ========================================================================
3552
3553         Routine Description:
3554                 Set LED Status
3555
3556         Arguments:
3557                 pAd                                             Pointer to our adapter
3558                 Status                                  LED Status
3559
3560         Return Value:
3561                 None
3562
3563         IRQL = PASSIVE_LEVEL
3564         IRQL = DISPATCH_LEVEL
3565
3566         Note:
3567
3568         ========================================================================
3569 */
3570 VOID RTMPSetLED(
3571         IN PRTMP_ADAPTER        pAd,
3572         IN UCHAR                        Status)
3573 {
3574         //ULONG                 data;
3575         UCHAR                   HighByte = 0;
3576         UCHAR                   LowByte;
3577
3578 // In ATE mode of RT2860 AP/STA, we have erased 8051 firmware.
3579 // So LED mode is not supported when ATE is running.
3580 #ifdef RALINK_ATE
3581         if (ATE_ON(pAd))
3582                 return;
3583 #endif // RALINK_ATE //
3584
3585         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3586         switch (Status)
3587         {
3588                 case LED_LINK_DOWN:
3589                         HighByte = 0x20;
3590                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3591                         pAd->LedIndicatorStregth = 0;
3592                         break;
3593                 case LED_LINK_UP:
3594                         if (pAd->CommonCfg.Channel > 14)
3595                                 HighByte = 0xa0;
3596                         else
3597                                 HighByte = 0x60;
3598                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3599                         break;
3600                 case LED_RADIO_ON:
3601                         HighByte = 0x20;
3602                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3603                         break;
3604                 case LED_HALT:
3605                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3606                 case LED_RADIO_OFF:
3607                         HighByte = 0;
3608                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3609                         break;
3610         case LED_WPS:
3611                         HighByte = 0x10;
3612                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3613                         break;
3614                 case LED_ON_SITE_SURVEY:
3615                         HighByte = 0x08;
3616                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3617                         break;
3618                 case LED_POWER_UP:
3619                         HighByte = 0x04;
3620                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3621                         break;
3622                 default:
3623                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3624                         break;
3625         }
3626
3627     //
3628         // Keep LED status for LED SiteSurvey mode.
3629         // After SiteSurvey, we will set the LED mode to previous status.
3630         //
3631         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3632                 pAd->LedStatus = Status;
3633
3634         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3635 }
3636
3637 /*
3638         ========================================================================
3639
3640         Routine Description:
3641                 Set LED Signal Stregth
3642
3643         Arguments:
3644                 pAd                                             Pointer to our adapter
3645                 Dbm                                             Signal Stregth
3646
3647         Return Value:
3648                 None
3649
3650         IRQL = PASSIVE_LEVEL
3651
3652         Note:
3653                 Can be run on any IRQL level.
3654
3655                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3656                 <= -90  No Signal
3657                 <= -81  Very Low
3658                 <= -71  Low
3659                 <= -67  Good
3660                 <= -57  Very Good
3661                  > -57  Excellent
3662         ========================================================================
3663 */
3664 VOID RTMPSetSignalLED(
3665         IN PRTMP_ADAPTER        pAd,
3666         IN NDIS_802_11_RSSI Dbm)
3667 {
3668         UCHAR           nLed = 0;
3669
3670         //
3671         // if not Signal Stregth, then do nothing.
3672         //
3673         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3674         {
3675                 return;
3676         }
3677
3678         if (Dbm <= -90)
3679                 nLed = 0;
3680         else if (Dbm <= -81)
3681                 nLed = 1;
3682         else if (Dbm <= -71)
3683                 nLed = 3;
3684         else if (Dbm <= -67)
3685                 nLed = 7;
3686         else if (Dbm <= -57)
3687                 nLed = 15;
3688         else
3689                 nLed = 31;
3690
3691         //
3692         // Update Signal Stregth to firmware if changed.
3693         //
3694         if (pAd->LedIndicatorStregth != nLed)
3695         {
3696                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3697                 pAd->LedIndicatorStregth = nLed;
3698         }
3699 }
3700
3701 /*
3702         ========================================================================
3703
3704         Routine Description:
3705                 Enable RX
3706
3707         Arguments:
3708                 pAd                                             Pointer to our adapter
3709
3710         Return Value:
3711                 None
3712
3713         IRQL <= DISPATCH_LEVEL
3714
3715         Note:
3716                 Before Enable RX, make sure you have enabled Interrupt.
3717         ========================================================================
3718 */
3719 VOID RTMPEnableRxTx(
3720         IN PRTMP_ADAPTER        pAd)
3721 {
3722         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3723
3724         // Enable Rx DMA.
3725         RT28XXDMAEnable(pAd);
3726
3727         // enable RX of MAC block
3728         if (pAd->OpMode == OPMODE_AP)
3729         {
3730                 UINT32 rx_filter_flag = APNORMAL;
3731
3732
3733                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3734         }
3735         else
3736         {
3737                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
3738         }
3739
3740         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3741         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3742 }
3743
3744